arch/mips/kernel/smp.c

   1 /*
   2  * This program is free software; you can redistribute it and/or
   3  * modify it under the terms of the GNU General Public License
   4  * as published by the Free Software Foundation; either version 2
   5  * of the License, or (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  15  *
  16  * Copyright (C) 2000, 2001 Kanoj Sarcar
  17  * Copyright (C) 2000, 2001 Ralf Baechle
  18  * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19  * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20  */
  21 #include <linux/cache.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/smp.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/threads.h>
  28 #include <linux/module.h>
  29 #include <linux/time.h>
  30 #include <linux/timex.h>
  31 #include <linux/sched.h>
  32 #include <linux/cpumask.h>
  33 #include <linux/cpu.h>
  34 #include <linux/err.h>
  35 #include <linux/ftrace.h>
  36 #include <linux/irqdomain.h>
  37 #include <linux/of.h>
  38 #include <linux/of_irq.h>
  39
  40 #include <linux/atomic.h>
  41 #include <asm/cpu.h>
  42 #include <asm/processor.h>
  43 #include <asm/idle.h>
  44 #include <asm/r4k-timer.h>
  45 #include <asm/mips-cpc.h>
  46 #include <asm/mmu_context.h>
  47 #include <asm/time.h>
  48 #include <asm/setup.h>
  49 #include <asm/maar.h>
  50
  51 cpumask_t cpu_callin_map;               /* Bitmask of started secondaries */
  52
  53 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
  54 EXPORT_SYMBOL(__cpu_number_map);
  55
  56 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
  57 EXPORT_SYMBOL(__cpu_logical_map);
  58
  59 /* Number of TCs (or siblings in Intel speak) per CPU core */
  60 int smp_num_siblings = 1;
  61 EXPORT_SYMBOL(smp_num_siblings);
  62
  63 /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  64 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  65 EXPORT_SYMBOL(cpu_sibling_map);
  66
  67 /* representing the core map of multi-core chips of each logical CPU */
  68 cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
  69 EXPORT_SYMBOL(cpu_core_map);
  70
  71 /*
  72  * A logcal cpu mask containing only one VPE per core to
  73  * reduce the number of IPIs on large MT systems.
  74  */
  75 cpumask_t cpu_foreign_map[NR_CPUS] __read_mostly;
  76 EXPORT_SYMBOL(cpu_foreign_map);
  77
  78 /* representing cpus for which sibling maps can be computed */
  79 static cpumask_t cpu_sibling_setup_map;
  80
  81 /* representing cpus for which core maps can be computed */
  82 static cpumask_t cpu_core_setup_map;
  83
  84 cpumask_t cpu_coherent_mask;
  85
  86 #ifdef CONFIG_GENERIC_IRQ_IPI
  87 static struct irq_desc *call_desc;
  88 static struct irq_desc *sched_desc;
  89 #endif
  90
  91 static inline void set_cpu_sibling_map(int cpu)
  92 {
  93         int i;
  94
  95         cpumask_set_cpu(cpu, &cpu_sibling_setup_map);
  96
  97         if (smp_num_siblings > 1) {
  98                 for_each_cpu(i, &cpu_sibling_setup_map) {
  99                         if (cpu_data[cpu].package == cpu_data[i].package &&
 100                                     cpu_data[cpu].core == cpu_data[i].core) {
 101                                 cpumask_set_cpu(i, &cpu_sibling_map[cpu]);
 102                                 cpumask_set_cpu(cpu, &cpu_sibling_map[i]);
 103                         }
 104                 }
 105         } else
 106                 cpumask_set_cpu(cpu, &cpu_sibling_map[cpu]);
 107 }
 108
 109 static inline void set_cpu_core_map(int cpu)
 110 {
 111         int i;
 112
 113         cpumask_set_cpu(cpu, &cpu_core_setup_map);
 114
 115         for_each_cpu(i, &cpu_core_setup_map) {
 116                 if (cpu_data[cpu].package == cpu_data[i].package) {
 117                         cpumask_set_cpu(i, &cpu_core_map[cpu]);
 118                         cpumask_set_cpu(cpu, &cpu_core_map[i]);
 119                 }
 120         }
 121 }
 122
 123 /*
 124  * Calculate a new cpu_foreign_map mask whenever a
 125  * new cpu appears or disappears.
 126  */
 127 void calculate_cpu_foreign_map(void)
 128 {
 129         int i, k, core_present;
 130         cpumask_t temp_foreign_map;
 131
 132         /* Re-calculate the mask */
 133         cpumask_clear(&temp_foreign_map);
 134         for_each_online_cpu(i) {
 135                 core_present = 0;
 136                 for_each_cpu(k, &temp_foreign_map)
 137                         if (cpu_data[i].package == cpu_data[k].package &&
 138                             cpu_data[i].core == cpu_data[k].core)
 139                                 core_present = 1;
 140                 if (!core_present)
 141                         cpumask_set_cpu(i, &temp_foreign_map);
 142         }
 143
 144         for_each_online_cpu(i)
 145                 cpumask_andnot(&cpu_foreign_map[i],
 146                                &temp_foreign_map, &cpu_sibling_map[i]);
 147 }
 148
 149 struct plat_smp_ops *mp_ops;
 150 EXPORT_SYMBOL(mp_ops);
 151
 152 void register_smp_ops(struct plat_smp_ops *ops)
 153 {
 154         if (mp_ops)
 155                 printk(KERN_WARNING "Overriding previously set SMP ops\n");
 156
 157         mp_ops = ops;
 158 }
 159
 160 #ifdef CONFIG_GENERIC_IRQ_IPI
 161 void mips_smp_send_ipi_single(int cpu, unsigned int action)
 162 {
 163         mips_smp_send_ipi_mask(cpumask_of(cpu), action);
 164 }
 165
 166 void mips_smp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
 167 {
 168         unsigned long flags;
 169         unsigned int core;
 170         int cpu;
 171
 172         local_irq_save(flags);
 173
 174         switch (action) {
 175         case SMP_CALL_FUNCTION:
 176                 __ipi_send_mask(call_desc, mask);
 177                 break;
 178
 179         case SMP_RESCHEDULE_YOURSELF:
 180                 __ipi_send_mask(sched_desc, mask);
 181                 break;
 182
 183         default:
 184                 BUG();
 185         }
 186
 187         if (mips_cpc_present()) {
 188                 for_each_cpu(cpu, mask) {
 189                         core = cpu_data[cpu].core;
 190
 191                         if (core == current_cpu_data.core)
 192                                 continue;
 193
 194                         while (!cpumask_test_cpu(cpu, &cpu_coherent_mask)) {
 195                                 mips_cpc_lock_other(core);
 196                                 write_cpc_co_cmd(CPC_Cx_CMD_PWRUP);
 197                                 mips_cpc_unlock_other();
 198                         }
 199                 }
 200         }
 201
 202         local_irq_restore(flags);
 203 }
 204
 205
 206 static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
 207 {
 208         scheduler_ipi();
 209
 210         return IRQ_HANDLED;
 211 }
 212
 213 static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
 214 {
 215         generic_smp_call_function_interrupt();
 216
 217         return IRQ_HANDLED;
 218 }
 219
 220 static struct irqaction irq_resched = {
 221         .handler        = ipi_resched_interrupt,
 222         .flags          = IRQF_PERCPU,
 223         .name           = "IPI resched"
 224 };
 225
 226 static struct irqaction irq_call = {
 227         .handler        = ipi_call_interrupt,
 228         .flags          = IRQF_PERCPU,
 229         .name           = "IPI call"
 230 };
 231
 232 static __init void smp_ipi_init_one(unsigned int virq,
 233                                     struct irqaction *action)
 234 {
 235         int ret;
 236
 237         irq_set_handler(virq, handle_percpu_irq);
 238         ret = setup_irq(virq, action);
 239         BUG_ON(ret);
 240 }
 241
 242 static int __init mips_smp_ipi_init(void)
 243 {
 244         unsigned int call_virq, sched_virq;
 245         struct irq_domain *ipidomain;
 246         struct device_node *node;
 247
 248         node = of_irq_find_parent(of_root);
 249         ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
 250
 251         /*
 252          * Some platforms have half DT setup. So if we found irq node but
 253          * didn't find an ipidomain, try to search for one that is not in the
 254          * DT.
 255          */
 256         if (node && !ipidomain)
 257                 ipidomain = irq_find_matching_host(NULL, DOMAIN_BUS_IPI);
 258
 259         /*
 260          * There are systems which only use IPI domains some of the time,
 261          * depending upon configuration we don't know until runtime. An
 262          * example is Malta where we may compile in support for GIC & the
 263          * MT ASE, but run on a system which has multiple VPEs in a single
 264          * core and doesn't include a GIC. Until all IPI implementations
 265          * have been converted to use IPI domains the best we can do here
 266          * is to return & hope some other code sets up the IPIs.
 267          */
 268         if (!ipidomain)
 269                 return 0;
 270
 271         call_virq = irq_reserve_ipi(ipidomain, cpu_possible_mask);
 272         BUG_ON(!call_virq);
 273
 274         sched_virq = irq_reserve_ipi(ipidomain, cpu_possible_mask);
 275         BUG_ON(!sched_virq);
 276
 277         if (irq_domain_is_ipi_per_cpu(ipidomain)) {
 278                 int cpu;
 279
 280                 for_each_cpu(cpu, cpu_possible_mask) {
 281                         smp_ipi_init_one(call_virq + cpu, &irq_call);
 282                         smp_ipi_init_one(sched_virq + cpu, &irq_resched);
 283                 }
 284         } else {
 285                 smp_ipi_init_one(call_virq, &irq_call);
 286                 smp_ipi_init_one(sched_virq, &irq_resched);
 287         }
 288
 289         call_desc = irq_to_desc(call_virq);
 290         sched_desc = irq_to_desc(sched_virq);
 291
 292         return 0;
 293 }
 294 early_initcall(mips_smp_ipi_init);
 295 #endif
 296
 297 /*
 298  * First C code run on the secondary CPUs after being started up by
 299  * the master.
 300  */
 301 asmlinkage void start_secondary(void)
 302 {
 303         unsigned int cpu;
 304
 305         cpu_probe();
 306         per_cpu_trap_init(false);
 307         mips_clockevent_init();
 308         mp_ops->init_secondary();
 309         cpu_report();
 310         maar_init();
 311
 312         /*
 313          * XXX parity protection should be folded in here when it's converted
 314          * to an option instead of something based on .cputype
 315          */
 316
 317         calibrate_delay();
 318         preempt_disable();
 319         cpu = smp_processor_id();
 320         cpu_data[cpu].udelay_val = loops_per_jiffy;
 321
 322         cpumask_set_cpu(cpu, &cpu_coherent_mask);
 323         notify_cpu_starting(cpu);
 324
 325         cpumask_set_cpu(cpu, &cpu_callin_map);
 326         synchronise_count_slave(cpu);
 327
 328         set_cpu_online(cpu, true);
 329
 330         set_cpu_sibling_map(cpu);
 331         set_cpu_core_map(cpu);
 332
 333         calculate_cpu_foreign_map();
 334
 335         /*
 336          * irq will be enabled in ->smp_finish(), enabling it too early
 337          * is dangerous.
 338          */
 339         WARN_ON_ONCE(!irqs_disabled());
 340         mp_ops->smp_finish();
 341
 342         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
 343 }
 344
 345 static void stop_this_cpu(void *dummy)
 346 {
 347         /*
 348          * Remove this CPU:
 349          */
 350
 351         set_cpu_online(smp_processor_id(), false);
 352         calculate_cpu_foreign_map();
 353         local_irq_disable();
 354         while (1);
 355 }
 356
 357 void smp_send_stop(void)
 358 {
 359         smp_call_function(stop_this_cpu, NULL, 0);
 360 }
 361
 362 void __init smp_cpus_done(unsigned int max_cpus)
 363 {
 364 }
 365
 366 /* called from main before smp_init() */
 367 void __init smp_prepare_cpus(unsigned int max_cpus)
 368 {
 369         init_new_context(current, &init_mm);
 370         current_thread_info()->cpu = 0;
 371         mp_ops->prepare_cpus(max_cpus);
 372         set_cpu_sibling_map(0);
 373         set_cpu_core_map(0);
 374         calculate_cpu_foreign_map();
 375 #ifndef CONFIG_HOTPLUG_CPU
 376         init_cpu_present(cpu_possible_mask);
 377 #endif
 378         cpumask_copy(&cpu_coherent_mask, cpu_possible_mask);
 379 }
 380
 381 /* preload SMP state for boot cpu */
 382 void smp_prepare_boot_cpu(void)
 383 {
 384         set_cpu_possible(0, true);
 385         set_cpu_online(0, true);
 386         cpumask_set_cpu(0, &cpu_callin_map);
 387 }
 388
 389 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 390 {
 391         mp_ops->boot_secondary(cpu, tidle);
 392
 393         /*
 394          * Trust is futile.  We should really have timeouts ...
 395          */
 396         while (!cpumask_test_cpu(cpu, &cpu_callin_map)) {
 397                 udelay(100);
 398                 schedule();
 399         }
 400
 401         synchronise_count_master(cpu);
 402         return 0;
 403 }
 404
 405 /* Not really SMP stuff ... */
 406 int setup_profiling_timer(unsigned int multiplier)
 407 {
 408         return 0;
 409 }
 410
 411 static void flush_tlb_all_ipi(void *info)
 412 {
 413         local_flush_tlb_all();
 414 }
 415
 416 void flush_tlb_all(void)
 417 {
 418         on_each_cpu(flush_tlb_all_ipi, NULL, 1);
 419 }
 420
 421 static void flush_tlb_mm_ipi(void *mm)
 422 {
 423         local_flush_tlb_mm((struct mm_struct *)mm);
 424 }
 425
 426 /*
 427  * Special Variant of smp_call_function for use by TLB functions:
 428  *
 429  *  o No return value
 430  *  o collapses to normal function call on UP kernels
 431  *  o collapses to normal function call on systems with a single shared
 432  *    primary cache.
 433  */
 434 static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
 435 {
 436         smp_call_function(func, info, 1);
 437 }
 438
 439 static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
 440 {
 441         preempt_disable();
 442
 443         smp_on_other_tlbs(func, info);
 444         func(info);
 445
 446         preempt_enable();
 447 }
 448
 449 /*
 450  * The following tlb flush calls are invoked when old translations are
 451  * being torn down, or pte attributes are changing. For single threaded
 452  * address spaces, a new context is obtained on the current cpu, and tlb
 453  * context on other cpus are invalidated to force a new context allocation
 454  * at switch_mm time, should the mm ever be used on other cpus. For
 455  * multithreaded address spaces, intercpu interrupts have to be sent.
 456  * Another case where intercpu interrupts are required is when the target
 457  * mm might be active on another cpu (eg debuggers doing the flushes on
 458  * behalf of debugees, kswapd stealing pages from another process etc).
 459  * Kanoj 07/00.
 460  */
 461
 462 void flush_tlb_mm(struct mm_struct *mm)
 463 {
 464         preempt_disable();
 465
 466         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 467                 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
 468         } else {
 469                 unsigned int cpu;
 470
 471                 for_each_online_cpu(cpu) {
 472                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 473                                 cpu_context(cpu, mm) = 0;
 474                 }
 475         }
 476         local_flush_tlb_mm(mm);
 477
 478         preempt_enable();
 479 }
 480
 481 struct flush_tlb_data {
 482         struct vm_area_struct *vma;
 483         unsigned long addr1;
 484         unsigned long addr2;
 485 };
 486
 487 static void flush_tlb_range_ipi(void *info)
 488 {
 489         struct flush_tlb_data *fd = info;
 490
 491         local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
 492 }
 493
 494 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 495 {
 496         struct mm_struct *mm = vma->vm_mm;
 497
 498         preempt_disable();
 499         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 500                 struct flush_tlb_data fd = {
 501                         .vma = vma,
 502                         .addr1 = start,
 503                         .addr2 = end,
 504                 };
 505
 506                 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
 507         } else {
 508                 unsigned int cpu;
 509                 int exec = vma->vm_flags & VM_EXEC;
 510
 511                 for_each_online_cpu(cpu) {
 512                         /*
 513                          * flush_cache_range() will only fully flush icache if
 514                          * the VMA is executable, otherwise we must invalidate
 515                          * ASID without it appearing to has_valid_asid() as if
 516                          * mm has been completely unused by that CPU.
 517                          */
 518                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 519                                 cpu_context(cpu, mm) = !exec;
 520                 }
 521         }
 522         local_flush_tlb_range(vma, start, end);
 523         preempt_enable();
 524 }
 525
 526 static void flush_tlb_kernel_range_ipi(void *info)
 527 {
 528         struct flush_tlb_data *fd = info;
 529
 530         local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
 531 }
 532
 533 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
 534 {
 535         struct flush_tlb_data fd = {
 536                 .addr1 = start,
 537                 .addr2 = end,
 538         };
 539
 540         on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
 541 }
 542
 543 static void flush_tlb_page_ipi(void *info)
 544 {
 545         struct flush_tlb_data *fd = info;
 546
 547         local_flush_tlb_page(fd->vma, fd->addr1);
 548 }
 549
 550 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 551 {
 552         preempt_disable();
 553         if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
 554                 struct flush_tlb_data fd = {
 555                         .vma = vma,
 556                         .addr1 = page,
 557                 };
 558
 559                 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
 560         } else {
 561                 unsigned int cpu;
 562
 563                 for_each_online_cpu(cpu) {
 564                         /*
 565                          * flush_cache_page() only does partial flushes, so
 566                          * invalidate ASID without it appearing to
 567                          * has_valid_asid() as if mm has been completely unused
 568                          * by that CPU.
 569                          */
 570                         if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
 571                                 cpu_context(cpu, vma->vm_mm) = 1;
 572                 }
 573         }
 574         local_flush_tlb_page(vma, page);
 575         preempt_enable();
 576 }
 577
 578 static void flush_tlb_one_ipi(void *info)
 579 {
 580         unsigned long vaddr = (unsigned long) info;
 581
 582         local_flush_tlb_one(vaddr);
 583 }
 584
 585 void flush_tlb_one(unsigned long vaddr)
 586 {
 587         smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
 588 }
 589
 590 EXPORT_SYMBOL(flush_tlb_page);
 591 EXPORT_SYMBOL(flush_tlb_one);
 592
 593 #if defined(CONFIG_KEXEC)
 594 void (*dump_ipi_function_ptr)(void *) = NULL;
 595 void dump_send_ipi(void (*dump_ipi_callback)(void *))
 596 {
 597         int i;
 598         int cpu = smp_processor_id();
 599
 600         dump_ipi_function_ptr = dump_ipi_callback;
 601         smp_mb();
 602         for_each_online_cpu(i)
 603                 if (i != cpu)
 604                         mp_ops->send_ipi_single(i, SMP_DUMP);
 605
 606 }
 607 EXPORT_SYMBOL(dump_send_ipi);
 608 #endif
 609
 610 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 611
 612 static DEFINE_PER_CPU(atomic_t, tick_broadcast_count);
 613 static DEFINE_PER_CPU(struct call_single_data, tick_broadcast_csd);
 614
 615 void tick_broadcast(const struct cpumask *mask)
 616 {
 617         atomic_t *count;
 618         struct call_single_data *csd;
 619         int cpu;
 620
 621         for_each_cpu(cpu, mask) {
 622                 count = &per_cpu(tick_broadcast_count, cpu);
 623                 csd = &per_cpu(tick_broadcast_csd, cpu);
 624
 625                 if (atomic_inc_return(count) == 1)
 626                         smp_call_function_single_async(cpu, csd);
 627         }
 628 }
 629
 630 static void tick_broadcast_callee(void *info)
 631 {
 632         int cpu = smp_processor_id();
 633         tick_receive_broadcast();
 634         atomic_set(&per_cpu(tick_broadcast_count, cpu), 0);
 635 }
 636
 637 static int __init tick_broadcast_init(void)
 638 {
 639         struct call_single_data *csd;
 640         int cpu;
 641
 642         for (cpu = 0; cpu < NR_CPUS; cpu++) {
 643                 csd = &per_cpu(tick_broadcast_csd, cpu);
 644                 csd->func = tick_broadcast_callee;
 645         }
 646
 647         return 0;
 648 }
 649 early_initcall(tick_broadcast_init);
 650
 651 #endif /* CONFIG_GENERIC_CLOCKEVENTS_BROADCAST */