4 * Linux architectural port borrowing liberally from similar works of
5 * others. All original copyrights apply as per the original source
8 * Modifications for the OpenRISC architecture:
9 * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
10 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
17 * This file handles the architecture-dependent parts of initialization
20 #include <linux/errno.h>
21 #include <linux/sched.h>
22 #include <linux/kernel.h>
24 #include <linux/stddef.h>
25 #include <linux/unistd.h>
26 #include <linux/ptrace.h>
27 #include <linux/slab.h>
28 #include <linux/tty.h>
29 #include <linux/ioport.h>
30 #include <linux/delay.h>
31 #include <linux/console.h>
32 #include <linux/init.h>
33 #include <linux/bootmem.h>
34 #include <linux/seq_file.h>
35 #include <linux/serial.h>
36 #include <linux/initrd.h>
37 #include <linux/of_fdt.h>
39 #include <linux/memblock.h>
40 #include <linux/device.h>
41 #include <linux/of_platform.h>
43 #include <asm/segment.h>
44 #include <asm/pgtable.h>
45 #include <asm/types.h>
46 #include <asm/setup.h>
48 #include <asm/cpuinfo.h>
49 #include <asm/delay.h>
53 static unsigned long __init setup_memory(void)
55 unsigned long bootmap_size;
56 unsigned long ram_start_pfn;
57 unsigned long free_ram_start_pfn;
58 unsigned long ram_end_pfn;
59 phys_addr_t memory_start, memory_end;
60 struct memblock_region *region;
62 memory_end = memory_start = 0;
64 /* Find main memory where is the kernel */
65 for_each_memblock(memory, region) {
66 memory_start = region->base;
67 memory_end = region->base + region->size;
68 printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
69 memory_start, memory_end);
76 ram_start_pfn = PFN_UP(memory_start);
77 /* free_ram_start_pfn is first page after kernel */
78 free_ram_start_pfn = PFN_UP(__pa(&_end));
79 ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
81 max_pfn = ram_end_pfn;
84 * initialize the boot-time allocator (with low memory only).
86 * This makes the memory from the end of the kernel to the end of
88 * init_bootmem sets the global values min_low_pfn, max_low_pfn.
90 bootmap_size = init_bootmem(free_ram_start_pfn,
91 ram_end_pfn - ram_start_pfn);
92 free_bootmem(PFN_PHYS(free_ram_start_pfn),
93 (ram_end_pfn - free_ram_start_pfn) << PAGE_SHIFT);
94 reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,
97 for_each_memblock(reserved, region) {
98 printk(KERN_INFO "Reserved - 0x%08x-0x%08x\n",
99 (u32) region->base, (u32) region->size);
100 reserve_bootmem(region->base, region->size, BOOTMEM_DEFAULT);
106 struct cpuinfo cpuinfo;
108 static void print_cpuinfo(void)
110 unsigned long upr = mfspr(SPR_UPR);
111 unsigned long vr = mfspr(SPR_VR);
112 unsigned int version;
113 unsigned int revision;
115 version = (vr & SPR_VR_VER) >> 24;
116 revision = (vr & SPR_VR_REV);
118 printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
119 version, revision, cpuinfo.clock_frequency / 1000000);
121 if (!(upr & SPR_UPR_UP)) {
123 "-- no UPR register... unable to detect configuration\n");
127 if (upr & SPR_UPR_DCP)
129 "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
130 cpuinfo.dcache_size, cpuinfo.dcache_block_size, 1);
132 printk(KERN_INFO "-- dcache disabled\n");
133 if (upr & SPR_UPR_ICP)
135 "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
136 cpuinfo.icache_size, cpuinfo.icache_block_size, 1);
138 printk(KERN_INFO "-- icache disabled\n");
140 if (upr & SPR_UPR_DMP)
141 printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
142 1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
143 1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
144 if (upr & SPR_UPR_IMP)
145 printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
146 1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
147 1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
149 printk(KERN_INFO "-- additional features:\n");
150 if (upr & SPR_UPR_DUP)
151 printk(KERN_INFO "-- debug unit\n");
152 if (upr & SPR_UPR_PCUP)
153 printk(KERN_INFO "-- performance counters\n");
154 if (upr & SPR_UPR_PMP)
155 printk(KERN_INFO "-- power management\n");
156 if (upr & SPR_UPR_PICP)
157 printk(KERN_INFO "-- PIC\n");
158 if (upr & SPR_UPR_TTP)
159 printk(KERN_INFO "-- timer\n");
160 if (upr & SPR_UPR_CUP)
161 printk(KERN_INFO "-- custom unit(s)\n");
164 void __init setup_cpuinfo(void)
166 struct device_node *cpu;
167 unsigned long iccfgr, dccfgr;
168 unsigned long cache_set_size, cache_ways;
170 cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
172 panic("No compatible CPU found in device tree...\n");
174 iccfgr = mfspr(SPR_ICCFGR);
175 cache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
176 cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
177 cpuinfo.icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
178 cpuinfo.icache_size =
179 cache_set_size * cache_ways * cpuinfo.icache_block_size;
181 dccfgr = mfspr(SPR_DCCFGR);
182 cache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
183 cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
184 cpuinfo.dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
185 cpuinfo.dcache_size =
186 cache_set_size * cache_ways * cpuinfo.dcache_block_size;
188 if (of_property_read_u32(cpu, "clock-frequency",
189 &cpuinfo.clock_frequency)) {
191 "Device tree missing CPU 'clock-frequency' parameter."
192 "Assuming frequency 25MHZ"
193 "This is probably not what you want.");
204 * Handles the pointer to the device tree that this kernel is to use
205 * for establishing the available platform devices.
207 * Falls back on built-in device tree in case null pointer is passed.
210 void __init or32_early_setup(unsigned int fdt)
213 early_init_devtree((void*) fdt);
214 printk(KERN_INFO "FDT at 0x%08x\n", fdt);
216 early_init_devtree(__dtb_start);
217 printk(KERN_INFO "Compiled-in FDT at %p\n", __dtb_start);
221 static int __init openrisc_device_probe(void)
223 of_platform_populate(NULL, NULL, NULL, NULL);
228 device_initcall(openrisc_device_probe);
230 static inline unsigned long extract_value_bits(unsigned long reg,
231 short bit_nr, short width)
233 return (reg >> bit_nr) & (0 << width);
236 static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
238 while (!(mask & 0x1)) {
245 void __init detect_unit_config(unsigned long upr, unsigned long mask,
246 char *text, void (*func) (void))
257 printk("not present\n");
263 * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
264 * from the clock frequency passed in via the device tree
268 void calibrate_delay(void)
271 struct device_node *cpu = NULL;
272 cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
273 val = of_get_property(cpu, "clock-frequency", NULL);
275 panic("no cpu 'clock-frequency' parameter in device tree");
276 loops_per_jiffy = *val / HZ;
277 pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
278 loops_per_jiffy / (500000 / HZ),
279 (loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
282 void __init setup_arch(char **cmdline_p)
284 unsigned long max_low_pfn;
286 unflatten_and_copy_device_tree();
290 /* process 1's initial memory region is the kernel code/data */
291 init_mm.start_code = (unsigned long)&_stext;
292 init_mm.end_code = (unsigned long)&_etext;
293 init_mm.end_data = (unsigned long)&_edata;
294 init_mm.brk = (unsigned long)&_end;
296 #ifdef CONFIG_BLK_DEV_INITRD
297 initrd_start = (unsigned long)&__initrd_start;
298 initrd_end = (unsigned long)&__initrd_end;
299 if (initrd_start == initrd_end) {
303 initrd_below_start_ok = 1;
306 /* setup bootmem allocator */
307 max_low_pfn = setup_memory();
309 /* paging_init() sets up the MMU and marks all pages as reserved */
312 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
314 conswitchp = &dummy_con;
317 *cmdline_p = boot_command_line;
319 printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
322 static int show_cpuinfo(struct seq_file *m, void *v)
325 int version, revision;
328 version = (vr & SPR_VR_VER) >> 24;
329 revision = vr & SPR_VR_REV;
332 "cpu\t\t: OpenRISC-%x\n"
335 "dcache size\t: %d bytes\n"
336 "dcache block size\t: %d bytes\n"
337 "icache size\t: %d bytes\n"
338 "icache block size\t: %d bytes\n"
339 "immu\t\t: %d entries, %lu ways\n"
340 "dmmu\t\t: %d entries, %lu ways\n"
341 "bogomips\t: %lu.%02lu\n",
344 loops_per_jiffy * HZ,
346 cpuinfo.dcache_block_size,
348 cpuinfo.icache_block_size,
349 1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
350 1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW),
351 1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
352 1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW),
353 (loops_per_jiffy * HZ) / 500000,
354 ((loops_per_jiffy * HZ) / 5000) % 100);
357 static void *c_start(struct seq_file *m, loff_t * pos)
359 /* We only have one CPU... */
360 return *pos < 1 ? (void *)1 : NULL;
363 static void *c_next(struct seq_file *m, void *v, loff_t * pos)
369 static void c_stop(struct seq_file *m, void *v)
373 const struct seq_operations cpuinfo_op = {
377 .show = show_cpuinfo,