arch/powerpc/boot/dts/fsl/b4qds.dtsi

   1 /*
   2  * B4420DS Device Tree Source
   3  *
   4  * Copyright 2012 - 2015 Freescale Semiconductor, Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * This software is provided by Freescale Semiconductor "as is" and any
  24  * express or implied warranties, including, but not limited to, the implied
  25  * warranties of merchantability and fitness for a particular purpose are
  26  * disclaimed. In no event shall Freescale Semiconductor be liable for any
  27  * direct, indirect, incidental, special, exemplary, or consequential damages
  28  * (including, but not limited to, procurement of substitute goods or services;
  29  * loss of use, data, or profits; or business interruption) however caused and
  30  * on any theory of liability, whether in contract, strict liability, or tort
  31  * (including negligence or otherwise) arising in any way out of the use of
  32  * this software, even if advised of the possibility of such damage.
  33  */
  34
  35 / {
  36         model = "fsl,B4QDS";
  37         compatible = "fsl,B4QDS";
  38         #address-cells = <2>;
  39         #size-cells = <2>;
  40         interrupt-parent = <&mpic>;
  41
  42         aliases {
  43                 phy_sgmii_10 = &phy_sgmii_10;
  44                 phy_sgmii_11 = &phy_sgmii_11;
  45                 phy_sgmii_1c = &phy_sgmii_1c;
  46                 phy_sgmii_1d = &phy_sgmii_1d;
  47         };
  48
  49         ifc: localbus@ffe124000 {
  50                 reg = <0xf 0xfe124000 0 0x2000>;
  51                 ranges = <0 0 0xf 0xe8000000 0x08000000
  52                           2 0 0xf 0xff800000 0x00010000
  53                           3 0 0xf 0xffdf0000 0x00008000>;
  54
  55                 nor@0,0 {
  56                         #address-cells = <1>;
  57                         #size-cells = <1>;
  58                         compatible = "cfi-flash";
  59                         reg = <0x0 0x0 0x8000000>;
  60                         bank-width = <2>;
  61                         device-width = <1>;
  62                 };
  63
  64                 nand@2,0 {
  65                         #address-cells = <1>;
  66                         #size-cells = <1>;
  67                         compatible = "fsl,ifc-nand";
  68                         reg = <0x2 0x0 0x10000>;
  69
  70                         partition@0 {
  71                                 /* This location must not be altered  */
  72                                 /* 1MB for u-boot Bootloader Image */
  73                                 reg = <0x0 0x00100000>;
  74                                 label = "NAND U-Boot Image";
  75                                 read-only;
  76                         };
  77
  78                         partition@100000 {
  79                                 /* 1MB for DTB Image */
  80                                 reg = <0x00100000 0x00100000>;
  81                                 label = "NAND DTB Image";
  82                         };
  83
  84                         partition@200000 {
  85                                 /* 10MB for Linux Kernel Image */
  86                                 reg = <0x00200000 0x00A00000>;
  87                                 label = "NAND Linux Kernel Image";
  88                         };
  89
  90                         partition@c00000 {
  91                                 /* 500MB for Root file System Image */
  92                                 reg = <0x00c00000 0x1F400000>;
  93                                 label = "NAND RFS Image";
  94                         };
  95                 };
  96
  97                 board-control@3,0 {
  98                         compatible = "fsl,b4qds-fpga", "fsl,fpga-qixis";
  99                         reg = <3 0 0x300>;
 100                 };
 101         };
 102
 103         memory {
 104                 device_type = "memory";
 105         };
 106
 107         reserved-memory {
 108                 #address-cells = <2>;
 109                 #size-cells = <2>;
 110                 ranges;
 111
 112                 bman_fbpr: bman-fbpr {
 113                         size = <0 0x1000000>;
 114                         alignment = <0 0x1000000>;
 115                 };
 116                 qman_fqd: qman-fqd {
 117                         size = <0 0x400000>;
 118                         alignment = <0 0x400000>;
 119                 };
 120                 qman_pfdr: qman-pfdr {
 121                         size = <0 0x2000000>;
 122                         alignment = <0 0x2000000>;
 123                 };
 124         };
 125
 126         dcsr: dcsr@f00000000 {
 127                 ranges = <0x00000000 0xf 0x00000000 0x01052000>;
 128         };
 129
 130         bportals: bman-portals@ff4000000 {
 131                 ranges = <0x0 0xf 0xf4000000 0x2000000>;
 132         };
 133
 134         qportals: qman-portals@ff6000000 {
 135                 ranges = <0x0 0xf 0xf6000000 0x2000000>;
 136         };
 137
 138         soc: soc@ffe000000 {
 139                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
 140                 reg = <0xf 0xfe000000 0 0x00001000>;
 141                 spi@110000 {
 142                         flash@0 {
 143                                 #address-cells = <1>;
 144                                 #size-cells = <1>;
 145                                 compatible = "sst,sst25wf040", "jedec,spi-nor";
 146                                 reg = <0>;
 147                                 spi-max-frequency = <40000000>; /* input clock */
 148                         };
 149                 };
 150
 151                 sdhc@114000 {
 152                         /*Disabled as there is no sdhc connector on B4420QDS board*/
 153                         status = "disabled";
 154                 };
 155
 156                 i2c@118000 {
 157                         mux@77 {
 158                                 compatible = "nxp,pca9547";
 159                                 reg = <0x77>;
 160                                 #address-cells = <1>;
 161                                 #size-cells = <0>;
 162
 163                                 i2c@0 {
 164                                         #address-cells = <1>;
 165                                         #size-cells = <0>;
 166                                         reg = <0>;
 167
 168                                         eeprom@50 {
 169                                                 compatible = "at24,24c64";
 170                                                 reg = <0x50>;
 171                                         };
 172                                         eeprom@51 {
 173                                                 compatible = "at24,24c256";
 174                                                 reg = <0x51>;
 175                                         };
 176                                         eeprom@53 {
 177                                                 compatible = "at24,24c256";
 178                                                 reg = <0x53>;
 179                                         };
 180                                         eeprom@57 {
 181                                                 compatible = "at24,24c256";
 182                                                 reg = <0x57>;
 183                                         };
 184                                         rtc@68 {
 185                                                 compatible = "dallas,ds3232";
 186                                                 reg = <0x68>;
 187                                         };
 188                                 };
 189
 190                                 i2c@2 {
 191                                         #address-cells = <1>;
 192                                         #size-cells = <0>;
 193                                         reg = <0x2>;
 194
 195                                         ina220@40 {
 196                                                 compatible = "ti,ina220";
 197                                                 reg = <0x40>;
 198                                                 shunt-resistor = <1000>;
 199                                         };
 200                                 };
 201
 202                                 i2c@3 {
 203                                         #address-cells = <1>;
 204                                         #size-cells = <0>;
 205                                         reg = <0x3>;
 206
 207                                         adt7461@4c {
 208                                                 compatible = "adi,adt7461";
 209                                                 reg = <0x4c>;
 210                                         };
 211                                 };
 212                         };
 213                 };
 214
 215                 usb@210000 {
 216                         dr_mode = "host";
 217                         phy_type = "ulpi";
 218                 };
 219
 220                 fman@400000 {
 221                         ethernet@e0000 {
 222                                 phy-handle = <&phy_sgmii_10>;
 223                                 phy-connection-type = "sgmii";
 224                         };
 225
 226                         ethernet@e2000 {
 227                                 phy-handle = <&phy_sgmii_11>;
 228                                 phy-connection-type = "sgmii";
 229                         };
 230
 231                         ethernet@e4000 {
 232                                 phy-handle = <&phy_sgmii_1c>;
 233                                 phy-connection-type = "sgmii";
 234                         };
 235
 236                         ethernet@e6000 {
 237                                 phy-handle = <&phy_sgmii_1d>;
 238                                 phy-connection-type = "sgmii";
 239                         };
 240
 241                         mdio@fc000 {
 242                                 phy_sgmii_10: ethernet-phy@10 {
 243                                         reg = <0x10>;
 244                                 };
 245
 246                                 phy_sgmii_11: ethernet-phy@11 {
 247                                         reg = <0x11>;
 248                                 };
 249
 250                                 phy_sgmii_1c: ethernet-phy@1c {
 251                                         reg = <0x1c>;
 252                                         status = "disabled";
 253                                 };
 254
 255                                 phy_sgmii_1d: ethernet-phy@1d {
 256                                         reg = <0x1d>;
 257                                         status = "disabled";
 258                                 };
 259                         };
 260                 };
 261         };
 262
 263         pci0: pcie@ffe200000 {
 264                 reg = <0xf 0xfe200000 0 0x10000>;
 265                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
 266                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
 267                 pcie@0 {
 268                         ranges = <0x02000000 0 0xe0000000
 269                                   0x02000000 0 0xe0000000
 270                                   0 0x20000000
 271
 272                                   0x01000000 0 0x00000000
 273                                   0x01000000 0 0x00000000
 274                                   0 0x00010000>;
 275                 };
 276         };
 277 };
 278
 279 /include/ "b4si-post.dtsi"