2 * P4080/P4040 Silicon/SoC Device Tree Source (post include)
4 * Copyright 2011 Freescale Semiconductor Inc.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
42 /* controller at 0x200000 */
44 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 fsl,iommu-parent = <&pamu0>;
52 fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
55 #interrupt-cells = <1>;
59 interrupts = <16 2 1 15>;
60 interrupt-map-mask = <0xf800 0 0 7>;
63 0000 0 0 1 &mpic 40 1 0 0
64 0000 0 0 2 &mpic 1 1 0 0
65 0000 0 0 3 &mpic 2 1 0 0
66 0000 0 0 4 &mpic 3 1 0 0
71 /* controller at 0x201000 */
73 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
78 clock-frequency = <33333333>;
79 interrupts = <16 2 1 14>;
80 fsl,iommu-parent = <&pamu0>;
81 fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
84 #interrupt-cells = <1>;
88 interrupts = <16 2 1 14>;
89 interrupt-map-mask = <0xf800 0 0 7>;
92 0000 0 0 1 &mpic 41 1 0 0
93 0000 0 0 2 &mpic 5 1 0 0
94 0000 0 0 3 &mpic 6 1 0 0
95 0000 0 0 4 &mpic 7 1 0 0
100 /* controller at 0x202000 */
102 compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
105 #address-cells = <3>;
106 bus-range = <0x0 0xff>;
107 clock-frequency = <33333333>;
108 interrupts = <16 2 1 13>;
109 fsl,iommu-parent = <&pamu0>;
110 fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
113 #interrupt-cells = <1>;
115 #address-cells = <3>;
117 interrupts = <16 2 1 13>;
118 interrupt-map-mask = <0xf800 0 0 7>;
121 0000 0 0 1 &mpic 42 1 0 0
122 0000 0 0 2 &mpic 9 1 0 0
123 0000 0 0 3 &mpic 10 1 0 0
124 0000 0 0 4 &mpic 11 1 0 0
130 compatible = "fsl,srio";
131 interrupts = <16 2 1 11>;
132 #address-cells = <2>;
134 fsl,srio-rmu-handle = <&rmu>;
135 fsl,iommu-parent = <&pamu0>;
139 #address-cells = <2>;
142 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
146 #address-cells = <2>;
149 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
154 #address-cells = <1>;
156 compatible = "fsl,dcsr", "simple-bus";
159 compatible = "fsl,p4080-dcsr-epu", "fsl,dcsr-epu";
160 interrupts = <52 2 0 0
166 compatible = "fsl,dcsr-npc";
167 reg = <0x1000 0x1000 0x1000000 0x8000>;
170 compatible = "fsl,dcsr-nxc";
171 reg = <0x2000 0x1000>;
174 compatible = "fsl,dcsr-corenet";
175 reg = <0x8000 0x1000 0xB0000 0x1000>;
178 compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
179 reg = <0x9000 0x1000>;
182 compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
183 reg = <0x11000 0x1000>;
186 compatible = "fsl,dcsr-ddr";
187 dev-handle = <&ddr1>;
188 reg = <0x12000 0x1000>;
191 compatible = "fsl,dcsr-ddr";
192 dev-handle = <&ddr2>;
193 reg = <0x13000 0x1000>;
196 compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
197 reg = <0x18000 0x1000>;
200 compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
201 reg = <0x22000 0x1000>;
203 dcsr-cpu-sb-proxy@40000 {
204 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
205 cpu-handle = <&cpu0>;
206 reg = <0x40000 0x1000>;
208 dcsr-cpu-sb-proxy@41000 {
209 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
210 cpu-handle = <&cpu1>;
211 reg = <0x41000 0x1000>;
213 dcsr-cpu-sb-proxy@42000 {
214 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
215 cpu-handle = <&cpu2>;
216 reg = <0x42000 0x1000>;
218 dcsr-cpu-sb-proxy@43000 {
219 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
220 cpu-handle = <&cpu3>;
221 reg = <0x43000 0x1000>;
223 dcsr-cpu-sb-proxy@44000 {
224 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
225 cpu-handle = <&cpu4>;
226 reg = <0x44000 0x1000>;
228 dcsr-cpu-sb-proxy@45000 {
229 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
230 cpu-handle = <&cpu5>;
231 reg = <0x45000 0x1000>;
233 dcsr-cpu-sb-proxy@46000 {
234 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
235 cpu-handle = <&cpu6>;
236 reg = <0x46000 0x1000>;
238 dcsr-cpu-sb-proxy@47000 {
239 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
240 cpu-handle = <&cpu7>;
241 reg = <0x47000 0x1000>;
247 #address-cells = <1>;
250 compatible = "simple-bus";
253 compatible = "fsl,soc-sram-error";
254 interrupts = <16 2 1 29>;
258 compatible = "fsl,corenet-law";
263 ddr1: memory-controller@8000 {
264 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
265 reg = <0x8000 0x1000>;
266 interrupts = <16 2 1 23>;
269 ddr2: memory-controller@9000 {
270 compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
271 reg = <0x9000 0x1000>;
272 interrupts = <16 2 1 22>;
275 cpc: l3-cache-controller@10000 {
276 compatible = "fsl,p4080-l3-cache-controller", "cache";
277 reg = <0x10000 0x1000
279 interrupts = <16 2 1 27
284 compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
285 reg = <0x18000 0x1000>;
286 interrupts = <16 2 1 31>;
287 fsl,ccf-num-csdids = <32>;
288 fsl,ccf-num-snoopids = <32>;
292 compatible = "fsl,pamu-v1.0", "fsl,pamu";
293 reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */
294 ranges = <0 0x20000 0x5000>;
295 #address-cells = <1>;
300 fsl,portid-mapping = <0x00f80000>;
304 fsl,primary-cache-geometry = <32 1>;
305 fsl,secondary-cache-geometry = <128 2>;
309 reg = <0x1000 0x1000>;
310 fsl,primary-cache-geometry = <32 1>;
311 fsl,secondary-cache-geometry = <128 2>;
315 reg = <0x2000 0x1000>;
316 fsl,primary-cache-geometry = <32 1>;
317 fsl,secondary-cache-geometry = <128 2>;
321 reg = <0x3000 0x1000>;
322 fsl,primary-cache-geometry = <32 1>;
323 fsl,secondary-cache-geometry = <128 2>;
327 reg = <0x4000 0x1000>;
328 fsl,primary-cache-geometry = <32 1>;
329 fsl,secondary-cache-geometry = <128 2>;
333 /include/ "qoriq-rmu-0.dtsi"
335 fsl,iommu-parent = <&pamu0>;
336 fsl,liodn-reg = <&guts 0x540>; /* RMULIODNR */
339 /include/ "qoriq-mpic.dtsi"
341 guts: global-utilities@e0000 {
342 compatible = "fsl,qoriq-device-config-1.0";
343 reg = <0xe0000 0xe00>;
346 fsl,liodn-bits = <12>;
349 pins: global-utilities@e0e00 {
350 compatible = "fsl,qoriq-pin-control-1.0";
351 reg = <0xe0e00 0x200>;
355 /include/ "qoriq-clockgen1.dtsi"
356 global-utilities@e1000 {
357 compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
362 compatible = "fsl,qoriq-core-pll-1.0";
364 clock-output-names = "pll2", "pll2-div2";
370 compatible = "fsl,qoriq-core-pll-1.0";
372 clock-output-names = "pll3", "pll3-div2";
378 compatible = "fsl,qoriq-core-mux-1.0";
379 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
380 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
381 clock-output-names = "cmux2";
387 compatible = "fsl,qoriq-core-mux-1.0";
388 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
389 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
390 clock-output-names = "cmux3";
396 compatible = "fsl,qoriq-core-mux-1.0";
397 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
398 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
399 clock-output-names = "cmux4";
405 compatible = "fsl,qoriq-core-mux-1.0";
406 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
407 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
408 clock-output-names = "cmux5";
414 compatible = "fsl,qoriq-core-mux-1.0";
415 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
416 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
417 clock-output-names = "cmux6";
423 compatible = "fsl,qoriq-core-mux-1.0";
424 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
425 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
426 clock-output-names = "cmux7";
430 rcpm: global-utilities@e2000 {
431 compatible = "fsl,qoriq-rcpm-1.0";
432 reg = <0xe2000 0x1000>;
437 compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";
438 reg = <0xe8000 0x1000>;
441 serdes: serdes@ea000 {
442 compatible = "fsl,p4080-serdes";
443 reg = <0xea000 0x1000>;
446 /include/ "qoriq-dma-0.dtsi"
448 fsl,iommu-parent = <&pamu0>;
449 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
452 /include/ "qoriq-dma-1.dtsi"
454 fsl,iommu-parent = <&pamu0>;
455 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
458 /include/ "qoriq-espi-0.dtsi"
460 fsl,espi-num-chipselects = <4>;
463 /include/ "qoriq-esdhc-0.dtsi"
465 fsl,iommu-parent = <&pamu1>;
466 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
467 voltage-ranges = <3300 3300>;
471 /include/ "qoriq-i2c-0.dtsi"
472 /include/ "qoriq-i2c-1.dtsi"
473 /include/ "qoriq-duart-0.dtsi"
474 /include/ "qoriq-duart-1.dtsi"
475 /include/ "qoriq-gpio-0.dtsi"
476 /include/ "qoriq-usb2-mph-0.dtsi"
478 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
479 fsl,iommu-parent = <&pamu1>;
480 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
483 /include/ "qoriq-usb2-dr-0.dtsi"
485 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
486 fsl,iommu-parent = <&pamu1>;
487 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
489 /include/ "qoriq-sec4.0-0.dtsi"
490 crypto: crypto@300000 {
491 fsl,iommu-parent = <&pamu1>;