1 #ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
2 #define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
5 * Common bits between hash and Radix page table
7 #define _PAGE_BIT_SWAP_TYPE 0
9 #define _PAGE_EXEC 0x00001 /* execute permission */
10 #define _PAGE_WRITE 0x00002 /* write access allowed */
11 #define _PAGE_READ 0x00004 /* read access allowed */
12 #define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
13 #define _PAGE_RWX (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)
14 #define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
15 #define _PAGE_SAO 0x00010 /* Strong access order */
16 #define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
17 #define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
18 #define _PAGE_DIRTY 0x00080 /* C: page changed */
19 #define _PAGE_ACCESSED 0x00100 /* R: page referenced */
23 #define _RPAGE_SW0 0x2000000000000000UL
24 #define _RPAGE_SW1 0x00800
25 #define _RPAGE_SW2 0x00400
26 #define _RPAGE_SW3 0x00200
27 #ifdef CONFIG_MEM_SOFT_DIRTY
28 #define _PAGE_SOFT_DIRTY _RPAGE_SW3 /* software: software dirty tracking */
30 #define _PAGE_SOFT_DIRTY 0x00000
32 #define _PAGE_SPECIAL _RPAGE_SW2 /* software: special page */
35 #define _PAGE_PTE (1ul << 62) /* distinguishes PTEs from pointers */
36 #define _PAGE_PRESENT (1ul << 63) /* pte contains a translation */
38 * Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
39 * Instead of fixing all of them, add an alternate define which
40 * maps CI pte mapping.
42 #define _PAGE_NO_CACHE _PAGE_TOLERANT
44 * We support 57 bit real address in pte. Clear everything above 57, and
45 * every thing below PAGE_SHIFT;
47 #define PTE_RPN_MASK (((1UL << 57) - 1) & (PAGE_MASK))
49 * set of bits not changed in pmd_modify. Even though we have hash specific bits
50 * in here, on radix we expect them to be zero.
52 #define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
53 _PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \
56 * user access blocked by key
58 #define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY)
59 #define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_READ)
60 #define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | \
61 _PAGE_RW | _PAGE_EXEC)
63 * No page size encoding in the linux PTE
67 * _PAGE_CHG_MASK masks of bits that are to be preserved across
70 #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
71 _PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE | \
74 * Mask of bits returned by pte_pgprot()
76 #define PAGE_PROT_BITS (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT | \
77 H_PAGE_4K_PFN | _PAGE_PRIVILEGED | _PAGE_ACCESSED | \
78 _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_EXEC | \
81 * We define 2 sets of base prot bits, one for basic pages (ie,
82 * cacheable kernel and user pages) and one for non cacheable
83 * pages. We always set _PAGE_COHERENT when SMP is enabled or
84 * the processor might need it for DMA coherency.
86 #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
87 #define _PAGE_BASE (_PAGE_BASE_NC)
89 /* Permission masks used to generate the __P and __S table,
91 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
93 * Write permissions imply read permissions for now (we could make write-only
94 * pages on BookE but we don't bother for now). Execute permission control is
95 * possible on platforms that define _PAGE_EXEC
97 * Note due to the way vm flags are laid out, the bits are XWR
99 #define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_PRIVILEGED)
100 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW)
101 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_EXEC)
102 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_READ)
103 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
104 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_READ)
105 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
107 #define __P000 PAGE_NONE
108 #define __P001 PAGE_READONLY
109 #define __P010 PAGE_COPY
110 #define __P011 PAGE_COPY
111 #define __P100 PAGE_READONLY_X
112 #define __P101 PAGE_READONLY_X
113 #define __P110 PAGE_COPY_X
114 #define __P111 PAGE_COPY_X
116 #define __S000 PAGE_NONE
117 #define __S001 PAGE_READONLY
118 #define __S010 PAGE_SHARED
119 #define __S011 PAGE_SHARED
120 #define __S100 PAGE_READONLY_X
121 #define __S101 PAGE_READONLY_X
122 #define __S110 PAGE_SHARED_X
123 #define __S111 PAGE_SHARED_X
125 /* Permission masks used for kernel mappings */
126 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
127 #define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
129 #define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
130 _PAGE_NON_IDEMPOTENT)
131 #define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
132 #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
133 #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
136 * Protection used for kernel text. We want the debuggers to be able to
137 * set breakpoints anywhere, so don't write protect the kernel text
138 * on platforms where such control is possible.
140 #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) || \
141 defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
142 #define PAGE_KERNEL_TEXT PAGE_KERNEL_X
144 #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
147 /* Make modules code happy. We don't set RO yet */
148 #define PAGE_KERNEL_EXEC PAGE_KERNEL_X
149 #define PAGE_AGP (PAGE_KERNEL_NC)
155 extern unsigned long __pte_index_size;
156 extern unsigned long __pmd_index_size;
157 extern unsigned long __pud_index_size;
158 extern unsigned long __pgd_index_size;
159 extern unsigned long __pmd_cache_index;
160 #define PTE_INDEX_SIZE __pte_index_size
161 #define PMD_INDEX_SIZE __pmd_index_size
162 #define PUD_INDEX_SIZE __pud_index_size
163 #define PGD_INDEX_SIZE __pgd_index_size
164 #define PMD_CACHE_INDEX __pmd_cache_index
166 * Because of use of pte fragments and THP, size of page table
167 * are not always derived out of index size above.
169 extern unsigned long __pte_table_size;
170 extern unsigned long __pmd_table_size;
171 extern unsigned long __pud_table_size;
172 extern unsigned long __pgd_table_size;
173 #define PTE_TABLE_SIZE __pte_table_size
174 #define PMD_TABLE_SIZE __pmd_table_size
175 #define PUD_TABLE_SIZE __pud_table_size
176 #define PGD_TABLE_SIZE __pgd_table_size
178 extern unsigned long __pmd_val_bits;
179 extern unsigned long __pud_val_bits;
180 extern unsigned long __pgd_val_bits;
181 #define PMD_VAL_BITS __pmd_val_bits
182 #define PUD_VAL_BITS __pud_val_bits
183 #define PGD_VAL_BITS __pgd_val_bits
185 extern unsigned long __pte_frag_nr;
186 #define PTE_FRAG_NR __pte_frag_nr
187 extern unsigned long __pte_frag_size_shift;
188 #define PTE_FRAG_SIZE_SHIFT __pte_frag_size_shift
189 #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
191 * Pgtable size used by swapper, init in asm code
193 #define MAX_PGD_TABLE_SIZE (sizeof(pgd_t) << RADIX_PGD_INDEX_SIZE)
195 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
196 #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
197 #define PTRS_PER_PUD (1 << PUD_INDEX_SIZE)
198 #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
200 /* PMD_SHIFT determines what a second-level page table entry can map */
201 #define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
202 #define PMD_SIZE (1UL << PMD_SHIFT)
203 #define PMD_MASK (~(PMD_SIZE-1))
205 /* PUD_SHIFT determines what a third-level page table entry can map */
206 #define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
207 #define PUD_SIZE (1UL << PUD_SHIFT)
208 #define PUD_MASK (~(PUD_SIZE-1))
210 /* PGDIR_SHIFT determines what a fourth-level page table entry can map */
211 #define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE)
212 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
213 #define PGDIR_MASK (~(PGDIR_SIZE-1))
215 /* Bits to mask out from a PMD to get to the PTE page */
216 #define PMD_MASKED_BITS 0xc0000000000000ffUL
217 /* Bits to mask out from a PUD to get to the PMD page */
218 #define PUD_MASKED_BITS 0xc0000000000000ffUL
219 /* Bits to mask out from a PGD to get to the PUD page */
220 #define PGD_MASKED_BITS 0xc0000000000000ffUL
222 extern unsigned long __vmalloc_start;
223 extern unsigned long __vmalloc_end;
224 #define VMALLOC_START __vmalloc_start
225 #define VMALLOC_END __vmalloc_end
227 extern unsigned long __kernel_virt_start;
228 extern unsigned long __kernel_virt_size;
229 #define KERN_VIRT_START __kernel_virt_start
230 #define KERN_VIRT_SIZE __kernel_virt_size
231 extern struct page *vmemmap;
232 extern unsigned long ioremap_bot;
233 extern unsigned long pci_io_base;
234 #endif /* __ASSEMBLY__ */
236 #include <asm/book3s/64/hash.h>
237 #include <asm/book3s/64/radix.h>
239 #ifdef CONFIG_PPC_64K_PAGES
240 #include <asm/book3s/64/pgtable-64k.h>
242 #include <asm/book3s/64/pgtable-4k.h>
245 #include <asm/barrier.h>
247 * The second half of the kernel virtual space is used for IO mappings,
248 * it's itself carved into the PIO region (ISA and PHB IO space) and
251 * ISA_IO_BASE = KERN_IO_START, 64K reserved area
252 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
253 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
255 #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
256 #define FULL_IO_SIZE 0x80000000ul
257 #define ISA_IO_BASE (KERN_IO_START)
258 #define ISA_IO_END (KERN_IO_START + 0x10000ul)
259 #define PHB_IO_BASE (ISA_IO_END)
260 #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
261 #define IOREMAP_BASE (PHB_IO_END)
262 #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
264 /* Advertise special mapping type for AGP */
265 #define HAVE_PAGE_AGP
267 /* Advertise support for _PAGE_SPECIAL */
268 #define __HAVE_ARCH_PTE_SPECIAL
273 * This is the default implementation of various PTE accessors, it's
274 * used in all cases except Book3S with 64K pages where we have a
275 * concept of sub-pages
279 #define __real_pte(e,p) ((real_pte_t){(e)})
280 #define __rpte_to_pte(r) ((r).pte)
281 #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT)
283 #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
286 shift = mmu_psize_defs[psize].shift; \
288 #define pte_iterate_hashed_end() } while(0)
291 * We expect this to be called only for user addresses or kernel virtual
292 * addresses other than the linear mapping.
294 #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
296 #endif /* __real_pte */
298 static inline unsigned long pte_update(struct mm_struct *mm, unsigned long addr,
299 pte_t *ptep, unsigned long clr,
300 unsigned long set, int huge)
303 return radix__pte_update(mm, addr, ptep, clr, set, huge);
304 return hash__pte_update(mm, addr, ptep, clr, set, huge);
307 * For hash even if we have _PAGE_ACCESSED = 0, we do a pte_update.
308 * We currently remove entries from the hashtable regardless of whether
309 * the entry was young or dirty.
311 * We should be more intelligent about this but for the moment we override
312 * these functions and force a tlb flush unconditionally
313 * For radix: H_PAGE_HASHPTE should be zero. Hence we can use the same
314 * function for both hash and radix.
316 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
317 unsigned long addr, pte_t *ptep)
321 if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
323 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
324 return (old & _PAGE_ACCESSED) != 0;
327 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
328 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
331 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
335 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
336 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
339 if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_WRITE)) == 0)
342 pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 0);
345 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
346 unsigned long addr, pte_t *ptep)
348 if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_WRITE)) == 0)
351 pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 1);
354 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
355 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
356 unsigned long addr, pte_t *ptep)
358 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
362 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
365 pte_update(mm, addr, ptep, ~0UL, 0, 0);
368 static inline int pte_write(pte_t pte)
370 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_WRITE));
373 static inline int pte_dirty(pte_t pte)
375 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_DIRTY));
378 static inline int pte_young(pte_t pte)
380 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_ACCESSED));
383 static inline int pte_special(pte_t pte)
385 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SPECIAL));
388 static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
390 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
391 static inline bool pte_soft_dirty(pte_t pte)
393 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SOFT_DIRTY));
396 static inline pte_t pte_mksoft_dirty(pte_t pte)
398 return __pte(pte_val(pte) | _PAGE_SOFT_DIRTY);
401 static inline pte_t pte_clear_soft_dirty(pte_t pte)
403 return __pte(pte_val(pte) & ~_PAGE_SOFT_DIRTY);
405 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
407 #ifdef CONFIG_NUMA_BALANCING
409 * These work without NUMA balancing but the kernel does not care. See the
410 * comment in include/asm-generic/pgtable.h . On powerpc, this will only
411 * work for user pages and always return true for kernel pages.
413 static inline int pte_protnone(pte_t pte)
415 return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED)) ==
416 cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED);
418 #endif /* CONFIG_NUMA_BALANCING */
420 static inline int pte_present(pte_t pte)
422 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT));
425 * Conversion functions: convert a page and protection to a page entry,
426 * and a page entry and page directory to the page they refer to.
428 * Even if PTEs can be unsigned long long, a PFN is always an unsigned
431 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
433 return __pte((((pte_basic_t)(pfn) << PAGE_SHIFT) & PTE_RPN_MASK) |
437 static inline unsigned long pte_pfn(pte_t pte)
439 return (pte_val(pte) & PTE_RPN_MASK) >> PAGE_SHIFT;
442 /* Generic modifiers for PTE bits */
443 static inline pte_t pte_wrprotect(pte_t pte)
445 return __pte(pte_val(pte) & ~_PAGE_WRITE);
448 static inline pte_t pte_mkclean(pte_t pte)
450 return __pte(pte_val(pte) & ~_PAGE_DIRTY);
453 static inline pte_t pte_mkold(pte_t pte)
455 return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
458 static inline pte_t pte_mkwrite(pte_t pte)
461 * write implies read, hence set both
463 return __pte(pte_val(pte) | _PAGE_RW);
466 static inline pte_t pte_mkdirty(pte_t pte)
468 return __pte(pte_val(pte) | _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
471 static inline pte_t pte_mkyoung(pte_t pte)
473 return __pte(pte_val(pte) | _PAGE_ACCESSED);
476 static inline pte_t pte_mkspecial(pte_t pte)
478 return __pte(pte_val(pte) | _PAGE_SPECIAL);
481 static inline pte_t pte_mkhuge(pte_t pte)
486 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
488 /* FIXME!! check whether this need to be a conditional */
489 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
492 static inline bool pte_user(pte_t pte)
494 return !(pte_raw(pte) & cpu_to_be64(_PAGE_PRIVILEGED));
497 /* Encode and de-code a swap entry */
498 #define MAX_SWAPFILES_CHECK() do { \
499 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
501 * Don't have overlapping bits with _PAGE_HPTEFLAGS \
502 * We filter HPTEFLAGS on set_pte. \
504 BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
505 BUILD_BUG_ON(_PAGE_HPTEFLAGS & _PAGE_SWP_SOFT_DIRTY); \
508 * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
510 #define SWP_TYPE_BITS 5
511 #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \
512 & ((1UL << SWP_TYPE_BITS) - 1))
513 #define __swp_offset(x) (((x).val & PTE_RPN_MASK) >> PAGE_SHIFT)
514 #define __swp_entry(type, offset) ((swp_entry_t) { \
515 ((type) << _PAGE_BIT_SWAP_TYPE) \
516 | (((offset) << PAGE_SHIFT) & PTE_RPN_MASK)})
518 * swp_entry_t must be independent of pte bits. We build a swp_entry_t from
519 * swap type and offset we get from swap and convert that to pte to find a
520 * matching pte in linux page table.
521 * Clear bits not found in swap entries here.
523 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) & ~_PAGE_PTE })
524 #define __swp_entry_to_pte(x) __pte((x).val | _PAGE_PTE)
526 #ifdef CONFIG_MEM_SOFT_DIRTY
527 #define _PAGE_SWP_SOFT_DIRTY (1UL << (SWP_TYPE_BITS + _PAGE_BIT_SWAP_TYPE))
529 #define _PAGE_SWP_SOFT_DIRTY 0UL
530 #endif /* CONFIG_MEM_SOFT_DIRTY */
532 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
533 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
535 return __pte(pte_val(pte) | _PAGE_SWP_SOFT_DIRTY);
538 static inline bool pte_swp_soft_dirty(pte_t pte)
540 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SWP_SOFT_DIRTY));
543 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
545 return __pte(pte_val(pte) & ~_PAGE_SWP_SOFT_DIRTY);
547 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
549 static inline bool check_pte_access(unsigned long access, unsigned long ptev)
552 * This check for _PAGE_RWX and _PAGE_PRESENT bits
557 * This check for access to privilege space
559 if ((access & _PAGE_PRIVILEGED) != (ptev & _PAGE_PRIVILEGED))
565 * Generic functions with hash/radix callbacks
568 static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
571 return radix__ptep_set_access_flags(ptep, entry);
572 return hash__ptep_set_access_flags(ptep, entry);
575 #define __HAVE_ARCH_PTE_SAME
576 static inline int pte_same(pte_t pte_a, pte_t pte_b)
579 return radix__pte_same(pte_a, pte_b);
580 return hash__pte_same(pte_a, pte_b);
583 static inline int pte_none(pte_t pte)
586 return radix__pte_none(pte);
587 return hash__pte_none(pte);
590 static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
591 pte_t *ptep, pte_t pte, int percpu)
594 return radix__set_pte_at(mm, addr, ptep, pte, percpu);
595 return hash__set_pte_at(mm, addr, ptep, pte, percpu);
598 #define _PAGE_CACHE_CTL (_PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT)
600 #define pgprot_noncached pgprot_noncached
601 static inline pgprot_t pgprot_noncached(pgprot_t prot)
603 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
604 _PAGE_NON_IDEMPOTENT);
607 #define pgprot_noncached_wc pgprot_noncached_wc
608 static inline pgprot_t pgprot_noncached_wc(pgprot_t prot)
610 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
614 #define pgprot_cached pgprot_cached
615 static inline pgprot_t pgprot_cached(pgprot_t prot)
617 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL));
620 #define pgprot_writecombine pgprot_writecombine
621 static inline pgprot_t pgprot_writecombine(pgprot_t prot)
623 return pgprot_noncached_wc(prot);
626 * check a pte mapping have cache inhibited property
628 static inline bool pte_ci(pte_t pte)
630 unsigned long pte_v = pte_val(pte);
632 if (((pte_v & _PAGE_CACHE_CTL) == _PAGE_TOLERANT) ||
633 ((pte_v & _PAGE_CACHE_CTL) == _PAGE_NON_IDEMPOTENT))
638 static inline void pmd_set(pmd_t *pmdp, unsigned long val)
643 static inline void pmd_clear(pmd_t *pmdp)
648 static inline int pmd_none(pmd_t pmd)
650 return !pmd_raw(pmd);
653 static inline int pmd_present(pmd_t pmd)
656 return !pmd_none(pmd);
659 static inline int pmd_bad(pmd_t pmd)
662 return radix__pmd_bad(pmd);
663 return hash__pmd_bad(pmd);
666 static inline void pud_set(pud_t *pudp, unsigned long val)
671 static inline void pud_clear(pud_t *pudp)
676 static inline int pud_none(pud_t pud)
678 return !pud_raw(pud);
681 static inline int pud_present(pud_t pud)
683 return !pud_none(pud);
686 extern struct page *pud_page(pud_t pud);
687 extern struct page *pmd_page(pmd_t pmd);
688 static inline pte_t pud_pte(pud_t pud)
690 return __pte_raw(pud_raw(pud));
693 static inline pud_t pte_pud(pte_t pte)
695 return __pud_raw(pte_raw(pte));
697 #define pud_write(pud) pte_write(pud_pte(pud))
699 static inline int pud_bad(pud_t pud)
702 return radix__pud_bad(pud);
703 return hash__pud_bad(pud);
707 #define pgd_write(pgd) pte_write(pgd_pte(pgd))
708 static inline void pgd_set(pgd_t *pgdp, unsigned long val)
713 static inline void pgd_clear(pgd_t *pgdp)
718 static inline int pgd_none(pgd_t pgd)
720 return !pgd_raw(pgd);
723 static inline int pgd_present(pgd_t pgd)
725 return !pgd_none(pgd);
728 static inline pte_t pgd_pte(pgd_t pgd)
730 return __pte_raw(pgd_raw(pgd));
733 static inline pgd_t pte_pgd(pte_t pte)
735 return __pgd_raw(pte_raw(pte));
738 static inline int pgd_bad(pgd_t pgd)
741 return radix__pgd_bad(pgd);
742 return hash__pgd_bad(pgd);
745 extern struct page *pgd_page(pgd_t pgd);
747 /* Pointers in the page table tree are physical addresses */
748 #define __pgtable_ptr_val(ptr) __pa(ptr)
750 #define pmd_page_vaddr(pmd) __va(pmd_val(pmd) & ~PMD_MASKED_BITS)
751 #define pud_page_vaddr(pud) __va(pud_val(pud) & ~PUD_MASKED_BITS)
752 #define pgd_page_vaddr(pgd) __va(pgd_val(pgd) & ~PGD_MASKED_BITS)
754 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
755 #define pud_index(address) (((address) >> (PUD_SHIFT)) & (PTRS_PER_PUD - 1))
756 #define pmd_index(address) (((address) >> (PMD_SHIFT)) & (PTRS_PER_PMD - 1))
757 #define pte_index(address) (((address) >> (PAGE_SHIFT)) & (PTRS_PER_PTE - 1))
760 * Find an entry in a page-table-directory. We combine the address region
761 * (the high order N bits) and the pgd portion of the address.
764 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
766 #define pud_offset(pgdp, addr) \
767 (((pud_t *) pgd_page_vaddr(*(pgdp))) + pud_index(addr))
768 #define pmd_offset(pudp,addr) \
769 (((pmd_t *) pud_page_vaddr(*(pudp))) + pmd_index(addr))
770 #define pte_offset_kernel(dir,addr) \
771 (((pte_t *) pmd_page_vaddr(*(dir))) + pte_index(addr))
773 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
774 #define pte_unmap(pte) do { } while(0)
776 /* to find an entry in a kernel page-table-directory */
777 /* This now only contains the vmalloc pages */
778 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
780 #define pte_ERROR(e) \
781 pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
782 #define pmd_ERROR(e) \
783 pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
784 #define pud_ERROR(e) \
785 pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
786 #define pgd_ERROR(e) \
787 pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
789 void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
790 void pgtable_cache_init(void);
792 static inline int map_kernel_page(unsigned long ea, unsigned long pa,
795 if (radix_enabled()) {
796 #if defined(CONFIG_PPC_RADIX_MMU) && defined(DEBUG_VM)
797 unsigned long page_size = 1 << mmu_psize_defs[mmu_io_psize].shift;
798 WARN((page_size != PAGE_SIZE), "I/O page size != PAGE_SIZE");
800 return radix__map_kernel_page(ea, pa, __pgprot(flags), PAGE_SIZE);
802 return hash__map_kernel_page(ea, pa, flags);
805 static inline int __meminit vmemmap_create_mapping(unsigned long start,
806 unsigned long page_size,
810 return radix__vmemmap_create_mapping(start, page_size, phys);
811 return hash__vmemmap_create_mapping(start, page_size, phys);
814 #ifdef CONFIG_MEMORY_HOTPLUG
815 static inline void vmemmap_remove_mapping(unsigned long start,
816 unsigned long page_size)
819 return radix__vmemmap_remove_mapping(start, page_size);
820 return hash__vmemmap_remove_mapping(start, page_size);
823 struct page *realmode_pfn_to_page(unsigned long pfn);
825 static inline pte_t pmd_pte(pmd_t pmd)
827 return __pte_raw(pmd_raw(pmd));
830 static inline pmd_t pte_pmd(pte_t pte)
832 return __pmd_raw(pte_raw(pte));
835 static inline pte_t *pmdp_ptep(pmd_t *pmd)
839 #define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd))
840 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
841 #define pmd_young(pmd) pte_young(pmd_pte(pmd))
842 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
843 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
844 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
845 #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
846 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
847 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
849 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
850 #define pmd_soft_dirty(pmd) pte_soft_dirty(pmd_pte(pmd))
851 #define pmd_mksoft_dirty(pmd) pte_pmd(pte_mksoft_dirty(pmd_pte(pmd)))
852 #define pmd_clear_soft_dirty(pmd) pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd)))
853 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
855 #ifdef CONFIG_NUMA_BALANCING
856 static inline int pmd_protnone(pmd_t pmd)
858 return pte_protnone(pmd_pte(pmd));
860 #endif /* CONFIG_NUMA_BALANCING */
862 #define __HAVE_ARCH_PMD_WRITE
863 #define pmd_write(pmd) pte_write(pmd_pte(pmd))
865 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
866 extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
867 extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
868 extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
869 extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
870 pmd_t *pmdp, pmd_t pmd);
871 extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
873 extern int hash__has_transparent_hugepage(void);
874 static inline int has_transparent_hugepage(void)
877 return radix__has_transparent_hugepage();
878 return hash__has_transparent_hugepage();
880 #define has_transparent_hugepage has_transparent_hugepage
882 static inline unsigned long
883 pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp,
884 unsigned long clr, unsigned long set)
887 return radix__pmd_hugepage_update(mm, addr, pmdp, clr, set);
888 return hash__pmd_hugepage_update(mm, addr, pmdp, clr, set);
891 static inline int pmd_large(pmd_t pmd)
893 return !!(pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE));
896 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
898 return __pmd(pmd_val(pmd) & ~_PAGE_PRESENT);
901 * For radix we should always find H_PAGE_HASHPTE zero. Hence
902 * the below will work for radix too
904 static inline int __pmdp_test_and_clear_young(struct mm_struct *mm,
905 unsigned long addr, pmd_t *pmdp)
909 if ((pmd_raw(*pmdp) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
911 old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0);
912 return ((old & _PAGE_ACCESSED) != 0);
915 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
916 static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr,
920 if ((pmd_raw(*pmdp) & cpu_to_be64(_PAGE_WRITE)) == 0)
923 pmd_hugepage_update(mm, addr, pmdp, _PAGE_WRITE, 0);
926 static inline int pmd_trans_huge(pmd_t pmd)
929 return radix__pmd_trans_huge(pmd);
930 return hash__pmd_trans_huge(pmd);
933 #define __HAVE_ARCH_PMD_SAME
934 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
937 return radix__pmd_same(pmd_a, pmd_b);
938 return hash__pmd_same(pmd_a, pmd_b);
941 static inline pmd_t pmd_mkhuge(pmd_t pmd)
944 return radix__pmd_mkhuge(pmd);
945 return hash__pmd_mkhuge(pmd);
948 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
949 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
950 unsigned long address, pmd_t *pmdp,
951 pmd_t entry, int dirty);
953 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
954 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
955 unsigned long address, pmd_t *pmdp);
957 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
958 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
959 unsigned long addr, pmd_t *pmdp)
962 return radix__pmdp_huge_get_and_clear(mm, addr, pmdp);
963 return hash__pmdp_huge_get_and_clear(mm, addr, pmdp);
966 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
967 unsigned long address, pmd_t *pmdp)
970 return radix__pmdp_collapse_flush(vma, address, pmdp);
971 return hash__pmdp_collapse_flush(vma, address, pmdp);
973 #define pmdp_collapse_flush pmdp_collapse_flush
975 #define __HAVE_ARCH_PGTABLE_DEPOSIT
976 static inline void pgtable_trans_huge_deposit(struct mm_struct *mm,
977 pmd_t *pmdp, pgtable_t pgtable)
980 return radix__pgtable_trans_huge_deposit(mm, pmdp, pgtable);
981 return hash__pgtable_trans_huge_deposit(mm, pmdp, pgtable);
984 #define __HAVE_ARCH_PGTABLE_WITHDRAW
985 static inline pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm,
989 return radix__pgtable_trans_huge_withdraw(mm, pmdp);
990 return hash__pgtable_trans_huge_withdraw(mm, pmdp);
993 #define __HAVE_ARCH_PMDP_INVALIDATE
994 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
997 #define __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
998 static inline void pmdp_huge_split_prepare(struct vm_area_struct *vma,
999 unsigned long address, pmd_t *pmdp)
1001 if (radix_enabled())
1002 return radix__pmdp_huge_split_prepare(vma, address, pmdp);
1003 return hash__pmdp_huge_split_prepare(vma, address, pmdp);
1006 #define pmd_move_must_withdraw pmd_move_must_withdraw
1008 static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
1009 struct spinlock *old_pmd_ptl)
1011 if (radix_enabled())
1014 * Archs like ppc64 use pgtable to store per pmd
1015 * specific information. So when we switch the pmd,
1016 * we should also withdraw and deposit the pgtable
1020 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1021 #endif /* __ASSEMBLY__ */
1022 #endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */