arch/powerpc/include/asm/book3s/64/tlbflush-hash.h

   1 #ifndef _ASM_POWERPC_BOOK3S_64_TLBFLUSH_HASH_H
   2 #define _ASM_POWERPC_BOOK3S_64_TLBFLUSH_HASH_H
   3
   4 #define MMU_NO_CONTEXT          0
   5
   6 /*
   7  * TLB flushing for 64-bit hash-MMU CPUs
   8  */
   9
  10 #include <linux/percpu.h>
  11 #include <asm/page.h>
  12
  13 #define PPC64_TLB_BATCH_NR 192
  14
  15 struct ppc64_tlb_batch {
  16         int                     active;
  17         unsigned long           index;
  18         struct mm_struct        *mm;
  19         real_pte_t              pte[PPC64_TLB_BATCH_NR];
  20         unsigned long           vpn[PPC64_TLB_BATCH_NR];
  21         unsigned int            psize;
  22         int                     ssize;
  23 };
  24 DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
  25
  26 extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
  27
  28 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
  29
  30 static inline void arch_enter_lazy_mmu_mode(void)
  31 {
  32         struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
  33
  34         batch->active = 1;
  35 }
  36
  37 static inline void arch_leave_lazy_mmu_mode(void)
  38 {
  39         struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
  40
  41         if (batch->index)
  42                 __flush_tlb_pending(batch);
  43         batch->active = 0;
  44 }
  45
  46 #define arch_flush_lazy_mmu_mode()      do {} while (0)
  47
  48
  49 extern void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize,
  50                             int ssize, unsigned long flags);
  51 extern void flush_hash_range(unsigned long number, int local);
  52 extern void flush_hash_hugepage(unsigned long vsid, unsigned long addr,
  53                                 pmd_t *pmdp, unsigned int psize, int ssize,
  54                                 unsigned long flags);
  55
  56 static inline void local_flush_tlb_mm(struct mm_struct *mm)
  57 {
  58 }
  59
  60 static inline void flush_tlb_mm(struct mm_struct *mm)
  61 {
  62 }
  63
  64 static inline void local_flush_tlb_page(struct vm_area_struct *vma,
  65                                         unsigned long vmaddr)
  66 {
  67 }
  68
  69 static inline void flush_tlb_page(struct vm_area_struct *vma,
  70                                   unsigned long vmaddr)
  71 {
  72 }
  73
  74 static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
  75                                          unsigned long vmaddr)
  76 {
  77 }
  78
  79 static inline void flush_tlb_range(struct vm_area_struct *vma,
  80                                    unsigned long start, unsigned long end)
  81 {
  82 }
  83
  84 static inline void flush_tlb_kernel_range(unsigned long start,
  85                                           unsigned long end)
  86 {
  87 }
  88
  89 /* Private function for use by PCI IO mapping code */
  90 extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
  91                                      unsigned long end);
  92 extern void flush_tlb_pmd_range(struct mm_struct *mm, pmd_t *pmd,
  93                                 unsigned long addr);
  94 #endif /*  _ASM_POWERPC_BOOK3S_64_TLBFLUSH_HASH_H */