2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18 #include <asm/cpuidle.h>
21 * We layout physical memory as follows:
22 * 0x0000 - 0x00ff : Secondary processor spin code
23 * 0x0100 - 0x17ff : pSeries Interrupt prologs
24 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
25 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
26 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
27 * 0x7000 - 0x7fff : FWNMI data area
28 * 0x8000 - 0x8fff : Initial (CPU0) segment table
29 * 0x9000 - : Early init and support code
31 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
32 #define SYSCALL_PSERIES_1 \
36 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
39 mfspr r11,SPRN_SRR0 ; \
42 #define SYSCALL_PSERIES_2_RFID \
43 mfspr r12,SPRN_SRR1 ; \
44 ld r10,PACAKBASE(r13) ; \
45 LOAD_HANDLER(r10, system_call_entry) ; \
46 mtspr SPRN_SRR0,r10 ; \
47 ld r10,PACAKMSR(r13) ; \
48 mtspr SPRN_SRR1,r10 ; \
50 b . ; /* prevent speculative execution */
52 #define SYSCALL_PSERIES_3 \
53 /* Fast LE/BE switch system call */ \
54 1: mfspr r12,SPRN_SRR1 ; \
55 xori r12,r12,MSR_LE ; \
56 mtspr SPRN_SRR1,r12 ; \
57 rfid ; /* return to userspace */ \
58 b . ; /* prevent speculative execution */
60 #if defined(CONFIG_RELOCATABLE)
62 * We can't branch directly so we do it via the CTR which
63 * is volatile across system calls.
65 #define SYSCALL_PSERIES_2_DIRECT \
67 ld r12,PACAKBASE(r13) ; \
68 LOAD_HANDLER(r12, system_call_entry) ; \
70 mfspr r12,SPRN_SRR1 ; \
71 /* Re-use of r13... No spare regs to do this */ \
74 GET_PACA(r13) ; /* get r13 back */ \
77 /* We can branch directly */
78 #define SYSCALL_PSERIES_2_DIRECT \
79 mfspr r12,SPRN_SRR1 ; \
81 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
82 b system_call_common ;
86 * This is the start of the interrupt handlers for pSeries
87 * This code runs with relocation off.
88 * Code from here to __end_interrupts gets copied down to real
89 * address 0x100 when we are running a relocatable kernel.
90 * Therefore any relative branches in this section must only
91 * branch to labels in this section.
94 .globl __start_interrupts
97 .globl system_reset_pSeries;
100 #ifdef CONFIG_PPC_P7_NAP
102 /* Running native on arch 2.06 or later, check if we are
103 * waking up from nap/sleep/winkle.
106 rlwinm. r13,r13,47-31,30,31
112 * Check if last bit of HSPGR0 is set. This indicates whether we are
113 * waking up from winkle.
119 mtspr SPRN_HSPRG0,r13
121 lbz r0,PACA_THREAD_IDLE_STATE(r13)
122 cmpwi cr2,r0,PNV_THREAD_NAP
123 bgt cr2,8f /* Either sleep or Winkle */
125 /* Waking up from nap should not cause hypervisor state loss */
128 /* Waking up from nap */
129 li r0,PNV_THREAD_RUNNING
130 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */
132 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
133 li r0,KVM_HWTHREAD_IN_KERNEL
134 stb r0,HSTATE_HWTHREAD_STATE(r13)
135 /* Order setting hwthread_state vs. testing hwthread_req */
137 lbz r0,HSTATE_HWTHREAD_REQ(r13)
144 /* Return SRR1 from power7_nap() */
147 b power7_wakeup_noloss
148 2: b power7_wakeup_loss
150 /* Fast Sleep wakeup on PowerNV */
152 b power7_wakeup_tb_loss
155 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
156 #endif /* CONFIG_PPC_P7_NAP */
157 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
161 machine_check_pSeries_1:
162 /* This is moved out of line as it can be patched by FW, but
163 * some code path might still want to branch into the original
166 SET_SCRATCH0(r13) /* save r13 */
167 #ifdef CONFIG_PPC_P7_NAP
169 /* Running native on arch 2.06 or later, check if we are
170 * waking up from nap. We only handle no state loss and
171 * supervisor state loss. We do -not- handle hypervisor
172 * state loss at this time.
175 rlwinm. r13,r13,47-31,30,31
176 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
180 rlwinm. r13,r13,47-31,30,31
181 /* waking up from powersave (nap) state */
183 /* Total loss of HV state is fatal. let's just stay stuck here */
184 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
187 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
188 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
189 #endif /* CONFIG_PPC_P7_NAP */
190 EXCEPTION_PROLOG_0(PACA_EXMC)
192 b machine_check_powernv_early
194 b machine_check_pSeries_0
195 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
198 .globl data_access_pSeries
201 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
205 .globl data_access_slb_pSeries
206 data_access_slb_pSeries:
208 EXCEPTION_PROLOG_0(PACA_EXSLB)
209 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
210 std r3,PACA_EXSLB+EX_R3(r13)
213 #ifndef CONFIG_RELOCATABLE
217 * We can't just use a direct branch to slb_miss_realmode
218 * because the distance from here to there depends on where
219 * the kernel ends up being put.
222 ld r10,PACAKBASE(r13)
223 LOAD_HANDLER(r10, slb_miss_realmode)
228 STD_EXCEPTION_PSERIES(0x400, instruction_access)
231 .globl instruction_access_slb_pSeries
232 instruction_access_slb_pSeries:
234 EXCEPTION_PROLOG_0(PACA_EXSLB)
235 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x480)
236 std r3,PACA_EXSLB+EX_R3(r13)
237 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
239 #ifndef CONFIG_RELOCATABLE
243 ld r10,PACAKBASE(r13)
244 LOAD_HANDLER(r10, slb_miss_realmode)
249 /* We open code these as we can't have a ". = x" (even with
250 * x = "." within a feature section
253 .globl hardware_interrupt_pSeries;
254 .globl hardware_interrupt_hv;
255 hardware_interrupt_pSeries:
256 hardware_interrupt_hv:
258 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
259 EXC_HV, SOFTEN_TEST_HV)
260 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
262 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
263 EXC_STD, SOFTEN_TEST_PR)
264 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
265 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
267 STD_EXCEPTION_PSERIES(0x600, alignment)
268 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x600)
270 STD_EXCEPTION_PSERIES(0x700, program_check)
271 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x700)
273 STD_EXCEPTION_PSERIES(0x800, fp_unavailable)
274 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x800)
277 .globl decrementer_pSeries
279 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
281 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
283 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
284 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xa00)
286 STD_EXCEPTION_PSERIES(0xb00, trap_0b)
287 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xb00)
290 .globl system_call_pSeries
293 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
294 * that support it) before changing to HMT_MEDIUM. That allows the KVM
295 * code to save that value into the guest state (it is the guest's PPR
296 * value). Otherwise just change to HMT_MEDIUM as userspace has
297 * already saved the PPR.
299 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
302 std r9,PACA_EXGEN+EX_R9(r13)
303 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);
305 std r10,PACA_EXGEN+EX_R10(r13)
306 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR);
314 SYSCALL_PSERIES_2_RFID
316 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
318 STD_EXCEPTION_PSERIES(0xd00, single_step)
319 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xd00)
321 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
322 * out of line to handle them
325 hv_data_storage_trampoline:
327 EXCEPTION_PROLOG_0(PACA_EXGEN)
331 hv_instr_storage_trampoline:
333 EXCEPTION_PROLOG_0(PACA_EXGEN)
337 emulation_assist_trampoline:
339 EXCEPTION_PROLOG_0(PACA_EXGEN)
340 b emulation_assist_hv
343 hv_exception_trampoline:
345 EXCEPTION_PROLOG_0(PACA_EXGEN)
346 b hmi_exception_early
349 hv_doorbell_trampoline:
351 EXCEPTION_PROLOG_0(PACA_EXGEN)
354 /* We need to deal with the Altivec unavailable exception
355 * here which is at 0xf20, thus in the middle of the
356 * prolog code of the PerformanceMonitor one. A little
357 * trickery is thus necessary
360 performance_monitor_pseries_trampoline:
362 EXCEPTION_PROLOG_0(PACA_EXGEN)
363 b performance_monitor_pSeries
366 altivec_unavailable_pseries_trampoline:
368 EXCEPTION_PROLOG_0(PACA_EXGEN)
369 b altivec_unavailable_pSeries
372 vsx_unavailable_pseries_trampoline:
374 EXCEPTION_PROLOG_0(PACA_EXGEN)
375 b vsx_unavailable_pSeries
378 facility_unavailable_trampoline:
380 EXCEPTION_PROLOG_0(PACA_EXGEN)
381 b facility_unavailable_pSeries
384 hv_facility_unavailable_trampoline:
386 EXCEPTION_PROLOG_0(PACA_EXGEN)
387 b facility_unavailable_hv
389 #ifdef CONFIG_CBE_RAS
390 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
391 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
392 #endif /* CONFIG_CBE_RAS */
394 STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint)
395 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
398 .global denorm_exception_hv
400 mtspr SPRN_SPRG_HSCRATCH0,r13
401 EXCEPTION_PROLOG_0(PACA_EXGEN)
402 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
404 #ifdef CONFIG_PPC_DENORMALISATION
406 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
407 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
408 addi r11,r11,-4 /* HSRR0 is next instruction */
413 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
414 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
416 #ifdef CONFIG_CBE_RAS
417 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
418 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
419 #endif /* CONFIG_CBE_RAS */
421 STD_EXCEPTION_PSERIES(0x1700, altivec_assist)
422 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x1700)
424 #ifdef CONFIG_CBE_RAS
425 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
426 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
429 #endif /* CONFIG_CBE_RAS */
432 /*** Out of line interrupts support ***/
435 /* moved from 0x200 */
436 machine_check_powernv_early:
438 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
443 * Original R9 to R13 is saved on PACA_EXMC
445 * Switch to mc_emergency stack and handle re-entrancy (we limit
446 * the nested MCE upto level 4 to avoid stack overflow).
447 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
449 * We use paca->in_mce to check whether this is the first entry or
450 * nested machine check. We increment paca->in_mce to track nested
453 * If this is the first entry then set stack pointer to
454 * paca->mc_emergency_sp, otherwise r1 is already pointing to
455 * stack frame on mc_emergency stack.
457 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
458 * checkstop if we get another machine check exception before we do
459 * rfid with MSR_ME=1.
461 mr r11,r1 /* Save r1 */
462 lhz r10,PACA_IN_MCE(r13)
463 cmpwi r10,0 /* Are we in nested machine check */
464 bne 0f /* Yes, we are. */
465 /* First machine check entry */
466 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
467 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
468 addi r10,r10,1 /* increment paca->in_mce */
469 sth r10,PACA_IN_MCE(r13)
470 /* Limit nested MCE to level 4 to avoid stack overflow */
472 bgt 2f /* Check if we hit limit of 4 */
473 std r11,GPR1(r1) /* Save r1 on the stack. */
474 std r11,0(r1) /* make stack chain pointer */
475 mfspr r11,SPRN_SRR0 /* Save SRR0 */
477 mfspr r11,SPRN_SRR1 /* Save SRR1 */
479 mfspr r11,SPRN_DAR /* Save DAR */
481 mfspr r11,SPRN_DSISR /* Save DSISR */
483 std r9,_CCR(r1) /* Save CR in stackframe */
484 /* Save r9 through r13 from EXMC save area to stack frame. */
485 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
486 mfmsr r11 /* get MSR value */
487 ori r11,r11,MSR_ME /* turn on ME bit */
488 ori r11,r11,MSR_RI /* turn on RI bit */
489 ld r12,PACAKBASE(r13) /* get high part of &label */
490 LOAD_HANDLER(r12, machine_check_handle_early)
491 1: mtspr SPRN_SRR0,r12
494 b . /* prevent speculative execution */
496 /* Stack overflow. Stay on emergency stack and panic.
497 * Keep the ME bit off while panic-ing, so that if we hit
498 * another machine check we checkstop.
500 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
502 ld r12,PACAKBASE(r13)
503 LOAD_HANDLER(r12, unrecover_mce)
505 andc r11,r11,r10 /* Turn off MSR_ME */
507 b . /* prevent speculative execution */
508 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
510 machine_check_pSeries:
511 .globl machine_check_fwnmi
513 SET_SCRATCH0(r13) /* save r13 */
514 EXCEPTION_PROLOG_0(PACA_EXMC)
515 machine_check_pSeries_0:
516 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
517 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
518 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
519 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
520 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
521 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x400)
522 KVM_HANDLER(PACA_EXSLB, EXC_STD, 0x480)
523 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x900)
524 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
526 #ifdef CONFIG_PPC_DENORMALISATION
530 * To denormalise we need to move a copy of the register to itself.
531 * For POWER6 do that here for all FP regs.
534 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
535 xori r10,r10,(MSR_FE0|MSR_FE1)
539 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
540 #define FMR4(n) FMR2(n) ; FMR2(n+2)
541 #define FMR8(n) FMR4(n) ; FMR4(n+4)
542 #define FMR16(n) FMR8(n) ; FMR8(n+8)
543 #define FMR32(n) FMR16(n) ; FMR16(n+16)
548 * To denormalise we need to move a copy of the register to itself.
549 * For POWER7 do that here for the first 32 VSX registers only.
552 oris r10,r10,MSR_VSX@h
556 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
557 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
558 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
559 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
560 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
563 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
567 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
569 * To denormalise we need to move a copy of the register to itself.
570 * For POWER8 we need to do that for all 64 VSX registers
576 ld r9,PACA_EXGEN+EX_R9(r13)
577 RESTORE_PPR_PACA(PACA_EXGEN, r10)
579 ld r10,PACA_EXGEN+EX_CFAR(r13)
581 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
582 ld r10,PACA_EXGEN+EX_R10(r13)
583 ld r11,PACA_EXGEN+EX_R11(r13)
584 ld r12,PACA_EXGEN+EX_R12(r13)
585 ld r13,PACA_EXGEN+EX_R13(r13)
591 /* moved from 0xe00 */
592 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
593 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
594 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
595 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
596 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
597 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
598 MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception)
599 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
601 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
602 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
604 /* moved from 0xf00 */
605 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
606 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00)
607 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
608 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf20)
609 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
610 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf40)
611 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
612 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf60)
613 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
614 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
617 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
618 * - If it was a decrementer interrupt, we bump the dec to max and and return.
619 * - If it was a doorbell we return immediately since doorbells are edge
620 * triggered and won't automatically refire.
621 * - If it was a HMI we return immediately since we handled it in realmode
622 * and it won't refire.
623 * - else we hard disable and return.
624 * This is called with r10 containing the value to OR to the paca field.
626 #define MASKED_INTERRUPT(_H) \
627 masked_##_H##interrupt: \
628 std r11,PACA_EXGEN+EX_R11(r13); \
629 lbz r11,PACAIRQHAPPENED(r13); \
631 stb r11,PACAIRQHAPPENED(r13); \
632 cmpwi r10,PACA_IRQ_DEC; \
635 ori r10,r10,0xffff; \
636 mtspr SPRN_DEC,r10; \
638 1: cmpwi r10,PACA_IRQ_DBELL; \
640 cmpwi r10,PACA_IRQ_HMI; \
642 mfspr r10,SPRN_##_H##SRR1; \
643 rldicl r10,r10,48,1; /* clear MSR_EE */ \
645 mtspr SPRN_##_H##SRR1,r10; \
647 ld r9,PACA_EXGEN+EX_R9(r13); \
648 ld r10,PACA_EXGEN+EX_R10(r13); \
649 ld r11,PACA_EXGEN+EX_R11(r13); \
658 * Called from arch_local_irq_enable when an interrupt needs
659 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
660 * which kind of interrupt. MSR:EE is already off. We generate a
661 * stackframe like if a real interrupt had happened.
663 * Note: While MSR:EE is off, we need to make sure that _MSR
664 * in the generated frame has EE set to 1 or the exception
665 * handler will not properly re-enable them.
667 _GLOBAL(__replay_interrupt)
668 /* We are going to jump to the exception common code which
669 * will retrieve various register values from the PACA which
670 * we don't give a damn about, so we don't bother storing them.
677 beq decrementer_common
679 beq hardware_interrupt_common
682 beq h_doorbell_common
684 beq hmi_exception_common
687 beq doorbell_super_common
688 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
691 #ifdef CONFIG_PPC_PSERIES
693 * Vectors for the FWNMI option. Share common code.
695 .globl system_reset_fwnmi
698 SET_SCRATCH0(r13) /* save r13 */
699 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
702 #endif /* CONFIG_PPC_PSERIES */
704 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
705 kvmppc_skip_interrupt:
707 * Here all GPRs are unchanged from when the interrupt happened
708 * except for r13, which is saved in SPRG_SCRATCH0.
717 kvmppc_skip_Hinterrupt:
719 * Here all GPRs are unchanged from when the interrupt happened
720 * except for r13, which is saved in SPRG_SCRATCH0.
722 mfspr r13, SPRN_HSRR0
724 mtspr SPRN_HSRR0, r13
731 * Ensure that any handlers that get invoked from the exception prologs
732 * above are below the first 64KB (0x10000) of the kernel image because
733 * the prologs assemble the addresses of these handlers using the
734 * LOAD_HANDLER macro, which uses an ori instruction.
737 /*** Common interrupt handlers ***/
739 STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception)
741 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
742 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt)
743 STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt)
744 #ifdef CONFIG_PPC_DOORBELL
745 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception)
747 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception)
749 STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception)
750 STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception)
751 STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception)
752 STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt)
753 STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception)
754 #ifdef CONFIG_PPC_DOORBELL
755 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception)
757 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception)
759 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception)
760 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception)
761 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception)
762 #ifdef CONFIG_ALTIVEC
763 STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception)
765 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception)
767 #ifdef CONFIG_CBE_RAS
768 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception)
769 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception)
770 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception)
771 #endif /* CONFIG_CBE_RAS */
774 * Relocation-on interrupts: A subset of the interrupts can be delivered
775 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
776 * it. Addresses are the same as the original interrupt addresses, but
777 * offset by 0xc000000000004000.
778 * It's impossible to receive interrupts below 0x300 via this mechanism.
779 * KVM: None of these traps are from the guest ; anything that escalated
780 * to HV=1 from HV=0 is delivered via real mode handlers.
784 * This uses the standard macro, since the original 0x300 vector
785 * only has extra guff for STAB-based processors -- which never
788 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
790 .globl data_access_slb_relon_pSeries
791 data_access_slb_relon_pSeries:
793 EXCEPTION_PROLOG_0(PACA_EXSLB)
794 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
795 std r3,PACA_EXSLB+EX_R3(r13)
798 #ifndef CONFIG_RELOCATABLE
802 * We can't just use a direct branch to slb_miss_realmode
803 * because the distance from here to there depends on where
804 * the kernel ends up being put.
807 ld r10,PACAKBASE(r13)
808 LOAD_HANDLER(r10, slb_miss_realmode)
813 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
815 .globl instruction_access_slb_relon_pSeries
816 instruction_access_slb_relon_pSeries:
818 EXCEPTION_PROLOG_0(PACA_EXSLB)
819 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
820 std r3,PACA_EXSLB+EX_R3(r13)
821 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
823 #ifndef CONFIG_RELOCATABLE
827 ld r10,PACAKBASE(r13)
828 LOAD_HANDLER(r10, slb_miss_realmode)
834 .globl hardware_interrupt_relon_pSeries;
835 .globl hardware_interrupt_relon_hv;
836 hardware_interrupt_relon_pSeries:
837 hardware_interrupt_relon_hv:
839 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
841 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
842 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
843 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
844 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
845 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
846 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
847 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
848 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
849 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
852 .globl system_call_relon_pSeries
853 system_call_relon_pSeries:
856 SYSCALL_PSERIES_2_DIRECT
859 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
862 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
865 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
868 emulation_assist_relon_trampoline:
870 EXCEPTION_PROLOG_0(PACA_EXGEN)
871 b emulation_assist_relon_hv
874 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
877 h_doorbell_relon_trampoline:
879 EXCEPTION_PROLOG_0(PACA_EXGEN)
880 b h_doorbell_relon_hv
883 performance_monitor_relon_pseries_trampoline:
885 EXCEPTION_PROLOG_0(PACA_EXGEN)
886 b performance_monitor_relon_pSeries
889 altivec_unavailable_relon_pseries_trampoline:
891 EXCEPTION_PROLOG_0(PACA_EXGEN)
892 b altivec_unavailable_relon_pSeries
895 vsx_unavailable_relon_pseries_trampoline:
897 EXCEPTION_PROLOG_0(PACA_EXGEN)
898 b vsx_unavailable_relon_pSeries
901 facility_unavailable_relon_trampoline:
903 EXCEPTION_PROLOG_0(PACA_EXGEN)
904 b facility_unavailable_relon_pSeries
907 hv_facility_unavailable_relon_trampoline:
909 EXCEPTION_PROLOG_0(PACA_EXGEN)
910 b hv_facility_unavailable_relon_hv
912 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
913 #ifdef CONFIG_PPC_DENORMALISATION
915 b denorm_exception_hv
917 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
923 ppc64_runlatch_on_trampoline:
924 b __ppc64_runlatch_on
927 * Here r13 points to the paca, r9 contains the saved CR,
928 * SRR0 and SRR1 are saved in r11 and r12,
929 * r9 - r13 are saved in paca->exgen.
932 .globl data_access_common
935 std r10,PACA_EXGEN+EX_DAR(r13)
937 stw r10,PACA_EXGEN+EX_DSISR(r13)
938 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
939 RECONCILE_IRQ_STATE(r10, r11)
941 ld r3,PACA_EXGEN+EX_DAR(r13)
942 lwz r4,PACA_EXGEN+EX_DSISR(r13)
946 BEGIN_MMU_FTR_SECTION
947 b do_hash_page /* Try to handle as hpte fault */
950 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_RADIX)
953 .globl h_data_storage_common
954 h_data_storage_common:
956 std r10,PACA_EXGEN+EX_DAR(r13)
957 mfspr r10,SPRN_HDSISR
958 stw r10,PACA_EXGEN+EX_DSISR(r13)
959 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
961 RECONCILE_IRQ_STATE(r10, r11)
962 addi r3,r1,STACK_FRAME_OVERHEAD
967 .globl instruction_access_common
968 instruction_access_common:
969 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
970 RECONCILE_IRQ_STATE(r10, r11)
977 BEGIN_MMU_FTR_SECTION
978 b do_hash_page /* Try to handle as hpte fault */
981 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_RADIX)
983 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception)
986 * Machine check is different because we use a different
987 * save area: PACA_EXMC instead of PACA_EXGEN.
990 .globl machine_check_common
991 machine_check_common:
994 std r10,PACA_EXGEN+EX_DAR(r13)
996 stw r10,PACA_EXGEN+EX_DSISR(r13)
997 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
999 RECONCILE_IRQ_STATE(r10, r11)
1000 ld r3,PACA_EXGEN+EX_DAR(r13)
1001 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1005 addi r3,r1,STACK_FRAME_OVERHEAD
1006 bl machine_check_exception
1010 .globl alignment_common
1013 std r10,PACA_EXGEN+EX_DAR(r13)
1014 mfspr r10,SPRN_DSISR
1015 stw r10,PACA_EXGEN+EX_DSISR(r13)
1016 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1017 ld r3,PACA_EXGEN+EX_DAR(r13)
1018 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1022 RECONCILE_IRQ_STATE(r10, r11)
1023 addi r3,r1,STACK_FRAME_OVERHEAD
1024 bl alignment_exception
1028 .globl program_check_common
1029 program_check_common:
1030 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1032 RECONCILE_IRQ_STATE(r10, r11)
1033 addi r3,r1,STACK_FRAME_OVERHEAD
1034 bl program_check_exception
1038 .globl fp_unavailable_common
1039 fp_unavailable_common:
1040 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1041 bne 1f /* if from user, just load it up */
1043 RECONCILE_IRQ_STATE(r10, r11)
1044 addi r3,r1,STACK_FRAME_OVERHEAD
1045 bl kernel_fp_unavailable_exception
1048 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1050 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1051 * transaction), go do TM stuff
1053 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1055 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1058 b fast_exception_return
1059 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1060 2: /* User process was in a transaction */
1062 RECONCILE_IRQ_STATE(r10, r11)
1063 addi r3,r1,STACK_FRAME_OVERHEAD
1064 bl fp_unavailable_tm
1068 .globl altivec_unavailable_common
1069 altivec_unavailable_common:
1070 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1071 #ifdef CONFIG_ALTIVEC
1074 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1075 BEGIN_FTR_SECTION_NESTED(69)
1076 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1077 * transaction), go do TM stuff
1079 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1081 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1084 b fast_exception_return
1085 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1086 2: /* User process was in a transaction */
1088 RECONCILE_IRQ_STATE(r10, r11)
1089 addi r3,r1,STACK_FRAME_OVERHEAD
1090 bl altivec_unavailable_tm
1094 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1097 RECONCILE_IRQ_STATE(r10, r11)
1098 addi r3,r1,STACK_FRAME_OVERHEAD
1099 bl altivec_unavailable_exception
1103 .globl vsx_unavailable_common
1104 vsx_unavailable_common:
1105 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1109 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1110 BEGIN_FTR_SECTION_NESTED(69)
1111 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1112 * transaction), go do TM stuff
1114 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1116 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1119 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1120 2: /* User process was in a transaction */
1122 RECONCILE_IRQ_STATE(r10, r11)
1123 addi r3,r1,STACK_FRAME_OVERHEAD
1124 bl vsx_unavailable_tm
1128 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1131 RECONCILE_IRQ_STATE(r10, r11)
1132 addi r3,r1,STACK_FRAME_OVERHEAD
1133 bl vsx_unavailable_exception
1136 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception)
1137 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception)
1139 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1140 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1141 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1143 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1144 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1145 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1146 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1147 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
1150 * The __end_interrupts marker must be past the out-of-line (OOL)
1151 * handlers, so that they are copied to real address 0x100 when running
1152 * a relocatable kernel. This ensures they can be reached from the short
1153 * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch
1154 * directly, without using LOAD_HANDLER().
1157 .globl __end_interrupts
1160 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1162 * Data area reserved for FWNMI option.
1163 * This address (0x7000) is fixed by the RPA.
1166 .globl fwnmi_data_area
1169 /* pseries and powernv need to keep the whole page from
1170 * 0x7000 to 0x8000 free for use by the firmware
1173 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1175 .globl hmi_exception_early
1176 hmi_exception_early:
1177 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, 0xe62)
1178 mr r10,r1 /* Save r1 */
1179 ld r1,PACAEMERGSP(r13) /* Use emergency stack */
1180 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
1181 std r9,_CCR(r1) /* save CR in stackframe */
1182 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
1183 std r11,_NIP(r1) /* save HSRR0 in stackframe */
1184 mfspr r12,SPRN_HSRR1 /* Save SRR1 */
1185 std r12,_MSR(r1) /* save SRR1 in stackframe */
1186 std r10,0(r1) /* make stack chain pointer */
1187 std r0,GPR0(r1) /* save r0 in stackframe */
1188 std r10,GPR1(r1) /* save r1 in stackframe */
1189 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
1190 EXCEPTION_PROLOG_COMMON_3(0xe60)
1191 addi r3,r1,STACK_FRAME_OVERHEAD
1192 bl hmi_exception_realmode
1193 /* Windup the stack. */
1194 /* Move original HSRR0 and HSRR1 into the respective regs */
1212 /* restore original r1. */
1216 * Go to virtual mode and pull the HMI event information from
1219 .globl hmi_exception_after_realmode
1220 hmi_exception_after_realmode:
1222 EXCEPTION_PROLOG_0(PACA_EXGEN)
1226 #define MACHINE_CHECK_HANDLER_WINDUP \
1227 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1229 mfmsr r9; /* get MSR value */ \
1231 mtmsrd r9,1; /* Clear MSR_RI */ \
1232 /* Move original SRR0 and SRR1 into the respective regs */ \
1234 mtspr SPRN_SRR1,r9; \
1236 mtspr SPRN_SRR0,r3; \
1244 REST_8GPRS(2, r1); \
1248 /* Decrement paca->in_mce. */ \
1249 lhz r12,PACA_IN_MCE(r13); \
1251 sth r12,PACA_IN_MCE(r13); \
1253 REST_2GPRS(12, r1); \
1254 /* restore original r1. */ \
1258 * Handle machine check early in real mode. We come here with
1259 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1262 .globl machine_check_handle_early
1263 machine_check_handle_early:
1264 std r0,GPR0(r1) /* Save r0 */
1265 EXCEPTION_PROLOG_COMMON_3(0x200)
1267 addi r3,r1,STACK_FRAME_OVERHEAD
1268 bl machine_check_early
1269 std r3,RESULT(r1) /* Save result */
1271 #ifdef CONFIG_PPC_P7_NAP
1273 * Check if thread was in power saving mode. We come here when any
1274 * of the following is true:
1275 * a. thread wasn't in power saving mode
1276 * b. thread was in power saving mode with no state loss or
1277 * supervisor state loss
1279 * Go back to nap again if (b) is true.
1281 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
1282 beq 4f /* No, it wasn;t */
1283 /* Thread was in power saving mode. Go back to nap again. */
1286 /* Supervisor state loss */
1288 stb r0,PACA_NAPSTATELOST(r13)
1289 3: bl machine_check_queue_event
1290 MACHINE_CHECK_HANDLER_WINDUP
1293 li r3,PNV_THREAD_NAP
1294 b power7_enter_nap_mode
1298 * Check if we are coming from hypervisor userspace. If yes then we
1299 * continue in host kernel in V mode to deliver the MC event.
1301 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1303 andi. r11,r12,MSR_PR /* See if coming from user. */
1304 bne 9f /* continue in V mode if we are. */
1307 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1309 * We are coming from kernel context. Check if we are coming from
1310 * guest. if yes, then we can continue. We will fall through
1311 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1313 lbz r11,HSTATE_IN_GUEST(r13)
1314 cmpwi r11,0 /* Check if coming from guest */
1315 bne 9f /* continue if we are. */
1318 * At this point we are not sure about what context we come from.
1319 * Queue up the MCE event and return from the interrupt.
1320 * But before that, check if this is an un-recoverable exception.
1321 * If yes, then stay on emergency stack and panic.
1323 andi. r11,r12,MSR_RI
1325 1: mfspr r11,SPRN_SRR0
1326 ld r10,PACAKBASE(r13)
1327 LOAD_HANDLER(r10,unrecover_mce)
1329 ld r10,PACAKMSR(r13)
1331 * We are going down. But there are chances that we might get hit by
1332 * another MCE during panic path and we may run into unstable state
1333 * with no way out. Hence, turn ME bit off while going down, so that
1334 * when another MCE is hit during panic path, system will checkstop
1335 * and hypervisor will get restarted cleanly by SP.
1338 andc r10,r10,r3 /* Turn off MSR_ME */
1344 * Check if we have successfully handled/recovered from error, if not
1345 * then stay on emergency stack and panic.
1347 ld r3,RESULT(r1) /* Load result */
1348 cmpdi r3,0 /* see if we handled MCE successfully */
1350 beq 1b /* if !handled then panic */
1352 * Return from MC interrupt.
1353 * Queue up the MCE event so that we can log it later, while
1354 * returning from kernel or opal call.
1356 bl machine_check_queue_event
1357 MACHINE_CHECK_HANDLER_WINDUP
1360 /* Deliver the machine check to host kernel in V mode. */
1361 MACHINE_CHECK_HANDLER_WINDUP
1362 b machine_check_pSeries
1365 /* Invoke machine_check_exception to print MCE event and panic. */
1366 addi r3,r1,STACK_FRAME_OVERHEAD
1367 bl machine_check_exception
1369 * We will not reach here. Even if we did, there is no way out. Call
1370 * unrecoverable_exception and die.
1372 1: addi r3,r1,STACK_FRAME_OVERHEAD
1373 bl unrecoverable_exception
1376 * r13 points to the PACA, r9 contains the saved CR,
1377 * r12 contain the saved SRR1, SRR0 is still ready for return
1378 * r3 has the faulting address
1379 * r9 - r13 are saved in paca->exslb.
1380 * r3 is saved in paca->slb_r3
1381 * We assume we aren't going to take any exceptions during this procedure.
1385 #ifdef CONFIG_RELOCATABLE
1389 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1390 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1392 #ifdef CONFIG_PPC_STD_MMU_64
1393 BEGIN_MMU_FTR_SECTION
1394 bl slb_allocate_realmode
1395 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_RADIX)
1397 /* All done -- return from exception. */
1399 ld r10,PACA_EXSLB+EX_LR(r13)
1400 ld r3,PACA_EXSLB+EX_R3(r13)
1401 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1404 BEGIN_MMU_FTR_SECTION
1406 END_MMU_FTR_SECTION_IFSET(MMU_FTR_RADIX)
1407 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1413 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1416 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1417 ld r9,PACA_EXSLB+EX_R9(r13)
1418 ld r10,PACA_EXSLB+EX_R10(r13)
1419 ld r11,PACA_EXSLB+EX_R11(r13)
1420 ld r12,PACA_EXSLB+EX_R12(r13)
1421 ld r13,PACA_EXSLB+EX_R13(r13)
1423 b . /* prevent speculative execution */
1425 2: mfspr r11,SPRN_SRR0
1426 ld r10,PACAKBASE(r13)
1427 LOAD_HANDLER(r10,unrecov_slb)
1429 ld r10,PACAKMSR(r13)
1435 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1436 RECONCILE_IRQ_STATE(r10, r11)
1438 1: addi r3,r1,STACK_FRAME_OVERHEAD
1439 bl unrecoverable_exception
1443 #ifdef CONFIG_PPC_970_NAP
1446 std r9,TI_LOCAL_FLAGS(r11)
1447 ld r10,_LINK(r1) /* make idle task do the */
1448 std r10,_NIP(r1) /* equivalent of a blr */
1457 #ifdef CONFIG_PPC_STD_MMU_64
1458 andis. r0,r4,0xa410 /* weird error? */
1459 bne- handle_page_fault /* if not, try to insert a HPTE */
1460 andis. r0,r4,DSISR_DABRMATCH@h
1461 bne- handle_dabr_fault
1462 CURRENT_THREAD_INFO(r11, r1)
1463 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1464 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1465 bne 77f /* then don't call hash_page now */
1468 * r3 contains the faulting address
1470 * r5 contains the trap number
1473 * at return r3 = 0 for success, 1 for page fault, negative for error
1477 bl __hash_page /* build HPTE if possible */
1478 cmpdi r3,0 /* see if __hash_page succeeded */
1481 beq fast_exc_return_irq /* Return from exception on success */
1485 #endif /* CONFIG_PPC_STD_MMU_64 */
1487 /* Here we have a page fault that hash_page can't handle. */
1491 addi r3,r1,STACK_FRAME_OVERHEAD
1497 addi r3,r1,STACK_FRAME_OVERHEAD
1502 /* We have a data breakpoint exception - handle it */
1507 addi r3,r1,STACK_FRAME_OVERHEAD
1509 12: b ret_from_except_lite
1512 #ifdef CONFIG_PPC_STD_MMU_64
1513 /* We have a page fault that hash_page could handle but HV refused
1518 addi r3,r1,STACK_FRAME_OVERHEAD
1525 * We come here as a result of a DSI at a point where we don't want
1526 * to call hash_page, such as when we are accessing memory (possibly
1527 * user memory) inside a PMU interrupt that occurred while interrupts
1528 * were soft-disabled. We want to invoke the exception handler for
1529 * the access, or panic if there isn't a handler.
1533 addi r3,r1,STACK_FRAME_OVERHEAD
1539 * Here we have detected that the kernel stack pointer is bad.
1540 * R9 contains the saved CR, r13 points to the paca,
1541 * r10 contains the (bad) kernel stack pointer,
1542 * r11 and r12 contain the saved SRR0 and SRR1.
1543 * We switch to using an emergency stack, save the registers there,
1544 * and call kernel_bad_stack(), which panics.
1547 ld r1,PACAEMERGSP(r13)
1548 subi r1,r1,64+INT_FRAME_SIZE
1554 mfspr r12,SPRN_DSISR
1580 std r10,ORIG_GPR3(r1)
1581 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1584 lhz r12,PACA_TRAP_SAVE(r13)
1586 addi r11,r1,INT_FRAME_SIZE
1591 ld r11,exception_marker@toc(r2)
1593 std r11,STACK_FRAME_OVERHEAD-16(r1)
1594 1: addi r3,r1,STACK_FRAME_OVERHEAD