3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
15 * This file contains the entry point for the 64-bit kernel along
16 * with some early initialization code common to all 64-bit powerpc
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
25 #include <linux/threads.h>
26 #include <linux/init.h>
30 #include <asm/ppc_asm.h>
31 #include <asm/asm-offsets.h>
33 #include <asm/cputable.h>
34 #include <asm/setup.h>
35 #include <asm/hvcall.h>
36 #include <asm/thread_info.h>
37 #include <asm/firmware.h>
38 #include <asm/page_64.h>
39 #include <asm/irqflags.h>
40 #include <asm/kvm_book3s_asm.h>
41 #include <asm/ptrace.h>
42 #include <asm/hw_irq.h>
43 #include <asm/cputhreads.h>
44 #include <asm/ppc-opcode.h>
46 /* The physical memory is laid out such that the secondary processor
47 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
48 * using the layout described in exceptions-64s.S
52 * Entering into this code we make the following assumptions:
54 * For pSeries or server processors:
55 * 1. The MMU is off & open firmware is running in real mode.
56 * 2. The kernel is entered at __start
57 * -or- For OPAL entry:
58 * 1. The MMU is off, processor in HV mode, primary CPU enters at 0
59 * with device-tree in gpr3. We also get OPAL base in r8 and
60 * entry in r9 for debugging purposes
61 * 2. Secondary processors enter at 0x60 with PIR in gpr3
63 * For Book3E processors:
64 * 1. The MMU is on running in AS0 in a state defined in ePAPR
65 * 2. The kernel is entered at __start
72 /* NOP this out unconditionally */
75 b __start_initialization_multiplatform
78 /* Catch branch to 0 in real mode */
81 /* Secondary processors spin on this value until it becomes non-zero.
82 * When non-zero, it contains the real address of the function the cpu
86 .globl __secondary_hold_spinloop
87 __secondary_hold_spinloop:
90 /* Secondary processors write this value with their cpu # */
91 /* after they enter the spin loop immediately below. */
92 .globl __secondary_hold_acknowledge
93 __secondary_hold_acknowledge:
96 #ifdef CONFIG_RELOCATABLE
97 /* This flag is set to 1 by a loader if the kernel should run
98 * at the loaded address instead of the linked address. This
99 * is used by kexec-tools to keep the the kdump kernel in the
100 * crash_kernel region. The loader is responsible for
101 * observing the alignment requirement.
103 /* Do not move this variable as kexec-tools knows about it. */
107 .long 0x72756e30 /* "run0" -- relocate to 0 by default */
112 * The following code is used to hold secondary processors
113 * in a spin loop after they have entered the kernel, but
114 * before the bulk of the kernel has been relocated. This code
115 * is relocated to physical address 0x60 before prom_init is run.
116 * All of it must fit below the first exception vector at 0x100.
117 * Use .globl here not _GLOBAL because we want __secondary_hold
118 * to be the actual text address, not a descriptor.
120 .globl __secondary_hold
123 #ifndef CONFIG_PPC_BOOK3E
126 mtmsrd r24 /* RI on */
128 /* Grab our physical cpu number */
130 /* stash r4 for book3e */
133 /* Tell the master cpu we're here */
134 /* Relocation is off & we are located at an address less */
135 /* than 0x100, so only need to grab low order offset. */
136 std r24,__secondary_hold_acknowledge-_stext(0)
140 #ifdef CONFIG_PPC_BOOK3E
143 /* All secondary cpus wait here until told to start. */
144 100: ld r12,__secondary_hold_spinloop-_stext(r26)
148 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
149 #ifdef CONFIG_PPC_BOOK3E
155 * it may be the case that other platforms have r4 right to
156 * begin with, this gives us some safety in case it is not
158 #ifdef CONFIG_PPC_BOOK3E
163 /* Make sure that patched code is visible */
170 /* This value is used to mark exception frames on the stack. */
173 .tc ID_72656773_68657265[TC],0x7265677368657265
177 * On server, we include the exception vectors code here as it
178 * relies on absolute addressing which is only possible within
179 * this compilation unit
181 #ifdef CONFIG_PPC_BOOK3S
182 #include "exceptions-64s.S"
185 #ifdef CONFIG_PPC_BOOK3E
187 * The booting_thread_hwid holds the thread id we want to boot in cpu
188 * hotplug case. It is set by cpu hotplug code, and is invalid by default.
189 * The thread id is the same as the initial value of SPRN_PIR[THREAD_ID]
192 .globl booting_thread_hwid
194 .long INVALID_THREAD_HWID
197 * start a thread in the same core
199 * r3 = the thread physical id
200 * r4 = the entry point where thread starts
202 _GLOBAL(book3e_start_thread)
203 LOAD_REG_IMMEDIATE(r5, MSR_KERNEL)
208 /* If the thread id is invalid, just exit. */
226 * stop a thread in the same core
228 * r3 = the thread physical id
230 _GLOBAL(book3e_stop_thread)
235 /* If the thread id is invalid, just exit. */
244 _GLOBAL(fsl_secondary_thread_init)
247 /* Enable branch prediction */
249 ori r3,r3,BUCSR_INIT@l
254 * Fix PIR to match the linear numbering in the device tree.
256 * On e6500, the reset value of PIR uses the low three bits for
257 * the thread within a core, and the upper bits for the core
258 * number. There are two threads per core, so shift everything
259 * but the low bit right by two bits so that the cpu numbering is
262 * If the old value of BUCSR is non-zero, this thread has run
263 * before. Thus, we assume we are coming from kexec or a similar
264 * scenario, and PIR is already set to the correct value. This
265 * is a bit of a hack, but there are limited opportunities for
266 * getting information into the thread and the alternatives
267 * seemed like they'd be overkill. We can't tell just by looking
268 * at the old PIR value which state it's in, since the same value
269 * could be valid for one thread out of reset and for a different
276 rlwimi r3, r3, 30, 2, 30
281 _GLOBAL(generic_secondary_thread_init)
284 /* turn on 64-bit mode */
287 /* get a valid TOC pointer, wherever we're mapped at */
291 #ifdef CONFIG_PPC_BOOK3E
292 /* Book3E initialization */
294 bl book3e_secondary_thread_init
296 b generic_secondary_common_init
299 * On pSeries and most other platforms, secondary processors spin
300 * in the following code.
301 * At entry, r3 = this processor's number (physical cpu id)
303 * On Book3E, r4 = 1 to indicate that the initial TLB entry for
304 * this core already exists (setup via some other mechanism such
305 * as SCOM before entry).
307 _GLOBAL(generic_secondary_smp_init)
312 /* turn on 64-bit mode */
315 /* get a valid TOC pointer, wherever we're mapped at */
319 #ifdef CONFIG_PPC_BOOK3E
320 /* Book3E initialization */
323 bl book3e_secondary_core_init
326 * After common core init has finished, check if the current thread is the
327 * one we wanted to boot. If not, start the specified thread and stop the
330 LOAD_REG_ADDR(r4, booting_thread_hwid)
332 li r5, INVALID_THREAD_HWID
337 * The value of booting_thread_hwid has been stored in r3,
338 * so make it invalid.
343 * Get the current thread id and check if it is the one we wanted.
344 * If not, start the one specified in booting_thread_hwid and stop
345 * the current thread.
351 /* start the specified thread */
352 LOAD_REG_ADDR(r5, fsl_secondary_thread_init)
354 bl book3e_start_thread
356 /* stop the current thread */
358 bl book3e_stop_thread
364 generic_secondary_common_init:
365 /* Set up a paca value for this processor. Since we have the
366 * physical cpu id in r24, we need to search the pacas to find
367 * which logical id maps to our physical one.
369 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
370 ld r13,0(r13) /* Get base vaddr of paca array */
372 addi r13,r13,PACA_SIZE /* know r13 if used accidentally */
373 b kexec_wait /* wait for next kernel if !SMP */
375 LOAD_REG_ADDR(r7, nr_cpu_ids) /* Load nr_cpu_ids address */
376 lwz r7,0(r7) /* also the max paca allocated */
377 li r5,0 /* logical cpu id */
378 1: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
379 cmpw r6,r24 /* Compare to our id */
381 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */
383 cmpw r5,r7 /* Check if more pacas exist */
386 mr r3,r24 /* not found, copy phys to r3 */
387 b kexec_wait /* next kernel might do better */
390 #ifdef CONFIG_PPC_BOOK3E
391 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */
392 mtspr SPRN_SPRG_TLB_EXFRAME,r12
395 /* From now on, r24 is expected to be logical cpuid */
398 /* See if we need to call a cpu state restore handler */
399 LOAD_REG_ADDR(r23, cur_cpu_spec)
401 ld r12,CPU_SPEC_RESTORE(r23)
404 #ifdef PPC64_ELF_ABI_v1
410 3: LOAD_REG_ADDR(r3, spinning_secondaries) /* Decrement spinning_secondaries */
418 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
421 beq 4b /* Loop until told to go */
423 sync /* order paca.run and cur_cpu_spec */
424 isync /* In case code patching happened */
426 /* Create a temp kernel stack for use before relocation is on. */
427 ld r1,PACAEMERGSP(r13)
428 subi r1,r1,STACK_FRAME_OVERHEAD
435 * Assumes we're mapped EA == RA if the MMU is on.
437 #ifdef CONFIG_PPC_BOOK3S
440 andi. r0,r3,MSR_IR|MSR_DR
448 b . /* prevent speculative execution */
453 * Here is our main kernel entry point. We support currently 2 kind of entries
454 * depending on the value of r5.
456 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
459 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the
460 * DT block, r4 is a physical pointer to the kernel itself
463 __start_initialization_multiplatform:
464 /* Make sure we are running in 64 bits mode */
467 /* Get TOC pointer (current runtime address) */
470 /* find out where we are now */
472 0: mflr r26 /* r26 = runtime addr here */
473 addis r26,r26,(_stext - 0b)@ha
474 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
477 * Are we booted from a PROM Of-type client-interface ?
481 b __boot_from_prom /* yes -> prom */
483 /* Save parameters */
486 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
487 /* Save OPAL entry */
492 #ifdef CONFIG_PPC_BOOK3E
493 bl start_initialization_book3e
496 /* Setup some critical 970 SPRs before switching MMU off */
499 cmpwi r0,0x39 /* 970 */
501 cmpwi r0,0x3c /* 970FX */
503 cmpwi r0,0x44 /* 970MP */
505 cmpwi r0,0x45 /* 970GX */
507 1: bl __cpu_preinit_ppc970
510 /* Switch off MMU if not already off */
513 #endif /* CONFIG_PPC_BOOK3E */
516 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
517 /* Save parameters */
525 * Align the stack to 16-byte boundary
526 * Depending on the size and layout of the ELF sections in the initial
527 * boot binary, the stack pointer may be unaligned on PowerMac
531 #ifdef CONFIG_RELOCATABLE
532 /* Relocate code for where we are now */
537 /* Restore parameters */
544 /* Do all of the interaction with OF client interface */
547 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
549 /* We never return. We also hit that trap if trying to boot
550 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
554 #ifdef CONFIG_RELOCATABLE
555 /* process relocations for the final address of the kernel */
556 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
558 #if defined(CONFIG_PPC_BOOK3E)
559 tovirt(r26,r26) /* on booke, we already run at PAGE_OFFSET */
561 lwz r7,__run_at_load-_stext(r26)
562 #if defined(CONFIG_PPC_BOOK3E)
565 cmplwi cr0,r7,1 /* flagged to stay where we are ? */
570 #if defined(CONFIG_PPC_BOOK3E)
571 /* IVPR needs to be set after relocation. */
577 * We need to run with _stext at physical address PHYSICAL_START.
578 * This will leave some code in the first 256B of
579 * real memory, which are reserved for software use.
581 * Note: This process overwrites the OF exception vectors.
583 li r3,0 /* target addr */
584 #ifdef CONFIG_PPC_BOOK3E
585 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */
587 mr. r4,r26 /* In some cases the loader may */
588 #if defined(CONFIG_PPC_BOOK3E)
591 beq 9f /* have already put us at zero */
592 li r6,0x100 /* Start offset, the first 0x100 */
593 /* bytes were copied earlier. */
595 #ifdef CONFIG_RELOCATABLE
597 * Check if the kernel has to be running as relocatable kernel based on the
598 * variable __run_at_load, if it is set the kernel is treated as relocatable
599 * kernel, otherwise it will be moved to PHYSICAL_START
601 #if defined(CONFIG_PPC_BOOK3E)
602 tovirt(r26,r26) /* on booke, we already run at PAGE_OFFSET */
604 lwz r7,__run_at_load-_stext(r26)
608 #ifdef CONFIG_PPC_BOOK3E
609 LOAD_REG_ADDR(r5, __end_interrupts)
610 LOAD_REG_ADDR(r11, _stext)
613 /* just copy interrupts */
614 LOAD_REG_IMMEDIATE(r5, __end_interrupts - _stext)
619 lis r5,(copy_to_here - _stext)@ha
620 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
622 bl copy_and_flush /* copy the first n bytes */
623 /* this includes the code being */
625 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */
626 addi r12,r8,(4f - _stext)@l /* that we just made */
631 p_end: .llong _end - copy_to_here
635 * Now copy the rest of the kernel up to _end, add
636 * _end - copy_to_here to the copy limit and run again.
638 addis r8,r26,(p_end - _stext)@ha
639 ld r8,(p_end - _stext)@l(r8)
641 5: bl copy_and_flush /* copy the rest */
643 9: b start_here_multiplatform
646 * Copy routine used to copy the kernel to start at physical address 0
647 * and flush and invalidate the caches as needed.
648 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
649 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
651 * Note: this routine *only* clobbers r0, r6 and lr
653 _GLOBAL(copy_and_flush)
656 4: li r0,8 /* Use the smallest common */
657 /* denominator cache line */
658 /* size. This results in */
659 /* extra cache line flushes */
660 /* but operation is correct. */
661 /* Can't get cache line size */
662 /* from NACA as it is being */
665 mtctr r0 /* put # words/line in ctr */
666 3: addi r6,r6,8 /* copy a cache line */
670 dcbst r6,r3 /* write it to memory */
672 icbi r6,r3 /* flush the icache line */
685 #ifdef CONFIG_PPC_PMAC
687 * On PowerMac, secondary processors starts from the reset vector, which
688 * is temporarily turned into a call to one of the functions below.
693 .globl __secondary_start_pmac_0
694 __secondary_start_pmac_0:
695 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
705 _GLOBAL(pmac_secondary_start)
706 /* turn on 64-bit mode */
711 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
718 /* get TOC pointer (real address) */
722 /* Copy some CPU settings from CPU 0 */
723 bl __restore_cpu_ppc970
725 /* pSeries do that early though I don't think we really need it */
728 mtmsrd r3 /* RI on */
730 /* Set up a paca value for this processor. */
731 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
732 ld r4,0(r4) /* Get base vaddr of paca array */
733 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
734 add r13,r13,r4 /* for this processor. */
735 SET_PACA(r13) /* Save vaddr of paca in an SPRG*/
737 /* Mark interrupts soft and hard disabled (they might be enabled
738 * in the PACA when doing hotplug)
741 stb r0,PACASOFTIRQEN(r13)
742 li r0,PACA_IRQ_HARD_DIS
743 stb r0,PACAIRQHAPPENED(r13)
745 /* Create a temp kernel stack for use before relocation is on. */
746 ld r1,PACAEMERGSP(r13)
747 subi r1,r1,STACK_FRAME_OVERHEAD
751 #endif /* CONFIG_PPC_PMAC */
754 * This function is called after the master CPU has released the
755 * secondary processors. The execution environment is relocation off.
756 * The paca for this processor has the following fields initialized at
758 * 1. Processor number
759 * 2. Segment table pointer (virtual address)
760 * On entry the following are set:
761 * r1 = stack pointer (real addr of temp stack)
762 * r24 = cpu# (in Linux terms)
763 * r13 = paca virtual address
764 * SPRG_PACA = paca virtual address
769 .globl __secondary_start
771 /* Set thread priority to MEDIUM */
774 /* Initialize the kernel stack */
775 LOAD_REG_ADDR(r3, current_set)
776 sldi r28,r24,3 /* get current_set[cpu#] */
778 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
779 std r14,PACAKSAVE(r13)
781 /* Do early setup for that CPU (SLB and hash table pointer) */
782 bl early_setup_secondary
785 * setup the new stack pointer, but *don't* use this until
790 /* Clear backchain so we get nice backtraces */
794 /* Mark interrupts soft and hard disabled (they might be enabled
795 * in the PACA when doing hotplug)
797 stb r7,PACASOFTIRQEN(r13)
798 li r0,PACA_IRQ_HARD_DIS
799 stb r0,PACAIRQHAPPENED(r13)
801 /* enable MMU and jump to start_secondary */
802 LOAD_REG_ADDR(r3, start_secondary_prolog)
803 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
808 b . /* prevent speculative execution */
811 * Running with relocation on at this point. All we want to do is
812 * zero the stack back-chain pointer and get the TOC virtual address
813 * before going into C code.
815 start_secondary_prolog:
818 std r3,0(r1) /* Zero the stack frame pointer */
822 * Reset stack pointer and call start_secondary
823 * to continue with online operation when woken up
824 * from cede in cpu offline.
826 _GLOBAL(start_secondary_resume)
827 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
829 std r3,0(r1) /* Zero the stack frame pointer */
835 * This subroutine clobbers r11 and r12
838 mfmsr r11 /* grab the current MSR */
839 #ifdef CONFIG_PPC_BOOK3E
840 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
842 #else /* CONFIG_PPC_BOOK3E */
843 li r12,(MSR_64BIT | MSR_ISF)@highest
852 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
853 * by the toolchain). It computes the correct value for wherever we
854 * are running at the moment, using position-independent code.
856 * Note: The compiler constructs pointers using offsets from the
857 * TOC in -mcmodel=medium mode. After we relocate to 0 but before
858 * the MMU is on we need our TOC to be a virtual address otherwise
859 * these pointers will be real addresses which may get stored and
860 * accessed later with the MMU on. We use tovirt() at the call
861 * sites to handle this.
863 _GLOBAL(relative_toc)
867 ld r2,(p_toc - 0b)(r11)
873 p_toc: .llong __toc_start + 0x8000 - 0b
876 * This is where the main kernel code starts.
878 start_here_multiplatform:
883 /* Clear out the BSS. It may have been done in prom_init,
884 * already but that's irrelevant since prom_init will soon
885 * be detached from the kernel completely. Besides, we need
886 * to clear it now for kexec-style entry.
888 LOAD_REG_ADDR(r11,__bss_stop)
889 LOAD_REG_ADDR(r8,__bss_start)
890 sub r11,r11,r8 /* bss size */
891 addi r11,r11,7 /* round up to an even double word */
892 srdi. r11,r11,3 /* shift right by 3 */
896 mtctr r11 /* zero this many doublewords */
901 #ifdef CONFIG_PPC_EARLY_DEBUG_OPAL
902 /* Setup OPAL entry */
903 LOAD_REG_ADDR(r11, opal)
908 #ifndef CONFIG_PPC_BOOK3E
911 mtmsrd r6 /* RI on */
914 #ifdef CONFIG_RELOCATABLE
915 /* Save the physical address we're running at in kernstart_addr */
916 LOAD_REG_ADDR(r4, kernstart_addr)
921 /* The following gets the stack set up with the regs */
922 /* pointing to the real addr of the kernel stack. This is */
923 /* all done to support the C function call below which sets */
924 /* up the htab. This is done because we have relocated the */
925 /* kernel but are still running in real mode. */
927 LOAD_REG_ADDR(r3,init_thread_union)
929 /* set up a stack pointer */
930 addi r1,r3,THREAD_SIZE
932 stdu r0,-STACK_FRAME_OVERHEAD(r1)
935 * Do very early kernel initializations, including initial hash table
936 * and SLB setup before we turn on relocation.
939 /* Restore parameters passed from prom_init/kexec */
941 bl early_setup /* also sets r13 and SPRG_PACA */
943 LOAD_REG_ADDR(r3, start_here_common)
948 b . /* prevent speculative execution */
950 /* This is where all platforms converge execution */
953 /* relocation is on at this point */
954 std r1,PACAKSAVE(r13)
956 /* Load the TOC (virtual address) */
959 /* Mark interrupts soft and hard disabled (they might be enabled
960 * in the PACA when doing hotplug)
963 stb r0,PACASOFTIRQEN(r13)
964 li r0,PACA_IRQ_HARD_DIS
965 stb r0,PACAIRQHAPPENED(r13)
967 /* Generic kernel entry */
974 * We put a few things here that have to be page-aligned.
975 * This stuff goes at the beginning of the bss, which is page-aligned.
979 * pgd dir should be aligned to PGD_TABLE_SIZE which is 64K.
980 * We will need to find a better way to fix this
984 .globl swapper_pg_dir
986 .space PGD_TABLE_SIZE
988 .globl empty_zero_page