arch/powerpc/platforms/85xx/mpc85xx_ds.c

   1 /*
   2  * MPC85xx DS Board Setup
   3  *
   4  * Author Xianghua Xiao (x.xiao@freescale.com)
   5  * Roy Zang <tie-fei.zang@freescale.com>
   6  *      - Add PCI/PCI Exprees support
   7  * Copyright 2007 Freescale Semiconductor Inc.
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  * under  the terms of  the GNU General  Public License as published by the
  11  * Free Software Foundation;  either version 2 of the  License, or (at your
  12  * option) any later version.
  13  */
  14
  15 #include <linux/stddef.h>
  16 #include <linux/kernel.h>
  17 #include <linux/pci.h>
  18 #include <linux/kdev_t.h>
  19 #include <linux/delay.h>
  20 #include <linux/seq_file.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/of_platform.h>
  23 #include <linux/memblock.h>
  24
  25 #include <asm/system.h>
  26 #include <asm/time.h>
  27 #include <asm/machdep.h>
  28 #include <asm/pci-bridge.h>
  29 #include <mm/mmu_decl.h>
  30 #include <asm/prom.h>
  31 #include <asm/udbg.h>
  32 #include <asm/mpic.h>
  33 #include <asm/i8259.h>
  34 #include <asm/swiotlb.h>
  35
  36 #include <sysdev/fsl_soc.h>
  37 #include <sysdev/fsl_pci.h>
  38
  39 #include "mpc85xx.h"
  40
  41 #undef DEBUG
  42
  43 #ifdef DEBUG
  44 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  45 #else
  46 #define DBG(fmt, args...)
  47 #endif
  48
  49 #ifdef CONFIG_PPC_I8259
  50 static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
  51 {
  52         struct irq_chip *chip = irq_desc_get_chip(desc);
  53         unsigned int cascade_irq = i8259_irq();
  54
  55         if (cascade_irq != NO_IRQ) {
  56                 generic_handle_irq(cascade_irq);
  57         }
  58         chip->irq_eoi(&desc->irq_data);
  59 }
  60 #endif  /* CONFIG_PPC_I8259 */
  61
  62 void __init mpc85xx_ds_pic_init(void)
  63 {
  64         struct mpic *mpic;
  65         struct resource r;
  66         struct device_node *np;
  67 #ifdef CONFIG_PPC_I8259
  68         struct device_node *cascade_node = NULL;
  69         int cascade_irq;
  70 #endif
  71         unsigned long root = of_get_flat_dt_root();
  72
  73         np = of_find_node_by_type(NULL, "open-pic");
  74         if (np == NULL) {
  75                 printk(KERN_ERR "Could not find open-pic node\n");
  76                 return;
  77         }
  78
  79         if (of_address_to_resource(np, 0, &r)) {
  80                 printk(KERN_ERR "Failed to map mpic register space\n");
  81                 of_node_put(np);
  82                 return;
  83         }
  84
  85         if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
  86                 mpic = mpic_alloc(np, r.start,
  87                         MPIC_PRIMARY |
  88                         MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
  89                         MPIC_SINGLE_DEST_CPU,
  90                         0, 256, " OpenPIC  ");
  91         } else {
  92                 mpic = mpic_alloc(np, r.start,
  93                           MPIC_PRIMARY | MPIC_WANTS_RESET |
  94                           MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
  95                           MPIC_SINGLE_DEST_CPU,
  96                         0, 256, " OpenPIC  ");
  97         }
  98
  99         BUG_ON(mpic == NULL);
 100         of_node_put(np);
 101
 102         mpic_init(mpic);
 103
 104 #ifdef CONFIG_PPC_I8259
 105         /* Initialize the i8259 controller */
 106         for_each_node_by_type(np, "interrupt-controller")
 107             if (of_device_is_compatible(np, "chrp,iic")) {
 108                 cascade_node = np;
 109                 break;
 110         }
 111
 112         if (cascade_node == NULL) {
 113                 printk(KERN_DEBUG "Could not find i8259 PIC\n");
 114                 return;
 115         }
 116
 117         cascade_irq = irq_of_parse_and_map(cascade_node, 0);
 118         if (cascade_irq == NO_IRQ) {
 119                 printk(KERN_ERR "Failed to map cascade interrupt\n");
 120                 return;
 121         }
 122
 123         DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq);
 124
 125         i8259_init(cascade_node, 0);
 126         of_node_put(cascade_node);
 127
 128         irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade);
 129 #endif  /* CONFIG_PPC_I8259 */
 130 }
 131
 132 #ifdef CONFIG_PCI
 133 static int primary_phb_addr;
 134 extern int uli_exclude_device(struct pci_controller *hose,
 135                                 u_char bus, u_char devfn);
 136
 137 static int mpc85xx_exclude_device(struct pci_controller *hose,
 138                                    u_char bus, u_char devfn)
 139 {
 140         struct device_node* node;
 141         struct resource rsrc;
 142
 143         node = hose->dn;
 144         of_address_to_resource(node, 0, &rsrc);
 145
 146         if ((rsrc.start & 0xfffff) == primary_phb_addr) {
 147                 return uli_exclude_device(hose, bus, devfn);
 148         }
 149
 150         return PCIBIOS_SUCCESSFUL;
 151 }
 152 #endif  /* CONFIG_PCI */
 153
 154 /*
 155  * Setup the architecture
 156  */
 157 #ifdef CONFIG_SMP
 158 extern void __init mpc85xx_smp_init(void);
 159 #endif
 160 static void __init mpc85xx_ds_setup_arch(void)
 161 {
 162 #ifdef CONFIG_PCI
 163         struct device_node *np;
 164         struct pci_controller *hose;
 165 #endif
 166         dma_addr_t max = 0xffffffff;
 167
 168         if (ppc_md.progress)
 169                 ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
 170
 171 #ifdef CONFIG_PCI
 172         for_each_node_by_type(np, "pci") {
 173                 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
 174                     of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
 175                     of_device_is_compatible(np, "fsl,p2020-pcie")) {
 176                         struct resource rsrc;
 177                         of_address_to_resource(np, 0, &rsrc);
 178                         if ((rsrc.start & 0xfffff) == primary_phb_addr)
 179                                 fsl_add_bridge(np, 1);
 180                         else
 181                                 fsl_add_bridge(np, 0);
 182
 183                         hose = pci_find_hose_for_OF_device(np);
 184                         max = min(max, hose->dma_window_base_cur +
 185                                         hose->dma_window_size);
 186                 }
 187         }
 188
 189         ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 190 #endif
 191
 192 #ifdef CONFIG_SMP
 193         mpc85xx_smp_init();
 194 #endif
 195
 196 #ifdef CONFIG_SWIOTLB
 197         if (memblock_end_of_DRAM() > max) {
 198                 ppc_swiotlb_enable = 1;
 199                 set_pci_dma_ops(&swiotlb_dma_ops);
 200                 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
 201         }
 202 #endif
 203
 204         printk("MPC85xx DS board from Freescale Semiconductor\n");
 205 }
 206
 207 /*
 208  * Called very early, device-tree isn't unflattened
 209  */
 210 static int __init mpc8544_ds_probe(void)
 211 {
 212         unsigned long root = of_get_flat_dt_root();
 213
 214         if (of_flat_dt_is_compatible(root, "MPC8544DS")) {
 215 #ifdef CONFIG_PCI
 216                 primary_phb_addr = 0xb000;
 217 #endif
 218                 return 1;
 219         }
 220
 221         return 0;
 222 }
 223
 224 static struct of_device_id __initdata mpc85xxds_ids[] = {
 225         { .type = "soc", },
 226         { .compatible = "soc", },
 227         { .compatible = "simple-bus", },
 228         { .compatible = "gianfar", },
 229         {},
 230 };
 231
 232 static int __init mpc85xxds_publish_devices(void)
 233 {
 234         return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL);
 235 }
 236 machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
 237 machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
 238 machine_device_initcall(p2020_ds, mpc85xxds_publish_devices);
 239
 240 machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier);
 241 machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier);
 242 machine_arch_initcall(p2020_ds, swiotlb_setup_bus_notifier);
 243
 244 /*
 245  * Called very early, device-tree isn't unflattened
 246  */
 247 static int __init mpc8572_ds_probe(void)
 248 {
 249         unsigned long root = of_get_flat_dt_root();
 250
 251         if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) {
 252 #ifdef CONFIG_PCI
 253                 primary_phb_addr = 0x8000;
 254 #endif
 255                 return 1;
 256         }
 257
 258         return 0;
 259 }
 260
 261 /*
 262  * Called very early, device-tree isn't unflattened
 263  */
 264 static int __init p2020_ds_probe(void)
 265 {
 266         unsigned long root = of_get_flat_dt_root();
 267
 268         if (of_flat_dt_is_compatible(root, "fsl,P2020DS")) {
 269 #ifdef CONFIG_PCI
 270                 primary_phb_addr = 0x9000;
 271 #endif
 272                 return 1;
 273         }
 274
 275         return 0;
 276 }
 277
 278 define_machine(mpc8544_ds) {
 279         .name                   = "MPC8544 DS",
 280         .probe                  = mpc8544_ds_probe,
 281         .setup_arch             = mpc85xx_ds_setup_arch,
 282         .init_IRQ               = mpc85xx_ds_pic_init,
 283 #ifdef CONFIG_PCI
 284         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 285 #endif
 286         .get_irq                = mpic_get_irq,
 287         .restart                = fsl_rstcr_restart,
 288         .calibrate_decr         = generic_calibrate_decr,
 289         .progress               = udbg_progress,
 290 };
 291
 292 define_machine(mpc8572_ds) {
 293         .name                   = "MPC8572 DS",
 294         .probe                  = mpc8572_ds_probe,
 295         .setup_arch             = mpc85xx_ds_setup_arch,
 296         .init_IRQ               = mpc85xx_ds_pic_init,
 297 #ifdef CONFIG_PCI
 298         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 299 #endif
 300         .get_irq                = mpic_get_irq,
 301         .restart                = fsl_rstcr_restart,
 302         .calibrate_decr         = generic_calibrate_decr,
 303         .progress               = udbg_progress,
 304 };
 305
 306 define_machine(p2020_ds) {
 307         .name                   = "P2020 DS",
 308         .probe                  = p2020_ds_probe,
 309         .setup_arch             = mpc85xx_ds_setup_arch,
 310         .init_IRQ               = mpc85xx_ds_pic_init,
 311 #ifdef CONFIG_PCI
 312         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 313 #endif
 314         .get_irq                = mpic_get_irq,
 315         .restart                = fsl_rstcr_restart,
 316         .calibrate_decr         = generic_calibrate_decr,
 317         .progress               = udbg_progress,
 318 };