6 This option selects whether a 32-bit or a 64-bit kernel
9 menu "Processor support"
11 prompt "Processor Type"
14 There are five families of 32 bit PowerPC chips supported.
15 The most common ones are the desktop and server CPUs (601, 603,
16 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
17 embedded 512x/52xx/82xx/83xx/86xx counterparts.
18 The other embedded parts, namely 4xx, 8xx, e200 (55xx) and e500
19 (85xx) each form a family of their own that is not compatible
22 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
25 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
46 bool "AMCC 44x, 46x or 47x"
59 prompt "Processor Type"
62 There are two families of 64 bit PowerPC chips supported.
63 The most common ones are the desktop and server CPUs
64 (POWER4, POWER5, 970, POWER5+, POWER6, POWER7, POWER8 ...)
66 The other are the "embedded" processors compliant with the
67 "Book 3E" variant of the architecture
70 bool "Server processors"
72 select PPC_HAVE_PMU_SUPPORT
73 select SYS_SUPPORTS_HUGETLBFS
74 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
75 select ARCH_SUPPORTS_NUMA_BALANCING
80 bool "Embedded processors"
81 select PPC_FPU # Make it a choice ?
82 select PPC_SMP_MUXED_IPI
88 prompt "CPU selection"
90 default POWER8_CPU if CPU_LITTLE_ENDIAN
93 This will create a kernel which is optimised for a particular CPU.
94 The resulting kernel may not run on other CPUs, so use this with care.
96 If unsure, select Generic.
100 depends on !CPU_LITTLE_ENDIAN
103 bool "Cell Broadband Engine"
104 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
108 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
112 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
116 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
120 depends on PPC_BOOK3S_64
121 select ARCH_HAS_FAST_MULTIPLIER
125 depends on PPC_BOOK3S_64
126 select ARCH_HAS_FAST_MULTIPLIER
129 bool "Freescale e5500"
133 bool "Freescale e6500"
140 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
144 depends on PPC_BOOK3E_64
148 depends on PPC32 && PPC_BOOK3S
149 select PPC_HAVE_PMU_SUPPORT
151 # this is temp to handle compat with arch=ppc
156 select FSL_EMB_PERFMON
157 select PPC_FSL_BOOK3E
161 bool "e500mc Support"
166 This must be enabled for running on e500mc (and derivatives
167 such as e5500/e6500), and must be disabled for running on
174 config FSL_EMB_PERFMON
175 bool "Freescale Embedded Perfmon"
176 depends on E500 || PPC_83xx
178 This is the Performance Monitor support found on the e500 core
179 and some e300 cores (c3 and c4). Select this only if your
180 core supports the Embedded Performance Monitor APU
182 config FSL_EMB_PERF_EVENT
184 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
187 config FSL_EMB_PERF_EVENT_E500
189 depends on FSL_EMB_PERF_EVENT && E500
194 depends on 40x || 44x
199 depends on E200 || E500 || 44x || PPC_BOOK3E
204 depends on (E200 || E500) && PPC32
207 # this is for common code between PPC32 & PPC64 FSL BOOKE
208 config PPC_FSL_BOOK3E
210 select FSL_EMB_PERFMON
211 select PPC_SMP_MUXED_IPI
212 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
214 default y if FSL_BOOKE
218 depends on 44x || E500 || PPC_86xx
219 default y if PHYS_64BIT
222 bool 'Large physical address support' if E500 || PPC_86xx
223 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
225 This option enables kernel support for larger than 32-bit physical
226 addresses. This feature may not be available on all cores.
228 If you have more than 3.5GB of RAM or so, you also need to enable
229 SWIOTLB under Kernel Options for this to work. The actual number
230 is platform-dependent.
232 If in doubt, say N here.
235 bool "AltiVec Support"
236 depends on 6xx || PPC_BOOK3S_64 || (PPC_E500MC && PPC64)
238 This option enables kernel support for the Altivec extensions to the
239 PowerPC processor. The kernel currently supports saving and restoring
240 altivec registers, and turning on the 'altivec enable' bit so user
241 processes can execute altivec instructions.
243 This option is only usefully if you have a processor that supports
244 altivec (G4, otherwise known as 74xx series), but does not have
245 any affect on a non-altivec cpu (it does, however add code to the
248 If in doubt, say Y here.
252 depends on PPC_BOOK3S_64 && ALTIVEC && PPC_FPU
255 This option enables kernel support for the Vector Scaler extensions
256 to the PowerPC processor. The kernel currently supports saving and
257 restoring VSX registers, and turning on the 'VSX enable' bit so user
258 processes can execute VSX instructions.
260 This option is only useful if you have a processor that supports
261 VSX (P7 and above), but does not have any affect on a non-VSX
262 CPUs (it does, however add code to the kernel).
264 If in doubt, say Y here.
267 bool "Support for PowerPC icswx coprocessor instruction"
268 depends on PPC_BOOK3S_64
272 This option enables kernel support for the PowerPC Initiate
273 Coprocessor Store Word (icswx) coprocessor instruction on POWER7
276 This option is only useful if you have a processor that supports
277 the icswx coprocessor instruction. It does not have any effect
278 on processors without the icswx coprocessor instruction.
280 This option slightly increases kernel memory usage.
282 If in doubt, say N here.
285 bool "icswx requires direct PID management"
289 The PID register in server is used explicitly for ICSWX. In
290 embedded systems PID management is done by the system.
292 config PPC_ICSWX_USE_SIGILL
293 bool "Should a bad CT cause a SIGILL?"
297 Should a bad CT used for "non-record form ICSWX" cause an
298 illegal instruction signal or should it be silent as
301 If in doubt, say N here.
305 depends on E200 || (E500 && !PPC_E500MC)
309 depends on SPE_POSSIBLE
312 This option enables kernel support for the Signal Processing
313 Extensions (SPE) to the PowerPC processor. The kernel currently
314 supports saving and restoring SPE registers, and turning on the
315 'spe enable' bit so user processes can execute SPE instructions.
317 This option is only useful if you have a processor that supports
318 SPE (e500, otherwise known as 85xx series), but does not have any
319 effect on a non-spe cpu (it does, however add code to the kernel).
321 If in doubt, say Y here.
325 depends on PPC_BOOK3S
327 config PPC_STD_MMU_32
329 depends on PPC_STD_MMU && PPC32
331 config PPC_STD_MMU_64
333 depends on PPC_STD_MMU && PPC64
336 bool "Radix MMU Support"
337 depends on PPC_BOOK3S_64
340 Enable support for the Power ISA 3.0 Radix style MMU. Currently this
341 is only implemented by IBM Power9 CPUs, if you don't have one of them
342 you can probably disable this.
344 config PPC_MMU_NOHASH
346 depends on !PPC_STD_MMU
348 config PPC_BOOK3E_MMU
350 depends on FSL_BOOKE || PPC_BOOK3E
354 default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
357 config PPC_HAVE_PMU_SUPPORT
362 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
364 This enables the powerpc-specific perf_event back-end.
367 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
368 bool "Symmetric multi-processing support"
370 This enables support for systems with more than one CPU. If you have
371 a system with only one CPU, say N. If you have a system with more
372 than one CPU, say Y. Note that the kernel does not currently
373 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
374 since they have inadequate hardware support for multiprocessor
377 If you say N here, the kernel will run on single and multiprocessor
378 machines, but will use only one CPU of a multiprocessor machine. If
379 you say Y here, the kernel will run on single-processor machines.
380 On a single-processor machine, the kernel will run faster if you say
383 If you don't know what to do here, say N.
386 int "Maximum number of CPUs (2-8192)"
389 default "32" if PPC64
392 config NOT_COHERENT_CACHE
394 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
398 config CHECK_CACHE_COHERENCY
409 depends on PPC32 || CPU_BIG_ENDIAN
411 This symbol controls whether we build the 32-bit VDSO. We obviously
412 want to do that if we're building a 32-bit kernel. If we're building
413 a 64-bit kernel then we only want a 32-bit VDSO if we're building for
414 big endian. That is because the only little endian configuration we
415 support is ppc64le which is 64-bit only.
418 prompt "Endianness selection"
419 default CPU_BIG_ENDIAN
421 This option selects whether a big endian or little endian kernel will
424 config CPU_BIG_ENDIAN
425 bool "Build big endian kernel"
427 Build a big endian kernel.
429 If unsure, select this option.
431 config CPU_LITTLE_ENDIAN
432 bool "Build little endian kernel"
433 depends on PPC_BOOK3S_64
434 select PPC64_BOOT_WRAPPER
436 Build a little endian kernel.
438 Note that if cross compiling a little endian kernel,
439 CROSS_COMPILE must point to a toolchain capable of targeting
440 little endian powerpc.
444 config PPC64_BOOT_WRAPPER
446 depends on CPU_LITTLE_ENDIAN