arch/ppc/syslib/ibm44x_common.c

   1 /*
   2  * arch/ppc/syslib/ibm44x_common.c
   3  *
   4  * PPC44x system library
   5  *
   6  * Matt Porter <mporter@kernel.crashing.org>
   7  * Copyright 2002-2005 MontaVista Software Inc.
   8  *
   9  * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
  10  * Copyright (c) 2003, 2004 Zultys Technologies
  11  *
  12  * This program is free software; you can redistribute  it and/or modify it
  13  * under  the terms of  the GNU General  Public License as published by the
  14  * Free Software Foundation;  either version 2 of the  License, or (at your
  15  * option) any later version.
  16  *
  17  */
  18 #include <linux/config.h>
  19 #include <linux/time.h>
  20 #include <linux/types.h>
  21 #include <linux/serial.h>
  22 #include <linux/module.h>
  23
  24 #include <asm/ibm44x.h>
  25 #include <asm/mmu.h>
  26 #include <asm/machdep.h>
  27 #include <asm/time.h>
  28 #include <asm/ppc4xx_pic.h>
  29 #include <asm/param.h>
  30
  31 #include <syslib/gen550.h>
  32
  33 phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size)
  34 {
  35         phys_addr_t page_4gb = 0;
  36
  37         /*
  38          * Trap the least significant 32-bit portions of an
  39          * address in the 440's 36-bit address space.  Fix
  40          * them up with the appropriate ERPN
  41          */
  42         if ((addr >= PPC44x_IO_LO) && (addr <= PPC44x_IO_HI))
  43                 page_4gb = PPC44x_IO_PAGE;
  44         else if ((addr >= PPC44x_PCI0CFG_LO) && (addr <= PPC44x_PCI0CFG_HI))
  45                 page_4gb = PPC44x_PCICFG_PAGE;
  46 #ifdef CONFIG_440SP
  47         else if ((addr >= PPC44x_PCI1CFG_LO) && (addr <= PPC44x_PCI1CFG_HI))
  48                 page_4gb = PPC44x_PCICFG_PAGE;
  49         else if ((addr >= PPC44x_PCI2CFG_LO) && (addr <= PPC44x_PCI2CFG_HI))
  50                 page_4gb = PPC44x_PCICFG_PAGE;
  51 #endif
  52         else if ((addr >= PPC44x_PCIMEM_LO) && (addr <= PPC44x_PCIMEM_HI))
  53                 page_4gb = PPC44x_PCIMEM_PAGE;
  54
  55         return (page_4gb | addr);
  56 };
  57 EXPORT_SYMBOL(fixup_bigphys_addr);
  58
  59 void __init ibm44x_calibrate_decr(unsigned int freq)
  60 {
  61         tb_ticks_per_jiffy = freq / HZ;
  62         tb_to_us = mulhwu_scale_factor(freq, 1000000);
  63
  64         /* Set the time base to zero */
  65         mtspr(SPRN_TBWL, 0);
  66         mtspr(SPRN_TBWU, 0);
  67
  68         /* Clear any pending timer interrupts */
  69         mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
  70
  71         /* Enable decrementer interrupt */
  72         mtspr(SPRN_TCR, TCR_DIE);
  73 }
  74
  75 extern void abort(void);
  76
  77 static void ibm44x_restart(char *cmd)
  78 {
  79         local_irq_disable();
  80         abort();
  81 }
  82
  83 static void ibm44x_power_off(void)
  84 {
  85         local_irq_disable();
  86         for(;;);
  87 }
  88
  89 static void ibm44x_halt(void)
  90 {
  91         local_irq_disable();
  92         for(;;);
  93 }
  94
  95 /*
  96  * Read the 44x memory controller to get size of system memory.
  97  */
  98 static unsigned long __init ibm44x_find_end_of_memory(void)
  99 {
 100         u32 i, bank_config;
 101         u32 mem_size = 0;
 102
 103         for (i=0; i<4; i++)
 104         {
 105                 switch (i)
 106                 {
 107                         case 0:
 108                                 mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B0CR);
 109                                 break;
 110                         case 1:
 111                                 mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B1CR);
 112                                 break;
 113                         case 2:
 114                                 mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B2CR);
 115                                 break;
 116                         case 3:
 117                                 mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B3CR);
 118                                 break;
 119                 }
 120
 121                 bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
 122
 123                 if (!(bank_config & SDRAM_CONFIG_BANK_ENABLE))
 124                         continue;
 125                 switch (SDRAM_CONFIG_BANK_SIZE(bank_config))
 126                 {
 127                         case SDRAM_CONFIG_SIZE_8M:
 128                                 mem_size += PPC44x_MEM_SIZE_8M;
 129                                 break;
 130                         case SDRAM_CONFIG_SIZE_16M:
 131                                 mem_size += PPC44x_MEM_SIZE_16M;
 132                                 break;
 133                         case SDRAM_CONFIG_SIZE_32M:
 134                                 mem_size += PPC44x_MEM_SIZE_32M;
 135                                 break;
 136                         case SDRAM_CONFIG_SIZE_64M:
 137                                 mem_size += PPC44x_MEM_SIZE_64M;
 138                                 break;
 139                         case SDRAM_CONFIG_SIZE_128M:
 140                                 mem_size += PPC44x_MEM_SIZE_128M;
 141                                 break;
 142                         case SDRAM_CONFIG_SIZE_256M:
 143                                 mem_size += PPC44x_MEM_SIZE_256M;
 144                                 break;
 145                         case SDRAM_CONFIG_SIZE_512M:
 146                                 mem_size += PPC44x_MEM_SIZE_512M;
 147                                 break;
 148                 }
 149         }
 150         return mem_size;
 151 }
 152
 153 void __init ibm44x_platform_init(void)
 154 {
 155         ppc_md.init_IRQ = ppc4xx_pic_init;
 156         ppc_md.find_end_of_memory = ibm44x_find_end_of_memory;
 157         ppc_md.restart = ibm44x_restart;
 158         ppc_md.power_off = ibm44x_power_off;
 159         ppc_md.halt = ibm44x_halt;
 160
 161 #ifdef CONFIG_SERIAL_TEXT_DEBUG
 162         ppc_md.progress = gen550_progress;
 163 #endif /* CONFIG_SERIAL_TEXT_DEBUG */
 164 #ifdef CONFIG_KGDB
 165         ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
 166 #endif
 167
 168         /*
 169          * The Abatron BDI JTAG debugger does not tolerate others
 170          * mucking with the debug registers.
 171          */
 172 #if !defined(CONFIG_BDI_SWITCH)
 173         /* Enable internal debug mode */
 174         mtspr(SPRN_DBCR0, (DBCR0_IDM));
 175
 176         /* Clear any residual debug events */
 177         mtspr(SPRN_DBSR, 0xffffffff);
 178 #endif
 179 }
 180
 181 /* Called from MachineCheckException */
 182 void platform_machine_check(struct pt_regs *regs)
 183 {
 184         printk("PLB0: BEAR=0x%08x%08x ACR=  0x%08x BESR= 0x%08x\n",
 185                 mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL),
 186                 mfdcr(DCRN_PLB0_ACR),  mfdcr(DCRN_PLB0_BESR));
 187         printk("POB0: BEAR=0x%08x%08x BESR0=0x%08x BESR1=0x%08x\n",
 188                 mfdcr(DCRN_POB0_BEARH), mfdcr(DCRN_POB0_BEARL),
 189                 mfdcr(DCRN_POB0_BESR0), mfdcr(DCRN_POB0_BESR1));
 190         printk("OPB0: BEAR=0x%08x%08x BSTAT=0x%08x\n",
 191                 mfdcr(DCRN_OPB0_BEARH), mfdcr(DCRN_OPB0_BEARL),
 192                 mfdcr(DCRN_OPB0_BSTAT));
 193 }