3 * Copyright IBM Corp. 1999, 2000
4 * Author(s): Hartmut Penner (hp@de.ibm.com)
5 * Ulrich Weigand (weigand@de.ibm.com)
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Derived from "include/asm-i386/pgtable.h"
11 #ifndef _ASM_S390_PGTABLE_H
12 #define _ASM_S390_PGTABLE_H
15 * The Linux memory management assumes a three-level page table setup. For
16 * s390 31 bit we "fold" the mid level into the top-level page table, so
17 * that we physically have the same two-level page table as the s390 mmu
18 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
19 * the hardware provides (region first and region second tables are not
22 * The "pgd_xxx()" functions are trivial for a folded two-level
23 * setup: the pgd is never bad, and a pmd always exists (as it's folded
26 * This file contains the functions and defines necessary to modify and use
27 * the S390 page table tree.
30 #include <linux/sched.h>
31 #include <linux/mm_types.h>
32 #include <linux/page-flags.h>
33 #include <linux/radix-tree.h>
37 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
38 extern void paging_init(void);
39 extern void vmem_map_init(void);
42 * The S390 doesn't have any external MMU info: the kernel page
43 * tables contain all the necessary information.
45 #define update_mmu_cache(vma, address, ptep) do { } while (0)
46 #define update_mmu_cache_pmd(vma, address, ptep) do { } while (0)
49 * ZERO_PAGE is a global shared page that is always zero; used
50 * for zero-mapped memory areas etc..
53 extern unsigned long empty_zero_page;
54 extern unsigned long zero_page_mask;
56 #define ZERO_PAGE(vaddr) \
57 (virt_to_page((void *)(empty_zero_page + \
58 (((unsigned long)(vaddr)) &zero_page_mask))))
59 #define __HAVE_COLOR_ZERO_PAGE
61 /* TODO: s390 cannot support io_remap_pfn_range... */
62 #endif /* !__ASSEMBLY__ */
65 * PMD_SHIFT determines the size of the area a second-level page
67 * PGDIR_SHIFT determines what a third-level page table entry can map
72 # define PGDIR_SHIFT 20
73 #else /* CONFIG_64BIT */
76 # define PGDIR_SHIFT 42
77 #endif /* CONFIG_64BIT */
79 #define PMD_SIZE (1UL << PMD_SHIFT)
80 #define PMD_MASK (~(PMD_SIZE-1))
81 #define PUD_SIZE (1UL << PUD_SHIFT)
82 #define PUD_MASK (~(PUD_SIZE-1))
83 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
84 #define PGDIR_MASK (~(PGDIR_SIZE-1))
87 * entries per page directory level: the S390 is two-level, so
88 * we don't really have any PMD directory physically.
89 * for S390 segment-table entries are combined to one PGD
90 * that leads to 1024 pte per pgd
92 #define PTRS_PER_PTE 256
94 #define PTRS_PER_PMD 1
95 #define PTRS_PER_PUD 1
96 #else /* CONFIG_64BIT */
97 #define PTRS_PER_PMD 2048
98 #define PTRS_PER_PUD 2048
99 #endif /* CONFIG_64BIT */
100 #define PTRS_PER_PGD 2048
102 #define FIRST_USER_ADDRESS 0
104 #define pte_ERROR(e) \
105 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
106 #define pmd_ERROR(e) \
107 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
108 #define pud_ERROR(e) \
109 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
110 #define pgd_ERROR(e) \
111 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
115 * The vmalloc and module area will always be on the topmost area of the kernel
116 * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc and modules.
117 * On 64 bit kernels we have a 2GB area at the top of the vmalloc area where
118 * modules will reside. That makes sure that inter module branches always
119 * happen without trampolines and in addition the placement within a 2GB frame
120 * is branch prediction unit friendly.
122 extern unsigned long VMALLOC_START;
123 extern unsigned long VMALLOC_END;
124 extern struct page *vmemmap;
126 #define VMEM_MAX_PHYS ((unsigned long) vmemmap)
129 extern unsigned long MODULES_VADDR;
130 extern unsigned long MODULES_END;
131 #define MODULES_VADDR MODULES_VADDR
132 #define MODULES_END MODULES_END
133 #define MODULES_LEN (1UL << 31)
137 * A 31 bit pagetable entry of S390 has following format:
140 * 00000000001111111111222222222233
141 * 01234567890123456789012345678901
143 * I Page-Invalid Bit: Page is not available for address-translation
144 * P Page-Protection Bit: Store access not possible for page
146 * A 31 bit segmenttable entry of S390 has following format:
147 * | P-table origin | |PTL
149 * 00000000001111111111222222222233
150 * 01234567890123456789012345678901
152 * I Segment-Invalid Bit: Segment is not available for address-translation
153 * C Common-Segment Bit: Segment is not private (PoP 3-30)
154 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
156 * The 31 bit segmenttable origin of S390 has following format:
158 * |S-table origin | | STL |
160 * 00000000001111111111222222222233
161 * 01234567890123456789012345678901
163 * X Space-Switch event:
164 * G Segment-Invalid Bit: *
165 * P Private-Space Bit: Segment is not private (PoP 3-30)
166 * S Storage-Alteration:
167 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
169 * A 64 bit pagetable entry of S390 has following format:
171 * 0000000000111111111122222222223333333333444444444455555555556666
172 * 0123456789012345678901234567890123456789012345678901234567890123
174 * I Page-Invalid Bit: Page is not available for address-translation
175 * P Page-Protection Bit: Store access not possible for page
176 * C Change-bit override: HW is not required to set change bit
178 * A 64 bit segmenttable entry of S390 has following format:
179 * | P-table origin | TT
180 * 0000000000111111111122222222223333333333444444444455555555556666
181 * 0123456789012345678901234567890123456789012345678901234567890123
183 * I Segment-Invalid Bit: Segment is not available for address-translation
184 * C Common-Segment Bit: Segment is not private (PoP 3-30)
185 * P Page-Protection Bit: Store access not possible for page
188 * A 64 bit region table entry of S390 has following format:
189 * | S-table origin | TF TTTL
190 * 0000000000111111111122222222223333333333444444444455555555556666
191 * 0123456789012345678901234567890123456789012345678901234567890123
193 * I Segment-Invalid Bit: Segment is not available for address-translation
198 * The 64 bit regiontable origin of S390 has following format:
199 * | region table origon | DTTL
200 * 0000000000111111111122222222223333333333444444444455555555556666
201 * 0123456789012345678901234567890123456789012345678901234567890123
203 * X Space-Switch event:
204 * G Segment-Invalid Bit:
205 * P Private-Space Bit:
206 * S Storage-Alteration:
210 * A storage key has the following format:
214 * F : fetch protection bit
219 /* Hardware bits in the page table entry */
220 #define _PAGE_PROTECT 0x200 /* HW read-only bit */
221 #define _PAGE_INVALID 0x400 /* HW invalid bit */
222 #define _PAGE_LARGE 0x800 /* Bit to mark a large pte */
224 /* Software bits in the page table entry */
225 #define _PAGE_PRESENT 0x001 /* SW pte present bit */
226 #define _PAGE_TYPE 0x002 /* SW pte type bit */
227 #define _PAGE_YOUNG 0x004 /* SW pte young bit */
228 #define _PAGE_DIRTY 0x008 /* SW pte dirty bit */
229 #define _PAGE_READ 0x010 /* SW pte read bit */
230 #define _PAGE_WRITE 0x020 /* SW pte write bit */
231 #define _PAGE_SPECIAL 0x040 /* SW associated with special page */
232 #define _PAGE_UNUSED 0x080 /* SW bit for pgste usage state */
233 #define __HAVE_ARCH_PTE_SPECIAL
235 /* Set of bits not changed in pte_modify */
236 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_DIRTY | \
240 * handle_pte_fault uses pte_present, pte_none and pte_file to find out the
241 * pte type WITHOUT holding the page table lock. The _PAGE_PRESENT bit
242 * is used to distinguish present from not-present ptes. It is changed only
243 * with the page table lock held.
245 * The following table gives the different possible bit combinations for
246 * the pte hardware and software bits in the last 12 bits of a pte:
255 * prot-none, clean, old .11...000001
256 * prot-none, clean, young .11...000101
257 * prot-none, dirty, old .10...001001
258 * prot-none, dirty, young .10...001101
259 * read-only, clean, old .11...010001
260 * read-only, clean, young .01...010101
261 * read-only, dirty, old .11...011001
262 * read-only, dirty, young .01...011101
263 * read-write, clean, old .11...110001
264 * read-write, clean, young .01...110101
265 * read-write, dirty, old .10...111001
266 * read-write, dirty, young .00...111101
268 * pte_present is true for the bit pattern .xx...xxxxx1, (pte & 0x001) == 0x001
269 * pte_none is true for the bit pattern .10...xxxx00, (pte & 0x603) == 0x400
270 * pte_file is true for the bit pattern .11...xxxxx0, (pte & 0x601) == 0x600
271 * pte_swap is true for the bit pattern .10...xxxx10, (pte & 0x603) == 0x402
276 /* Bits in the segment table address-space-control-element */
277 #define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
278 #define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
279 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
280 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
281 #define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
283 /* Bits in the segment table entry */
284 #define _SEGMENT_ENTRY_BITS 0x7fffffffUL /* Valid segment table bits */
285 #define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
286 #define _SEGMENT_ENTRY_PROTECT 0x200 /* page protection bit */
287 #define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
288 #define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
289 #define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
291 #define _SEGMENT_ENTRY_DIRTY 0 /* No sw dirty bit for 31-bit */
292 #define _SEGMENT_ENTRY_YOUNG 0 /* No sw young bit for 31-bit */
293 #define _SEGMENT_ENTRY_READ 0 /* No sw read bit for 31-bit */
294 #define _SEGMENT_ENTRY_WRITE 0 /* No sw write bit for 31-bit */
295 #define _SEGMENT_ENTRY_LARGE 0 /* No large pages for 31-bit */
296 #define _SEGMENT_ENTRY_BITS_LARGE 0
297 #define _SEGMENT_ENTRY_ORIGIN_LARGE 0
299 #define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
300 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
303 * Segment table entry encoding (I = invalid, R = read-only bit):
305 * prot-none ..1...1.....
306 * read-only ..1...0.....
307 * read-write ..0...0.....
311 /* Page status table bits for virtualization */
312 #define PGSTE_ACC_BITS 0xf0000000UL
313 #define PGSTE_FP_BIT 0x08000000UL
314 #define PGSTE_PCL_BIT 0x00800000UL
315 #define PGSTE_HR_BIT 0x00400000UL
316 #define PGSTE_HC_BIT 0x00200000UL
317 #define PGSTE_GR_BIT 0x00040000UL
318 #define PGSTE_GC_BIT 0x00020000UL
319 #define PGSTE_UC_BIT 0x00008000UL /* user dirty (migration) */
320 #define PGSTE_IN_BIT 0x00004000UL /* IPTE notify bit */
322 #else /* CONFIG_64BIT */
324 /* Bits in the segment/region table address-space-control-element */
325 #define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
326 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
327 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
328 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
329 #define _ASCE_REAL_SPACE 0x20 /* real space control */
330 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
331 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
332 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
333 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
334 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
335 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
337 /* Bits in the region table entry */
338 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
339 #define _REGION_ENTRY_PROTECT 0x200 /* region protection bit */
340 #define _REGION_ENTRY_INVALID 0x20 /* invalid region table entry */
341 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
342 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
343 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
344 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
345 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
347 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
348 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INVALID)
349 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
350 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INVALID)
351 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
352 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INVALID)
354 #define _REGION3_ENTRY_LARGE 0x400 /* RTTE-format control, large page */
355 #define _REGION3_ENTRY_RO 0x200 /* page protection bit */
357 /* Bits in the segment table entry */
358 #define _SEGMENT_ENTRY_BITS 0xfffffffffffffe33UL
359 #define _SEGMENT_ENTRY_BITS_LARGE 0xfffffffffff0ff33UL
360 #define _SEGMENT_ENTRY_ORIGIN_LARGE ~0xfffffUL /* large page address */
361 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
362 #define _SEGMENT_ENTRY_PROTECT 0x200 /* page protection bit */
363 #define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
365 #define _SEGMENT_ENTRY (0)
366 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
368 #define _SEGMENT_ENTRY_DIRTY 0x2000 /* SW segment dirty bit */
369 #define _SEGMENT_ENTRY_YOUNG 0x1000 /* SW segment young bit */
370 #define _SEGMENT_ENTRY_SPLIT 0x0800 /* THP splitting bit */
371 #define _SEGMENT_ENTRY_LARGE 0x0400 /* STE-format control, large page */
372 #define _SEGMENT_ENTRY_READ 0x0002 /* SW segment read bit */
373 #define _SEGMENT_ENTRY_WRITE 0x0001 /* SW segment write bit */
376 * Segment table entry encoding (R = read-only, I = invalid, y = young bit):
378 * prot-none, clean, old 00..1...1...00
379 * prot-none, clean, young 01..1...1...00
380 * prot-none, dirty, old 10..1...1...00
381 * prot-none, dirty, young 11..1...1...00
382 * read-only, clean, old 00..1...1...01
383 * read-only, clean, young 01..1...0...01
384 * read-only, dirty, old 10..1...1...01
385 * read-only, dirty, young 11..1...0...01
386 * read-write, clean, old 00..1...1...11
387 * read-write, clean, young 01..1...0...11
388 * read-write, dirty, old 10..0...1...11
389 * read-write, dirty, young 11..0...0...11
390 * The segment table origin is used to distinguish empty (origin==0) from
391 * read-write, old segment table entries (origin!=0)
394 #define _SEGMENT_ENTRY_SPLIT_BIT 11 /* THP splitting bit number */
396 /* Page status table bits for virtualization */
397 #define PGSTE_ACC_BITS 0xf000000000000000UL
398 #define PGSTE_FP_BIT 0x0800000000000000UL
399 #define PGSTE_PCL_BIT 0x0080000000000000UL
400 #define PGSTE_HR_BIT 0x0040000000000000UL
401 #define PGSTE_HC_BIT 0x0020000000000000UL
402 #define PGSTE_GR_BIT 0x0004000000000000UL
403 #define PGSTE_GC_BIT 0x0002000000000000UL
404 #define PGSTE_UC_BIT 0x0000800000000000UL /* user dirty (migration) */
405 #define PGSTE_IN_BIT 0x0000400000000000UL /* IPTE notify bit */
407 #endif /* CONFIG_64BIT */
409 /* Guest Page State used for virtualization */
410 #define _PGSTE_GPS_ZERO 0x0000000080000000UL
411 #define _PGSTE_GPS_USAGE_MASK 0x0000000003000000UL
412 #define _PGSTE_GPS_USAGE_STABLE 0x0000000000000000UL
413 #define _PGSTE_GPS_USAGE_UNUSED 0x0000000001000000UL
416 * A user page table pointer has the space-switch-event bit, the
417 * private-space-control bit and the storage-alteration-event-control
418 * bit set. A kernel page table pointer doesn't need them.
420 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
424 * Page protection definitions.
426 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_INVALID)
427 #define PAGE_READ __pgprot(_PAGE_PRESENT | _PAGE_READ | \
428 _PAGE_INVALID | _PAGE_PROTECT)
429 #define PAGE_WRITE __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
430 _PAGE_INVALID | _PAGE_PROTECT)
432 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
433 _PAGE_YOUNG | _PAGE_DIRTY)
434 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
435 _PAGE_YOUNG | _PAGE_DIRTY)
436 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_YOUNG | \
440 * On s390 the page table entry has an invalid bit and a read-only bit.
441 * Read permission implies execute permission and write permission
442 * implies read permission.
445 #define __P000 PAGE_NONE
446 #define __P001 PAGE_READ
447 #define __P010 PAGE_READ
448 #define __P011 PAGE_READ
449 #define __P100 PAGE_READ
450 #define __P101 PAGE_READ
451 #define __P110 PAGE_READ
452 #define __P111 PAGE_READ
454 #define __S000 PAGE_NONE
455 #define __S001 PAGE_READ
456 #define __S010 PAGE_WRITE
457 #define __S011 PAGE_WRITE
458 #define __S100 PAGE_READ
459 #define __S101 PAGE_READ
460 #define __S110 PAGE_WRITE
461 #define __S111 PAGE_WRITE
464 * Segment entry (large page) protection definitions.
466 #define SEGMENT_NONE __pgprot(_SEGMENT_ENTRY_INVALID | \
467 _SEGMENT_ENTRY_PROTECT)
468 #define SEGMENT_READ __pgprot(_SEGMENT_ENTRY_PROTECT | \
470 #define SEGMENT_WRITE __pgprot(_SEGMENT_ENTRY_READ | \
471 _SEGMENT_ENTRY_WRITE)
473 static inline int mm_has_pgste(struct mm_struct *mm)
476 if (unlikely(mm->context.has_pgste))
482 static inline int mm_use_skey(struct mm_struct *mm)
485 if (mm->context.use_skey)
492 * pgd/pmd/pte query functions
496 static inline int pgd_present(pgd_t pgd) { return 1; }
497 static inline int pgd_none(pgd_t pgd) { return 0; }
498 static inline int pgd_bad(pgd_t pgd) { return 0; }
500 static inline int pud_present(pud_t pud) { return 1; }
501 static inline int pud_none(pud_t pud) { return 0; }
502 static inline int pud_large(pud_t pud) { return 0; }
503 static inline int pud_bad(pud_t pud) { return 0; }
505 #else /* CONFIG_64BIT */
507 static inline int pgd_present(pgd_t pgd)
509 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
511 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
514 static inline int pgd_none(pgd_t pgd)
516 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
518 return (pgd_val(pgd) & _REGION_ENTRY_INVALID) != 0UL;
521 static inline int pgd_bad(pgd_t pgd)
524 * With dynamic page table levels the pgd can be a region table
525 * entry or a segment table entry. Check for the bit that are
526 * invalid for either table entry.
529 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INVALID &
530 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
531 return (pgd_val(pgd) & mask) != 0;
534 static inline int pud_present(pud_t pud)
536 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
538 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
541 static inline int pud_none(pud_t pud)
543 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
545 return (pud_val(pud) & _REGION_ENTRY_INVALID) != 0UL;
548 static inline int pud_large(pud_t pud)
550 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3)
552 return !!(pud_val(pud) & _REGION3_ENTRY_LARGE);
555 static inline int pud_bad(pud_t pud)
558 * With dynamic page table levels the pud can be a region table
559 * entry or a segment table entry. Check for the bit that are
560 * invalid for either table entry.
563 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INVALID &
564 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
565 return (pud_val(pud) & mask) != 0;
568 #endif /* CONFIG_64BIT */
570 static inline int pmd_present(pmd_t pmd)
572 return pmd_val(pmd) != _SEGMENT_ENTRY_INVALID;
575 static inline int pmd_none(pmd_t pmd)
577 return pmd_val(pmd) == _SEGMENT_ENTRY_INVALID;
580 static inline int pmd_large(pmd_t pmd)
582 return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) != 0;
585 static inline int pmd_pfn(pmd_t pmd)
587 unsigned long origin_mask;
589 origin_mask = _SEGMENT_ENTRY_ORIGIN;
591 origin_mask = _SEGMENT_ENTRY_ORIGIN_LARGE;
592 return (pmd_val(pmd) & origin_mask) >> PAGE_SHIFT;
595 static inline int pmd_bad(pmd_t pmd)
598 return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS_LARGE) != 0;
599 return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS) != 0;
602 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
603 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
604 unsigned long addr, pmd_t *pmdp);
606 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
607 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
608 unsigned long address, pmd_t *pmdp,
609 pmd_t entry, int dirty);
611 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
612 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
613 unsigned long address, pmd_t *pmdp);
615 #define __HAVE_ARCH_PMD_WRITE
616 static inline int pmd_write(pmd_t pmd)
618 return (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE) != 0;
621 static inline int pmd_dirty(pmd_t pmd)
625 dirty = (pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY) != 0;
629 static inline int pmd_young(pmd_t pmd)
633 young = (pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG) != 0;
637 static inline int pte_present(pte_t pte)
639 /* Bit pattern: (pte & 0x001) == 0x001 */
640 return (pte_val(pte) & _PAGE_PRESENT) != 0;
643 static inline int pte_none(pte_t pte)
645 /* Bit pattern: pte == 0x400 */
646 return pte_val(pte) == _PAGE_INVALID;
649 static inline int pte_swap(pte_t pte)
651 /* Bit pattern: (pte & 0x603) == 0x402 */
652 return (pte_val(pte) & (_PAGE_INVALID | _PAGE_PROTECT |
653 _PAGE_TYPE | _PAGE_PRESENT))
654 == (_PAGE_INVALID | _PAGE_TYPE);
657 static inline int pte_file(pte_t pte)
659 /* Bit pattern: (pte & 0x601) == 0x600 */
660 return (pte_val(pte) & (_PAGE_INVALID | _PAGE_PROTECT | _PAGE_PRESENT))
661 == (_PAGE_INVALID | _PAGE_PROTECT);
664 static inline int pte_special(pte_t pte)
666 return (pte_val(pte) & _PAGE_SPECIAL);
669 #define __HAVE_ARCH_PTE_SAME
670 static inline int pte_same(pte_t a, pte_t b)
672 return pte_val(a) == pte_val(b);
675 static inline pgste_t pgste_get_lock(pte_t *ptep)
677 unsigned long new = 0;
685 " nihh %0,0xff7f\n" /* clear PCL bit in old */
686 " oihh %1,0x0080\n" /* set PCL bit in new */
689 : "=&d" (old), "=&d" (new), "=Q" (ptep[PTRS_PER_PTE])
690 : "Q" (ptep[PTRS_PER_PTE]) : "cc", "memory");
695 static inline void pgste_set_unlock(pte_t *ptep, pgste_t pgste)
699 " nihh %1,0xff7f\n" /* clear PCL bit */
701 : "=Q" (ptep[PTRS_PER_PTE])
702 : "d" (pgste_val(pgste)), "Q" (ptep[PTRS_PER_PTE])
708 static inline pgste_t pgste_get(pte_t *ptep)
710 unsigned long pgste = 0;
712 pgste = *(unsigned long *)(ptep + PTRS_PER_PTE);
714 return __pgste(pgste);
717 static inline void pgste_set(pte_t *ptep, pgste_t pgste)
720 *(pgste_t *)(ptep + PTRS_PER_PTE) = pgste;
724 static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste,
725 struct mm_struct *mm)
728 unsigned long address, bits, skey;
730 if (!mm_use_skey(mm) || pte_val(*ptep) & _PAGE_INVALID)
732 address = pte_val(*ptep) & PAGE_MASK;
733 skey = (unsigned long) page_get_storage_key(address);
734 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
735 /* Transfer page changed & referenced bit to guest bits in pgste */
736 pgste_val(pgste) |= bits << 48; /* GR bit & GC bit */
737 /* Copy page access key and fetch protection bit to pgste */
738 pgste_val(pgste) &= ~(PGSTE_ACC_BITS | PGSTE_FP_BIT);
739 pgste_val(pgste) |= (skey & (_PAGE_ACC_BITS | _PAGE_FP_BIT)) << 56;
745 static inline void pgste_set_key(pte_t *ptep, pgste_t pgste, pte_t entry,
746 struct mm_struct *mm)
749 unsigned long address;
752 if (!mm_use_skey(mm) || pte_val(entry) & _PAGE_INVALID)
754 VM_BUG_ON(!(pte_val(*ptep) & _PAGE_INVALID));
755 address = pte_val(entry) & PAGE_MASK;
757 * Set page access key and fetch protection bit from pgste.
758 * The guest C/R information is still in the PGSTE, set real
761 nkey = (pgste_val(pgste) & (PGSTE_ACC_BITS | PGSTE_FP_BIT)) >> 56;
762 nkey |= (pgste_val(pgste) & (PGSTE_GR_BIT | PGSTE_GC_BIT)) >> 48;
763 page_set_storage_key(address, nkey, 0);
767 static inline pgste_t pgste_set_pte(pte_t *ptep, pgste_t pgste, pte_t entry)
769 if ((pte_val(entry) & _PAGE_PRESENT) &&
770 (pte_val(entry) & _PAGE_WRITE) &&
771 !(pte_val(entry) & _PAGE_INVALID)) {
772 if (!MACHINE_HAS_ESOP) {
774 * Without enhanced suppression-on-protection force
775 * the dirty bit on for all writable ptes.
777 pte_val(entry) |= _PAGE_DIRTY;
778 pte_val(entry) &= ~_PAGE_PROTECT;
780 if (!(pte_val(entry) & _PAGE_PROTECT))
781 /* This pte allows write access, set user-dirty */
782 pgste_val(pgste) |= PGSTE_UC_BIT;
789 * struct gmap_struct - guest address space
790 * @crst_list: list of all crst tables used in the guest address space
791 * @mm: pointer to the parent mm_struct
792 * @guest_to_host: radix tree with guest to host address translation
793 * @host_to_guest: radix tree with pointer to segment table entries
794 * @guest_table_lock: spinlock to protect all entries in the guest page table
795 * @table: pointer to the page directory
796 * @asce: address space control element for gmap page table
797 * @pfault_enabled: defines if pfaults are applicable for the guest
800 struct list_head list;
801 struct list_head crst_list;
802 struct mm_struct *mm;
803 struct radix_tree_root guest_to_host;
804 struct radix_tree_root host_to_guest;
805 spinlock_t guest_table_lock;
806 unsigned long *table;
808 unsigned long asce_end;
814 * struct gmap_notifier - notify function block for page invalidation
815 * @notifier_call: address of callback function
817 struct gmap_notifier {
818 struct list_head list;
819 void (*notifier_call)(struct gmap *gmap, unsigned long gaddr);
822 struct gmap *gmap_alloc(struct mm_struct *mm, unsigned long limit);
823 void gmap_free(struct gmap *gmap);
824 void gmap_enable(struct gmap *gmap);
825 void gmap_disable(struct gmap *gmap);
826 int gmap_map_segment(struct gmap *gmap, unsigned long from,
827 unsigned long to, unsigned long len);
828 int gmap_unmap_segment(struct gmap *gmap, unsigned long to, unsigned long len);
829 unsigned long __gmap_translate(struct gmap *, unsigned long gaddr);
830 unsigned long gmap_translate(struct gmap *, unsigned long gaddr);
831 int __gmap_link(struct gmap *gmap, unsigned long gaddr, unsigned long vmaddr);
832 int gmap_fault(struct gmap *, unsigned long gaddr, unsigned int fault_flags);
833 void gmap_discard(struct gmap *, unsigned long from, unsigned long to);
834 void __gmap_zap(struct gmap *, unsigned long gaddr);
835 bool gmap_test_and_clear_dirty(unsigned long address, struct gmap *);
838 void gmap_register_ipte_notifier(struct gmap_notifier *);
839 void gmap_unregister_ipte_notifier(struct gmap_notifier *);
840 int gmap_ipte_notify(struct gmap *, unsigned long start, unsigned long len);
841 void gmap_do_ipte_notify(struct mm_struct *, unsigned long addr, pte_t *);
843 static inline pgste_t pgste_ipte_notify(struct mm_struct *mm,
845 pte_t *ptep, pgste_t pgste)
848 if (pgste_val(pgste) & PGSTE_IN_BIT) {
849 pgste_val(pgste) &= ~PGSTE_IN_BIT;
850 gmap_do_ipte_notify(mm, addr, ptep);
857 * Certain architectures need to do special things when PTEs
858 * within a page table are directly modified. Thus, the following
859 * hook is made available.
861 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
862 pte_t *ptep, pte_t entry)
866 if (mm_has_pgste(mm)) {
867 pgste = pgste_get_lock(ptep);
868 pgste_val(pgste) &= ~_PGSTE_GPS_ZERO;
869 pgste_set_key(ptep, pgste, entry, mm);
870 pgste = pgste_set_pte(ptep, pgste, entry);
871 pgste_set_unlock(ptep, pgste);
878 * query functions pte_write/pte_dirty/pte_young only work if
879 * pte_present() is true. Undefined behaviour if not..
881 static inline int pte_write(pte_t pte)
883 return (pte_val(pte) & _PAGE_WRITE) != 0;
886 static inline int pte_dirty(pte_t pte)
888 return (pte_val(pte) & _PAGE_DIRTY) != 0;
891 static inline int pte_young(pte_t pte)
893 return (pte_val(pte) & _PAGE_YOUNG) != 0;
896 #define __HAVE_ARCH_PTE_UNUSED
897 static inline int pte_unused(pte_t pte)
899 return pte_val(pte) & _PAGE_UNUSED;
903 * pgd/pmd/pte modification functions
906 static inline void pgd_clear(pgd_t *pgd)
909 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
910 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
914 static inline void pud_clear(pud_t *pud)
917 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
918 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
922 static inline void pmd_clear(pmd_t *pmdp)
924 pmd_val(*pmdp) = _SEGMENT_ENTRY_INVALID;
927 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
929 pte_val(*ptep) = _PAGE_INVALID;
933 * The following pte modification functions only work if
934 * pte_present() is true. Undefined behaviour if not..
936 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
938 pte_val(pte) &= _PAGE_CHG_MASK;
939 pte_val(pte) |= pgprot_val(newprot);
941 * newprot for PAGE_NONE, PAGE_READ and PAGE_WRITE has the
942 * invalid bit set, clear it again for readable, young pages
944 if ((pte_val(pte) & _PAGE_YOUNG) && (pte_val(pte) & _PAGE_READ))
945 pte_val(pte) &= ~_PAGE_INVALID;
947 * newprot for PAGE_READ and PAGE_WRITE has the page protection
948 * bit set, clear it again for writable, dirty pages
950 if ((pte_val(pte) & _PAGE_DIRTY) && (pte_val(pte) & _PAGE_WRITE))
951 pte_val(pte) &= ~_PAGE_PROTECT;
955 static inline pte_t pte_wrprotect(pte_t pte)
957 pte_val(pte) &= ~_PAGE_WRITE;
958 pte_val(pte) |= _PAGE_PROTECT;
962 static inline pte_t pte_mkwrite(pte_t pte)
964 pte_val(pte) |= _PAGE_WRITE;
965 if (pte_val(pte) & _PAGE_DIRTY)
966 pte_val(pte) &= ~_PAGE_PROTECT;
970 static inline pte_t pte_mkclean(pte_t pte)
972 pte_val(pte) &= ~_PAGE_DIRTY;
973 pte_val(pte) |= _PAGE_PROTECT;
977 static inline pte_t pte_mkdirty(pte_t pte)
979 pte_val(pte) |= _PAGE_DIRTY;
980 if (pte_val(pte) & _PAGE_WRITE)
981 pte_val(pte) &= ~_PAGE_PROTECT;
985 static inline pte_t pte_mkold(pte_t pte)
987 pte_val(pte) &= ~_PAGE_YOUNG;
988 pte_val(pte) |= _PAGE_INVALID;
992 static inline pte_t pte_mkyoung(pte_t pte)
994 pte_val(pte) |= _PAGE_YOUNG;
995 if (pte_val(pte) & _PAGE_READ)
996 pte_val(pte) &= ~_PAGE_INVALID;
1000 static inline pte_t pte_mkspecial(pte_t pte)
1002 pte_val(pte) |= _PAGE_SPECIAL;
1006 #ifdef CONFIG_HUGETLB_PAGE
1007 static inline pte_t pte_mkhuge(pte_t pte)
1009 pte_val(pte) |= _PAGE_LARGE;
1014 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
1016 unsigned long pto = (unsigned long) ptep;
1018 #ifndef CONFIG_64BIT
1019 /* pto in ESA mode must point to the start of the segment table */
1022 /* Invalidation + global TLB flush for the pte */
1025 : "=m" (*ptep) : "m" (*ptep), "a" (pto), "a" (address));
1028 static inline void __ptep_ipte_local(unsigned long address, pte_t *ptep)
1030 unsigned long pto = (unsigned long) ptep;
1032 #ifndef CONFIG_64BIT
1033 /* pto in ESA mode must point to the start of the segment table */
1036 /* Invalidation + local TLB flush for the pte */
1038 " .insn rrf,0xb2210000,%2,%3,0,1"
1039 : "=m" (*ptep) : "m" (*ptep), "a" (pto), "a" (address));
1042 static inline void __ptep_ipte_range(unsigned long address, int nr, pte_t *ptep)
1044 unsigned long pto = (unsigned long) ptep;
1046 #ifndef CONFIG_64BIT
1047 /* pto in ESA mode must point to the start of the segment table */
1050 /* Invalidate a range of ptes + global TLB flush of the ptes */
1053 " .insn rrf,0xb2210000,%2,%0,%1,0"
1054 : "+a" (address), "+a" (nr) : "a" (pto) : "memory");
1055 } while (nr != 255);
1058 static inline void ptep_flush_direct(struct mm_struct *mm,
1059 unsigned long address, pte_t *ptep)
1063 if (pte_val(*ptep) & _PAGE_INVALID)
1065 active = (mm == current->active_mm) ? 1 : 0;
1066 count = atomic_add_return(0x10000, &mm->context.attach_count);
1067 if (MACHINE_HAS_TLB_LC && (count & 0xffff) <= active &&
1068 cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id())))
1069 __ptep_ipte_local(address, ptep);
1071 __ptep_ipte(address, ptep);
1072 atomic_sub(0x10000, &mm->context.attach_count);
1075 static inline void ptep_flush_lazy(struct mm_struct *mm,
1076 unsigned long address, pte_t *ptep)
1080 if (pte_val(*ptep) & _PAGE_INVALID)
1082 active = (mm == current->active_mm) ? 1 : 0;
1083 count = atomic_add_return(0x10000, &mm->context.attach_count);
1084 if ((count & 0xffff) <= active) {
1085 pte_val(*ptep) |= _PAGE_INVALID;
1086 mm->context.flush_mm = 1;
1088 __ptep_ipte(address, ptep);
1089 atomic_sub(0x10000, &mm->context.attach_count);
1093 * Get (and clear) the user dirty bit for a pte.
1095 static inline int ptep_test_and_clear_user_dirty(struct mm_struct *mm,
1103 if (!mm_has_pgste(mm))
1105 pgste = pgste_get_lock(ptep);
1106 dirty = !!(pgste_val(pgste) & PGSTE_UC_BIT);
1107 pgste_val(pgste) &= ~PGSTE_UC_BIT;
1109 if (dirty && (pte_val(pte) & _PAGE_PRESENT)) {
1110 pgste = pgste_ipte_notify(mm, addr, ptep, pgste);
1111 __ptep_ipte(addr, ptep);
1112 if (MACHINE_HAS_ESOP || !(pte_val(pte) & _PAGE_WRITE))
1113 pte_val(pte) |= _PAGE_PROTECT;
1115 pte_val(pte) |= _PAGE_INVALID;
1118 pgste_set_unlock(ptep, pgste);
1122 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1123 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
1124 unsigned long addr, pte_t *ptep)
1130 if (mm_has_pgste(vma->vm_mm)) {
1131 pgste = pgste_get_lock(ptep);
1132 pgste = pgste_ipte_notify(vma->vm_mm, addr, ptep, pgste);
1135 oldpte = pte = *ptep;
1136 ptep_flush_direct(vma->vm_mm, addr, ptep);
1137 young = pte_young(pte);
1138 pte = pte_mkold(pte);
1140 if (mm_has_pgste(vma->vm_mm)) {
1141 pgste = pgste_update_all(&oldpte, pgste, vma->vm_mm);
1142 pgste = pgste_set_pte(ptep, pgste, pte);
1143 pgste_set_unlock(ptep, pgste);
1150 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1151 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
1152 unsigned long address, pte_t *ptep)
1154 return ptep_test_and_clear_young(vma, address, ptep);
1158 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
1159 * both clear the TLB for the unmapped pte. The reason is that
1160 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
1161 * to modify an active pte. The sequence is
1162 * 1) ptep_get_and_clear
1164 * 3) flush_tlb_range
1165 * On s390 the tlb needs to get flushed with the modification of the pte
1166 * if the pte is active. The only way how this can be implemented is to
1167 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
1170 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1171 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
1172 unsigned long address, pte_t *ptep)
1177 if (mm_has_pgste(mm)) {
1178 pgste = pgste_get_lock(ptep);
1179 pgste = pgste_ipte_notify(mm, address, ptep, pgste);
1183 ptep_flush_lazy(mm, address, ptep);
1184 pte_val(*ptep) = _PAGE_INVALID;
1186 if (mm_has_pgste(mm)) {
1187 pgste = pgste_update_all(&pte, pgste, mm);
1188 pgste_set_unlock(ptep, pgste);
1193 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1194 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
1195 unsigned long address,
1201 if (mm_has_pgste(mm)) {
1202 pgste = pgste_get_lock(ptep);
1203 pgste_ipte_notify(mm, address, ptep, pgste);
1207 ptep_flush_lazy(mm, address, ptep);
1209 if (mm_has_pgste(mm)) {
1210 pgste = pgste_update_all(&pte, pgste, mm);
1211 pgste_set(ptep, pgste);
1216 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
1217 unsigned long address,
1218 pte_t *ptep, pte_t pte)
1222 if (mm_has_pgste(mm)) {
1223 pgste = pgste_get(ptep);
1224 pgste_set_key(ptep, pgste, pte, mm);
1225 pgste = pgste_set_pte(ptep, pgste, pte);
1226 pgste_set_unlock(ptep, pgste);
1231 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
1232 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
1233 unsigned long address, pte_t *ptep)
1238 if (mm_has_pgste(vma->vm_mm)) {
1239 pgste = pgste_get_lock(ptep);
1240 pgste = pgste_ipte_notify(vma->vm_mm, address, ptep, pgste);
1244 ptep_flush_direct(vma->vm_mm, address, ptep);
1245 pte_val(*ptep) = _PAGE_INVALID;
1247 if (mm_has_pgste(vma->vm_mm)) {
1248 if ((pgste_val(pgste) & _PGSTE_GPS_USAGE_MASK) ==
1249 _PGSTE_GPS_USAGE_UNUSED)
1250 pte_val(pte) |= _PAGE_UNUSED;
1251 pgste = pgste_update_all(&pte, pgste, vma->vm_mm);
1252 pgste_set_unlock(ptep, pgste);
1258 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
1259 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
1260 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
1261 * cannot be accessed while the batched unmap is running. In this case
1262 * full==1 and a simple pte_clear is enough. See tlb.h.
1264 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1265 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1266 unsigned long address,
1267 pte_t *ptep, int full)
1272 if (!full && mm_has_pgste(mm)) {
1273 pgste = pgste_get_lock(ptep);
1274 pgste = pgste_ipte_notify(mm, address, ptep, pgste);
1279 ptep_flush_lazy(mm, address, ptep);
1280 pte_val(*ptep) = _PAGE_INVALID;
1282 if (!full && mm_has_pgste(mm)) {
1283 pgste = pgste_update_all(&pte, pgste, mm);
1284 pgste_set_unlock(ptep, pgste);
1289 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1290 static inline pte_t ptep_set_wrprotect(struct mm_struct *mm,
1291 unsigned long address, pte_t *ptep)
1296 if (pte_write(pte)) {
1297 if (mm_has_pgste(mm)) {
1298 pgste = pgste_get_lock(ptep);
1299 pgste = pgste_ipte_notify(mm, address, ptep, pgste);
1302 ptep_flush_lazy(mm, address, ptep);
1303 pte = pte_wrprotect(pte);
1305 if (mm_has_pgste(mm)) {
1306 pgste = pgste_set_pte(ptep, pgste, pte);
1307 pgste_set_unlock(ptep, pgste);
1314 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1315 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1316 unsigned long address, pte_t *ptep,
1317 pte_t entry, int dirty)
1321 if (pte_same(*ptep, entry))
1323 if (mm_has_pgste(vma->vm_mm)) {
1324 pgste = pgste_get_lock(ptep);
1325 pgste = pgste_ipte_notify(vma->vm_mm, address, ptep, pgste);
1328 ptep_flush_direct(vma->vm_mm, address, ptep);
1330 if (mm_has_pgste(vma->vm_mm)) {
1331 pgste_set_key(ptep, pgste, entry, vma->vm_mm);
1332 pgste = pgste_set_pte(ptep, pgste, entry);
1333 pgste_set_unlock(ptep, pgste);
1340 * Conversion functions: convert a page and protection to a page entry,
1341 * and a page entry and page directory to the page they refer to.
1343 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1346 pte_val(__pte) = physpage + pgprot_val(pgprot);
1347 return pte_mkyoung(__pte);
1350 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1352 unsigned long physpage = page_to_phys(page);
1353 pte_t __pte = mk_pte_phys(physpage, pgprot);
1355 if (pte_write(__pte) && PageDirty(page))
1356 __pte = pte_mkdirty(__pte);
1360 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1361 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1362 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1363 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1365 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1366 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1368 #ifndef CONFIG_64BIT
1370 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1371 #define pud_deref(pmd) ({ BUG(); 0UL; })
1372 #define pgd_deref(pmd) ({ BUG(); 0UL; })
1374 #define pud_offset(pgd, address) ((pud_t *) pgd)
1375 #define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
1377 #else /* CONFIG_64BIT */
1379 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1380 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1381 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1383 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
1385 pud_t *pud = (pud_t *) pgd;
1386 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1387 pud = (pud_t *) pgd_deref(*pgd);
1388 return pud + pud_index(address);
1391 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1393 pmd_t *pmd = (pmd_t *) pud;
1394 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1395 pmd = (pmd_t *) pud_deref(*pud);
1396 return pmd + pmd_index(address);
1399 #endif /* CONFIG_64BIT */
1401 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1402 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1403 #define pte_page(x) pfn_to_page(pte_pfn(x))
1405 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
1407 /* Find an entry in the lowest level page table.. */
1408 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1409 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1410 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1411 #define pte_unmap(pte) do { } while (0)
1413 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLB_PAGE)
1414 static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1417 * pgprot is PAGE_NONE, PAGE_READ, or PAGE_WRITE (see __Pxxx / __Sxxx)
1418 * Convert to segment table entry format.
1420 if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1421 return pgprot_val(SEGMENT_NONE);
1422 if (pgprot_val(pgprot) == pgprot_val(PAGE_READ))
1423 return pgprot_val(SEGMENT_READ);
1424 return pgprot_val(SEGMENT_WRITE);
1427 static inline pmd_t pmd_wrprotect(pmd_t pmd)
1429 pmd_val(pmd) &= ~_SEGMENT_ENTRY_WRITE;
1430 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1434 static inline pmd_t pmd_mkwrite(pmd_t pmd)
1436 pmd_val(pmd) |= _SEGMENT_ENTRY_WRITE;
1437 if (pmd_large(pmd) && !(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1439 pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1443 static inline pmd_t pmd_mkclean(pmd_t pmd)
1445 if (pmd_large(pmd)) {
1446 pmd_val(pmd) &= ~_SEGMENT_ENTRY_DIRTY;
1447 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1452 static inline pmd_t pmd_mkdirty(pmd_t pmd)
1454 if (pmd_large(pmd)) {
1455 pmd_val(pmd) |= _SEGMENT_ENTRY_DIRTY;
1456 if (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE)
1457 pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1462 static inline pmd_t pmd_mkyoung(pmd_t pmd)
1464 if (pmd_large(pmd)) {
1465 pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1466 if (pmd_val(pmd) & _SEGMENT_ENTRY_READ)
1467 pmd_val(pmd) &= ~_SEGMENT_ENTRY_INVALID;
1472 static inline pmd_t pmd_mkold(pmd_t pmd)
1474 if (pmd_large(pmd)) {
1475 pmd_val(pmd) &= ~_SEGMENT_ENTRY_YOUNG;
1476 pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1481 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
1483 if (pmd_large(pmd)) {
1484 pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN_LARGE |
1485 _SEGMENT_ENTRY_DIRTY | _SEGMENT_ENTRY_YOUNG |
1486 _SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_SPLIT;
1487 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1488 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1489 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1490 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG))
1491 pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1494 pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN;
1495 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1499 static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
1502 pmd_val(__pmd) = physpage + massage_pgprot_pmd(pgprot);
1506 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HUGETLB_PAGE */
1508 static inline void __pmdp_csp(pmd_t *pmdp)
1510 register unsigned long reg2 asm("2") = pmd_val(*pmdp);
1511 register unsigned long reg3 asm("3") = pmd_val(*pmdp) |
1512 _SEGMENT_ENTRY_INVALID;
1513 register unsigned long reg4 asm("4") = ((unsigned long) pmdp) + 5;
1518 : "d" (reg2), "d" (reg3), "d" (reg4), "m" (*pmdp) : "cc");
1521 static inline void __pmdp_idte(unsigned long address, pmd_t *pmdp)
1525 sto = (unsigned long) pmdp - pmd_index(address) * sizeof(pmd_t);
1527 " .insn rrf,0xb98e0000,%2,%3,0,0"
1529 : "m" (*pmdp), "a" (sto), "a" ((address & HPAGE_MASK))
1533 static inline void __pmdp_idte_local(unsigned long address, pmd_t *pmdp)
1537 sto = (unsigned long) pmdp - pmd_index(address) * sizeof(pmd_t);
1539 " .insn rrf,0xb98e0000,%2,%3,0,1"
1541 : "m" (*pmdp), "a" (sto), "a" ((address & HPAGE_MASK))
1545 static inline void pmdp_flush_direct(struct mm_struct *mm,
1546 unsigned long address, pmd_t *pmdp)
1550 if (pmd_val(*pmdp) & _SEGMENT_ENTRY_INVALID)
1552 if (!MACHINE_HAS_IDTE) {
1556 active = (mm == current->active_mm) ? 1 : 0;
1557 count = atomic_add_return(0x10000, &mm->context.attach_count);
1558 if (MACHINE_HAS_TLB_LC && (count & 0xffff) <= active &&
1559 cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id())))
1560 __pmdp_idte_local(address, pmdp);
1562 __pmdp_idte(address, pmdp);
1563 atomic_sub(0x10000, &mm->context.attach_count);
1566 static inline void pmdp_flush_lazy(struct mm_struct *mm,
1567 unsigned long address, pmd_t *pmdp)
1571 if (pmd_val(*pmdp) & _SEGMENT_ENTRY_INVALID)
1573 active = (mm == current->active_mm) ? 1 : 0;
1574 count = atomic_add_return(0x10000, &mm->context.attach_count);
1575 if ((count & 0xffff) <= active) {
1576 pmd_val(*pmdp) |= _SEGMENT_ENTRY_INVALID;
1577 mm->context.flush_mm = 1;
1578 } else if (MACHINE_HAS_IDTE)
1579 __pmdp_idte(address, pmdp);
1582 atomic_sub(0x10000, &mm->context.attach_count);
1585 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1587 #define __HAVE_ARCH_PGTABLE_DEPOSIT
1588 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
1591 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1592 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
1594 static inline int pmd_trans_splitting(pmd_t pmd)
1596 return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) &&
1597 (pmd_val(pmd) & _SEGMENT_ENTRY_SPLIT);
1600 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1601 pmd_t *pmdp, pmd_t entry)
1606 static inline pmd_t pmd_mkhuge(pmd_t pmd)
1608 pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;
1609 pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1610 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1614 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1615 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1616 unsigned long address, pmd_t *pmdp)
1621 pmdp_flush_direct(vma->vm_mm, address, pmdp);
1622 *pmdp = pmd_mkold(pmd);
1623 return pmd_young(pmd);
1626 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR
1627 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
1628 unsigned long address, pmd_t *pmdp)
1632 pmdp_flush_direct(mm, address, pmdp);
1637 #define __HAVE_ARCH_PMDP_CLEAR_FLUSH
1638 static inline pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
1639 unsigned long address, pmd_t *pmdp)
1641 return pmdp_get_and_clear(vma->vm_mm, address, pmdp);
1644 #define __HAVE_ARCH_PMDP_INVALIDATE
1645 static inline void pmdp_invalidate(struct vm_area_struct *vma,
1646 unsigned long address, pmd_t *pmdp)
1648 pmdp_flush_direct(vma->vm_mm, address, pmdp);
1651 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1652 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1653 unsigned long address, pmd_t *pmdp)
1657 if (pmd_write(pmd)) {
1658 pmdp_flush_direct(mm, address, pmdp);
1659 set_pmd_at(mm, address, pmdp, pmd_wrprotect(pmd));
1663 #define pfn_pmd(pfn, pgprot) mk_pmd_phys(__pa((pfn) << PAGE_SHIFT), (pgprot))
1664 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1666 static inline int pmd_trans_huge(pmd_t pmd)
1668 return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE;
1671 static inline int has_transparent_hugepage(void)
1673 return MACHINE_HAS_HPAGE ? 1 : 0;
1675 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1678 * 31 bit swap entry format:
1679 * A page-table entry has some bits we have to treat in a special way.
1680 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
1681 * exception will occur instead of a page translation exception. The
1682 * specifiation exception has the bad habit not to store necessary
1683 * information in the lowcore.
1684 * Bits 21, 22, 30 and 31 are used to indicate the page type.
1685 * A swap pte is indicated by bit pattern (pte & 0x603) == 0x402
1686 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
1687 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
1688 * plus 24 for the offset.
1689 * 0| offset |0110|o|type |00|
1690 * 0 0000000001111111111 2222 2 22222 33
1691 * 0 1234567890123456789 0123 4 56789 01
1693 * 64 bit swap entry format:
1694 * A page-table entry has some bits we have to treat in a special way.
1695 * Bits 52 and bit 55 have to be zero, otherwise an specification
1696 * exception will occur instead of a page translation exception. The
1697 * specifiation exception has the bad habit not to store necessary
1698 * information in the lowcore.
1699 * Bits 53, 54, 62 and 63 are used to indicate the page type.
1700 * A swap pte is indicated by bit pattern (pte & 0x603) == 0x402
1701 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
1702 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
1703 * plus 56 for the offset.
1704 * | offset |0110|o|type |00|
1705 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1706 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1708 #ifndef CONFIG_64BIT
1709 #define __SWP_OFFSET_MASK (~0UL >> 12)
1711 #define __SWP_OFFSET_MASK (~0UL >> 11)
1713 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1716 offset &= __SWP_OFFSET_MASK;
1717 pte_val(pte) = _PAGE_INVALID | _PAGE_TYPE | ((type & 0x1f) << 2) |
1718 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
1722 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
1723 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
1724 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
1726 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1727 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1729 #ifndef CONFIG_64BIT
1730 # define PTE_FILE_MAX_BITS 26
1731 #else /* CONFIG_64BIT */
1732 # define PTE_FILE_MAX_BITS 59
1733 #endif /* CONFIG_64BIT */
1735 #define pte_to_pgoff(__pte) \
1736 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
1738 #define pgoff_to_pte(__off) \
1739 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
1740 | _PAGE_INVALID | _PAGE_PROTECT })
1742 #endif /* !__ASSEMBLY__ */
1744 #define kern_addr_valid(addr) (1)
1746 extern int vmem_add_mapping(unsigned long start, unsigned long size);
1747 extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1748 extern int s390_enable_sie(void);
1749 extern void s390_enable_skey(void);
1752 * No page table caches to initialise
1754 static inline void pgtable_cache_init(void) { }
1755 static inline void check_pgt_cache(void) { }
1757 #include <asm-generic/pgtable.h>
1759 #endif /* _S390_PAGE_H */