3 * Copyright IBM Corp. 1999
4 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
6 * Derived from "include/asm-i386/spinlock.h"
9 #ifndef __ASM_SPINLOCK_H
10 #define __ASM_SPINLOCK_H
12 #include <linux/smp.h>
13 #include <asm/barrier.h>
14 #include <asm/processor.h>
16 #define SPINLOCK_LOCKVAL (S390_lowcore.spinlock_lockval)
18 extern int spin_retry;
21 _raw_compare_and_swap(unsigned int *lock, unsigned int old, unsigned int new)
23 return __sync_bool_compare_and_swap(lock, old, new);
27 * Simple spin lock operations. There are two variants, one clears IRQ's
28 * on the local processor, one does not.
30 * We make no fairness assumptions. They have a cost.
32 * (the type definitions are in asm/spinlock_types.h)
35 void arch_lock_relax(unsigned int cpu);
37 void arch_spin_lock_wait(arch_spinlock_t *);
38 int arch_spin_trylock_retry(arch_spinlock_t *);
39 void arch_spin_lock_wait_flags(arch_spinlock_t *, unsigned long flags);
41 static inline void arch_spin_relax(arch_spinlock_t *lock)
43 arch_lock_relax(lock->lock);
46 static inline u32 arch_spin_lockval(int cpu)
51 static inline int arch_spin_value_unlocked(arch_spinlock_t lock)
53 return lock.lock == 0;
56 static inline int arch_spin_is_locked(arch_spinlock_t *lp)
58 return ACCESS_ONCE(lp->lock) != 0;
61 static inline int arch_spin_trylock_once(arch_spinlock_t *lp)
64 return likely(arch_spin_value_unlocked(*lp) &&
65 _raw_compare_and_swap(&lp->lock, 0, SPINLOCK_LOCKVAL));
68 static inline void arch_spin_lock(arch_spinlock_t *lp)
70 if (!arch_spin_trylock_once(lp))
71 arch_spin_lock_wait(lp);
74 static inline void arch_spin_lock_flags(arch_spinlock_t *lp,
77 if (!arch_spin_trylock_once(lp))
78 arch_spin_lock_wait_flags(lp, flags);
81 static inline int arch_spin_trylock(arch_spinlock_t *lp)
83 if (!arch_spin_trylock_once(lp))
84 return arch_spin_trylock_retry(lp);
88 static inline void arch_spin_unlock(arch_spinlock_t *lp)
90 typecheck(unsigned int, lp->lock);
98 static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
100 while (arch_spin_is_locked(lock))
101 arch_spin_relax(lock);
102 smp_acquire__after_ctrl_dep();
106 * Read-write spinlocks, allowing multiple readers
107 * but only one writer.
109 * NOTE! it is quite common to have readers in interrupts
110 * but no interrupt writers. For those circumstances we
111 * can "mix" irq-safe locks - any writer needs to get a
112 * irq-safe write-lock, but readers can get non-irqsafe
117 * read_can_lock - would read_trylock() succeed?
118 * @lock: the rwlock in question.
120 #define arch_read_can_lock(x) ((int)(x)->lock >= 0)
123 * write_can_lock - would write_trylock() succeed?
124 * @lock: the rwlock in question.
126 #define arch_write_can_lock(x) ((x)->lock == 0)
128 extern int _raw_read_trylock_retry(arch_rwlock_t *lp);
129 extern int _raw_write_trylock_retry(arch_rwlock_t *lp);
131 #define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
132 #define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
134 static inline int arch_read_trylock_once(arch_rwlock_t *rw)
136 unsigned int old = ACCESS_ONCE(rw->lock);
137 return likely((int) old >= 0 &&
138 _raw_compare_and_swap(&rw->lock, old, old + 1));
141 static inline int arch_write_trylock_once(arch_rwlock_t *rw)
143 unsigned int old = ACCESS_ONCE(rw->lock);
144 return likely(old == 0 &&
145 _raw_compare_and_swap(&rw->lock, 0, 0x80000000));
148 #ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
150 #define __RAW_OP_OR "lao"
151 #define __RAW_OP_AND "lan"
152 #define __RAW_OP_ADD "laa"
154 #define __RAW_LOCK(ptr, op_val, op_string) \
156 unsigned int old_val; \
158 typecheck(unsigned int *, ptr); \
160 op_string " %0,%2,%1\n" \
162 : "=d" (old_val), "+Q" (*ptr) \
168 #define __RAW_UNLOCK(ptr, op_val, op_string) \
170 unsigned int old_val; \
172 typecheck(unsigned int *, ptr); \
174 op_string " %0,%2,%1\n" \
175 : "=d" (old_val), "+Q" (*ptr) \
181 extern void _raw_read_lock_wait(arch_rwlock_t *lp);
182 extern void _raw_write_lock_wait(arch_rwlock_t *lp, unsigned int prev);
184 static inline void arch_read_lock(arch_rwlock_t *rw)
188 old = __RAW_LOCK(&rw->lock, 1, __RAW_OP_ADD);
190 _raw_read_lock_wait(rw);
193 static inline void arch_read_unlock(arch_rwlock_t *rw)
195 __RAW_UNLOCK(&rw->lock, -1, __RAW_OP_ADD);
198 static inline void arch_write_lock(arch_rwlock_t *rw)
202 old = __RAW_LOCK(&rw->lock, 0x80000000, __RAW_OP_OR);
204 _raw_write_lock_wait(rw, old);
205 rw->owner = SPINLOCK_LOCKVAL;
208 static inline void arch_write_unlock(arch_rwlock_t *rw)
211 __RAW_UNLOCK(&rw->lock, 0x7fffffff, __RAW_OP_AND);
214 #else /* CONFIG_HAVE_MARCH_Z196_FEATURES */
216 extern void _raw_read_lock_wait(arch_rwlock_t *lp);
217 extern void _raw_write_lock_wait(arch_rwlock_t *lp);
219 static inline void arch_read_lock(arch_rwlock_t *rw)
221 if (!arch_read_trylock_once(rw))
222 _raw_read_lock_wait(rw);
225 static inline void arch_read_unlock(arch_rwlock_t *rw)
230 old = ACCESS_ONCE(rw->lock);
231 } while (!_raw_compare_and_swap(&rw->lock, old, old - 1));
234 static inline void arch_write_lock(arch_rwlock_t *rw)
236 if (!arch_write_trylock_once(rw))
237 _raw_write_lock_wait(rw);
238 rw->owner = SPINLOCK_LOCKVAL;
241 static inline void arch_write_unlock(arch_rwlock_t *rw)
243 typecheck(unsigned int, rw->lock);
253 #endif /* CONFIG_HAVE_MARCH_Z196_FEATURES */
255 static inline int arch_read_trylock(arch_rwlock_t *rw)
257 if (!arch_read_trylock_once(rw))
258 return _raw_read_trylock_retry(rw);
262 static inline int arch_write_trylock(arch_rwlock_t *rw)
264 if (!arch_write_trylock_once(rw) && !_raw_write_trylock_retry(rw))
266 rw->owner = SPINLOCK_LOCKVAL;
270 static inline void arch_read_relax(arch_rwlock_t *rw)
272 arch_lock_relax(rw->owner);
275 static inline void arch_write_relax(arch_rwlock_t *rw)
277 arch_lock_relax(rw->owner);
280 #endif /* __ASM_SPINLOCK_H */