2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <linux/err.h>
41 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
42 #include <linux/elf-em.h>
43 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
44 #define __AUDIT_ARCH_64BIT 0x80000000
45 #define __AUDIT_ARCH_LE 0x40000000
48 .section .entry.text, "ax"
50 #ifdef CONFIG_PARAVIRT
51 ENTRY(native_usergs_sysret64)
54 ENDPROC(native_usergs_sysret64)
55 #endif /* CONFIG_PARAVIRT */
57 .macro TRACE_IRQS_IRETQ
58 #ifdef CONFIG_TRACE_IRQFLAGS
59 bt $9, EFLAGS(%rsp) /* interrupts off? */
67 * When dynamic function tracer is enabled it will add a breakpoint
68 * to all locations that it is about to modify, sync CPUs, update
69 * all the code, sync CPUs, then remove the breakpoints. In this time
70 * if lockdep is enabled, it might jump back into the debug handler
71 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
73 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
74 * make sure the stack pointer does not get reset back to the top
75 * of the debug stack, and instead just reuses the current stack.
77 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
79 .macro TRACE_IRQS_OFF_DEBUG
80 call debug_stack_set_zero
82 call debug_stack_reset
85 .macro TRACE_IRQS_ON_DEBUG
86 call debug_stack_set_zero
88 call debug_stack_reset
91 .macro TRACE_IRQS_IRETQ_DEBUG
92 bt $9, EFLAGS(%rsp) /* interrupts off? */
99 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
100 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
101 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
105 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
107 * This is the only entry point used for 64-bit system calls. The
108 * hardware interface is reasonably well designed and the register to
109 * argument mapping Linux uses fits well with the registers that are
110 * available when SYSCALL is used.
112 * SYSCALL instructions can be found inlined in libc implementations as
113 * well as some other programs and libraries. There are also a handful
114 * of SYSCALL instructions in the vDSO used, for example, as a
115 * clock_gettimeofday fallback.
117 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
118 * then loads new ss, cs, and rip from previously programmed MSRs.
119 * rflags gets masked by a value from another MSR (so CLD and CLAC
120 * are not needed). SYSCALL does not save anything on the stack
121 * and does not change rsp.
123 * Registers on entry:
124 * rax system call number
126 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
130 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
133 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
135 * Only called from user space.
137 * When user can change pt_regs->foo always force IRET. That is because
138 * it deals with uncanonical addresses better. SYSRET has trouble
139 * with them due to bugs in both AMD and Intel CPUs.
142 ENTRY(entry_SYSCALL_64)
144 * Interrupts are off on entry.
145 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
146 * it is too small to ever cause noticeable irq latency.
150 * A hypervisor implementation might want to use a label
151 * after the swapgs, so that it can do the swapgs
152 * for the guest and jump here on syscall.
154 GLOBAL(entry_SYSCALL_64_after_swapgs)
156 movq %rsp, PER_CPU_VAR(rsp_scratch)
157 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
161 /* Construct struct pt_regs on stack */
162 pushq $__USER_DS /* pt_regs->ss */
163 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
164 pushq %r11 /* pt_regs->flags */
165 pushq $__USER_CS /* pt_regs->cs */
166 pushq %rcx /* pt_regs->ip */
167 pushq %rax /* pt_regs->orig_ax */
168 pushq %rdi /* pt_regs->di */
169 pushq %rsi /* pt_regs->si */
170 pushq %rdx /* pt_regs->dx */
171 pushq %rcx /* pt_regs->cx */
172 pushq $-ENOSYS /* pt_regs->ax */
173 pushq %r8 /* pt_regs->r8 */
174 pushq %r9 /* pt_regs->r9 */
175 pushq %r10 /* pt_regs->r10 */
176 pushq %r11 /* pt_regs->r11 */
177 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
180 * If we need to do entry work or if we guess we'll need to do
181 * exit work, go straight to the slow path.
183 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
184 jnz entry_SYSCALL64_slow_path
186 entry_SYSCALL_64_fastpath:
188 * Easy case: enable interrupts and issue the syscall. If the syscall
189 * needs pt_regs, we'll call a stub that disables interrupts again
190 * and jumps to the slow path.
193 ENABLE_INTERRUPTS(CLBR_NONE)
194 #if __SYSCALL_MASK == ~0
195 cmpq $__NR_syscall_max, %rax
197 andl $__SYSCALL_MASK, %eax
198 cmpl $__NR_syscall_max, %eax
200 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
204 * This call instruction is handled specially in stub_ptregs_64.
205 * It might end up jumping to the slow path. If it jumps, RAX
206 * and all argument registers are clobbered.
208 call *sys_call_table(, %rax, 8)
209 .Lentry_SYSCALL_64_after_fastpath_call:
215 * If we get here, then we know that pt_regs is clean for SYSRET64.
216 * If we see that no exit work is required (which we are required
217 * to check with IRQs off), then we can go straight to SYSRET64.
219 DISABLE_INTERRUPTS(CLBR_NONE)
221 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
225 TRACE_IRQS_ON /* user mode is traced as IRQs on */
227 movq EFLAGS(%rsp), %r11
228 RESTORE_C_REGS_EXCEPT_RCX_R11
234 * The fast path looked good when we started, but something changed
235 * along the way and we need to switch to the slow path. Calling
236 * raise(3) will trigger this, for example. IRQs are off.
239 ENABLE_INTERRUPTS(CLBR_NONE)
242 call syscall_return_slowpath /* returns with IRQs disabled */
243 jmp return_from_SYSCALL_64
245 entry_SYSCALL64_slow_path:
249 call do_syscall_64 /* returns with IRQs disabled */
251 return_from_SYSCALL_64:
253 TRACE_IRQS_IRETQ /* we're about to change IF */
256 * Try to use SYSRET instead of IRET if we're returning to
257 * a completely clean 64-bit userspace context.
261 cmpq %rcx, %r11 /* RCX == RIP */
262 jne opportunistic_sysret_failed
265 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
266 * in kernel space. This essentially lets the user take over
267 * the kernel, since userspace controls RSP.
269 * If width of "canonical tail" ever becomes variable, this will need
270 * to be updated to remain correct on both old and new CPUs.
272 .ifne __VIRTUAL_MASK_SHIFT - 47
273 .error "virtual address width changed -- SYSRET checks need update"
276 /* Change top 16 bits to be the sign-extension of 47th bit */
277 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
278 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
280 /* If this changed %rcx, it was not canonical */
282 jne opportunistic_sysret_failed
284 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
285 jne opportunistic_sysret_failed
288 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
289 jne opportunistic_sysret_failed
292 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
293 * restoring TF results in a trap from userspace immediately after
294 * SYSRET. This would cause an infinite loop whenever #DB happens
295 * with register state that satisfies the opportunistic SYSRET
296 * conditions. For example, single-stepping this user code:
298 * movq $stuck_here, %rcx
303 * would never get past 'stuck_here'.
305 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
306 jnz opportunistic_sysret_failed
308 /* nothing to check for RSP */
310 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
311 jne opportunistic_sysret_failed
314 * We win! This label is here just for ease of understanding
315 * perf profiles. Nothing jumps here.
317 syscall_return_via_sysret:
318 /* rcx and r11 are already restored (see code above) */
319 RESTORE_C_REGS_EXCEPT_RCX_R11
323 opportunistic_sysret_failed:
325 jmp restore_c_regs_and_iret
326 END(entry_SYSCALL_64)
328 ENTRY(stub_ptregs_64)
330 * Syscalls marked as needing ptregs land here.
331 * If we are on the fast path, we need to save the extra regs,
332 * which we achieve by trying again on the slow path. If we are on
333 * the slow path, the extra regs are already saved.
335 * RAX stores a pointer to the C function implementing the syscall.
338 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
342 * Called from fast path -- disable IRQs again, pop return address
343 * and jump to slow path
345 DISABLE_INTERRUPTS(CLBR_NONE)
348 jmp entry_SYSCALL64_slow_path
352 jmp *%rax /* called from C */
355 .macro ptregs_stub func
357 leaq \func(%rip), %rax
362 /* Instantiate ptregs_stub for each ptregs-using syscall */
363 #define __SYSCALL_64_QUAL_(sym)
364 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
365 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
366 #include <asm/syscalls_64.h>
369 * A newly forked process directly context switches into this address.
371 * rdi: prev task we switched from
374 LOCK ; btr $TIF_FORK, TI_flags(%r8)
376 call schedule_tail /* rdi: 'prev' task parameter */
378 testb $3, CS(%rsp) /* from kernel_thread? */
382 * We came from kernel_thread. This code path is quite twisted, and
383 * someone should clean it up.
385 * copy_thread_tls stashes the function pointer in RBX and the
386 * parameter to be passed in RBP. The called function is permitted
387 * to call do_execve and thereby jump to user mode.
394 * Fall through as though we're exiting a syscall. This makes a
395 * twisted sort of sense if we just called do_execve.
400 call syscall_return_slowpath /* returns with IRQs disabled */
401 TRACE_IRQS_ON /* user mode is traced as IRQS on */
403 jmp restore_regs_and_iret
407 * Build the entry stubs with some assembler magic.
408 * We pack 1 stub into every 8-byte block.
411 ENTRY(irq_entries_start)
412 vector=FIRST_EXTERNAL_VECTOR
413 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
414 pushq $(~vector+0x80) /* Note: always in signed byte range */
419 END(irq_entries_start)
422 * Interrupt entry/exit.
424 * Interrupt entry points save only callee clobbered registers in fast path.
426 * Entry runs with interrupts off.
429 /* 0(%rsp): ~(interrupt number) */
430 .macro interrupt func
432 ALLOC_PT_GPREGS_ON_STACK
440 * IRQ from user mode. Switch to kernel gsbase and inform context
441 * tracking that we're in kernel mode.
446 * We need to tell lockdep that IRQs are off. We can't do this until
447 * we fix gsbase, and we should do it before enter_from_user_mode
448 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
449 * the simplest way to handle it is to just call it twice if
450 * we enter from user mode. There's no reason to optimize this since
451 * TRACE_IRQS_OFF is a no-op if lockdep is off.
455 CALL_enter_from_user_mode
459 * Save previous stack pointer, optionally switch to interrupt stack.
460 * irq_count is used to check if a CPU is already on an interrupt stack
461 * or not. While this is essentially redundant with preempt_count it is
462 * a little cheaper to use a separate counter in the PDA (short of
463 * moving irq_enter into assembly, which would be too much work)
466 incl PER_CPU_VAR(irq_count)
467 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
469 /* We entered an interrupt context - irqs are off: */
472 call \func /* rdi points to pt_regs */
476 * The interrupt stubs push (~vector+0x80) onto the stack and
477 * then jump to common_interrupt.
479 .p2align CONFIG_X86_L1_CACHE_SHIFT
482 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
484 /* 0(%rsp): old RSP */
486 DISABLE_INTERRUPTS(CLBR_NONE)
488 decl PER_CPU_VAR(irq_count)
490 /* Restore saved previous stack */
496 /* Interrupt came from user space */
499 call prepare_exit_to_usermode
502 jmp restore_regs_and_iret
504 /* Returning to kernel space */
506 #ifdef CONFIG_PREEMPT
507 /* Interrupts are off */
508 /* Check if we need preemption */
509 bt $9, EFLAGS(%rsp) /* were interrupts off? */
511 0: cmpl $0, PER_CPU_VAR(__preempt_count)
513 call preempt_schedule_irq
518 * The iretq could re-enable interrupts:
523 * At this label, code paths which return to kernel and to user,
524 * which come from interrupts/exception and from syscalls, merge.
526 GLOBAL(restore_regs_and_iret)
528 restore_c_regs_and_iret:
530 REMOVE_PT_GPREGS_FROM_STACK 8
535 * Are we returning to a stack segment from the LDT? Note: in
536 * 64-bit mode SS:RSP on the exception stack is always valid.
538 #ifdef CONFIG_X86_ESPFIX64
539 testb $4, (SS-RIP)(%rsp)
540 jnz native_irq_return_ldt
543 .global native_irq_return_iret
544 native_irq_return_iret:
546 * This may fault. Non-paranoid faults on return to userspace are
547 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
548 * Double-faults due to espfix64 are handled in do_double_fault.
549 * Other faults here are fatal.
553 #ifdef CONFIG_X86_ESPFIX64
554 native_irq_return_ldt:
558 movq PER_CPU_VAR(espfix_waddr), %rdi
559 movq %rax, (0*8)(%rdi) /* RAX */
560 movq (2*8)(%rsp), %rax /* RIP */
561 movq %rax, (1*8)(%rdi)
562 movq (3*8)(%rsp), %rax /* CS */
563 movq %rax, (2*8)(%rdi)
564 movq (4*8)(%rsp), %rax /* RFLAGS */
565 movq %rax, (3*8)(%rdi)
566 movq (6*8)(%rsp), %rax /* SS */
567 movq %rax, (5*8)(%rdi)
568 movq (5*8)(%rsp), %rax /* RSP */
569 movq %rax, (4*8)(%rdi)
570 andl $0xffff0000, %eax
572 orq PER_CPU_VAR(espfix_stack), %rax
576 jmp native_irq_return_iret
578 END(common_interrupt)
583 .macro apicinterrupt3 num sym do_sym
593 #ifdef CONFIG_TRACING
594 #define trace(sym) trace_##sym
595 #define smp_trace(sym) smp_trace_##sym
597 .macro trace_apicinterrupt num sym
598 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
601 .macro trace_apicinterrupt num sym do_sym
605 .macro apicinterrupt num sym do_sym
606 apicinterrupt3 \num \sym \do_sym
607 trace_apicinterrupt \num \sym
611 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
612 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
616 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
619 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
620 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
622 #ifdef CONFIG_HAVE_KVM
623 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
624 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
627 #ifdef CONFIG_X86_MCE_THRESHOLD
628 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
631 #ifdef CONFIG_X86_MCE_AMD
632 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
635 #ifdef CONFIG_X86_THERMAL_VECTOR
636 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
640 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
641 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
642 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
645 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
646 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
648 #ifdef CONFIG_IRQ_WORK
649 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
653 * Exception entry points.
655 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
657 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
660 .if \shift_ist != -1 && \paranoid == 0
661 .error "using shift_ist requires paranoid=1"
665 PARAVIRT_ADJUST_EXCEPTION_FRAME
667 .ifeq \has_error_code
668 pushq $-1 /* ORIG_RAX: no syscall to restart */
671 ALLOC_PT_GPREGS_ON_STACK
675 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
682 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
686 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
692 movq %rsp, %rdi /* pt_regs pointer */
695 movq ORIG_RAX(%rsp), %rsi /* get error code */
696 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
698 xorl %esi, %esi /* no error code */
702 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
708 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
711 /* these procedures expect "no swapgs" flag in ebx */
720 * Paranoid entry from userspace. Switch stacks and treat it
721 * as a normal entry. This means that paranoid handlers
722 * run in real process context if user_mode(regs).
728 movq %rsp, %rdi /* pt_regs pointer */
730 movq %rax, %rsp /* switch stack */
732 movq %rsp, %rdi /* pt_regs pointer */
735 movq ORIG_RAX(%rsp), %rsi /* get error code */
736 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
738 xorl %esi, %esi /* no error code */
743 jmp error_exit /* %ebx: no swapgs flag */
748 #ifdef CONFIG_TRACING
749 .macro trace_idtentry sym do_sym has_error_code:req
750 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
751 idtentry \sym \do_sym has_error_code=\has_error_code
754 .macro trace_idtentry sym do_sym has_error_code:req
755 idtentry \sym \do_sym has_error_code=\has_error_code
759 idtentry divide_error do_divide_error has_error_code=0
760 idtentry overflow do_overflow has_error_code=0
761 idtentry bounds do_bounds has_error_code=0
762 idtentry invalid_op do_invalid_op has_error_code=0
763 idtentry device_not_available do_device_not_available has_error_code=0
764 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
765 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
766 idtentry invalid_TSS do_invalid_TSS has_error_code=1
767 idtentry segment_not_present do_segment_not_present has_error_code=1
768 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
769 idtentry coprocessor_error do_coprocessor_error has_error_code=0
770 idtentry alignment_check do_alignment_check has_error_code=1
771 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
775 * Reload gs selector with exception handling
778 ENTRY(native_load_gs_index)
780 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
784 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
788 END(native_load_gs_index)
789 EXPORT_SYMBOL(native_load_gs_index)
791 _ASM_EXTABLE(.Lgs_change, bad_gs)
792 .section .fixup, "ax"
793 /* running with kernelgs */
795 SWAPGS /* switch back to user gs */
797 /* This can't be a string because the preprocessor needs to see it. */
798 movl $__USER_DS, %eax
801 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
807 /* Call softirq on interrupt stack. Interrupts are off. */
808 ENTRY(do_softirq_own_stack)
811 incl PER_CPU_VAR(irq_count)
812 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
813 push %rbp /* frame pointer backlink */
816 decl PER_CPU_VAR(irq_count)
818 END(do_softirq_own_stack)
821 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
824 * A note on the "critical region" in our callback handler.
825 * We want to avoid stacking callback handlers due to events occurring
826 * during handling of the last event. To do this, we keep events disabled
827 * until we've done all processing. HOWEVER, we must enable events before
828 * popping the stack frame (can't be done atomically) and so it would still
829 * be possible to get enough handler activations to overflow the stack.
830 * Although unlikely, bugs of that kind are hard to track down, so we'd
831 * like to avoid the possibility.
832 * So, on entry to the handler we detect whether we interrupted an
833 * existing activation in its critical region -- if so, we pop the current
834 * activation and restart the handler using the previous one.
836 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
839 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
840 * see the correct pointer to the pt_regs
842 movq %rdi, %rsp /* we don't return, adjust the stack frame */
843 11: incl PER_CPU_VAR(irq_count)
845 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
846 pushq %rbp /* frame pointer backlink */
847 call xen_evtchn_do_upcall
849 decl PER_CPU_VAR(irq_count)
850 #ifndef CONFIG_PREEMPT
851 call xen_maybe_preempt_hcall
854 END(xen_do_hypervisor_callback)
857 * Hypervisor uses this for application faults while it executes.
858 * We get here for two reasons:
859 * 1. Fault while reloading DS, ES, FS or GS
860 * 2. Fault while executing IRET
861 * Category 1 we do not need to fix up as Xen has already reloaded all segment
862 * registers that could be reloaded and zeroed the others.
863 * Category 2 we fix up by killing the current process. We cannot use the
864 * normal Linux return path in this case because if we use the IRET hypercall
865 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
866 * We distinguish between categories by comparing each saved segment register
867 * with its current contents: any discrepancy means we in category 1.
869 ENTRY(xen_failsafe_callback)
882 /* All segments match their saved values => Category 2 (Bad IRET). */
889 jmp general_protection
890 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
894 pushq $-1 /* orig_ax = -1 => not a system call */
895 ALLOC_PT_GPREGS_ON_STACK
899 END(xen_failsafe_callback)
901 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
902 xen_hvm_callback_vector xen_evtchn_do_upcall
904 #endif /* CONFIG_XEN */
906 #if IS_ENABLED(CONFIG_HYPERV)
907 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
908 hyperv_callback_vector hyperv_vector_handler
909 #endif /* CONFIG_HYPERV */
911 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
912 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
913 idtentry stack_segment do_stack_segment has_error_code=1
916 idtentry xen_debug do_debug has_error_code=0
917 idtentry xen_int3 do_int3 has_error_code=0
918 idtentry xen_stack_segment do_stack_segment has_error_code=1
921 idtentry general_protection do_general_protection has_error_code=1
922 trace_idtentry page_fault do_page_fault has_error_code=1
924 #ifdef CONFIG_KVM_GUEST
925 idtentry async_page_fault do_async_page_fault has_error_code=1
928 #ifdef CONFIG_X86_MCE
929 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
933 * Save all registers in pt_regs, and switch gs if needed.
934 * Use slow, but surefire "are we in kernel?" check.
935 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
937 ENTRY(paranoid_entry)
942 movl $MSR_GS_BASE, %ecx
945 js 1f /* negative -> in kernel */
952 * "Paranoid" exit path from exception stack. This is invoked
953 * only on return from non-NMI IST interrupts that came
956 * We may be returning to very strange contexts (e.g. very early
957 * in syscall entry), so checking for preemption here would
958 * be complicated. Fortunately, we there's no good reason
959 * to try to handle preemption here.
961 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
964 DISABLE_INTERRUPTS(CLBR_NONE)
966 testl %ebx, %ebx /* swapgs needed? */
967 jnz paranoid_exit_no_swapgs
970 jmp paranoid_exit_restore
971 paranoid_exit_no_swapgs:
972 TRACE_IRQS_IRETQ_DEBUG
973 paranoid_exit_restore:
976 REMOVE_PT_GPREGS_FROM_STACK 8
981 * Save all registers in pt_regs, and switch gs if needed.
982 * Return: EBX=0: came from user mode; EBX=1: otherwise
990 jz .Lerror_kernelspace
992 .Lerror_entry_from_usermode_swapgs:
994 * We entered from user mode or we're pretending to have entered
995 * from user mode due to an IRET fault.
999 .Lerror_entry_from_usermode_after_swapgs:
1001 * We need to tell lockdep that IRQs are off. We can't do this until
1002 * we fix gsbase, and we should do it before enter_from_user_mode
1003 * (which can take locks).
1006 CALL_enter_from_user_mode
1014 * There are two places in the kernel that can potentially fault with
1015 * usergs. Handle them here. B stepping K8s sometimes report a
1016 * truncated RIP for IRET exceptions returning to compat mode. Check
1017 * for these here too.
1019 .Lerror_kernelspace:
1021 leaq native_irq_return_iret(%rip), %rcx
1022 cmpq %rcx, RIP+8(%rsp)
1024 movl %ecx, %eax /* zero extend */
1025 cmpq %rax, RIP+8(%rsp)
1027 cmpq $.Lgs_change, RIP+8(%rsp)
1028 jne .Lerror_entry_done
1031 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1032 * gsbase and proceed. We'll fix up the exception and land in
1033 * .Lgs_change's error handler with kernel gsbase.
1035 jmp .Lerror_entry_from_usermode_swapgs
1038 /* Fix truncated RIP */
1039 movq %rcx, RIP+8(%rsp)
1044 * We came from an IRET to user mode, so we have user gsbase.
1045 * Switch to kernel gsbase:
1050 * Pretend that the exception came from user mode: set up pt_regs
1051 * as if we faulted immediately after IRET and clear EBX so that
1052 * error_exit knows that we will be returning to user mode.
1058 jmp .Lerror_entry_from_usermode_after_swapgs
1063 * On entry, EBS is a "return to kernel mode" flag:
1064 * 1: already in kernel mode, don't need SWAPGS
1065 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1069 DISABLE_INTERRUPTS(CLBR_NONE)
1076 /* Runs on exception stack */
1079 * Fix up the exception frame if we're on Xen.
1080 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1081 * one value to the stack on native, so it may clobber the rdx
1082 * scratch slot, but it won't clobber any of the important
1085 * Xen is a different story, because the Xen frame itself overlaps
1086 * the "NMI executing" variable.
1088 PARAVIRT_ADJUST_EXCEPTION_FRAME
1091 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1092 * the iretq it performs will take us out of NMI context.
1093 * This means that we can have nested NMIs where the next
1094 * NMI is using the top of the stack of the previous NMI. We
1095 * can't let it execute because the nested NMI will corrupt the
1096 * stack of the previous NMI. NMI handlers are not re-entrant
1099 * To handle this case we do the following:
1100 * Check the a special location on the stack that contains
1101 * a variable that is set when NMIs are executing.
1102 * The interrupted task's stack is also checked to see if it
1104 * If the variable is not set and the stack is not the NMI
1106 * o Set the special variable on the stack
1107 * o Copy the interrupt frame into an "outermost" location on the
1109 * o Copy the interrupt frame into an "iret" location on the stack
1110 * o Continue processing the NMI
1111 * If the variable is set or the previous stack is the NMI stack:
1112 * o Modify the "iret" location to jump to the repeat_nmi
1113 * o return back to the first NMI
1115 * Now on exit of the first NMI, we first clear the stack variable
1116 * The NMI stack will tell any nested NMIs at that point that it is
1117 * nested. Then we pop the stack normally with iret, and if there was
1118 * a nested NMI that updated the copy interrupt stack frame, a
1119 * jump will be made to the repeat_nmi code that will handle the second
1122 * However, espfix prevents us from directly returning to userspace
1123 * with a single IRET instruction. Similarly, IRET to user mode
1124 * can fault. We therefore handle NMIs from user space like
1125 * other IST entries.
1128 /* Use %rdx as our temp variable throughout */
1131 testb $3, CS-RIP+8(%rsp)
1132 jz .Lnmi_from_kernel
1135 * NMI from user mode. We need to run on the thread stack, but we
1136 * can't go through the normal entry paths: NMIs are masked, and
1137 * we don't want to enable interrupts, because then we'll end
1138 * up in an awkward situation in which IRQs are on but NMIs
1141 * We also must not push anything to the stack before switching
1142 * stacks lest we corrupt the "NMI executing" variable.
1148 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1149 pushq 5*8(%rdx) /* pt_regs->ss */
1150 pushq 4*8(%rdx) /* pt_regs->rsp */
1151 pushq 3*8(%rdx) /* pt_regs->flags */
1152 pushq 2*8(%rdx) /* pt_regs->cs */
1153 pushq 1*8(%rdx) /* pt_regs->rip */
1154 pushq $-1 /* pt_regs->orig_ax */
1155 pushq %rdi /* pt_regs->di */
1156 pushq %rsi /* pt_regs->si */
1157 pushq (%rdx) /* pt_regs->dx */
1158 pushq %rcx /* pt_regs->cx */
1159 pushq %rax /* pt_regs->ax */
1160 pushq %r8 /* pt_regs->r8 */
1161 pushq %r9 /* pt_regs->r9 */
1162 pushq %r10 /* pt_regs->r10 */
1163 pushq %r11 /* pt_regs->r11 */
1164 pushq %rbx /* pt_regs->rbx */
1165 pushq %rbp /* pt_regs->rbp */
1166 pushq %r12 /* pt_regs->r12 */
1167 pushq %r13 /* pt_regs->r13 */
1168 pushq %r14 /* pt_regs->r14 */
1169 pushq %r15 /* pt_regs->r15 */
1172 * At this point we no longer need to worry about stack damage
1173 * due to nesting -- we're on the normal thread stack and we're
1174 * done with the NMI stack.
1182 * Return back to user mode. We must *not* do the normal exit
1183 * work, because we don't want to enable interrupts. Fortunately,
1184 * do_nmi doesn't modify pt_regs.
1187 jmp restore_c_regs_and_iret
1191 * Here's what our stack frame will look like:
1192 * +---------------------------------------------------------+
1194 * | original Return RSP |
1195 * | original RFLAGS |
1198 * +---------------------------------------------------------+
1199 * | temp storage for rdx |
1200 * +---------------------------------------------------------+
1201 * | "NMI executing" variable |
1202 * +---------------------------------------------------------+
1203 * | iret SS } Copied from "outermost" frame |
1204 * | iret Return RSP } on each loop iteration; overwritten |
1205 * | iret RFLAGS } by a nested NMI to force another |
1206 * | iret CS } iteration if needed. |
1208 * +---------------------------------------------------------+
1209 * | outermost SS } initialized in first_nmi; |
1210 * | outermost Return RSP } will not be changed before |
1211 * | outermost RFLAGS } NMI processing is done. |
1212 * | outermost CS } Copied to "iret" frame on each |
1213 * | outermost RIP } iteration. |
1214 * +---------------------------------------------------------+
1216 * +---------------------------------------------------------+
1218 * The "original" frame is used by hardware. Before re-enabling
1219 * NMIs, we need to be done with it, and we need to leave enough
1220 * space for the asm code here.
1222 * We return by executing IRET while RSP points to the "iret" frame.
1223 * That will either return for real or it will loop back into NMI
1226 * The "outermost" frame is copied to the "iret" frame on each
1227 * iteration of the loop, so each iteration starts with the "iret"
1228 * frame pointing to the final return target.
1232 * Determine whether we're a nested NMI.
1234 * If we interrupted kernel code between repeat_nmi and
1235 * end_repeat_nmi, then we are a nested NMI. We must not
1236 * modify the "iret" frame because it's being written by
1237 * the outer NMI. That's okay; the outer NMI handler is
1238 * about to about to call do_nmi anyway, so we can just
1239 * resume the outer NMI.
1242 movq $repeat_nmi, %rdx
1245 movq $end_repeat_nmi, %rdx
1251 * Now check "NMI executing". If it's set, then we're nested.
1252 * This will not detect if we interrupted an outer NMI just
1259 * Now test if the previous stack was an NMI stack. This covers
1260 * the case where we interrupt an outer NMI after it clears
1261 * "NMI executing" but before IRET. We need to be careful, though:
1262 * there is one case in which RSP could point to the NMI stack
1263 * despite there being no NMI active: naughty userspace controls
1264 * RSP at the very beginning of the SYSCALL targets. We can
1265 * pull a fast one on naughty userspace, though: we program
1266 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1267 * if it controls the kernel's RSP. We set DF before we clear
1271 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1272 cmpq %rdx, 4*8(%rsp)
1273 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1276 subq $EXCEPTION_STKSZ, %rdx
1277 cmpq %rdx, 4*8(%rsp)
1278 /* If it is below the NMI stack, it is a normal NMI */
1281 /* Ah, it is within the NMI stack. */
1283 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1284 jz first_nmi /* RSP was user controlled. */
1286 /* This is a nested NMI. */
1290 * Modify the "iret" frame to point to repeat_nmi, forcing another
1291 * iteration of NMI handling.
1294 leaq -10*8(%rsp), %rdx
1301 /* Put stack back */
1307 /* We are returning to kernel mode, so this cannot result in a fault. */
1314 /* Make room for "NMI executing". */
1317 /* Leave room for the "iret" frame */
1320 /* Copy the "original" frame to the "outermost" frame */
1325 /* Everything up to here is safe from nested NMIs */
1327 #ifdef CONFIG_DEBUG_ENTRY
1329 * For ease of testing, unmask NMIs right away. Disabled by
1330 * default because IRET is very expensive.
1333 pushq %rsp /* RSP (minus 8 because of the previous push) */
1334 addq $8, (%rsp) /* Fix up RSP */
1336 pushq $__KERNEL_CS /* CS */
1338 INTERRUPT_RETURN /* continues at repeat_nmi below */
1344 * If there was a nested NMI, the first NMI's iret will return
1345 * here. But NMIs are still enabled and we can take another
1346 * nested NMI. The nested NMI checks the interrupted RIP to see
1347 * if it is between repeat_nmi and end_repeat_nmi, and if so
1348 * it will just return, as we are about to repeat an NMI anyway.
1349 * This makes it safe to copy to the stack frame that a nested
1352 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1353 * we're repeating an NMI, gsbase has the same value that it had on
1354 * the first iteration. paranoid_entry will load the kernel
1355 * gsbase if needed before we call do_nmi. "NMI executing"
1358 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1361 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1362 * here must not modify the "iret" frame while we're writing to
1363 * it or it will end up containing garbage.
1373 * Everything below this point can be preempted by a nested NMI.
1374 * If this happens, then the inner NMI will change the "iret"
1375 * frame to point back to repeat_nmi.
1377 pushq $-1 /* ORIG_RAX: no syscall to restart */
1378 ALLOC_PT_GPREGS_ON_STACK
1381 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1382 * as we should not be calling schedule in NMI context.
1383 * Even with normal interrupts enabled. An NMI should not be
1384 * setting NEED_RESCHED or anything that normal interrupts and
1385 * exceptions might do.
1389 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1394 testl %ebx, %ebx /* swapgs needed? */
1402 /* Point RSP at the "iret" frame. */
1403 REMOVE_PT_GPREGS_FROM_STACK 6*8
1406 * Clear "NMI executing". Set DF first so that we can easily
1407 * distinguish the remaining code between here and IRET from
1408 * the SYSCALL entry and exit paths. On a native kernel, we
1409 * could just inspect RIP, but, on paravirt kernels,
1410 * INTERRUPT_RETURN can translate into a jump into a
1414 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1417 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1418 * stack in a single instruction. We are returning to kernel
1419 * mode, so this cannot result in a fault.
1424 ENTRY(ignore_sysret)
1429 ENTRY(rewind_stack_do_exit)
1430 /* Prevent any naive code from trying to unwind to our caller. */
1433 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1434 leaq -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%rax), %rsp
1438 END(rewind_stack_do_exit)