x86/paravirt: Remove paravirt ops pmd_update[_defer] and pte_update_defer
[cascardo/linux.git] / arch / x86 / include / asm / paravirt.h
1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4  * para-virtualization: those hooks are defined here. */
5
6 #ifdef CONFIG_PARAVIRT
7 #include <asm/pgtable_types.h>
8 #include <asm/asm.h>
9
10 #include <asm/paravirt_types.h>
11
12 #ifndef __ASSEMBLY__
13 #include <linux/bug.h>
14 #include <linux/types.h>
15 #include <linux/cpumask.h>
16
17 static inline int paravirt_enabled(void)
18 {
19         return pv_info.paravirt_enabled;
20 }
21
22 static inline void load_sp0(struct tss_struct *tss,
23                              struct thread_struct *thread)
24 {
25         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
26 }
27
28 /* The paravirtualized CPUID instruction. */
29 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
30                            unsigned int *ecx, unsigned int *edx)
31 {
32         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
33 }
34
35 /*
36  * These special macros can be used to get or set a debugging register
37  */
38 static inline unsigned long paravirt_get_debugreg(int reg)
39 {
40         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
41 }
42 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
43 static inline void set_debugreg(unsigned long val, int reg)
44 {
45         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
46 }
47
48 static inline void clts(void)
49 {
50         PVOP_VCALL0(pv_cpu_ops.clts);
51 }
52
53 static inline unsigned long read_cr0(void)
54 {
55         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
56 }
57
58 static inline void write_cr0(unsigned long x)
59 {
60         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
61 }
62
63 static inline unsigned long read_cr2(void)
64 {
65         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
66 }
67
68 static inline void write_cr2(unsigned long x)
69 {
70         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
71 }
72
73 static inline unsigned long read_cr3(void)
74 {
75         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
76 }
77
78 static inline void write_cr3(unsigned long x)
79 {
80         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
81 }
82
83 static inline unsigned long __read_cr4(void)
84 {
85         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
86 }
87 static inline unsigned long __read_cr4_safe(void)
88 {
89         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
90 }
91
92 static inline void __write_cr4(unsigned long x)
93 {
94         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
95 }
96
97 #ifdef CONFIG_X86_64
98 static inline unsigned long read_cr8(void)
99 {
100         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
101 }
102
103 static inline void write_cr8(unsigned long x)
104 {
105         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
106 }
107 #endif
108
109 static inline void arch_safe_halt(void)
110 {
111         PVOP_VCALL0(pv_irq_ops.safe_halt);
112 }
113
114 static inline void halt(void)
115 {
116         PVOP_VCALL0(pv_irq_ops.halt);
117 }
118
119 static inline void wbinvd(void)
120 {
121         PVOP_VCALL0(pv_cpu_ops.wbinvd);
122 }
123
124 #define get_kernel_rpl()  (pv_info.kernel_rpl)
125
126 static inline u64 paravirt_read_msr(unsigned msr, int *err)
127 {
128         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
129 }
130
131 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
132 {
133         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
134 }
135
136 /* These should all do BUG_ON(_err), but our headers are too tangled. */
137 #define rdmsr(msr, val1, val2)                  \
138 do {                                            \
139         int _err;                               \
140         u64 _l = paravirt_read_msr(msr, &_err); \
141         val1 = (u32)_l;                         \
142         val2 = _l >> 32;                        \
143 } while (0)
144
145 #define wrmsr(msr, val1, val2)                  \
146 do {                                            \
147         paravirt_write_msr(msr, val1, val2);    \
148 } while (0)
149
150 #define rdmsrl(msr, val)                        \
151 do {                                            \
152         int _err;                               \
153         val = paravirt_read_msr(msr, &_err);    \
154 } while (0)
155
156 static inline void wrmsrl(unsigned msr, u64 val)
157 {
158         wrmsr(msr, (u32)val, (u32)(val>>32));
159 }
160
161 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
162
163 /* rdmsr with exception handling */
164 #define rdmsr_safe(msr, a, b)                   \
165 ({                                              \
166         int _err;                               \
167         u64 _l = paravirt_read_msr(msr, &_err); \
168         (*a) = (u32)_l;                         \
169         (*b) = _l >> 32;                        \
170         _err;                                   \
171 })
172
173 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
174 {
175         int err;
176
177         *p = paravirt_read_msr(msr, &err);
178         return err;
179 }
180
181 static inline unsigned long long paravirt_sched_clock(void)
182 {
183         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
184 }
185
186 struct static_key;
187 extern struct static_key paravirt_steal_enabled;
188 extern struct static_key paravirt_steal_rq_enabled;
189
190 static inline u64 paravirt_steal_clock(int cpu)
191 {
192         return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
193 }
194
195 static inline unsigned long long paravirt_read_pmc(int counter)
196 {
197         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
198 }
199
200 #define rdpmc(counter, low, high)               \
201 do {                                            \
202         u64 _l = paravirt_read_pmc(counter);    \
203         low = (u32)_l;                          \
204         high = _l >> 32;                        \
205 } while (0)
206
207 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
208
209 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
210 {
211         PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
212 }
213
214 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
215 {
216         PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
217 }
218
219 static inline void load_TR_desc(void)
220 {
221         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
222 }
223 static inline void load_gdt(const struct desc_ptr *dtr)
224 {
225         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
226 }
227 static inline void load_idt(const struct desc_ptr *dtr)
228 {
229         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
230 }
231 static inline void set_ldt(const void *addr, unsigned entries)
232 {
233         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
234 }
235 static inline void store_idt(struct desc_ptr *dtr)
236 {
237         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
238 }
239 static inline unsigned long paravirt_store_tr(void)
240 {
241         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
242 }
243 #define store_tr(tr)    ((tr) = paravirt_store_tr())
244 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
245 {
246         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
247 }
248
249 #ifdef CONFIG_X86_64
250 static inline void load_gs_index(unsigned int gs)
251 {
252         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
253 }
254 #endif
255
256 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
257                                    const void *desc)
258 {
259         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
260 }
261
262 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
263                                    void *desc, int type)
264 {
265         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
266 }
267
268 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
269 {
270         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
271 }
272 static inline void set_iopl_mask(unsigned mask)
273 {
274         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
275 }
276
277 /* The paravirtualized I/O functions */
278 static inline void slow_down_io(void)
279 {
280         pv_cpu_ops.io_delay();
281 #ifdef REALLY_SLOW_IO
282         pv_cpu_ops.io_delay();
283         pv_cpu_ops.io_delay();
284         pv_cpu_ops.io_delay();
285 #endif
286 }
287
288 static inline void paravirt_activate_mm(struct mm_struct *prev,
289                                         struct mm_struct *next)
290 {
291         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
292 }
293
294 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
295                                           struct mm_struct *mm)
296 {
297         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
298 }
299
300 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
301 {
302         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
303 }
304
305 static inline void __flush_tlb(void)
306 {
307         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
308 }
309 static inline void __flush_tlb_global(void)
310 {
311         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
312 }
313 static inline void __flush_tlb_single(unsigned long addr)
314 {
315         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
316 }
317
318 static inline void flush_tlb_others(const struct cpumask *cpumask,
319                                     struct mm_struct *mm,
320                                     unsigned long start,
321                                     unsigned long end)
322 {
323         PVOP_VCALL4(pv_mmu_ops.flush_tlb_others, cpumask, mm, start, end);
324 }
325
326 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
327 {
328         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
329 }
330
331 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
332 {
333         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
334 }
335
336 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
337 {
338         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
339 }
340 static inline void paravirt_release_pte(unsigned long pfn)
341 {
342         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
343 }
344
345 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
346 {
347         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
348 }
349
350 static inline void paravirt_release_pmd(unsigned long pfn)
351 {
352         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
353 }
354
355 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
356 {
357         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
358 }
359 static inline void paravirt_release_pud(unsigned long pfn)
360 {
361         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
362 }
363
364 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
365                               pte_t *ptep)
366 {
367         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
368 }
369
370 static inline pte_t __pte(pteval_t val)
371 {
372         pteval_t ret;
373
374         if (sizeof(pteval_t) > sizeof(long))
375                 ret = PVOP_CALLEE2(pteval_t,
376                                    pv_mmu_ops.make_pte,
377                                    val, (u64)val >> 32);
378         else
379                 ret = PVOP_CALLEE1(pteval_t,
380                                    pv_mmu_ops.make_pte,
381                                    val);
382
383         return (pte_t) { .pte = ret };
384 }
385
386 static inline pteval_t pte_val(pte_t pte)
387 {
388         pteval_t ret;
389
390         if (sizeof(pteval_t) > sizeof(long))
391                 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
392                                    pte.pte, (u64)pte.pte >> 32);
393         else
394                 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
395                                    pte.pte);
396
397         return ret;
398 }
399
400 static inline pgd_t __pgd(pgdval_t val)
401 {
402         pgdval_t ret;
403
404         if (sizeof(pgdval_t) > sizeof(long))
405                 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
406                                    val, (u64)val >> 32);
407         else
408                 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
409                                    val);
410
411         return (pgd_t) { ret };
412 }
413
414 static inline pgdval_t pgd_val(pgd_t pgd)
415 {
416         pgdval_t ret;
417
418         if (sizeof(pgdval_t) > sizeof(long))
419                 ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
420                                     pgd.pgd, (u64)pgd.pgd >> 32);
421         else
422                 ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
423                                     pgd.pgd);
424
425         return ret;
426 }
427
428 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
429 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
430                                            pte_t *ptep)
431 {
432         pteval_t ret;
433
434         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
435                          mm, addr, ptep);
436
437         return (pte_t) { .pte = ret };
438 }
439
440 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
441                                            pte_t *ptep, pte_t pte)
442 {
443         if (sizeof(pteval_t) > sizeof(long))
444                 /* 5 arg words */
445                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
446         else
447                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
448                             mm, addr, ptep, pte.pte);
449 }
450
451 static inline void set_pte(pte_t *ptep, pte_t pte)
452 {
453         if (sizeof(pteval_t) > sizeof(long))
454                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
455                             pte.pte, (u64)pte.pte >> 32);
456         else
457                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
458                             pte.pte);
459 }
460
461 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
462                               pte_t *ptep, pte_t pte)
463 {
464         if (sizeof(pteval_t) > sizeof(long))
465                 /* 5 arg words */
466                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
467         else
468                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
469 }
470
471 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
472                               pmd_t *pmdp, pmd_t pmd)
473 {
474         if (sizeof(pmdval_t) > sizeof(long))
475                 /* 5 arg words */
476                 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
477         else
478                 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
479                             native_pmd_val(pmd));
480 }
481
482 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
483 {
484         pmdval_t val = native_pmd_val(pmd);
485
486         if (sizeof(pmdval_t) > sizeof(long))
487                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
488         else
489                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
490 }
491
492 #if CONFIG_PGTABLE_LEVELS >= 3
493 static inline pmd_t __pmd(pmdval_t val)
494 {
495         pmdval_t ret;
496
497         if (sizeof(pmdval_t) > sizeof(long))
498                 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
499                                    val, (u64)val >> 32);
500         else
501                 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
502                                    val);
503
504         return (pmd_t) { ret };
505 }
506
507 static inline pmdval_t pmd_val(pmd_t pmd)
508 {
509         pmdval_t ret;
510
511         if (sizeof(pmdval_t) > sizeof(long))
512                 ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
513                                     pmd.pmd, (u64)pmd.pmd >> 32);
514         else
515                 ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
516                                     pmd.pmd);
517
518         return ret;
519 }
520
521 static inline void set_pud(pud_t *pudp, pud_t pud)
522 {
523         pudval_t val = native_pud_val(pud);
524
525         if (sizeof(pudval_t) > sizeof(long))
526                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
527                             val, (u64)val >> 32);
528         else
529                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
530                             val);
531 }
532 #if CONFIG_PGTABLE_LEVELS == 4
533 static inline pud_t __pud(pudval_t val)
534 {
535         pudval_t ret;
536
537         if (sizeof(pudval_t) > sizeof(long))
538                 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
539                                    val, (u64)val >> 32);
540         else
541                 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
542                                    val);
543
544         return (pud_t) { ret };
545 }
546
547 static inline pudval_t pud_val(pud_t pud)
548 {
549         pudval_t ret;
550
551         if (sizeof(pudval_t) > sizeof(long))
552                 ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
553                                     pud.pud, (u64)pud.pud >> 32);
554         else
555                 ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
556                                     pud.pud);
557
558         return ret;
559 }
560
561 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
562 {
563         pgdval_t val = native_pgd_val(pgd);
564
565         if (sizeof(pgdval_t) > sizeof(long))
566                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
567                             val, (u64)val >> 32);
568         else
569                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
570                             val);
571 }
572
573 static inline void pgd_clear(pgd_t *pgdp)
574 {
575         set_pgd(pgdp, __pgd(0));
576 }
577
578 static inline void pud_clear(pud_t *pudp)
579 {
580         set_pud(pudp, __pud(0));
581 }
582
583 #endif  /* CONFIG_PGTABLE_LEVELS == 4 */
584
585 #endif  /* CONFIG_PGTABLE_LEVELS >= 3 */
586
587 #ifdef CONFIG_X86_PAE
588 /* Special-case pte-setting operations for PAE, which can't update a
589    64-bit pte atomically */
590 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
591 {
592         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
593                     pte.pte, pte.pte >> 32);
594 }
595
596 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
597                              pte_t *ptep)
598 {
599         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
600 }
601
602 static inline void pmd_clear(pmd_t *pmdp)
603 {
604         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
605 }
606 #else  /* !CONFIG_X86_PAE */
607 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
608 {
609         set_pte(ptep, pte);
610 }
611
612 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
613                              pte_t *ptep)
614 {
615         set_pte_at(mm, addr, ptep, __pte(0));
616 }
617
618 static inline void pmd_clear(pmd_t *pmdp)
619 {
620         set_pmd(pmdp, __pmd(0));
621 }
622 #endif  /* CONFIG_X86_PAE */
623
624 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
625 static inline void arch_start_context_switch(struct task_struct *prev)
626 {
627         PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
628 }
629
630 static inline void arch_end_context_switch(struct task_struct *next)
631 {
632         PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
633 }
634
635 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
636 static inline void arch_enter_lazy_mmu_mode(void)
637 {
638         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
639 }
640
641 static inline void arch_leave_lazy_mmu_mode(void)
642 {
643         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
644 }
645
646 static inline void arch_flush_lazy_mmu_mode(void)
647 {
648         PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
649 }
650
651 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
652                                 phys_addr_t phys, pgprot_t flags)
653 {
654         pv_mmu_ops.set_fixmap(idx, phys, flags);
655 }
656
657 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
658
659 #ifdef CONFIG_QUEUED_SPINLOCKS
660
661 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
662                                                         u32 val)
663 {
664         PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
665 }
666
667 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
668 {
669         PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
670 }
671
672 static __always_inline void pv_wait(u8 *ptr, u8 val)
673 {
674         PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
675 }
676
677 static __always_inline void pv_kick(int cpu)
678 {
679         PVOP_VCALL1(pv_lock_ops.kick, cpu);
680 }
681
682 #else /* !CONFIG_QUEUED_SPINLOCKS */
683
684 static __always_inline void __ticket_lock_spinning(struct arch_spinlock *lock,
685                                                         __ticket_t ticket)
686 {
687         PVOP_VCALLEE2(pv_lock_ops.lock_spinning, lock, ticket);
688 }
689
690 static __always_inline void __ticket_unlock_kick(struct arch_spinlock *lock,
691                                                         __ticket_t ticket)
692 {
693         PVOP_VCALL2(pv_lock_ops.unlock_kick, lock, ticket);
694 }
695
696 #endif /* CONFIG_QUEUED_SPINLOCKS */
697
698 #endif /* SMP && PARAVIRT_SPINLOCKS */
699
700 #ifdef CONFIG_X86_32
701 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
702 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
703
704 /* save and restore all caller-save registers, except return value */
705 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
706 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
707
708 #define PV_FLAGS_ARG "0"
709 #define PV_EXTRA_CLOBBERS
710 #define PV_VEXTRA_CLOBBERS
711 #else
712 /* save and restore all caller-save registers, except return value */
713 #define PV_SAVE_ALL_CALLER_REGS                                         \
714         "push %rcx;"                                                    \
715         "push %rdx;"                                                    \
716         "push %rsi;"                                                    \
717         "push %rdi;"                                                    \
718         "push %r8;"                                                     \
719         "push %r9;"                                                     \
720         "push %r10;"                                                    \
721         "push %r11;"
722 #define PV_RESTORE_ALL_CALLER_REGS                                      \
723         "pop %r11;"                                                     \
724         "pop %r10;"                                                     \
725         "pop %r9;"                                                      \
726         "pop %r8;"                                                      \
727         "pop %rdi;"                                                     \
728         "pop %rsi;"                                                     \
729         "pop %rdx;"                                                     \
730         "pop %rcx;"
731
732 /* We save some registers, but all of them, that's too much. We clobber all
733  * caller saved registers but the argument parameter */
734 #define PV_SAVE_REGS "pushq %%rdi;"
735 #define PV_RESTORE_REGS "popq %%rdi;"
736 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
737 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
738 #define PV_FLAGS_ARG "D"
739 #endif
740
741 /*
742  * Generate a thunk around a function which saves all caller-save
743  * registers except for the return value.  This allows C functions to
744  * be called from assembler code where fewer than normal registers are
745  * available.  It may also help code generation around calls from C
746  * code if the common case doesn't use many registers.
747  *
748  * When a callee is wrapped in a thunk, the caller can assume that all
749  * arg regs and all scratch registers are preserved across the
750  * call. The return value in rax/eax will not be saved, even for void
751  * functions.
752  */
753 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
754         extern typeof(func) __raw_callee_save_##func;                   \
755                                                                         \
756         asm(".pushsection .text;"                                       \
757             ".globl __raw_callee_save_" #func " ; "                     \
758             "__raw_callee_save_" #func ": "                             \
759             PV_SAVE_ALL_CALLER_REGS                                     \
760             "call " #func ";"                                           \
761             PV_RESTORE_ALL_CALLER_REGS                                  \
762             "ret;"                                                      \
763             ".popsection")
764
765 /* Get a reference to a callee-save function */
766 #define PV_CALLEE_SAVE(func)                                            \
767         ((struct paravirt_callee_save) { __raw_callee_save_##func })
768
769 /* Promise that "func" already uses the right calling convention */
770 #define __PV_IS_CALLEE_SAVE(func)                       \
771         ((struct paravirt_callee_save) { func })
772
773 static inline notrace unsigned long arch_local_save_flags(void)
774 {
775         return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
776 }
777
778 static inline notrace void arch_local_irq_restore(unsigned long f)
779 {
780         PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
781 }
782
783 static inline notrace void arch_local_irq_disable(void)
784 {
785         PVOP_VCALLEE0(pv_irq_ops.irq_disable);
786 }
787
788 static inline notrace void arch_local_irq_enable(void)
789 {
790         PVOP_VCALLEE0(pv_irq_ops.irq_enable);
791 }
792
793 static inline notrace unsigned long arch_local_irq_save(void)
794 {
795         unsigned long f;
796
797         f = arch_local_save_flags();
798         arch_local_irq_disable();
799         return f;
800 }
801
802
803 /* Make sure as little as possible of this mess escapes. */
804 #undef PARAVIRT_CALL
805 #undef __PVOP_CALL
806 #undef __PVOP_VCALL
807 #undef PVOP_VCALL0
808 #undef PVOP_CALL0
809 #undef PVOP_VCALL1
810 #undef PVOP_CALL1
811 #undef PVOP_VCALL2
812 #undef PVOP_CALL2
813 #undef PVOP_VCALL3
814 #undef PVOP_CALL3
815 #undef PVOP_VCALL4
816 #undef PVOP_CALL4
817
818 extern void default_banner(void);
819
820 #else  /* __ASSEMBLY__ */
821
822 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
823 771:;                                           \
824         ops;                                    \
825 772:;                                           \
826         .pushsection .parainstructions,"a";     \
827          .align algn;                           \
828          word 771b;                             \
829          .byte ptype;                           \
830          .byte 772b-771b;                       \
831          .short clobbers;                       \
832         .popsection
833
834
835 #define COND_PUSH(set, mask, reg)                       \
836         .if ((~(set)) & mask); push %reg; .endif
837 #define COND_POP(set, mask, reg)                        \
838         .if ((~(set)) & mask); pop %reg; .endif
839
840 #ifdef CONFIG_X86_64
841
842 #define PV_SAVE_REGS(set)                       \
843         COND_PUSH(set, CLBR_RAX, rax);          \
844         COND_PUSH(set, CLBR_RCX, rcx);          \
845         COND_PUSH(set, CLBR_RDX, rdx);          \
846         COND_PUSH(set, CLBR_RSI, rsi);          \
847         COND_PUSH(set, CLBR_RDI, rdi);          \
848         COND_PUSH(set, CLBR_R8, r8);            \
849         COND_PUSH(set, CLBR_R9, r9);            \
850         COND_PUSH(set, CLBR_R10, r10);          \
851         COND_PUSH(set, CLBR_R11, r11)
852 #define PV_RESTORE_REGS(set)                    \
853         COND_POP(set, CLBR_R11, r11);           \
854         COND_POP(set, CLBR_R10, r10);           \
855         COND_POP(set, CLBR_R9, r9);             \
856         COND_POP(set, CLBR_R8, r8);             \
857         COND_POP(set, CLBR_RDI, rdi);           \
858         COND_POP(set, CLBR_RSI, rsi);           \
859         COND_POP(set, CLBR_RDX, rdx);           \
860         COND_POP(set, CLBR_RCX, rcx);           \
861         COND_POP(set, CLBR_RAX, rax)
862
863 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
864 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
865 #define PARA_INDIRECT(addr)     *addr(%rip)
866 #else
867 #define PV_SAVE_REGS(set)                       \
868         COND_PUSH(set, CLBR_EAX, eax);          \
869         COND_PUSH(set, CLBR_EDI, edi);          \
870         COND_PUSH(set, CLBR_ECX, ecx);          \
871         COND_PUSH(set, CLBR_EDX, edx)
872 #define PV_RESTORE_REGS(set)                    \
873         COND_POP(set, CLBR_EDX, edx);           \
874         COND_POP(set, CLBR_ECX, ecx);           \
875         COND_POP(set, CLBR_EDI, edi);           \
876         COND_POP(set, CLBR_EAX, eax)
877
878 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
879 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
880 #define PARA_INDIRECT(addr)     *%cs:addr
881 #endif
882
883 #define INTERRUPT_RETURN                                                \
884         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
885                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
886
887 #define DISABLE_INTERRUPTS(clobbers)                                    \
888         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
889                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
890                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
891                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
892
893 #define ENABLE_INTERRUPTS(clobbers)                                     \
894         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
895                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
896                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
897                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
898
899 #define USERGS_SYSRET32                                                 \
900         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
901                   CLBR_NONE,                                            \
902                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
903
904 #ifdef CONFIG_X86_32
905 #define GET_CR0_INTO_EAX                                \
906         push %ecx; push %edx;                           \
907         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
908         pop %edx; pop %ecx
909
910 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
911         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
912                   CLBR_NONE,                                            \
913                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
914
915
916 #else   /* !CONFIG_X86_32 */
917
918 /*
919  * If swapgs is used while the userspace stack is still current,
920  * there's no way to call a pvop.  The PV replacement *must* be
921  * inlined, or the swapgs instruction must be trapped and emulated.
922  */
923 #define SWAPGS_UNSAFE_STACK                                             \
924         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
925                   swapgs)
926
927 /*
928  * Note: swapgs is very special, and in practise is either going to be
929  * implemented with a single "swapgs" instruction or something very
930  * special.  Either way, we don't need to save any registers for
931  * it.
932  */
933 #define SWAPGS                                                          \
934         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
935                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)          \
936                  )
937
938 #define GET_CR2_INTO_RAX                                \
939         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
940
941 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
942         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
943                   CLBR_NONE,                                            \
944                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
945
946 #define USERGS_SYSRET64                                                 \
947         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
948                   CLBR_NONE,                                            \
949                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
950 #endif  /* CONFIG_X86_32 */
951
952 #endif /* __ASSEMBLY__ */
953 #else  /* CONFIG_PARAVIRT */
954 # define default_banner x86_init_noop
955 #ifndef __ASSEMBLY__
956 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
957                                           struct mm_struct *mm)
958 {
959 }
960
961 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
962 {
963 }
964 #endif /* __ASSEMBLY__ */
965 #endif /* !CONFIG_PARAVIRT */
966 #endif /* _ASM_X86_PARAVIRT_H */