2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * SGI UV Broadcast Assist Unit definitions
8 * Copyright (C) 2008-2011 Silicon Graphics, Inc. All rights reserved.
11 #ifndef _ASM_X86_UV_UV_BAU_H
12 #define _ASM_X86_UV_UV_BAU_H
14 #include <linux/bitmap.h>
18 * Broadcast Assist Unit messaging structures
20 * Selective Broadcast activations are induced by software action
21 * specifying a particular 8-descriptor "set" via a 6-bit index written
23 * Thus there are 64 unique 512-byte sets of SB descriptors - one set for
24 * each 6-bit index value. These descriptor sets are mapped in sequence
25 * starting with set 0 located at the address specified in the
26 * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512,
27 * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on.
29 * We will use one set for sending BAU messages from each of the
32 * TLB shootdown will use the first of the 8 descriptors of each set.
33 * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set).
36 #define MAX_CPUS_PER_UVHUB 128
37 #define MAX_CPUS_PER_SOCKET 64
38 #define ADP_SZ 64 /* hardware-provided max. */
39 #define UV_CPUS_PER_AS 32 /* hardware-provided max. */
40 #define ITEMS_PER_DESC 8
41 /* the 'throttle' to prevent the hardware stay-busy bug */
42 #define MAX_BAU_CONCURRENT 3
43 #define UV_ACT_STATUS_MASK 0x3
44 #define UV_ACT_STATUS_SIZE 2
45 #define UV_DISTRIBUTION_SIZE 256
46 #define UV_SW_ACK_NPENDING 8
47 #define UV1_NET_ENDPOINT_INTD 0x38
48 #define UV2_NET_ENDPOINT_INTD 0x28
49 #define UV_NET_ENDPOINT_INTD (is_uv1_hub() ? \
50 UV1_NET_ENDPOINT_INTD : UV2_NET_ENDPOINT_INTD)
51 #define UV_DESC_PSHIFT 49
52 #define UV_PAYLOADQ_GNODE_SHIFT 49
53 #define UV_PTC_BASENAME "sgi_uv/ptc_statistics"
54 #define UV_BAU_BASENAME "sgi_uv/bau_tunables"
55 #define UV_BAU_TUNABLES_DIR "sgi_uv"
56 #define UV_BAU_TUNABLES_FILE "bau_tunables"
57 #define WHITESPACE " \t\n"
58 #define cpubit_isset(cpu, bau_local_cpumask) \
59 test_bit((cpu), (bau_local_cpumask).bits)
61 /* [19:16] SOFT_ACK timeout period 19: 1 is urgency 7 17:16 1 is multiplier */
63 * UV2: Bit 19 selects between
64 * (0): 10 microsecond timebase and
65 * (1): 80 microseconds
66 * we're using 560us, similar to UV1: 65 units of 10us
68 #define UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD (9UL)
69 #define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (15UL)
71 #define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD (is_uv1_hub() ? \
72 UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD : \
73 UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD)
74 /* assuming UV3 is the same */
76 #define BAU_MISC_CONTROL_MULT_MASK 3
78 #define UVH_AGING_PRESCALE_SEL 0x000000b000UL
79 /* [30:28] URGENCY_7 an index into a table of times */
80 #define BAU_URGENCY_7_SHIFT 28
81 #define BAU_URGENCY_7_MASK 7
83 #define UVH_TRANSACTION_TIMEOUT 0x000000b200UL
84 /* [45:40] BAU - BAU transaction timeout select - a multiplier */
85 #define BAU_TRANS_SHIFT 40
86 #define BAU_TRANS_MASK 0x3f
89 * shorten some awkward names
91 #define AS_PUSH_SHIFT UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT
92 #define SOFTACK_MSHIFT UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT
93 #define SOFTACK_PSHIFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT
94 #define SOFTACK_TIMEOUT_PERIOD UV_INTD_SOFT_ACK_TIMEOUT_PERIOD
95 #define PREFETCH_HINT_SHFT UV3H_LB_BAU_MISC_CONTROL_ENABLE_INTD_PREFETCH_HINT_SHFT
96 #define SB_STATUS_SHFT UV3H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT
97 #define write_gmmr uv_write_global_mmr64
98 #define write_lmmr uv_write_local_mmr
99 #define read_lmmr uv_read_local_mmr
100 #define read_gmmr uv_read_global_mmr64
103 * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
107 #define DS_DESTINATION_TIMEOUT 2
108 #define DS_SOURCE_TIMEOUT 3
110 * bits put together from HRP_LB_BAU_SB_ACTIVATION_STATUS_0/1/2
111 * values 1 and 3 will not occur
112 * Decoded meaning ERROR BUSY AUX ERR
113 * ------------------------------- ---- ----- -------
115 * BUSY (active) 0 1 0
116 * SW Ack Timeout (destination) 1 0 0
117 * SW Ack INTD rejected (strong NACK) 1 0 1
118 * Source Side Time Out Detected 1 1 0
119 * Destination Side PUT Failed 1 1 1
121 #define UV2H_DESC_IDLE 0
122 #define UV2H_DESC_BUSY 2
123 #define UV2H_DESC_DEST_TIMEOUT 4
124 #define UV2H_DESC_DEST_STRONG_NACK 5
125 #define UV2H_DESC_SOURCE_TIMEOUT 6
126 #define UV2H_DESC_DEST_PUT_ERR 7
129 * delay for 'plugged' timeout retries, in microseconds
131 #define PLUGGED_DELAY 10
134 * threshholds at which to use IPI to free resources
136 /* after this # consecutive 'plugged' timeouts, use IPI to release resources */
137 #define PLUGSB4RESET 100
138 /* after this many consecutive timeouts, use IPI to release resources */
139 #define TIMEOUTSB4RESET 1
140 /* at this number uses of IPI to release resources, giveup the request */
141 #define IPI_RESET_LIMIT 1
142 /* after this # consecutive successes, bump up the throttle if it was lowered */
143 #define COMPLETE_THRESHOLD 5
144 /* after this # of giveups (fall back to kernel IPI's) disable the use of
145 the BAU for a period of time */
146 #define GIVEUP_LIMIT 100
148 #define UV_LB_SUBNODEID 0x10
150 /* these two are the same for UV1 and UV2: */
151 #define UV_SA_SHFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT
152 #define UV_SA_MASK UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_MASK
153 /* 4 bits of software ack period */
154 #define UV2_ACK_MASK 0x7UL
155 #define UV2_ACK_UNITS_SHFT 3
156 #define UV2_EXT_SHFT UV2H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT
159 * number of entries in the destination side payload queue
161 #define DEST_Q_SIZE 20
163 * number of destination side software ack resources
165 #define DEST_NUM_RESOURCES 8
167 * completion statuses for sending a TLB flush message
169 #define FLUSH_RETRY_PLUGGED 1
170 #define FLUSH_RETRY_TIMEOUT 2
171 #define FLUSH_GIVEUP 3
172 #define FLUSH_COMPLETE 4
175 * tuning the action when the numalink network is extremely delayed
177 #define CONGESTED_RESPONSE_US 1000 /* 'long' response time, in
179 #define CONGESTED_REPS 10 /* long delays averaged over
180 this many broadcasts */
181 #define DISABLED_PERIOD 10 /* time for the bau to be
182 disabled, in seconds */
185 #define MSG_REGULAR 1
189 * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor)
190 * If the 'multilevel' flag in the header portion of the descriptor
191 * has been set to 0, then endpoint multi-unicast mode is selected.
192 * The distribution specification (32 bytes) is interpreted as a 256-bit
193 * distribution vector. Adjacent bits correspond to consecutive even numbered
194 * nodeIDs. The result of adding the index of a given bit to the 15-bit
195 * 'base_dest_nasid' field of the header corresponds to the
196 * destination nodeID associated with that specified bit.
199 unsigned long bits[BITS_TO_LONGS(UV_DISTRIBUTION_SIZE)];
203 * mask of cpu's on a uvhub
204 * (during initialization we need to check that unsigned long has
205 * enough bits for max. cpu's per uvhub)
207 struct bau_local_cpumask {
212 * Payload: 16 bytes (128 bits) (bytes 0x20-0x2f of descriptor)
213 * only 12 bytes (96 bits) of the payload area are usable.
214 * An additional 3 bytes (bits 27:4) of the header address are carried
215 * to the next bytes of the destination payload queue.
216 * And an additional 2 bytes of the header Suppl_A field are also
217 * carried to the destination payload queue.
218 * But the first byte of the Suppl_A becomes bits 127:120 (the 16th byte)
219 * of the destination payload queue, which is written by the hardware
220 * with the s/w ack resource bit vector.
221 * [ effective message contents (16 bytes (128 bits) maximum), not counting
222 * the s/w ack bit vector ]
226 * The payload is software-defined for INTD transactions
228 struct bau_msg_payload {
229 unsigned long address; /* signifies a page or all
232 unsigned short sending_cpu; /* filled in by sender */
234 unsigned short acknowledge_count; /* filled in by destination */
236 unsigned int reserved1:32; /* not usable */
241 * UV1 Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
242 * see table 4.2.3.0.1 in broacast_assist spec.
244 struct uv1_bau_msg_header {
245 unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
247 unsigned int base_dest_nasid:15; /* nasid of the first bit */
248 /* bits 20:6 */ /* in uvhub map */
249 unsigned int command:8; /* message type */
251 /* 0x38: SN3net EndPoint Message */
252 unsigned int rsvd_1:3; /* must be zero */
254 /* int will align on 32 bits */
255 unsigned int rsvd_2:9; /* must be zero */
257 /* Suppl_A is 56-41 */
258 unsigned int sequence:16; /* message sequence number */
259 /* bits 56:41 */ /* becomes bytes 16-17 of msg */
260 /* Address field (96:57) is
261 never used as an address
262 (these are address bits
265 unsigned int rsvd_3:1; /* must be zero */
267 /* address bits 27:4 are payload */
268 /* these next 24 (58-81) bits become bytes 12-14 of msg */
269 /* bits 65:58 land in byte 12 */
270 unsigned int replied_to:1; /* sent as 0 by the source to
273 unsigned int msg_type:3; /* software type of the
276 unsigned int canceled:1; /* message canceled, resource
279 unsigned int payload_1a:1; /* not currently used */
281 unsigned int payload_1b:2; /* not currently used */
284 /* bits 73:66 land in byte 13 */
285 unsigned int payload_1ca:6; /* not currently used */
287 unsigned int payload_1c:2; /* not currently used */
290 /* bits 81:74 land in byte 14 */
291 unsigned int payload_1d:6; /* not currently used */
293 unsigned int payload_1e:2; /* not currently used */
296 unsigned int rsvd_4:7; /* must be zero */
298 unsigned int swack_flag:1; /* software acknowledge flag */
300 /* INTD trasactions at
301 destination are to wait for
302 software acknowledge */
303 unsigned int rsvd_5:6; /* must be zero */
305 unsigned int rsvd_6:5; /* must be zero */
307 unsigned int int_both:1; /* if 1, interrupt both sockets
310 unsigned int fairness:3; /* usually zero */
312 unsigned int multilevel:1; /* multi-level multicast
315 /* 0 for TLB: endpoint multi-unicast messages */
316 unsigned int chaining:1; /* next descriptor is part of
319 unsigned int rsvd_7:21; /* must be zero */
324 * UV2 Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
325 * see figure 9-2 of harp_sys.pdf
326 * assuming UV3 is the same
328 struct uv2_3_bau_msg_header {
329 unsigned int base_dest_nasid:15; /* nasid of the first bit */
330 /* bits 14:0 */ /* in uvhub map */
331 unsigned int dest_subnodeid:5; /* must be 0x10, for the LB */
333 unsigned int rsvd_1:1; /* must be zero */
335 /* Address bits 59:21 */
336 /* bits 25:2 of address (44:21) are payload */
337 /* these next 24 bits become bytes 12-14 of msg */
338 /* bits 28:21 land in byte 12 */
339 unsigned int replied_to:1; /* sent as 0 by the source to
342 unsigned int msg_type:3; /* software type of the
345 unsigned int canceled:1; /* message canceled, resource
348 unsigned int payload_1:3; /* not currently used */
351 /* bits 36:29 land in byte 13 */
352 unsigned int payload_2a:3; /* not currently used */
353 unsigned int payload_2b:5; /* not currently used */
356 /* bits 44:37 land in byte 14 */
357 unsigned int payload_3:8; /* not currently used */
360 unsigned int rsvd_2:7; /* reserved */
362 unsigned int swack_flag:1; /* software acknowledge flag */
364 unsigned int rsvd_3a:3; /* must be zero */
365 unsigned int rsvd_3b:8; /* must be zero */
366 unsigned int rsvd_3c:8; /* must be zero */
367 unsigned int rsvd_3d:3; /* must be zero */
369 unsigned int fairness:3; /* usually zero */
372 unsigned int sequence:16; /* message sequence number */
373 /* bits 93:78 Suppl_A */
374 unsigned int chaining:1; /* next descriptor is part of
377 unsigned int multilevel:1; /* multi-level multicast
380 unsigned int rsvd_4:24; /* ordered / source node /
381 source subnode / aging
384 unsigned int command:8; /* message type */
389 * The activation descriptor:
390 * The format of the message to send, plus all accompanying control
394 struct pnmask distribution;
396 * message template, consisting of header and payload:
398 union bau_msg_header {
399 struct uv1_bau_msg_header uv1_hdr;
400 struct uv2_3_bau_msg_header uv2_3_hdr;
403 struct bau_msg_payload payload;
406 * -payload-- ---------header------
407 * bytes 0-11 bits 41-56 bits 58-81
410 * A/B/C are moved to:
412 * bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector)
413 * ------------payload queue-----------
416 * -payload-- ---------header------
417 * bytes 0-11 bits 70-78 bits 21-44
420 * A/B/C are moved to:
422 * bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector)
423 * ------------payload queue-----------
427 * The payload queue on the destination side is an array of these.
428 * With BAU_MISC_CONTROL set for software acknowledge mode, the messages
429 * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17
430 * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120)
431 * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from
432 * swack_vec and payload_2)
433 * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software
434 * Acknowledge Processing) also selects 32 byte (17 bytes usable) payload
437 struct bau_pq_entry {
438 unsigned long address; /* signifies a page or all TLB's
440 /* 64 bits, bytes 0-7 */
441 unsigned short sending_cpu; /* cpu that sent the message */
442 /* 16 bits, bytes 8-9 */
443 unsigned short acknowledge_count; /* filled in by destination */
444 /* 16 bits, bytes 10-11 */
445 /* these next 3 bytes come from bits 58-81 of the message header */
446 unsigned short replied_to:1; /* sent as 0 by the source */
447 unsigned short msg_type:3; /* software message type */
448 unsigned short canceled:1; /* sent as 0 by the source */
449 unsigned short unused1:3; /* not currently using */
451 unsigned char unused2a; /* not currently using */
453 unsigned char unused2; /* not currently using */
455 unsigned char swack_vec; /* filled in by the hardware */
456 /* byte 15 (bits 127:120) */
457 unsigned short sequence; /* message sequence number */
459 unsigned char unused4[2]; /* not currently using bytes 18-19 */
461 int number_of_cpus; /* filled in at destination */
462 /* 32 bits, bytes 20-23 (aligned) */
463 unsigned char unused5[8]; /* not using */
468 struct bau_pq_entry *msg;
470 struct bau_pq_entry *queue_first;
471 struct bau_pq_entry *queue_last;
479 * This structure is allocated per_cpu for UV TLB shootdown statistics.
482 /* sender statistics */
483 unsigned long s_giveup; /* number of fall backs to
485 unsigned long s_requestor; /* number of shootdown
487 unsigned long s_stimeout; /* source side timeouts */
488 unsigned long s_dtimeout; /* destination side timeouts */
489 unsigned long s_strongnacks; /* number of strong nack's */
490 unsigned long s_time; /* time spent in sending side */
491 unsigned long s_retriesok; /* successful retries */
492 unsigned long s_ntargcpu; /* total number of cpu's
494 unsigned long s_ntargself; /* times the sending cpu was
496 unsigned long s_ntarglocals; /* targets of cpus on the local
498 unsigned long s_ntargremotes; /* targets of cpus on remote
500 unsigned long s_ntarglocaluvhub; /* targets of the local hub */
501 unsigned long s_ntargremoteuvhub; /* remotes hubs targeted */
502 unsigned long s_ntarguvhub; /* total number of uvhubs
504 unsigned long s_ntarguvhub16; /* number of times target
506 unsigned long s_ntarguvhub8; /* number of times target
508 unsigned long s_ntarguvhub4; /* number of times target
510 unsigned long s_ntarguvhub2; /* number of times target
512 unsigned long s_ntarguvhub1; /* number of times target
514 unsigned long s_resets_plug; /* ipi-style resets from plug
516 unsigned long s_resets_timeout; /* ipi-style resets from
518 unsigned long s_busy; /* status stayed busy past
520 unsigned long s_throttles; /* waits in throttle */
521 unsigned long s_retry_messages; /* retry broadcasts */
522 unsigned long s_bau_reenabled; /* for bau enable/disable */
523 unsigned long s_bau_disabled; /* for bau enable/disable */
524 unsigned long s_uv2_wars; /* uv2 workaround, perm. busy */
525 unsigned long s_uv2_wars_hw; /* uv2 workaround, hiwater */
526 unsigned long s_uv2_war_waits; /* uv2 workaround, long waits */
527 unsigned long s_overipilimit; /* over the ipi reset limit */
528 unsigned long s_giveuplimit; /* disables, over giveup limit*/
529 unsigned long s_enters; /* entries to the driver */
530 unsigned long s_ipifordisabled; /* fall back to IPI; disabled */
531 unsigned long s_plugged; /* plugged by h/w bug*/
532 unsigned long s_congested; /* giveup on long wait */
533 /* destination statistics */
534 unsigned long d_alltlb; /* times all tlb's on this
536 unsigned long d_onetlb; /* times just one tlb on this
538 unsigned long d_multmsg; /* interrupts with multiple
540 unsigned long d_nomsg; /* interrupts with no message */
541 unsigned long d_time; /* time spent on destination
543 unsigned long d_requestee; /* number of messages
545 unsigned long d_retries; /* number of retry messages
547 unsigned long d_canceled; /* number of messages canceled
549 unsigned long d_nocanceled; /* retries that found nothing
551 unsigned long d_resets; /* number of ipi-style requests
553 unsigned long d_rcanceled; /* number of messages canceled
562 struct hub_and_pnode {
569 short cpu_number[MAX_CPUS_PER_SOCKET];
573 unsigned short socket_mask;
577 struct socket_desc socket[2];
581 * one per-cpu; to locate the software tables
584 struct bau_desc *descriptor_base;
585 struct bau_pq_entry *queue_first;
586 struct bau_pq_entry *queue_last;
587 struct bau_pq_entry *bau_msg_head;
588 struct bau_control *uvhub_master;
589 struct bau_control *socket_master;
590 struct ptc_stats *statp;
592 unsigned long timeout_interval;
593 unsigned long set_bau_on_time;
594 atomic_t active_descriptor_count;
606 short cpus_in_socket;
608 short partition_base_pnode;
609 short busy; /* all were busy (war) */
610 unsigned short message_number;
611 unsigned short uvhub_quiesce;
612 short socket_acknowledge_count[DEST_Q_SIZE];
613 cycles_t send_message;
615 cycles_t period_time;
616 spinlock_t uvhub_lock;
617 spinlock_t queue_lock;
618 spinlock_t disable_lock;
621 int max_concurr_const;
626 int complete_threshold;
627 int cong_response_us;
629 cycles_t disabled_period;
632 long period_requests;
633 struct hub_and_pnode *thp;
636 static inline void write_mmr_data_broadcast(int pnode, unsigned long mmr_image)
638 write_gmmr(pnode, UVH_BAU_DATA_BROADCAST, mmr_image);
641 static inline void write_mmr_descriptor_base(int pnode, unsigned long mmr_image)
643 write_gmmr(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE, mmr_image);
646 static inline void write_mmr_activation(unsigned long index)
648 write_lmmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
651 static inline void write_gmmr_activation(int pnode, unsigned long mmr_image)
653 write_gmmr(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL, mmr_image);
656 static inline void write_mmr_payload_first(int pnode, unsigned long mmr_image)
658 write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, mmr_image);
661 static inline void write_mmr_payload_tail(int pnode, unsigned long mmr_image)
663 write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL, mmr_image);
666 static inline void write_mmr_payload_last(int pnode, unsigned long mmr_image)
668 write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST, mmr_image);
671 static inline void write_mmr_misc_control(int pnode, unsigned long mmr_image)
673 write_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
676 static inline unsigned long read_mmr_misc_control(int pnode)
678 return read_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL);
681 static inline void write_mmr_sw_ack(unsigned long mr)
683 uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr);
686 static inline void write_gmmr_sw_ack(int pnode, unsigned long mr)
688 write_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr);
691 static inline unsigned long read_mmr_sw_ack(void)
693 return read_lmmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
696 static inline unsigned long read_gmmr_sw_ack(int pnode)
698 return read_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
701 static inline void write_mmr_data_config(int pnode, unsigned long mr)
703 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, mr);
706 static inline int bau_uvhub_isset(int uvhub, struct pnmask *dstp)
708 return constant_test_bit(uvhub, &dstp->bits[0]);
710 static inline void bau_uvhub_set(int pnode, struct pnmask *dstp)
712 __set_bit(pnode, &dstp->bits[0]);
714 static inline void bau_uvhubs_clear(struct pnmask *dstp,
717 bitmap_zero(&dstp->bits[0], nbits);
719 static inline int bau_uvhub_weight(struct pnmask *dstp)
721 return bitmap_weight((unsigned long *)&dstp->bits[0],
722 UV_DISTRIBUTION_SIZE);
725 static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
727 bitmap_zero(&dstp->bits, nbits);
730 extern void uv_bau_message_intr1(void);
731 #ifdef CONFIG_TRACING
732 #define trace_uv_bau_message_intr1 uv_bau_message_intr1
734 extern void uv_bau_timeout_intr1(void);
736 struct atomic_short {
741 * atomic_read_short - read a short atomic variable
742 * @v: pointer of type atomic_short
744 * Atomically reads the value of @v.
746 static inline int atomic_read_short(const struct atomic_short *v)
752 * atom_asr - add and return a short int
753 * @i: short value to add
754 * @v: pointer of type atomic_short
756 * Atomically adds @i to @v and returns @i + @v
758 static inline int atom_asr(short i, struct atomic_short *v)
761 asm volatile(LOCK_PREFIX "xaddw %0, %1"
762 : "+r" (i), "+m" (v->counter)
768 * conditionally add 1 to *v, unless *v is >= u
769 * return 0 if we cannot add 1 to *v because it is >= u
770 * return 1 if we can add 1 to *v because it is < u
773 * This is close to atomic_add_unless(), but this allows the 'u' value
774 * to be lowered below the current 'v'. atomic_add_unless can only stop
777 static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
780 if (atomic_read(v) >= u) {
789 #endif /* _ASM_X86_UV_UV_BAU_H */