arch/x86/kernel/devicetree.c

   1 /*
   2  * Architecture specific OF callbacks.
   3  */
   4 #include <linux/bootmem.h>
   5 #include <linux/export.h>
   6 #include <linux/io.h>
   7 #include <linux/irqdomain.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/list.h>
  10 #include <linux/of.h>
  11 #include <linux/of_fdt.h>
  12 #include <linux/of_address.h>
  13 #include <linux/of_platform.h>
  14 #include <linux/of_irq.h>
  15 #include <linux/slab.h>
  16 #include <linux/pci.h>
  17 #include <linux/of_pci.h>
  18 #include <linux/initrd.h>
  19
  20 #include <asm/hpet.h>
  21 #include <asm/apic.h>
  22 #include <asm/pci_x86.h>
  23
  24 __initdata u64 initial_dtb;
  25 char __initdata cmd_line[COMMAND_LINE_SIZE];
  26
  27 int __initdata of_ioapic;
  28
  29 unsigned long pci_address_to_pio(phys_addr_t address)
  30 {
  31         /*
  32          * The ioport address can be directly used by inX / outX
  33          */
  34         BUG_ON(address >= (1 << 16));
  35         return (unsigned long)address;
  36 }
  37 EXPORT_SYMBOL_GPL(pci_address_to_pio);
  38
  39 void __init early_init_dt_scan_chosen_arch(unsigned long node)
  40 {
  41         BUG();
  42 }
  43
  44 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
  45 {
  46         BUG();
  47 }
  48
  49 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
  50 {
  51         return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
  52 }
  53
  54 #ifdef CONFIG_BLK_DEV_INITRD
  55 void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
  56 {
  57         initrd_start = (unsigned long)__va(start);
  58         initrd_end = (unsigned long)__va(end);
  59         initrd_below_start_ok = 1;
  60 }
  61 #endif
  62
  63 void __init add_dtb(u64 data)
  64 {
  65         initial_dtb = data + offsetof(struct setup_data, data);
  66 }
  67
  68 /*
  69  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
  70  */
  71 static struct of_device_id __initdata ce4100_ids[] = {
  72         { .compatible = "intel,ce4100-cp", },
  73         { .compatible = "isa", },
  74         { .compatible = "pci", },
  75         {},
  76 };
  77
  78 static int __init add_bus_probe(void)
  79 {
  80         if (!of_have_populated_dt())
  81                 return 0;
  82
  83         return of_platform_bus_probe(NULL, ce4100_ids, NULL);
  84 }
  85 module_init(add_bus_probe);
  86
  87 #ifdef CONFIG_PCI
  88 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
  89 {
  90         struct device_node *np;
  91
  92         for_each_node_by_type(np, "pci") {
  93                 const void *prop;
  94                 unsigned int bus_min;
  95
  96                 prop = of_get_property(np, "bus-range", NULL);
  97                 if (!prop)
  98                         continue;
  99                 bus_min = be32_to_cpup(prop);
 100                 if (bus->number == bus_min)
 101                         return np;
 102         }
 103         return NULL;
 104 }
 105
 106 static int x86_of_pci_irq_enable(struct pci_dev *dev)
 107 {
 108         struct of_irq oirq;
 109         u32 virq;
 110         int ret;
 111         u8 pin;
 112
 113         ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 114         if (ret)
 115                 return ret;
 116         if (!pin)
 117                 return 0;
 118
 119         ret = of_irq_map_pci(dev, &oirq);
 120         if (ret)
 121                 return ret;
 122
 123         virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
 124                         oirq.size);
 125         if (virq == 0)
 126                 return -EINVAL;
 127         dev->irq = virq;
 128         return 0;
 129 }
 130
 131 static void x86_of_pci_irq_disable(struct pci_dev *dev)
 132 {
 133 }
 134
 135 void x86_of_pci_init(void)
 136 {
 137         pcibios_enable_irq = x86_of_pci_irq_enable;
 138         pcibios_disable_irq = x86_of_pci_irq_disable;
 139 }
 140 #endif
 141
 142 static void __init dtb_setup_hpet(void)
 143 {
 144 #ifdef CONFIG_HPET_TIMER
 145         struct device_node *dn;
 146         struct resource r;
 147         int ret;
 148
 149         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
 150         if (!dn)
 151                 return;
 152         ret = of_address_to_resource(dn, 0, &r);
 153         if (ret) {
 154                 WARN_ON(1);
 155                 return;
 156         }
 157         hpet_address = r.start;
 158 #endif
 159 }
 160
 161 static void __init dtb_lapic_setup(void)
 162 {
 163 #ifdef CONFIG_X86_LOCAL_APIC
 164         struct device_node *dn;
 165         struct resource r;
 166         int ret;
 167
 168         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
 169         if (!dn)
 170                 return;
 171
 172         ret = of_address_to_resource(dn, 0, &r);
 173         if (WARN_ON(ret))
 174                 return;
 175
 176         /* Did the boot loader setup the local APIC ? */
 177         if (!cpu_has_apic) {
 178                 if (apic_force_enable(r.start))
 179                         return;
 180         }
 181         smp_found_config = 1;
 182         pic_mode = 1;
 183         register_lapic_address(r.start);
 184         generic_processor_info(boot_cpu_physical_apicid,
 185                                GET_APIC_VERSION(apic_read(APIC_LVR)));
 186 #endif
 187 }
 188
 189 #ifdef CONFIG_X86_IO_APIC
 190 static unsigned int ioapic_id;
 191
 192 static void __init dtb_add_ioapic(struct device_node *dn)
 193 {
 194         struct resource r;
 195         int ret;
 196
 197         ret = of_address_to_resource(dn, 0, &r);
 198         if (ret) {
 199                 printk(KERN_ERR "Can't obtain address from node %s.\n",
 200                                 dn->full_name);
 201                 return;
 202         }
 203         mp_register_ioapic(++ioapic_id, r.start, gsi_top);
 204 }
 205
 206 static void __init dtb_ioapic_setup(void)
 207 {
 208         struct device_node *dn;
 209
 210         for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
 211                 dtb_add_ioapic(dn);
 212
 213         if (nr_ioapics) {
 214                 of_ioapic = 1;
 215                 return;
 216         }
 217         printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
 218 }
 219 #else
 220 static void __init dtb_ioapic_setup(void) {}
 221 #endif
 222
 223 static void __init dtb_apic_setup(void)
 224 {
 225         dtb_lapic_setup();
 226         dtb_ioapic_setup();
 227 }
 228
 229 #ifdef CONFIG_OF_FLATTREE
 230 static void __init x86_flattree_get_config(void)
 231 {
 232         u32 size, map_len;
 233         void *new_dtb;
 234
 235         if (!initial_dtb)
 236                 return;
 237
 238         map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
 239                         (u64)sizeof(struct boot_param_header));
 240
 241         initial_boot_params = early_memremap(initial_dtb, map_len);
 242         size = be32_to_cpu(initial_boot_params->totalsize);
 243         if (map_len < size) {
 244                 early_iounmap(initial_boot_params, map_len);
 245                 initial_boot_params = early_memremap(initial_dtb, size);
 246                 map_len = size;
 247         }
 248
 249         new_dtb = alloc_bootmem(size);
 250         memcpy(new_dtb, initial_boot_params, size);
 251         early_iounmap(initial_boot_params, map_len);
 252
 253         initial_boot_params = new_dtb;
 254
 255         /* root level address cells */
 256         of_scan_flat_dt(early_init_dt_scan_root, NULL);
 257
 258         unflatten_device_tree();
 259 }
 260 #else
 261 static inline void x86_flattree_get_config(void) { }
 262 #endif
 263
 264 void __init x86_dtb_init(void)
 265 {
 266         x86_flattree_get_config();
 267
 268         if (!of_have_populated_dt())
 269                 return;
 270
 271         dtb_setup_hpet();
 272         dtb_apic_setup();
 273 }
 274
 275 #ifdef CONFIG_X86_IO_APIC
 276
 277 struct of_ioapic_type {
 278         u32 out_type;
 279         u32 trigger;
 280         u32 polarity;
 281 };
 282
 283 static struct of_ioapic_type of_ioapic_type[] =
 284 {
 285         {
 286                 .out_type       = IRQ_TYPE_EDGE_RISING,
 287                 .trigger        = IOAPIC_EDGE,
 288                 .polarity       = 1,
 289         },
 290         {
 291                 .out_type       = IRQ_TYPE_LEVEL_LOW,
 292                 .trigger        = IOAPIC_LEVEL,
 293                 .polarity       = 0,
 294         },
 295         {
 296                 .out_type       = IRQ_TYPE_LEVEL_HIGH,
 297                 .trigger        = IOAPIC_LEVEL,
 298                 .polarity       = 1,
 299         },
 300         {
 301                 .out_type       = IRQ_TYPE_EDGE_FALLING,
 302                 .trigger        = IOAPIC_EDGE,
 303                 .polarity       = 0,
 304         },
 305 };
 306
 307 static int ioapic_xlate(struct irq_domain *domain,
 308                         struct device_node *controller,
 309                         const u32 *intspec, u32 intsize,
 310                         irq_hw_number_t *out_hwirq, u32 *out_type)
 311 {
 312         struct io_apic_irq_attr attr;
 313         struct of_ioapic_type *it;
 314         u32 line, idx;
 315         int rc;
 316
 317         if (WARN_ON(intsize < 2))
 318                 return -EINVAL;
 319
 320         line = intspec[0];
 321
 322         if (intspec[1] >= ARRAY_SIZE(of_ioapic_type))
 323                 return -EINVAL;
 324
 325         it = &of_ioapic_type[intspec[1]];
 326
 327         idx = (u32) domain->host_data;
 328         set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
 329
 330         rc = io_apic_setup_irq_pin_once(irq_find_mapping(domain, line),
 331                                         cpu_to_node(0), &attr);
 332         if (rc)
 333                 return rc;
 334
 335         *out_hwirq = line;
 336         *out_type = it->out_type;
 337         return 0;
 338 }
 339
 340 const struct irq_domain_ops ioapic_irq_domain_ops = {
 341         .xlate = ioapic_xlate,
 342 };
 343
 344 static void dt_add_ioapic_domain(unsigned int ioapic_num,
 345                 struct device_node *np)
 346 {
 347         struct irq_domain *id;
 348         struct mp_ioapic_gsi *gsi_cfg;
 349         int ret;
 350         int num;
 351
 352         gsi_cfg = mp_ioapic_gsi_routing(ioapic_num);
 353         num = gsi_cfg->gsi_end - gsi_cfg->gsi_base + 1;
 354
 355         id = irq_domain_add_linear(np, num, &ioapic_irq_domain_ops,
 356                         (void *)ioapic_num);
 357         BUG_ON(!id);
 358         if (gsi_cfg->gsi_base == 0) {
 359                 /*
 360                  * The first NR_IRQS_LEGACY irq descs are allocated in
 361                  * early_irq_init() and need just a mapping. The
 362                  * remaining irqs need both. All of them are preallocated
 363                  * and assigned so we can keep the 1:1 mapping which the ioapic
 364                  * is having.
 365                  */
 366                 irq_domain_associate_many(id, 0, 0, NR_IRQS_LEGACY);
 367
 368                 if (num > NR_IRQS_LEGACY) {
 369                         ret = irq_create_strict_mappings(id, NR_IRQS_LEGACY,
 370                                         NR_IRQS_LEGACY, num - NR_IRQS_LEGACY);
 371                         if (ret)
 372                                 pr_err("Error creating mapping for the "
 373                                                 "remaining IRQs: %d\n", ret);
 374                 }
 375                 irq_set_default_host(id);
 376         } else {
 377                 ret = irq_create_strict_mappings(id, gsi_cfg->gsi_base, 0, num);
 378                 if (ret)
 379                         pr_err("Error creating IRQ mapping: %d\n", ret);
 380         }
 381 }
 382
 383 static void __init ioapic_add_ofnode(struct device_node *np)
 384 {
 385         struct resource r;
 386         int i, ret;
 387
 388         ret = of_address_to_resource(np, 0, &r);
 389         if (ret) {
 390                 printk(KERN_ERR "Failed to obtain address for %s\n",
 391                                 np->full_name);
 392                 return;
 393         }
 394
 395         for (i = 0; i < nr_ioapics; i++) {
 396                 if (r.start == mpc_ioapic_addr(i)) {
 397                         dt_add_ioapic_domain(i, np);
 398                         return;
 399                 }
 400         }
 401         printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
 402 }
 403
 404 void __init x86_add_irq_domains(void)
 405 {
 406         struct device_node *dp;
 407
 408         if (!of_have_populated_dt())
 409                 return;
 410
 411         for_each_node_with_property(dp, "interrupt-controller") {
 412                 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
 413                         ioapic_add_ofnode(dp);
 414         }
 415 }
 416 #else
 417 void __init x86_add_irq_domains(void) { }
 418 #endif