arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11 #include <linux/slab.h>
  12
  13 #include <asm/sigcontext.h>
  14 #include <asm/processor.h>
  15 #include <asm/math_emu.h>
  16 #include <asm/tlbflush.h>
  17 #include <asm/uaccess.h>
  18 #include <asm/ptrace.h>
  19 #include <asm/i387.h>
  20 #include <asm/fpu-internal.h>
  21 #include <asm/user.h>
  22
  23 static DEFINE_PER_CPU(bool, in_kernel_fpu);
  24
  25 void kernel_fpu_disable(void)
  26 {
  27         WARN_ON(this_cpu_read(in_kernel_fpu));
  28         this_cpu_write(in_kernel_fpu, true);
  29 }
  30
  31 void kernel_fpu_enable(void)
  32 {
  33         this_cpu_write(in_kernel_fpu, false);
  34 }
  35
  36 /*
  37  * Were we in an interrupt that interrupted kernel mode?
  38  *
  39  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
  40  * pair does nothing at all: the thread must not have fpu (so
  41  * that we don't try to save the FPU state), and TS must
  42  * be set (so that the clts/stts pair does nothing that is
  43  * visible in the interrupted kernel thread).
  44  *
  45  * Except for the eagerfpu case when we return 1 unless we've already
  46  * been eager and saved the state in kernel_fpu_begin().
  47  */
  48 static inline bool interrupted_kernel_fpu_idle(void)
  49 {
  50         if (this_cpu_read(in_kernel_fpu))
  51                 return false;
  52
  53         if (use_eager_fpu())
  54                 return __thread_has_fpu(current);
  55
  56         return !__thread_has_fpu(current) &&
  57                 (read_cr0() & X86_CR0_TS);
  58 }
  59
  60 /*
  61  * Were we in user mode (or vm86 mode) when we were
  62  * interrupted?
  63  *
  64  * Doing kernel_fpu_begin/end() is ok if we are running
  65  * in an interrupt context from user mode - we'll just
  66  * save the FPU state as required.
  67  */
  68 static inline bool interrupted_user_mode(void)
  69 {
  70         struct pt_regs *regs = get_irq_regs();
  71         return regs && user_mode_vm(regs);
  72 }
  73
  74 /*
  75  * Can we use the FPU in kernel mode with the
  76  * whole "kernel_fpu_begin/end()" sequence?
  77  *
  78  * It's always ok in process context (ie "not interrupt")
  79  * but it is sometimes ok even from an irq.
  80  */
  81 bool irq_fpu_usable(void)
  82 {
  83         return !in_interrupt() ||
  84                 interrupted_user_mode() ||
  85                 interrupted_kernel_fpu_idle();
  86 }
  87 EXPORT_SYMBOL(irq_fpu_usable);
  88
  89 void __kernel_fpu_begin(void)
  90 {
  91         struct task_struct *me = current;
  92
  93         this_cpu_write(in_kernel_fpu, true);
  94
  95         if (__thread_has_fpu(me)) {
  96                 __save_init_fpu(me);
  97         } else if (!use_eager_fpu()) {
  98                 this_cpu_write(fpu_owner_task, NULL);
  99                 clts();
 100         }
 101 }
 102 EXPORT_SYMBOL(__kernel_fpu_begin);
 103
 104 void __kernel_fpu_end(void)
 105 {
 106         struct task_struct *me = current;
 107
 108         if (__thread_has_fpu(me)) {
 109                 if (WARN_ON(restore_fpu_checking(me)))
 110                         drop_init_fpu(me);
 111         } else if (!use_eager_fpu()) {
 112                 stts();
 113         }
 114
 115         this_cpu_write(in_kernel_fpu, false);
 116 }
 117 EXPORT_SYMBOL(__kernel_fpu_end);
 118
 119 void unlazy_fpu(struct task_struct *tsk)
 120 {
 121         preempt_disable();
 122         if (__thread_has_fpu(tsk)) {
 123                 __save_init_fpu(tsk);
 124                 __thread_fpu_end(tsk);
 125         } else
 126                 tsk->thread.fpu_counter = 0;
 127         preempt_enable();
 128 }
 129 EXPORT_SYMBOL(unlazy_fpu);
 130
 131 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
 132 unsigned int xstate_size;
 133 EXPORT_SYMBOL_GPL(xstate_size);
 134 static struct i387_fxsave_struct fx_scratch;
 135
 136 static void mxcsr_feature_mask_init(void)
 137 {
 138         unsigned long mask = 0;
 139
 140         if (cpu_has_fxsr) {
 141                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
 142                 asm volatile("fxsave %0" : "+m" (fx_scratch));
 143                 mask = fx_scratch.mxcsr_mask;
 144                 if (mask == 0)
 145                         mask = 0x0000ffbf;
 146         }
 147         mxcsr_feature_mask &= mask;
 148 }
 149
 150 static void init_thread_xstate(void)
 151 {
 152         /*
 153          * Note that xstate_size might be overwriten later during
 154          * xsave_init().
 155          */
 156
 157         if (!cpu_has_fpu) {
 158                 /*
 159                  * Disable xsave as we do not support it if i387
 160                  * emulation is enabled.
 161                  */
 162                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
 163                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
 164                 xstate_size = sizeof(struct i387_soft_struct);
 165                 return;
 166         }
 167
 168         if (cpu_has_fxsr)
 169                 xstate_size = sizeof(struct i387_fxsave_struct);
 170         else
 171                 xstate_size = sizeof(struct i387_fsave_struct);
 172 }
 173
 174 /*
 175  * Called at bootup to set up the initial FPU state that is later cloned
 176  * into all processes.
 177  */
 178
 179 void fpu_init(void)
 180 {
 181         unsigned long cr0;
 182         unsigned long cr4_mask = 0;
 183
 184 #ifndef CONFIG_MATH_EMULATION
 185         if (!cpu_has_fpu) {
 186                 pr_emerg("No FPU found and no math emulation present\n");
 187                 pr_emerg("Giving up\n");
 188                 for (;;)
 189                         asm volatile("hlt");
 190         }
 191 #endif
 192         if (cpu_has_fxsr)
 193                 cr4_mask |= X86_CR4_OSFXSR;
 194         if (cpu_has_xmm)
 195                 cr4_mask |= X86_CR4_OSXMMEXCPT;
 196         if (cr4_mask)
 197                 cr4_set_bits(cr4_mask);
 198
 199         cr0 = read_cr0();
 200         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
 201         if (!cpu_has_fpu)
 202                 cr0 |= X86_CR0_EM;
 203         write_cr0(cr0);
 204
 205         /*
 206          * init_thread_xstate is only called once to avoid overriding
 207          * xstate_size during boot time or during CPU hotplug.
 208          */
 209         if (xstate_size == 0)
 210                 init_thread_xstate();
 211
 212         mxcsr_feature_mask_init();
 213         xsave_init();
 214         eager_fpu_init();
 215 }
 216
 217 void fpu_finit(struct fpu *fpu)
 218 {
 219         if (!cpu_has_fpu) {
 220                 finit_soft_fpu(&fpu->state->soft);
 221                 return;
 222         }
 223
 224         if (cpu_has_fxsr) {
 225                 fx_finit(&fpu->state->fxsave);
 226         } else {
 227                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 228                 memset(fp, 0, xstate_size);
 229                 fp->cwd = 0xffff037fu;
 230                 fp->swd = 0xffff0000u;
 231                 fp->twd = 0xffffffffu;
 232                 fp->fos = 0xffff0000u;
 233         }
 234 }
 235 EXPORT_SYMBOL_GPL(fpu_finit);
 236
 237 /*
 238  * The _current_ task is using the FPU for the first time
 239  * so initialize it and set the mxcsr to its default
 240  * value at reset if we support XMM instructions and then
 241  * remember the current task has used the FPU.
 242  */
 243 int init_fpu(struct task_struct *tsk)
 244 {
 245         int ret;
 246
 247         if (tsk_used_math(tsk)) {
 248                 if (cpu_has_fpu && tsk == current)
 249                         unlazy_fpu(tsk);
 250                 tsk->thread.fpu.last_cpu = ~0;
 251                 return 0;
 252         }
 253
 254         /*
 255          * Memory allocation at the first usage of the FPU and other state.
 256          */
 257         ret = fpu_alloc(&tsk->thread.fpu);
 258         if (ret)
 259                 return ret;
 260
 261         fpu_finit(&tsk->thread.fpu);
 262
 263         set_stopped_child_used_math(tsk);
 264         return 0;
 265 }
 266 EXPORT_SYMBOL_GPL(init_fpu);
 267
 268 /*
 269  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 270  * as the "regset->n" for the xstate regset will be updated based on the feature
 271  * capabilites supported by the xsave.
 272  */
 273 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 274 {
 275         return tsk_used_math(target) ? regset->n : 0;
 276 }
 277
 278 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 279 {
 280         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 281 }
 282
 283 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 284                 unsigned int pos, unsigned int count,
 285                 void *kbuf, void __user *ubuf)
 286 {
 287         int ret;
 288
 289         if (!cpu_has_fxsr)
 290                 return -ENODEV;
 291
 292         ret = init_fpu(target);
 293         if (ret)
 294                 return ret;
 295
 296         sanitize_i387_state(target);
 297
 298         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 299                                    &target->thread.fpu.state->fxsave, 0, -1);
 300 }
 301
 302 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 303                 unsigned int pos, unsigned int count,
 304                 const void *kbuf, const void __user *ubuf)
 305 {
 306         int ret;
 307
 308         if (!cpu_has_fxsr)
 309                 return -ENODEV;
 310
 311         ret = init_fpu(target);
 312         if (ret)
 313                 return ret;
 314
 315         sanitize_i387_state(target);
 316
 317         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 318                                  &target->thread.fpu.state->fxsave, 0, -1);
 319
 320         /*
 321          * mxcsr reserved bits must be masked to zero for security reasons.
 322          */
 323         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 324
 325         /*
 326          * update the header bits in the xsave header, indicating the
 327          * presence of FP and SSE state.
 328          */
 329         if (cpu_has_xsave)
 330                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 331
 332         return ret;
 333 }
 334
 335 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 336                 unsigned int pos, unsigned int count,
 337                 void *kbuf, void __user *ubuf)
 338 {
 339         int ret;
 340
 341         if (!cpu_has_xsave)
 342                 return -ENODEV;
 343
 344         ret = init_fpu(target);
 345         if (ret)
 346                 return ret;
 347
 348         /*
 349          * Copy the 48bytes defined by the software first into the xstate
 350          * memory layout in the thread struct, so that we can copy the entire
 351          * xstateregs to the user using one user_regset_copyout().
 352          */
 353         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
 354                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 355
 356         /*
 357          * Copy the xstate memory layout.
 358          */
 359         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 360                                   &target->thread.fpu.state->xsave, 0, -1);
 361         return ret;
 362 }
 363
 364 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 365                   unsigned int pos, unsigned int count,
 366                   const void *kbuf, const void __user *ubuf)
 367 {
 368         int ret;
 369         struct xsave_hdr_struct *xsave_hdr;
 370
 371         if (!cpu_has_xsave)
 372                 return -ENODEV;
 373
 374         ret = init_fpu(target);
 375         if (ret)
 376                 return ret;
 377
 378         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 379                                  &target->thread.fpu.state->xsave, 0, -1);
 380
 381         /*
 382          * mxcsr reserved bits must be masked to zero for security reasons.
 383          */
 384         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 385
 386         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
 387
 388         xsave_hdr->xstate_bv &= pcntxt_mask;
 389         /*
 390          * These bits must be zero.
 391          */
 392         memset(xsave_hdr->reserved, 0, 48);
 393
 394         return ret;
 395 }
 396
 397 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 398
 399 /*
 400  * FPU tag word conversions.
 401  */
 402
 403 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 404 {
 405         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 406
 407         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 408         tmp = ~twd;
 409         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 410         /* and move the valid bits to the lower byte. */
 411         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 412         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 413         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 414
 415         return tmp;
 416 }
 417
 418 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
 419 #define FP_EXP_TAG_VALID        0
 420 #define FP_EXP_TAG_ZERO         1
 421 #define FP_EXP_TAG_SPECIAL      2
 422 #define FP_EXP_TAG_EMPTY        3
 423
 424 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 425 {
 426         struct _fpxreg *st;
 427         u32 tos = (fxsave->swd >> 11) & 7;
 428         u32 twd = (unsigned long) fxsave->twd;
 429         u32 tag;
 430         u32 ret = 0xffff0000u;
 431         int i;
 432
 433         for (i = 0; i < 8; i++, twd >>= 1) {
 434                 if (twd & 0x1) {
 435                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 436
 437                         switch (st->exponent & 0x7fff) {
 438                         case 0x7fff:
 439                                 tag = FP_EXP_TAG_SPECIAL;
 440                                 break;
 441                         case 0x0000:
 442                                 if (!st->significand[0] &&
 443                                     !st->significand[1] &&
 444                                     !st->significand[2] &&
 445                                     !st->significand[3])
 446                                         tag = FP_EXP_TAG_ZERO;
 447                                 else
 448                                         tag = FP_EXP_TAG_SPECIAL;
 449                                 break;
 450                         default:
 451                                 if (st->significand[3] & 0x8000)
 452                                         tag = FP_EXP_TAG_VALID;
 453                                 else
 454                                         tag = FP_EXP_TAG_SPECIAL;
 455                                 break;
 456                         }
 457                 } else {
 458                         tag = FP_EXP_TAG_EMPTY;
 459                 }
 460                 ret |= tag << (2 * i);
 461         }
 462         return ret;
 463 }
 464
 465 /*
 466  * FXSR floating point environment conversions.
 467  */
 468
 469 void
 470 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 471 {
 472         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 473         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 474         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 475         int i;
 476
 477         env->cwd = fxsave->cwd | 0xffff0000u;
 478         env->swd = fxsave->swd | 0xffff0000u;
 479         env->twd = twd_fxsr_to_i387(fxsave);
 480
 481 #ifdef CONFIG_X86_64
 482         env->fip = fxsave->rip;
 483         env->foo = fxsave->rdp;
 484         /*
 485          * should be actually ds/cs at fpu exception time, but
 486          * that information is not available in 64bit mode.
 487          */
 488         env->fcs = task_pt_regs(tsk)->cs;
 489         if (tsk == current) {
 490                 savesegment(ds, env->fos);
 491         } else {
 492                 env->fos = tsk->thread.ds;
 493         }
 494         env->fos |= 0xffff0000;
 495 #else
 496         env->fip = fxsave->fip;
 497         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 498         env->foo = fxsave->foo;
 499         env->fos = fxsave->fos;
 500 #endif
 501
 502         for (i = 0; i < 8; ++i)
 503                 memcpy(&to[i], &from[i], sizeof(to[0]));
 504 }
 505
 506 void convert_to_fxsr(struct task_struct *tsk,
 507                      const struct user_i387_ia32_struct *env)
 508
 509 {
 510         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 511         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 512         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 513         int i;
 514
 515         fxsave->cwd = env->cwd;
 516         fxsave->swd = env->swd;
 517         fxsave->twd = twd_i387_to_fxsr(env->twd);
 518         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 519 #ifdef CONFIG_X86_64
 520         fxsave->rip = env->fip;
 521         fxsave->rdp = env->foo;
 522         /* cs and ds ignored */
 523 #else
 524         fxsave->fip = env->fip;
 525         fxsave->fcs = (env->fcs & 0xffff);
 526         fxsave->foo = env->foo;
 527         fxsave->fos = env->fos;
 528 #endif
 529
 530         for (i = 0; i < 8; ++i)
 531                 memcpy(&to[i], &from[i], sizeof(from[0]));
 532 }
 533
 534 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 535                unsigned int pos, unsigned int count,
 536                void *kbuf, void __user *ubuf)
 537 {
 538         struct user_i387_ia32_struct env;
 539         int ret;
 540
 541         ret = init_fpu(target);
 542         if (ret)
 543                 return ret;
 544
 545         if (!static_cpu_has(X86_FEATURE_FPU))
 546                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 547
 548         if (!cpu_has_fxsr)
 549                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 550                                            &target->thread.fpu.state->fsave, 0,
 551                                            -1);
 552
 553         sanitize_i387_state(target);
 554
 555         if (kbuf && pos == 0 && count == sizeof(env)) {
 556                 convert_from_fxsr(kbuf, target);
 557                 return 0;
 558         }
 559
 560         convert_from_fxsr(&env, target);
 561
 562         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 563 }
 564
 565 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 566                unsigned int pos, unsigned int count,
 567                const void *kbuf, const void __user *ubuf)
 568 {
 569         struct user_i387_ia32_struct env;
 570         int ret;
 571
 572         ret = init_fpu(target);
 573         if (ret)
 574                 return ret;
 575
 576         sanitize_i387_state(target);
 577
 578         if (!static_cpu_has(X86_FEATURE_FPU))
 579                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 580
 581         if (!cpu_has_fxsr)
 582                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 583                                           &target->thread.fpu.state->fsave, 0,
 584                                           -1);
 585
 586         if (pos > 0 || count < sizeof(env))
 587                 convert_from_fxsr(&env, target);
 588
 589         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 590         if (!ret)
 591                 convert_to_fxsr(target, &env);
 592
 593         /*
 594          * update the header bit in the xsave header, indicating the
 595          * presence of FP.
 596          */
 597         if (cpu_has_xsave)
 598                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 599         return ret;
 600 }
 601
 602 /*
 603  * FPU state for core dumps.
 604  * This is only used for a.out dumps now.
 605  * It is declared generically using elf_fpregset_t (which is
 606  * struct user_i387_struct) but is in fact only used for 32-bit
 607  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 608  */
 609 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 610 {
 611         struct task_struct *tsk = current;
 612         int fpvalid;
 613
 614         fpvalid = !!used_math();
 615         if (fpvalid)
 616                 fpvalid = !fpregs_get(tsk, NULL,
 617                                       0, sizeof(struct user_i387_ia32_struct),
 618                                       fpu, NULL);
 619
 620         return fpvalid;
 621 }
 622 EXPORT_SYMBOL(dump_fpu);
 623
 624 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
 625
 626 static int __init no_387(char *s)
 627 {
 628         setup_clear_cpu_cap(X86_FEATURE_FPU);
 629         return 1;
 630 }
 631
 632 __setup("no387", no_387);
 633
 634 void fpu_detect(struct cpuinfo_x86 *c)
 635 {
 636         unsigned long cr0;
 637         u16 fsw, fcw;
 638
 639         fsw = fcw = 0xffff;
 640
 641         cr0 = read_cr0();
 642         cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
 643         write_cr0(cr0);
 644
 645         asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
 646                      : "+m" (fsw), "+m" (fcw));
 647
 648         if (fsw == 0 && (fcw & 0x103f) == 0x003f)
 649                 set_cpu_cap(c, X86_FEATURE_FPU);
 650         else
 651                 clear_cpu_cap(c, X86_FEATURE_FPU);
 652
 653         /* The final cr0 value is set in fpu_init() */
 654 }