arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  91
  92 struct kvm_x86_ops *kvm_x86_ops;
  93 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  94
  95 static bool ignore_msrs = 0;
  96 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  97
  98 unsigned int min_timer_period_us = 500;
  99 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 100
 101 bool kvm_has_tsc_control;
 102 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 103 u32  kvm_max_guest_tsc_khz;
 104 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 105
 106 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 107 static u32 tsc_tolerance_ppm = 250;
 108 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 109
 110 static bool backwards_tsc_observed = false;
 111
 112 #define KVM_NR_SHARED_MSRS 16
 113
 114 struct kvm_shared_msrs_global {
 115         int nr;
 116         u32 msrs[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 struct kvm_shared_msrs {
 120         struct user_return_notifier urn;
 121         bool registered;
 122         struct kvm_shared_msr_values {
 123                 u64 host;
 124                 u64 curr;
 125         } values[KVM_NR_SHARED_MSRS];
 126 };
 127
 128 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 129 static struct kvm_shared_msrs __percpu *shared_msrs;
 130
 131 struct kvm_stats_debugfs_item debugfs_entries[] = {
 132         { "pf_fixed", VCPU_STAT(pf_fixed) },
 133         { "pf_guest", VCPU_STAT(pf_guest) },
 134         { "tlb_flush", VCPU_STAT(tlb_flush) },
 135         { "invlpg", VCPU_STAT(invlpg) },
 136         { "exits", VCPU_STAT(exits) },
 137         { "io_exits", VCPU_STAT(io_exits) },
 138         { "mmio_exits", VCPU_STAT(mmio_exits) },
 139         { "signal_exits", VCPU_STAT(signal_exits) },
 140         { "irq_window", VCPU_STAT(irq_window_exits) },
 141         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 142         { "halt_exits", VCPU_STAT(halt_exits) },
 143         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 144         { "hypercalls", VCPU_STAT(hypercalls) },
 145         { "request_irq", VCPU_STAT(request_irq_exits) },
 146         { "irq_exits", VCPU_STAT(irq_exits) },
 147         { "host_state_reload", VCPU_STAT(host_state_reload) },
 148         { "efer_reload", VCPU_STAT(efer_reload) },
 149         { "fpu_reload", VCPU_STAT(fpu_reload) },
 150         { "insn_emulation", VCPU_STAT(insn_emulation) },
 151         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 152         { "irq_injections", VCPU_STAT(irq_injections) },
 153         { "nmi_injections", VCPU_STAT(nmi_injections) },
 154         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 155         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 156         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 157         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 158         { "mmu_flooded", VM_STAT(mmu_flooded) },
 159         { "mmu_recycled", VM_STAT(mmu_recycled) },
 160         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 161         { "mmu_unsync", VM_STAT(mmu_unsync) },
 162         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 163         { "largepages", VM_STAT(lpages) },
 164         { NULL }
 165 };
 166
 167 u64 __read_mostly host_xcr0;
 168
 169 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 170
 171 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 172 {
 173         int i;
 174         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 175                 vcpu->arch.apf.gfns[i] = ~0;
 176 }
 177
 178 static void kvm_on_user_return(struct user_return_notifier *urn)
 179 {
 180         unsigned slot;
 181         struct kvm_shared_msrs *locals
 182                 = container_of(urn, struct kvm_shared_msrs, urn);
 183         struct kvm_shared_msr_values *values;
 184
 185         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 186                 values = &locals->values[slot];
 187                 if (values->host != values->curr) {
 188                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 189                         values->curr = values->host;
 190                 }
 191         }
 192         locals->registered = false;
 193         user_return_notifier_unregister(urn);
 194 }
 195
 196 static void shared_msr_update(unsigned slot, u32 msr)
 197 {
 198         u64 value;
 199         unsigned int cpu = smp_processor_id();
 200         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 201
 202         /* only read, and nobody should modify it at this time,
 203          * so don't need lock */
 204         if (slot >= shared_msrs_global.nr) {
 205                 printk(KERN_ERR "kvm: invalid MSR slot!");
 206                 return;
 207         }
 208         rdmsrl_safe(msr, &value);
 209         smsr->values[slot].host = value;
 210         smsr->values[slot].curr = value;
 211 }
 212
 213 void kvm_define_shared_msr(unsigned slot, u32 msr)
 214 {
 215         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 216         if (slot >= shared_msrs_global.nr)
 217                 shared_msrs_global.nr = slot + 1;
 218         shared_msrs_global.msrs[slot] = msr;
 219         /* we need ensured the shared_msr_global have been updated */
 220         smp_wmb();
 221 }
 222 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 223
 224 static void kvm_shared_msr_cpu_online(void)
 225 {
 226         unsigned i;
 227
 228         for (i = 0; i < shared_msrs_global.nr; ++i)
 229                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 230 }
 231
 232 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 233 {
 234         unsigned int cpu = smp_processor_id();
 235         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 236
 237         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 238                 return;
 239         smsr->values[slot].curr = value;
 240         wrmsrl(shared_msrs_global.msrs[slot], value);
 241         if (!smsr->registered) {
 242                 smsr->urn.on_user_return = kvm_on_user_return;
 243                 user_return_notifier_register(&smsr->urn);
 244                 smsr->registered = true;
 245         }
 246 }
 247 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 248
 249 static void drop_user_return_notifiers(void)
 250 {
 251         unsigned int cpu = smp_processor_id();
 252         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 253
 254         if (smsr->registered)
 255                 kvm_on_user_return(&smsr->urn);
 256 }
 257
 258 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 259 {
 260         return vcpu->arch.apic_base;
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 263
 264 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 265 {
 266         u64 old_state = vcpu->arch.apic_base &
 267                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 268         u64 new_state = msr_info->data &
 269                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 270         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 271                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 272
 273         if (!msr_info->host_initiated &&
 274             ((msr_info->data & reserved_bits) != 0 ||
 275              new_state == X2APIC_ENABLE ||
 276              (new_state == MSR_IA32_APICBASE_ENABLE &&
 277               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 278              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 279               old_state == 0)))
 280                 return 1;
 281
 282         kvm_lapic_set_base(vcpu, msr_info->data);
 283         return 0;
 284 }
 285 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 286
 287 asmlinkage __visible void kvm_spurious_fault(void)
 288 {
 289         /* Fault while not rebooting.  We want the trace. */
 290         BUG();
 291 }
 292 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 293
 294 #define EXCPT_BENIGN            0
 295 #define EXCPT_CONTRIBUTORY      1
 296 #define EXCPT_PF                2
 297
 298 static int exception_class(int vector)
 299 {
 300         switch (vector) {
 301         case PF_VECTOR:
 302                 return EXCPT_PF;
 303         case DE_VECTOR:
 304         case TS_VECTOR:
 305         case NP_VECTOR:
 306         case SS_VECTOR:
 307         case GP_VECTOR:
 308                 return EXCPT_CONTRIBUTORY;
 309         default:
 310                 break;
 311         }
 312         return EXCPT_BENIGN;
 313 }
 314
 315 #define EXCPT_FAULT             0
 316 #define EXCPT_TRAP              1
 317 #define EXCPT_ABORT             2
 318 #define EXCPT_INTERRUPT         3
 319
 320 static int exception_type(int vector)
 321 {
 322         unsigned int mask;
 323
 324         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 325                 return EXCPT_INTERRUPT;
 326
 327         mask = 1 << vector;
 328
 329         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 330         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 331                 return EXCPT_TRAP;
 332
 333         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 334                 return EXCPT_ABORT;
 335
 336         /* Reserved exceptions will result in fault */
 337         return EXCPT_FAULT;
 338 }
 339
 340 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 341                 unsigned nr, bool has_error, u32 error_code,
 342                 bool reinject)
 343 {
 344         u32 prev_nr;
 345         int class1, class2;
 346
 347         kvm_make_request(KVM_REQ_EVENT, vcpu);
 348
 349         if (!vcpu->arch.exception.pending) {
 350         queue:
 351                 vcpu->arch.exception.pending = true;
 352                 vcpu->arch.exception.has_error_code = has_error;
 353                 vcpu->arch.exception.nr = nr;
 354                 vcpu->arch.exception.error_code = error_code;
 355                 vcpu->arch.exception.reinject = reinject;
 356                 return;
 357         }
 358
 359         /* to check exception */
 360         prev_nr = vcpu->arch.exception.nr;
 361         if (prev_nr == DF_VECTOR) {
 362                 /* triple fault -> shutdown */
 363                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 364                 return;
 365         }
 366         class1 = exception_class(prev_nr);
 367         class2 = exception_class(nr);
 368         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 369                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 370                 /* generate double fault per SDM Table 5-5 */
 371                 vcpu->arch.exception.pending = true;
 372                 vcpu->arch.exception.has_error_code = true;
 373                 vcpu->arch.exception.nr = DF_VECTOR;
 374                 vcpu->arch.exception.error_code = 0;
 375         } else
 376                 /* replace previous exception with a new one in a hope
 377                    that instruction re-execution will regenerate lost
 378                    exception */
 379                 goto queue;
 380 }
 381
 382 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 383 {
 384         kvm_multiple_exception(vcpu, nr, false, 0, false);
 385 }
 386 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 387
 388 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 389 {
 390         kvm_multiple_exception(vcpu, nr, false, 0, true);
 391 }
 392 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 393
 394 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 395 {
 396         if (err)
 397                 kvm_inject_gp(vcpu, 0);
 398         else
 399                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 402
 403 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 404 {
 405         ++vcpu->stat.pf_guest;
 406         vcpu->arch.cr2 = fault->address;
 407         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 410
 411 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 412 {
 413         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 414                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 415         else
 416                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 417 }
 418
 419 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 420 {
 421         atomic_inc(&vcpu->arch.nmi_queued);
 422         kvm_make_request(KVM_REQ_NMI, vcpu);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 425
 426 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 427 {
 428         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 429 }
 430 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 431
 432 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 433 {
 434         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 435 }
 436 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 437
 438 /*
 439  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 440  * a #GP and return false.
 441  */
 442 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 443 {
 444         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 445                 return true;
 446         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 447         return false;
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 450
 451 /*
 452  * This function will be used to read from the physical memory of the currently
 453  * running guest. The difference to kvm_read_guest_page is that this function
 454  * can read from guest physical or from the guest's guest physical memory.
 455  */
 456 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 457                             gfn_t ngfn, void *data, int offset, int len,
 458                             u32 access)
 459 {
 460         gfn_t real_gfn;
 461         gpa_t ngpa;
 462
 463         ngpa     = gfn_to_gpa(ngfn);
 464         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 465         if (real_gfn == UNMAPPED_GVA)
 466                 return -EFAULT;
 467
 468         real_gfn = gpa_to_gfn(real_gfn);
 469
 470         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 471 }
 472 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 473
 474 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 475                                void *data, int offset, int len, u32 access)
 476 {
 477         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 478                                        data, offset, len, access);
 479 }
 480
 481 /*
 482  * Load the pae pdptrs.  Return true is they are all valid.
 483  */
 484 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 485 {
 486         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 487         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 488         int i;
 489         int ret;
 490         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 491
 492         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 493                                       offset * sizeof(u64), sizeof(pdpte),
 494                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 495         if (ret < 0) {
 496                 ret = 0;
 497                 goto out;
 498         }
 499         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 500                 if (is_present_gpte(pdpte[i]) &&
 501                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 502                         ret = 0;
 503                         goto out;
 504                 }
 505         }
 506         ret = 1;
 507
 508         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 509         __set_bit(VCPU_EXREG_PDPTR,
 510                   (unsigned long *)&vcpu->arch.regs_avail);
 511         __set_bit(VCPU_EXREG_PDPTR,
 512                   (unsigned long *)&vcpu->arch.regs_dirty);
 513 out:
 514
 515         return ret;
 516 }
 517 EXPORT_SYMBOL_GPL(load_pdptrs);
 518
 519 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 520 {
 521         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 522         bool changed = true;
 523         int offset;
 524         gfn_t gfn;
 525         int r;
 526
 527         if (is_long_mode(vcpu) || !is_pae(vcpu))
 528                 return false;
 529
 530         if (!test_bit(VCPU_EXREG_PDPTR,
 531                       (unsigned long *)&vcpu->arch.regs_avail))
 532                 return true;
 533
 534         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 535         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 536         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 537                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 538         if (r < 0)
 539                 goto out;
 540         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 541 out:
 542
 543         return changed;
 544 }
 545
 546 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 547 {
 548         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 549         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 550                                     X86_CR0_CD | X86_CR0_NW;
 551
 552         cr0 |= X86_CR0_ET;
 553
 554 #ifdef CONFIG_X86_64
 555         if (cr0 & 0xffffffff00000000UL)
 556                 return 1;
 557 #endif
 558
 559         cr0 &= ~CR0_RESERVED_BITS;
 560
 561         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 562                 return 1;
 563
 564         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 565                 return 1;
 566
 567         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 568 #ifdef CONFIG_X86_64
 569                 if ((vcpu->arch.efer & EFER_LME)) {
 570                         int cs_db, cs_l;
 571
 572                         if (!is_pae(vcpu))
 573                                 return 1;
 574                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 575                         if (cs_l)
 576                                 return 1;
 577                 } else
 578 #endif
 579                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 580                                                  kvm_read_cr3(vcpu)))
 581                         return 1;
 582         }
 583
 584         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 585                 return 1;
 586
 587         kvm_x86_ops->set_cr0(vcpu, cr0);
 588
 589         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 590                 kvm_clear_async_pf_completion_queue(vcpu);
 591                 kvm_async_pf_hash_reset(vcpu);
 592         }
 593
 594         if ((cr0 ^ old_cr0) & update_bits)
 595                 kvm_mmu_reset_context(vcpu);
 596         return 0;
 597 }
 598 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 599
 600 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 601 {
 602         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 603 }
 604 EXPORT_SYMBOL_GPL(kvm_lmsw);
 605
 606 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 607 {
 608         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 609                         !vcpu->guest_xcr0_loaded) {
 610                 /* kvm_set_xcr() also depends on this */
 611                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 612                 vcpu->guest_xcr0_loaded = 1;
 613         }
 614 }
 615
 616 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 617 {
 618         if (vcpu->guest_xcr0_loaded) {
 619                 if (vcpu->arch.xcr0 != host_xcr0)
 620                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 621                 vcpu->guest_xcr0_loaded = 0;
 622         }
 623 }
 624
 625 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 626 {
 627         u64 xcr0 = xcr;
 628         u64 old_xcr0 = vcpu->arch.xcr0;
 629         u64 valid_bits;
 630
 631         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 632         if (index != XCR_XFEATURE_ENABLED_MASK)
 633                 return 1;
 634         if (!(xcr0 & XSTATE_FP))
 635                 return 1;
 636         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 637                 return 1;
 638
 639         /*
 640          * Do not allow the guest to set bits that we do not support
 641          * saving.  However, xcr0 bit 0 is always set, even if the
 642          * emulated CPU does not support XSAVE (see fx_init).
 643          */
 644         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 645         if (xcr0 & ~valid_bits)
 646                 return 1;
 647
 648         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 649                 return 1;
 650
 651         kvm_put_guest_xcr0(vcpu);
 652         vcpu->arch.xcr0 = xcr0;
 653
 654         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 655                 kvm_update_cpuid(vcpu);
 656         return 0;
 657 }
 658
 659 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 660 {
 661         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 662             __kvm_set_xcr(vcpu, index, xcr)) {
 663                 kvm_inject_gp(vcpu, 0);
 664                 return 1;
 665         }
 666         return 0;
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 669
 670 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 671 {
 672         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 673         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 674                                    X86_CR4_PAE | X86_CR4_SMEP;
 675         if (cr4 & CR4_RESERVED_BITS)
 676                 return 1;
 677
 678         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 679                 return 1;
 680
 681         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 682                 return 1;
 683
 684         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 685                 return 1;
 686
 687         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 688                 return 1;
 689
 690         if (is_long_mode(vcpu)) {
 691                 if (!(cr4 & X86_CR4_PAE))
 692                         return 1;
 693         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 694                    && ((cr4 ^ old_cr4) & pdptr_bits)
 695                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 696                                    kvm_read_cr3(vcpu)))
 697                 return 1;
 698
 699         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 700                 if (!guest_cpuid_has_pcid(vcpu))
 701                         return 1;
 702
 703                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 704                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 705                         return 1;
 706         }
 707
 708         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 709                 return 1;
 710
 711         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 712             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 713                 kvm_mmu_reset_context(vcpu);
 714
 715         if ((cr4 ^ old_cr4) & X86_CR4_SMAP)
 716                 update_permission_bitmask(vcpu, vcpu->arch.walk_mmu, false);
 717
 718         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 719                 kvm_update_cpuid(vcpu);
 720
 721         return 0;
 722 }
 723 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 724
 725 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 726 {
 727         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 728                 kvm_mmu_sync_roots(vcpu);
 729                 kvm_mmu_flush_tlb(vcpu);
 730                 return 0;
 731         }
 732
 733         if (is_long_mode(vcpu)) {
 734                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 735                         return 1;
 736         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 737                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 738                 return 1;
 739
 740         vcpu->arch.cr3 = cr3;
 741         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 742         kvm_mmu_new_cr3(vcpu);
 743         return 0;
 744 }
 745 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 746
 747 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 748 {
 749         if (cr8 & CR8_RESERVED_BITS)
 750                 return 1;
 751         if (irqchip_in_kernel(vcpu->kvm))
 752                 kvm_lapic_set_tpr(vcpu, cr8);
 753         else
 754                 vcpu->arch.cr8 = cr8;
 755         return 0;
 756 }
 757 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 758
 759 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 760 {
 761         if (irqchip_in_kernel(vcpu->kvm))
 762                 return kvm_lapic_get_cr8(vcpu);
 763         else
 764                 return vcpu->arch.cr8;
 765 }
 766 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 767
 768 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 769 {
 770         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 771                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 772 }
 773
 774 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 775 {
 776         unsigned long dr7;
 777
 778         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 779                 dr7 = vcpu->arch.guest_debug_dr7;
 780         else
 781                 dr7 = vcpu->arch.dr7;
 782         kvm_x86_ops->set_dr7(vcpu, dr7);
 783         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 784         if (dr7 & DR7_BP_EN_MASK)
 785                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 786 }
 787
 788 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 789 {
 790         u64 fixed = DR6_FIXED_1;
 791
 792         if (!guest_cpuid_has_rtm(vcpu))
 793                 fixed |= DR6_RTM;
 794         return fixed;
 795 }
 796
 797 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 798 {
 799         switch (dr) {
 800         case 0 ... 3:
 801                 vcpu->arch.db[dr] = val;
 802                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 803                         vcpu->arch.eff_db[dr] = val;
 804                 break;
 805         case 4:
 806                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 807                         return 1; /* #UD */
 808                 /* fall through */
 809         case 6:
 810                 if (val & 0xffffffff00000000ULL)
 811                         return -1; /* #GP */
 812                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 813                 kvm_update_dr6(vcpu);
 814                 break;
 815         case 5:
 816                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 817                         return 1; /* #UD */
 818                 /* fall through */
 819         default: /* 7 */
 820                 if (val & 0xffffffff00000000ULL)
 821                         return -1; /* #GP */
 822                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 823                 kvm_update_dr7(vcpu);
 824                 break;
 825         }
 826
 827         return 0;
 828 }
 829
 830 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 831 {
 832         int res;
 833
 834         res = __kvm_set_dr(vcpu, dr, val);
 835         if (res > 0)
 836                 kvm_queue_exception(vcpu, UD_VECTOR);
 837         else if (res < 0)
 838                 kvm_inject_gp(vcpu, 0);
 839
 840         return res;
 841 }
 842 EXPORT_SYMBOL_GPL(kvm_set_dr);
 843
 844 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 845 {
 846         switch (dr) {
 847         case 0 ... 3:
 848                 *val = vcpu->arch.db[dr];
 849                 break;
 850         case 4:
 851                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 852                         return 1;
 853                 /* fall through */
 854         case 6:
 855                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 856                         *val = vcpu->arch.dr6;
 857                 else
 858                         *val = kvm_x86_ops->get_dr6(vcpu);
 859                 break;
 860         case 5:
 861                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 862                         return 1;
 863                 /* fall through */
 864         default: /* 7 */
 865                 *val = vcpu->arch.dr7;
 866                 break;
 867         }
 868
 869         return 0;
 870 }
 871
 872 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 873 {
 874         if (_kvm_get_dr(vcpu, dr, val)) {
 875                 kvm_queue_exception(vcpu, UD_VECTOR);
 876                 return 1;
 877         }
 878         return 0;
 879 }
 880 EXPORT_SYMBOL_GPL(kvm_get_dr);
 881
 882 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 883 {
 884         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 885         u64 data;
 886         int err;
 887
 888         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 889         if (err)
 890                 return err;
 891         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 892         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 893         return err;
 894 }
 895 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 896
 897 /*
 898  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 899  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 900  *
 901  * This list is modified at module load time to reflect the
 902  * capabilities of the host cpu. This capabilities test skips MSRs that are
 903  * kvm-specific. Those are put in the beginning of the list.
 904  */
 905
 906 #define KVM_SAVE_MSRS_BEGIN     12
 907 static u32 msrs_to_save[] = {
 908         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 909         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 910         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 911         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 912         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 913         MSR_KVM_PV_EOI_EN,
 914         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 915         MSR_STAR,
 916 #ifdef CONFIG_X86_64
 917         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 918 #endif
 919         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 920         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 921 };
 922
 923 static unsigned num_msrs_to_save;
 924
 925 static const u32 emulated_msrs[] = {
 926         MSR_IA32_TSC_ADJUST,
 927         MSR_IA32_TSCDEADLINE,
 928         MSR_IA32_MISC_ENABLE,
 929         MSR_IA32_MCG_STATUS,
 930         MSR_IA32_MCG_CTL,
 931 };
 932
 933 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 934 {
 935         if (efer & efer_reserved_bits)
 936                 return false;
 937
 938         if (efer & EFER_FFXSR) {
 939                 struct kvm_cpuid_entry2 *feat;
 940
 941                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 942                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 943                         return false;
 944         }
 945
 946         if (efer & EFER_SVME) {
 947                 struct kvm_cpuid_entry2 *feat;
 948
 949                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 950                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 951                         return false;
 952         }
 953
 954         return true;
 955 }
 956 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 957
 958 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 959 {
 960         u64 old_efer = vcpu->arch.efer;
 961
 962         if (!kvm_valid_efer(vcpu, efer))
 963                 return 1;
 964
 965         if (is_paging(vcpu)
 966             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 967                 return 1;
 968
 969         efer &= ~EFER_LMA;
 970         efer |= vcpu->arch.efer & EFER_LMA;
 971
 972         kvm_x86_ops->set_efer(vcpu, efer);
 973
 974         /* Update reserved bits */
 975         if ((efer ^ old_efer) & EFER_NX)
 976                 kvm_mmu_reset_context(vcpu);
 977
 978         return 0;
 979 }
 980
 981 void kvm_enable_efer_bits(u64 mask)
 982 {
 983        efer_reserved_bits &= ~mask;
 984 }
 985 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 986
 987
 988 /*
 989  * Writes msr value into into the appropriate "register".
 990  * Returns 0 on success, non-0 otherwise.
 991  * Assumes vcpu_load() was already called.
 992  */
 993 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 994 {
 995         return kvm_x86_ops->set_msr(vcpu, msr);
 996 }
 997
 998 /*
 999  * Adapt set_msr() to msr_io()'s calling convention
1000  */
1001 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1002 {
1003         struct msr_data msr;
1004
1005         msr.data = *data;
1006         msr.index = index;
1007         msr.host_initiated = true;
1008         return kvm_set_msr(vcpu, &msr);
1009 }
1010
1011 #ifdef CONFIG_X86_64
1012 struct pvclock_gtod_data {
1013         seqcount_t      seq;
1014
1015         struct { /* extract of a clocksource struct */
1016                 int vclock_mode;
1017                 cycle_t cycle_last;
1018                 cycle_t mask;
1019                 u32     mult;
1020                 u32     shift;
1021         } clock;
1022
1023         u64             boot_ns;
1024         u64             nsec_base;
1025 };
1026
1027 static struct pvclock_gtod_data pvclock_gtod_data;
1028
1029 static void update_pvclock_gtod(struct timekeeper *tk)
1030 {
1031         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1032         u64 boot_ns;
1033
1034         boot_ns = ktime_to_ns(ktime_add(tk->tkr.base_mono, tk->offs_boot));
1035
1036         write_seqcount_begin(&vdata->seq);
1037
1038         /* copy pvclock gtod data */
1039         vdata->clock.vclock_mode        = tk->tkr.clock->archdata.vclock_mode;
1040         vdata->clock.cycle_last         = tk->tkr.cycle_last;
1041         vdata->clock.mask               = tk->tkr.mask;
1042         vdata->clock.mult               = tk->tkr.mult;
1043         vdata->clock.shift              = tk->tkr.shift;
1044
1045         vdata->boot_ns                  = boot_ns;
1046         vdata->nsec_base                = tk->tkr.xtime_nsec;
1047
1048         write_seqcount_end(&vdata->seq);
1049 }
1050 #endif
1051
1052
1053 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1054 {
1055         int version;
1056         int r;
1057         struct pvclock_wall_clock wc;
1058         struct timespec boot;
1059
1060         if (!wall_clock)
1061                 return;
1062
1063         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1064         if (r)
1065                 return;
1066
1067         if (version & 1)
1068                 ++version;  /* first time write, random junk */
1069
1070         ++version;
1071
1072         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1073
1074         /*
1075          * The guest calculates current wall clock time by adding
1076          * system time (updated by kvm_guest_time_update below) to the
1077          * wall clock specified here.  guest system time equals host
1078          * system time for us, thus we must fill in host boot time here.
1079          */
1080         getboottime(&boot);
1081
1082         if (kvm->arch.kvmclock_offset) {
1083                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1084                 boot = timespec_sub(boot, ts);
1085         }
1086         wc.sec = boot.tv_sec;
1087         wc.nsec = boot.tv_nsec;
1088         wc.version = version;
1089
1090         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1091
1092         version++;
1093         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1094 }
1095
1096 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1097 {
1098         uint32_t quotient, remainder;
1099
1100         /* Don't try to replace with do_div(), this one calculates
1101          * "(dividend << 32) / divisor" */
1102         __asm__ ( "divl %4"
1103                   : "=a" (quotient), "=d" (remainder)
1104                   : "0" (0), "1" (dividend), "r" (divisor) );
1105         return quotient;
1106 }
1107
1108 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1109                                s8 *pshift, u32 *pmultiplier)
1110 {
1111         uint64_t scaled64;
1112         int32_t  shift = 0;
1113         uint64_t tps64;
1114         uint32_t tps32;
1115
1116         tps64 = base_khz * 1000LL;
1117         scaled64 = scaled_khz * 1000LL;
1118         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1119                 tps64 >>= 1;
1120                 shift--;
1121         }
1122
1123         tps32 = (uint32_t)tps64;
1124         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1125                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1126                         scaled64 >>= 1;
1127                 else
1128                         tps32 <<= 1;
1129                 shift++;
1130         }
1131
1132         *pshift = shift;
1133         *pmultiplier = div_frac(scaled64, tps32);
1134
1135         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1136                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1137 }
1138
1139 static inline u64 get_kernel_ns(void)
1140 {
1141         return ktime_get_boot_ns();
1142 }
1143
1144 #ifdef CONFIG_X86_64
1145 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1146 #endif
1147
1148 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1149 unsigned long max_tsc_khz;
1150
1151 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1152 {
1153         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1154                                    vcpu->arch.virtual_tsc_shift);
1155 }
1156
1157 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1158 {
1159         u64 v = (u64)khz * (1000000 + ppm);
1160         do_div(v, 1000000);
1161         return v;
1162 }
1163
1164 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1165 {
1166         u32 thresh_lo, thresh_hi;
1167         int use_scaling = 0;
1168
1169         /* tsc_khz can be zero if TSC calibration fails */
1170         if (this_tsc_khz == 0)
1171                 return;
1172
1173         /* Compute a scale to convert nanoseconds in TSC cycles */
1174         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1175                            &vcpu->arch.virtual_tsc_shift,
1176                            &vcpu->arch.virtual_tsc_mult);
1177         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1178
1179         /*
1180          * Compute the variation in TSC rate which is acceptable
1181          * within the range of tolerance and decide if the
1182          * rate being applied is within that bounds of the hardware
1183          * rate.  If so, no scaling or compensation need be done.
1184          */
1185         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1186         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1187         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1188                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1189                 use_scaling = 1;
1190         }
1191         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1192 }
1193
1194 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1195 {
1196         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1197                                       vcpu->arch.virtual_tsc_mult,
1198                                       vcpu->arch.virtual_tsc_shift);
1199         tsc += vcpu->arch.this_tsc_write;
1200         return tsc;
1201 }
1202
1203 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1204 {
1205 #ifdef CONFIG_X86_64
1206         bool vcpus_matched;
1207         bool do_request = false;
1208         struct kvm_arch *ka = &vcpu->kvm->arch;
1209         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1210
1211         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1212                          atomic_read(&vcpu->kvm->online_vcpus));
1213
1214         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1215                 if (!ka->use_master_clock)
1216                         do_request = 1;
1217
1218         if (!vcpus_matched && ka->use_master_clock)
1219                         do_request = 1;
1220
1221         if (do_request)
1222                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1223
1224         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1225                             atomic_read(&vcpu->kvm->online_vcpus),
1226                             ka->use_master_clock, gtod->clock.vclock_mode);
1227 #endif
1228 }
1229
1230 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1231 {
1232         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1233         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1234 }
1235
1236 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1237 {
1238         struct kvm *kvm = vcpu->kvm;
1239         u64 offset, ns, elapsed;
1240         unsigned long flags;
1241         s64 usdiff;
1242         bool matched;
1243         bool already_matched;
1244         u64 data = msr->data;
1245
1246         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1247         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1248         ns = get_kernel_ns();
1249         elapsed = ns - kvm->arch.last_tsc_nsec;
1250
1251         if (vcpu->arch.virtual_tsc_khz) {
1252                 int faulted = 0;
1253
1254                 /* n.b - signed multiplication and division required */
1255                 usdiff = data - kvm->arch.last_tsc_write;
1256 #ifdef CONFIG_X86_64
1257                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1258 #else
1259                 /* do_div() only does unsigned */
1260                 asm("1: idivl %[divisor]\n"
1261                     "2: xor %%edx, %%edx\n"
1262                     "   movl $0, %[faulted]\n"
1263                     "3:\n"
1264                     ".section .fixup,\"ax\"\n"
1265                     "4: movl $1, %[faulted]\n"
1266                     "   jmp  3b\n"
1267                     ".previous\n"
1268
1269                 _ASM_EXTABLE(1b, 4b)
1270
1271                 : "=A"(usdiff), [faulted] "=r" (faulted)
1272                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1273
1274 #endif
1275                 do_div(elapsed, 1000);
1276                 usdiff -= elapsed;
1277                 if (usdiff < 0)
1278                         usdiff = -usdiff;
1279
1280                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1281                 if (faulted)
1282                         usdiff = USEC_PER_SEC;
1283         } else
1284                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1285
1286         /*
1287          * Special case: TSC write with a small delta (1 second) of virtual
1288          * cycle time against real time is interpreted as an attempt to
1289          * synchronize the CPU.
1290          *
1291          * For a reliable TSC, we can match TSC offsets, and for an unstable
1292          * TSC, we add elapsed time in this computation.  We could let the
1293          * compensation code attempt to catch up if we fall behind, but
1294          * it's better to try to match offsets from the beginning.
1295          */
1296         if (usdiff < USEC_PER_SEC &&
1297             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1298                 if (!check_tsc_unstable()) {
1299                         offset = kvm->arch.cur_tsc_offset;
1300                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1301                 } else {
1302                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1303                         data += delta;
1304                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1305                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1306                 }
1307                 matched = true;
1308                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1309         } else {
1310                 /*
1311                  * We split periods of matched TSC writes into generations.
1312                  * For each generation, we track the original measured
1313                  * nanosecond time, offset, and write, so if TSCs are in
1314                  * sync, we can match exact offset, and if not, we can match
1315                  * exact software computation in compute_guest_tsc()
1316                  *
1317                  * These values are tracked in kvm->arch.cur_xxx variables.
1318                  */
1319                 kvm->arch.cur_tsc_generation++;
1320                 kvm->arch.cur_tsc_nsec = ns;
1321                 kvm->arch.cur_tsc_write = data;
1322                 kvm->arch.cur_tsc_offset = offset;
1323                 matched = false;
1324                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1325                          kvm->arch.cur_tsc_generation, data);
1326         }
1327
1328         /*
1329          * We also track th most recent recorded KHZ, write and time to
1330          * allow the matching interval to be extended at each write.
1331          */
1332         kvm->arch.last_tsc_nsec = ns;
1333         kvm->arch.last_tsc_write = data;
1334         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1335
1336         vcpu->arch.last_guest_tsc = data;
1337
1338         /* Keep track of which generation this VCPU has synchronized to */
1339         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1340         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1341         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1342
1343         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1344                 update_ia32_tsc_adjust_msr(vcpu, offset);
1345         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1346         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1347
1348         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1349         if (!matched) {
1350                 kvm->arch.nr_vcpus_matched_tsc = 0;
1351         } else if (!already_matched) {
1352                 kvm->arch.nr_vcpus_matched_tsc++;
1353         }
1354
1355         kvm_track_tsc_matching(vcpu);
1356         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1357 }
1358
1359 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1360
1361 #ifdef CONFIG_X86_64
1362
1363 static cycle_t read_tsc(void)
1364 {
1365         cycle_t ret;
1366         u64 last;
1367
1368         /*
1369          * Empirically, a fence (of type that depends on the CPU)
1370          * before rdtsc is enough to ensure that rdtsc is ordered
1371          * with respect to loads.  The various CPU manuals are unclear
1372          * as to whether rdtsc can be reordered with later loads,
1373          * but no one has ever seen it happen.
1374          */
1375         rdtsc_barrier();
1376         ret = (cycle_t)vget_cycles();
1377
1378         last = pvclock_gtod_data.clock.cycle_last;
1379
1380         if (likely(ret >= last))
1381                 return ret;
1382
1383         /*
1384          * GCC likes to generate cmov here, but this branch is extremely
1385          * predictable (it's just a funciton of time and the likely is
1386          * very likely) and there's a data dependence, so force GCC
1387          * to generate a branch instead.  I don't barrier() because
1388          * we don't actually need a barrier, and if this function
1389          * ever gets inlined it will generate worse code.
1390          */
1391         asm volatile ("");
1392         return last;
1393 }
1394
1395 static inline u64 vgettsc(cycle_t *cycle_now)
1396 {
1397         long v;
1398         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1399
1400         *cycle_now = read_tsc();
1401
1402         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1403         return v * gtod->clock.mult;
1404 }
1405
1406 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1407 {
1408         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1409         unsigned long seq;
1410         int mode;
1411         u64 ns;
1412
1413         do {
1414                 seq = read_seqcount_begin(&gtod->seq);
1415                 mode = gtod->clock.vclock_mode;
1416                 ns = gtod->nsec_base;
1417                 ns += vgettsc(cycle_now);
1418                 ns >>= gtod->clock.shift;
1419                 ns += gtod->boot_ns;
1420         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1421         *t = ns;
1422
1423         return mode;
1424 }
1425
1426 /* returns true if host is using tsc clocksource */
1427 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1428 {
1429         /* checked again under seqlock below */
1430         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1431                 return false;
1432
1433         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1434 }
1435 #endif
1436
1437 /*
1438  *
1439  * Assuming a stable TSC across physical CPUS, and a stable TSC
1440  * across virtual CPUs, the following condition is possible.
1441  * Each numbered line represents an event visible to both
1442  * CPUs at the next numbered event.
1443  *
1444  * "timespecX" represents host monotonic time. "tscX" represents
1445  * RDTSC value.
1446  *
1447  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1448  *
1449  * 1.  read timespec0,tsc0
1450  * 2.                                   | timespec1 = timespec0 + N
1451  *                                      | tsc1 = tsc0 + M
1452  * 3. transition to guest               | transition to guest
1453  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1454  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1455  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1456  *
1457  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1458  *
1459  *      - ret0 < ret1
1460  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1461  *              ...
1462  *      - 0 < N - M => M < N
1463  *
1464  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1465  * always the case (the difference between two distinct xtime instances
1466  * might be smaller then the difference between corresponding TSC reads,
1467  * when updating guest vcpus pvclock areas).
1468  *
1469  * To avoid that problem, do not allow visibility of distinct
1470  * system_timestamp/tsc_timestamp values simultaneously: use a master
1471  * copy of host monotonic time values. Update that master copy
1472  * in lockstep.
1473  *
1474  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1475  *
1476  */
1477
1478 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1479 {
1480 #ifdef CONFIG_X86_64
1481         struct kvm_arch *ka = &kvm->arch;
1482         int vclock_mode;
1483         bool host_tsc_clocksource, vcpus_matched;
1484
1485         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1486                         atomic_read(&kvm->online_vcpus));
1487
1488         /*
1489          * If the host uses TSC clock, then passthrough TSC as stable
1490          * to the guest.
1491          */
1492         host_tsc_clocksource = kvm_get_time_and_clockread(
1493                                         &ka->master_kernel_ns,
1494                                         &ka->master_cycle_now);
1495
1496         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1497                                 && !backwards_tsc_observed;
1498
1499         if (ka->use_master_clock)
1500                 atomic_set(&kvm_guest_has_master_clock, 1);
1501
1502         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1503         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1504                                         vcpus_matched);
1505 #endif
1506 }
1507
1508 static void kvm_gen_update_masterclock(struct kvm *kvm)
1509 {
1510 #ifdef CONFIG_X86_64
1511         int i;
1512         struct kvm_vcpu *vcpu;
1513         struct kvm_arch *ka = &kvm->arch;
1514
1515         spin_lock(&ka->pvclock_gtod_sync_lock);
1516         kvm_make_mclock_inprogress_request(kvm);
1517         /* no guest entries from this point */
1518         pvclock_update_vm_gtod_copy(kvm);
1519
1520         kvm_for_each_vcpu(i, vcpu, kvm)
1521                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1522
1523         /* guest entries allowed */
1524         kvm_for_each_vcpu(i, vcpu, kvm)
1525                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1526
1527         spin_unlock(&ka->pvclock_gtod_sync_lock);
1528 #endif
1529 }
1530
1531 static int kvm_guest_time_update(struct kvm_vcpu *v)
1532 {
1533         unsigned long flags, this_tsc_khz;
1534         struct kvm_vcpu_arch *vcpu = &v->arch;
1535         struct kvm_arch *ka = &v->kvm->arch;
1536         s64 kernel_ns;
1537         u64 tsc_timestamp, host_tsc;
1538         struct pvclock_vcpu_time_info guest_hv_clock;
1539         u8 pvclock_flags;
1540         bool use_master_clock;
1541
1542         kernel_ns = 0;
1543         host_tsc = 0;
1544
1545         /*
1546          * If the host uses TSC clock, then passthrough TSC as stable
1547          * to the guest.
1548          */
1549         spin_lock(&ka->pvclock_gtod_sync_lock);
1550         use_master_clock = ka->use_master_clock;
1551         if (use_master_clock) {
1552                 host_tsc = ka->master_cycle_now;
1553                 kernel_ns = ka->master_kernel_ns;
1554         }
1555         spin_unlock(&ka->pvclock_gtod_sync_lock);
1556
1557         /* Keep irq disabled to prevent changes to the clock */
1558         local_irq_save(flags);
1559         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1560         if (unlikely(this_tsc_khz == 0)) {
1561                 local_irq_restore(flags);
1562                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1563                 return 1;
1564         }
1565         if (!use_master_clock) {
1566                 host_tsc = native_read_tsc();
1567                 kernel_ns = get_kernel_ns();
1568         }
1569
1570         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1571
1572         /*
1573          * We may have to catch up the TSC to match elapsed wall clock
1574          * time for two reasons, even if kvmclock is used.
1575          *   1) CPU could have been running below the maximum TSC rate
1576          *   2) Broken TSC compensation resets the base at each VCPU
1577          *      entry to avoid unknown leaps of TSC even when running
1578          *      again on the same CPU.  This may cause apparent elapsed
1579          *      time to disappear, and the guest to stand still or run
1580          *      very slowly.
1581          */
1582         if (vcpu->tsc_catchup) {
1583                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1584                 if (tsc > tsc_timestamp) {
1585                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1586                         tsc_timestamp = tsc;
1587                 }
1588         }
1589
1590         local_irq_restore(flags);
1591
1592         if (!vcpu->pv_time_enabled)
1593                 return 0;
1594
1595         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1596                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1597                                    &vcpu->hv_clock.tsc_shift,
1598                                    &vcpu->hv_clock.tsc_to_system_mul);
1599                 vcpu->hw_tsc_khz = this_tsc_khz;
1600         }
1601
1602         /* With all the info we got, fill in the values */
1603         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1604         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1605         vcpu->last_guest_tsc = tsc_timestamp;
1606
1607         /*
1608          * The interface expects us to write an even number signaling that the
1609          * update is finished. Since the guest won't see the intermediate
1610          * state, we just increase by 2 at the end.
1611          */
1612         vcpu->hv_clock.version += 2;
1613
1614         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1615                 &guest_hv_clock, sizeof(guest_hv_clock))))
1616                 return 0;
1617
1618         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1619         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1620
1621         if (vcpu->pvclock_set_guest_stopped_request) {
1622                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1623                 vcpu->pvclock_set_guest_stopped_request = false;
1624         }
1625
1626         /* If the host uses TSC clocksource, then it is stable */
1627         if (use_master_clock)
1628                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1629
1630         vcpu->hv_clock.flags = pvclock_flags;
1631
1632         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1633                                 &vcpu->hv_clock,
1634                                 sizeof(vcpu->hv_clock));
1635         return 0;
1636 }
1637
1638 /*
1639  * kvmclock updates which are isolated to a given vcpu, such as
1640  * vcpu->cpu migration, should not allow system_timestamp from
1641  * the rest of the vcpus to remain static. Otherwise ntp frequency
1642  * correction applies to one vcpu's system_timestamp but not
1643  * the others.
1644  *
1645  * So in those cases, request a kvmclock update for all vcpus.
1646  * We need to rate-limit these requests though, as they can
1647  * considerably slow guests that have a large number of vcpus.
1648  * The time for a remote vcpu to update its kvmclock is bound
1649  * by the delay we use to rate-limit the updates.
1650  */
1651
1652 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1653
1654 static void kvmclock_update_fn(struct work_struct *work)
1655 {
1656         int i;
1657         struct delayed_work *dwork = to_delayed_work(work);
1658         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1659                                            kvmclock_update_work);
1660         struct kvm *kvm = container_of(ka, struct kvm, arch);
1661         struct kvm_vcpu *vcpu;
1662
1663         kvm_for_each_vcpu(i, vcpu, kvm) {
1664                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1665                 kvm_vcpu_kick(vcpu);
1666         }
1667 }
1668
1669 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1670 {
1671         struct kvm *kvm = v->kvm;
1672
1673         set_bit(KVM_REQ_CLOCK_UPDATE, &v->requests);
1674         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1675                                         KVMCLOCK_UPDATE_DELAY);
1676 }
1677
1678 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1679
1680 static void kvmclock_sync_fn(struct work_struct *work)
1681 {
1682         struct delayed_work *dwork = to_delayed_work(work);
1683         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1684                                            kvmclock_sync_work);
1685         struct kvm *kvm = container_of(ka, struct kvm, arch);
1686
1687         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1688         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1689                                         KVMCLOCK_SYNC_PERIOD);
1690 }
1691
1692 static bool msr_mtrr_valid(unsigned msr)
1693 {
1694         switch (msr) {
1695         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1696         case MSR_MTRRfix64K_00000:
1697         case MSR_MTRRfix16K_80000:
1698         case MSR_MTRRfix16K_A0000:
1699         case MSR_MTRRfix4K_C0000:
1700         case MSR_MTRRfix4K_C8000:
1701         case MSR_MTRRfix4K_D0000:
1702         case MSR_MTRRfix4K_D8000:
1703         case MSR_MTRRfix4K_E0000:
1704         case MSR_MTRRfix4K_E8000:
1705         case MSR_MTRRfix4K_F0000:
1706         case MSR_MTRRfix4K_F8000:
1707         case MSR_MTRRdefType:
1708         case MSR_IA32_CR_PAT:
1709                 return true;
1710         case 0x2f8:
1711                 return true;
1712         }
1713         return false;
1714 }
1715
1716 static bool valid_pat_type(unsigned t)
1717 {
1718         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1719 }
1720
1721 static bool valid_mtrr_type(unsigned t)
1722 {
1723         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1724 }
1725
1726 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1727 {
1728         int i;
1729         u64 mask;
1730
1731         if (!msr_mtrr_valid(msr))
1732                 return false;
1733
1734         if (msr == MSR_IA32_CR_PAT) {
1735                 for (i = 0; i < 8; i++)
1736                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1737                                 return false;
1738                 return true;
1739         } else if (msr == MSR_MTRRdefType) {
1740                 if (data & ~0xcff)
1741                         return false;
1742                 return valid_mtrr_type(data & 0xff);
1743         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1744                 for (i = 0; i < 8 ; i++)
1745                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1746                                 return false;
1747                 return true;
1748         }
1749
1750         /* variable MTRRs */
1751         WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
1752
1753         mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
1754         if ((msr & 1) == 0) {
1755                 /* MTRR base */
1756                 if (!valid_mtrr_type(data & 0xff))
1757                         return false;
1758                 mask |= 0xf00;
1759         } else
1760                 /* MTRR mask */
1761                 mask |= 0x7ff;
1762         if (data & mask) {
1763                 kvm_inject_gp(vcpu, 0);
1764                 return false;
1765         }
1766
1767         return true;
1768 }
1769
1770 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1771 {
1772         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1773
1774         if (!mtrr_valid(vcpu, msr, data))
1775                 return 1;
1776
1777         if (msr == MSR_MTRRdefType) {
1778                 vcpu->arch.mtrr_state.def_type = data;
1779                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1780         } else if (msr == MSR_MTRRfix64K_00000)
1781                 p[0] = data;
1782         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1783                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1784         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1785                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1786         else if (msr == MSR_IA32_CR_PAT)
1787                 vcpu->arch.pat = data;
1788         else {  /* Variable MTRRs */
1789                 int idx, is_mtrr_mask;
1790                 u64 *pt;
1791
1792                 idx = (msr - 0x200) / 2;
1793                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1794                 if (!is_mtrr_mask)
1795                         pt =
1796                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1797                 else
1798                         pt =
1799                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1800                 *pt = data;
1801         }
1802
1803         kvm_mmu_reset_context(vcpu);
1804         return 0;
1805 }
1806
1807 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1808 {
1809         u64 mcg_cap = vcpu->arch.mcg_cap;
1810         unsigned bank_num = mcg_cap & 0xff;
1811
1812         switch (msr) {
1813         case MSR_IA32_MCG_STATUS:
1814                 vcpu->arch.mcg_status = data;
1815                 break;
1816         case MSR_IA32_MCG_CTL:
1817                 if (!(mcg_cap & MCG_CTL_P))
1818                         return 1;
1819                 if (data != 0 && data != ~(u64)0)
1820                         return -1;
1821                 vcpu->arch.mcg_ctl = data;
1822                 break;
1823         default:
1824                 if (msr >= MSR_IA32_MC0_CTL &&
1825                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1826                         u32 offset = msr - MSR_IA32_MC0_CTL;
1827                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1828                          * some Linux kernels though clear bit 10 in bank 4 to
1829                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1830                          * this to avoid an uncatched #GP in the guest
1831                          */
1832                         if ((offset & 0x3) == 0 &&
1833                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1834                                 return -1;
1835                         vcpu->arch.mce_banks[offset] = data;
1836                         break;
1837                 }
1838                 return 1;
1839         }
1840         return 0;
1841 }
1842
1843 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1844 {
1845         struct kvm *kvm = vcpu->kvm;
1846         int lm = is_long_mode(vcpu);
1847         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1848                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1849         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1850                 : kvm->arch.xen_hvm_config.blob_size_32;
1851         u32 page_num = data & ~PAGE_MASK;
1852         u64 page_addr = data & PAGE_MASK;
1853         u8 *page;
1854         int r;
1855
1856         r = -E2BIG;
1857         if (page_num >= blob_size)
1858                 goto out;
1859         r = -ENOMEM;
1860         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1861         if (IS_ERR(page)) {
1862                 r = PTR_ERR(page);
1863                 goto out;
1864         }
1865         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1866                 goto out_free;
1867         r = 0;
1868 out_free:
1869         kfree(page);
1870 out:
1871         return r;
1872 }
1873
1874 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1875 {
1876         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1877 }
1878
1879 static bool kvm_hv_msr_partition_wide(u32 msr)
1880 {
1881         bool r = false;
1882         switch (msr) {
1883         case HV_X64_MSR_GUEST_OS_ID:
1884         case HV_X64_MSR_HYPERCALL:
1885         case HV_X64_MSR_REFERENCE_TSC:
1886         case HV_X64_MSR_TIME_REF_COUNT:
1887                 r = true;
1888                 break;
1889         }
1890
1891         return r;
1892 }
1893
1894 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1895 {
1896         struct kvm *kvm = vcpu->kvm;
1897
1898         switch (msr) {
1899         case HV_X64_MSR_GUEST_OS_ID:
1900                 kvm->arch.hv_guest_os_id = data;
1901                 /* setting guest os id to zero disables hypercall page */
1902                 if (!kvm->arch.hv_guest_os_id)
1903                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1904                 break;
1905         case HV_X64_MSR_HYPERCALL: {
1906                 u64 gfn;
1907                 unsigned long addr;
1908                 u8 instructions[4];
1909
1910                 /* if guest os id is not set hypercall should remain disabled */
1911                 if (!kvm->arch.hv_guest_os_id)
1912                         break;
1913                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1914                         kvm->arch.hv_hypercall = data;
1915                         break;
1916                 }
1917                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1918                 addr = gfn_to_hva(kvm, gfn);
1919                 if (kvm_is_error_hva(addr))
1920                         return 1;
1921                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1922                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1923                 if (__copy_to_user((void __user *)addr, instructions, 4))
1924                         return 1;
1925                 kvm->arch.hv_hypercall = data;
1926                 mark_page_dirty(kvm, gfn);
1927                 break;
1928         }
1929         case HV_X64_MSR_REFERENCE_TSC: {
1930                 u64 gfn;
1931                 HV_REFERENCE_TSC_PAGE tsc_ref;
1932                 memset(&tsc_ref, 0, sizeof(tsc_ref));
1933                 kvm->arch.hv_tsc_page = data;
1934                 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1935                         break;
1936                 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
1937                 if (kvm_write_guest(kvm, gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
1938                         &tsc_ref, sizeof(tsc_ref)))
1939                         return 1;
1940                 mark_page_dirty(kvm, gfn);
1941                 break;
1942         }
1943         default:
1944                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1945                             "data 0x%llx\n", msr, data);
1946                 return 1;
1947         }
1948         return 0;
1949 }
1950
1951 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1952 {
1953         switch (msr) {
1954         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1955                 u64 gfn;
1956                 unsigned long addr;
1957
1958                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1959                         vcpu->arch.hv_vapic = data;
1960                         if (kvm_lapic_enable_pv_eoi(vcpu, 0))
1961                                 return 1;
1962                         break;
1963                 }
1964                 gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
1965                 addr = gfn_to_hva(vcpu->kvm, gfn);
1966                 if (kvm_is_error_hva(addr))
1967                         return 1;
1968                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1969                         return 1;
1970                 vcpu->arch.hv_vapic = data;
1971                 mark_page_dirty(vcpu->kvm, gfn);
1972                 if (kvm_lapic_enable_pv_eoi(vcpu, gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
1973                         return 1;
1974                 break;
1975         }
1976         case HV_X64_MSR_EOI:
1977                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1978         case HV_X64_MSR_ICR:
1979                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1980         case HV_X64_MSR_TPR:
1981                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1982         default:
1983                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1984                             "data 0x%llx\n", msr, data);
1985                 return 1;
1986         }
1987
1988         return 0;
1989 }
1990
1991 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1992 {
1993         gpa_t gpa = data & ~0x3f;
1994
1995         /* Bits 2:5 are reserved, Should be zero */
1996         if (data & 0x3c)
1997                 return 1;
1998
1999         vcpu->arch.apf.msr_val = data;
2000
2001         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2002                 kvm_clear_async_pf_completion_queue(vcpu);
2003                 kvm_async_pf_hash_reset(vcpu);
2004                 return 0;
2005         }
2006
2007         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2008                                         sizeof(u32)))
2009                 return 1;
2010
2011         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2012         kvm_async_pf_wakeup_all(vcpu);
2013         return 0;
2014 }
2015
2016 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2017 {
2018         vcpu->arch.pv_time_enabled = false;
2019 }
2020
2021 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2022 {
2023         u64 delta;
2024
2025         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2026                 return;
2027
2028         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2029         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2030         vcpu->arch.st.accum_steal = delta;
2031 }
2032
2033 static void record_steal_time(struct kvm_vcpu *vcpu)
2034 {
2035         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2036                 return;
2037
2038         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2039                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2040                 return;
2041
2042         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2043         vcpu->arch.st.steal.version += 2;
2044         vcpu->arch.st.accum_steal = 0;
2045
2046         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2047                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2048 }
2049
2050 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2051 {
2052         bool pr = false;
2053         u32 msr = msr_info->index;
2054         u64 data = msr_info->data;
2055
2056         switch (msr) {
2057         case MSR_AMD64_NB_CFG:
2058         case MSR_IA32_UCODE_REV:
2059         case MSR_IA32_UCODE_WRITE:
2060         case MSR_VM_HSAVE_PA:
2061         case MSR_AMD64_PATCH_LOADER:
2062         case MSR_AMD64_BU_CFG2:
2063                 break;
2064
2065         case MSR_EFER:
2066                 return set_efer(vcpu, data);
2067         case MSR_K7_HWCR:
2068                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2069                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2070                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2071                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2072                 if (data != 0) {
2073                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2074                                     data);
2075                         return 1;
2076                 }
2077                 break;
2078         case MSR_FAM10H_MMIO_CONF_BASE:
2079                 if (data != 0) {
2080                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2081                                     "0x%llx\n", data);
2082                         return 1;
2083                 }
2084                 break;
2085         case MSR_IA32_DEBUGCTLMSR:
2086                 if (!data) {
2087                         /* We support the non-activated case already */
2088                         break;
2089                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2090                         /* Values other than LBR and BTF are vendor-specific,
2091                            thus reserved and should throw a #GP */
2092                         return 1;
2093                 }
2094                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2095                             __func__, data);
2096                 break;
2097         case 0x200 ... 0x2ff:
2098                 return set_msr_mtrr(vcpu, msr, data);
2099         case MSR_IA32_APICBASE:
2100                 return kvm_set_apic_base(vcpu, msr_info);
2101         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2102                 return kvm_x2apic_msr_write(vcpu, msr, data);
2103         case MSR_IA32_TSCDEADLINE:
2104                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2105                 break;
2106         case MSR_IA32_TSC_ADJUST:
2107                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2108                         if (!msr_info->host_initiated) {
2109                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2110                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2111                         }
2112                         vcpu->arch.ia32_tsc_adjust_msr = data;
2113                 }
2114                 break;
2115         case MSR_IA32_MISC_ENABLE:
2116                 vcpu->arch.ia32_misc_enable_msr = data;
2117                 break;
2118         case MSR_KVM_WALL_CLOCK_NEW:
2119         case MSR_KVM_WALL_CLOCK:
2120                 vcpu->kvm->arch.wall_clock = data;
2121                 kvm_write_wall_clock(vcpu->kvm, data);
2122                 break;
2123         case MSR_KVM_SYSTEM_TIME_NEW:
2124         case MSR_KVM_SYSTEM_TIME: {
2125                 u64 gpa_offset;
2126                 kvmclock_reset(vcpu);
2127
2128                 vcpu->arch.time = data;
2129                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2130
2131                 /* we verify if the enable bit is set... */
2132                 if (!(data & 1))
2133                         break;
2134
2135                 gpa_offset = data & ~(PAGE_MASK | 1);
2136
2137                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2138                      &vcpu->arch.pv_time, data & ~1ULL,
2139                      sizeof(struct pvclock_vcpu_time_info)))
2140                         vcpu->arch.pv_time_enabled = false;
2141                 else
2142                         vcpu->arch.pv_time_enabled = true;
2143
2144                 break;
2145         }
2146         case MSR_KVM_ASYNC_PF_EN:
2147                 if (kvm_pv_enable_async_pf(vcpu, data))
2148                         return 1;
2149                 break;
2150         case MSR_KVM_STEAL_TIME:
2151
2152                 if (unlikely(!sched_info_on()))
2153                         return 1;
2154
2155                 if (data & KVM_STEAL_RESERVED_MASK)
2156                         return 1;
2157
2158                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2159                                                 data & KVM_STEAL_VALID_BITS,
2160                                                 sizeof(struct kvm_steal_time)))
2161                         return 1;
2162
2163                 vcpu->arch.st.msr_val = data;
2164
2165                 if (!(data & KVM_MSR_ENABLED))
2166                         break;
2167
2168                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2169
2170                 preempt_disable();
2171                 accumulate_steal_time(vcpu);
2172                 preempt_enable();
2173
2174                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2175
2176                 break;
2177         case MSR_KVM_PV_EOI_EN:
2178                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2179                         return 1;
2180                 break;
2181
2182         case MSR_IA32_MCG_CTL:
2183         case MSR_IA32_MCG_STATUS:
2184         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2185                 return set_msr_mce(vcpu, msr, data);
2186
2187         /* Performance counters are not protected by a CPUID bit,
2188          * so we should check all of them in the generic path for the sake of
2189          * cross vendor migration.
2190          * Writing a zero into the event select MSRs disables them,
2191          * which we perfectly emulate ;-). Any other value should be at least
2192          * reported, some guests depend on them.
2193          */
2194         case MSR_K7_EVNTSEL0:
2195         case MSR_K7_EVNTSEL1:
2196         case MSR_K7_EVNTSEL2:
2197         case MSR_K7_EVNTSEL3:
2198                 if (data != 0)
2199                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2200                                     "0x%x data 0x%llx\n", msr, data);
2201                 break;
2202         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2203          * so we ignore writes to make it happy.
2204          */
2205         case MSR_K7_PERFCTR0:
2206         case MSR_K7_PERFCTR1:
2207         case MSR_K7_PERFCTR2:
2208         case MSR_K7_PERFCTR3:
2209                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2210                             "0x%x data 0x%llx\n", msr, data);
2211                 break;
2212         case MSR_P6_PERFCTR0:
2213         case MSR_P6_PERFCTR1:
2214                 pr = true;
2215         case MSR_P6_EVNTSEL0:
2216         case MSR_P6_EVNTSEL1:
2217                 if (kvm_pmu_msr(vcpu, msr))
2218                         return kvm_pmu_set_msr(vcpu, msr_info);
2219
2220                 if (pr || data != 0)
2221                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2222                                     "0x%x data 0x%llx\n", msr, data);
2223                 break;
2224         case MSR_K7_CLK_CTL:
2225                 /*
2226                  * Ignore all writes to this no longer documented MSR.
2227                  * Writes are only relevant for old K7 processors,
2228                  * all pre-dating SVM, but a recommended workaround from
2229                  * AMD for these chips. It is possible to specify the
2230                  * affected processor models on the command line, hence
2231                  * the need to ignore the workaround.
2232                  */
2233                 break;
2234         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2235                 if (kvm_hv_msr_partition_wide(msr)) {
2236                         int r;
2237                         mutex_lock(&vcpu->kvm->lock);
2238                         r = set_msr_hyperv_pw(vcpu, msr, data);
2239                         mutex_unlock(&vcpu->kvm->lock);
2240                         return r;
2241                 } else
2242                         return set_msr_hyperv(vcpu, msr, data);
2243                 break;
2244         case MSR_IA32_BBL_CR_CTL3:
2245                 /* Drop writes to this legacy MSR -- see rdmsr
2246                  * counterpart for further detail.
2247                  */
2248                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2249                 break;
2250         case MSR_AMD64_OSVW_ID_LENGTH:
2251                 if (!guest_cpuid_has_osvw(vcpu))
2252                         return 1;
2253                 vcpu->arch.osvw.length = data;
2254                 break;
2255         case MSR_AMD64_OSVW_STATUS:
2256                 if (!guest_cpuid_has_osvw(vcpu))
2257                         return 1;
2258                 vcpu->arch.osvw.status = data;
2259                 break;
2260         default:
2261                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2262                         return xen_hvm_config(vcpu, data);
2263                 if (kvm_pmu_msr(vcpu, msr))
2264                         return kvm_pmu_set_msr(vcpu, msr_info);
2265                 if (!ignore_msrs) {
2266                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2267                                     msr, data);
2268                         return 1;
2269                 } else {
2270                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2271                                     msr, data);
2272                         break;
2273                 }
2274         }
2275         return 0;
2276 }
2277 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2278
2279
2280 /*
2281  * Reads an msr value (of 'msr_index') into 'pdata'.
2282  * Returns 0 on success, non-0 otherwise.
2283  * Assumes vcpu_load() was already called.
2284  */
2285 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2286 {
2287         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2288 }
2289
2290 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2291 {
2292         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2293
2294         if (!msr_mtrr_valid(msr))
2295                 return 1;
2296
2297         if (msr == MSR_MTRRdefType)
2298                 *pdata = vcpu->arch.mtrr_state.def_type +
2299                          (vcpu->arch.mtrr_state.enabled << 10);
2300         else if (msr == MSR_MTRRfix64K_00000)
2301                 *pdata = p[0];
2302         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2303                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2304         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2305                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2306         else if (msr == MSR_IA32_CR_PAT)
2307                 *pdata = vcpu->arch.pat;
2308         else {  /* Variable MTRRs */
2309                 int idx, is_mtrr_mask;
2310                 u64 *pt;
2311
2312                 idx = (msr - 0x200) / 2;
2313                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2314                 if (!is_mtrr_mask)
2315                         pt =
2316                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2317                 else
2318                         pt =
2319                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2320                 *pdata = *pt;
2321         }
2322
2323         return 0;
2324 }
2325
2326 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2327 {
2328         u64 data;
2329         u64 mcg_cap = vcpu->arch.mcg_cap;
2330         unsigned bank_num = mcg_cap & 0xff;
2331
2332         switch (msr) {
2333         case MSR_IA32_P5_MC_ADDR:
2334         case MSR_IA32_P5_MC_TYPE:
2335                 data = 0;
2336                 break;
2337         case MSR_IA32_MCG_CAP:
2338                 data = vcpu->arch.mcg_cap;
2339                 break;
2340         case MSR_IA32_MCG_CTL:
2341                 if (!(mcg_cap & MCG_CTL_P))
2342                         return 1;
2343                 data = vcpu->arch.mcg_ctl;
2344                 break;
2345         case MSR_IA32_MCG_STATUS:
2346                 data = vcpu->arch.mcg_status;
2347                 break;
2348         default:
2349                 if (msr >= MSR_IA32_MC0_CTL &&
2350                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2351                         u32 offset = msr - MSR_IA32_MC0_CTL;
2352                         data = vcpu->arch.mce_banks[offset];
2353                         break;
2354                 }
2355                 return 1;
2356         }
2357         *pdata = data;
2358         return 0;
2359 }
2360
2361 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2362 {
2363         u64 data = 0;
2364         struct kvm *kvm = vcpu->kvm;
2365
2366         switch (msr) {
2367         case HV_X64_MSR_GUEST_OS_ID:
2368                 data = kvm->arch.hv_guest_os_id;
2369                 break;
2370         case HV_X64_MSR_HYPERCALL:
2371                 data = kvm->arch.hv_hypercall;
2372                 break;
2373         case HV_X64_MSR_TIME_REF_COUNT: {
2374                 data =
2375                      div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2376                 break;
2377         }
2378         case HV_X64_MSR_REFERENCE_TSC:
2379                 data = kvm->arch.hv_tsc_page;
2380                 break;
2381         default:
2382                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2383                 return 1;
2384         }
2385
2386         *pdata = data;
2387         return 0;
2388 }
2389
2390 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2391 {
2392         u64 data = 0;
2393
2394         switch (msr) {
2395         case HV_X64_MSR_VP_INDEX: {
2396                 int r;
2397                 struct kvm_vcpu *v;
2398                 kvm_for_each_vcpu(r, v, vcpu->kvm) {
2399                         if (v == vcpu) {
2400                                 data = r;
2401                                 break;
2402                         }
2403                 }
2404                 break;
2405         }
2406         case HV_X64_MSR_EOI:
2407                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2408         case HV_X64_MSR_ICR:
2409                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2410         case HV_X64_MSR_TPR:
2411                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2412         case HV_X64_MSR_APIC_ASSIST_PAGE:
2413                 data = vcpu->arch.hv_vapic;
2414                 break;
2415         default:
2416                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2417                 return 1;
2418         }
2419         *pdata = data;
2420         return 0;
2421 }
2422
2423 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2424 {
2425         u64 data;
2426
2427         switch (msr) {
2428         case MSR_IA32_PLATFORM_ID:
2429         case MSR_IA32_EBL_CR_POWERON:
2430         case MSR_IA32_DEBUGCTLMSR:
2431         case MSR_IA32_LASTBRANCHFROMIP:
2432         case MSR_IA32_LASTBRANCHTOIP:
2433         case MSR_IA32_LASTINTFROMIP:
2434         case MSR_IA32_LASTINTTOIP:
2435         case MSR_K8_SYSCFG:
2436         case MSR_K7_HWCR:
2437         case MSR_VM_HSAVE_PA:
2438         case MSR_K7_EVNTSEL0:
2439         case MSR_K7_EVNTSEL1:
2440         case MSR_K7_EVNTSEL2:
2441         case MSR_K7_EVNTSEL3:
2442         case MSR_K7_PERFCTR0:
2443         case MSR_K7_PERFCTR1:
2444         case MSR_K7_PERFCTR2:
2445         case MSR_K7_PERFCTR3:
2446         case MSR_K8_INT_PENDING_MSG:
2447         case MSR_AMD64_NB_CFG:
2448         case MSR_FAM10H_MMIO_CONF_BASE:
2449         case MSR_AMD64_BU_CFG2:
2450                 data = 0;
2451                 break;
2452         case MSR_P6_PERFCTR0:
2453         case MSR_P6_PERFCTR1:
2454         case MSR_P6_EVNTSEL0:
2455         case MSR_P6_EVNTSEL1:
2456                 if (kvm_pmu_msr(vcpu, msr))
2457                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2458                 data = 0;
2459                 break;
2460         case MSR_IA32_UCODE_REV:
2461                 data = 0x100000000ULL;
2462                 break;
2463         case MSR_MTRRcap:
2464                 data = 0x500 | KVM_NR_VAR_MTRR;
2465                 break;
2466         case 0x200 ... 0x2ff:
2467                 return get_msr_mtrr(vcpu, msr, pdata);
2468         case 0xcd: /* fsb frequency */
2469                 data = 3;
2470                 break;
2471                 /*
2472                  * MSR_EBC_FREQUENCY_ID
2473                  * Conservative value valid for even the basic CPU models.
2474                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2475                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2476                  * and 266MHz for model 3, or 4. Set Core Clock
2477                  * Frequency to System Bus Frequency Ratio to 1 (bits
2478                  * 31:24) even though these are only valid for CPU
2479                  * models > 2, however guests may end up dividing or
2480                  * multiplying by zero otherwise.
2481                  */
2482         case MSR_EBC_FREQUENCY_ID:
2483                 data = 1 << 24;
2484                 break;
2485         case MSR_IA32_APICBASE:
2486                 data = kvm_get_apic_base(vcpu);
2487                 break;
2488         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2489                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2490                 break;
2491         case MSR_IA32_TSCDEADLINE:
2492                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2493                 break;
2494         case MSR_IA32_TSC_ADJUST:
2495                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2496                 break;
2497         case MSR_IA32_MISC_ENABLE:
2498                 data = vcpu->arch.ia32_misc_enable_msr;
2499                 break;
2500         case MSR_IA32_PERF_STATUS:
2501                 /* TSC increment by tick */
2502                 data = 1000ULL;
2503                 /* CPU multiplier */
2504                 data |= (((uint64_t)4ULL) << 40);
2505                 break;
2506         case MSR_EFER:
2507                 data = vcpu->arch.efer;
2508                 break;
2509         case MSR_KVM_WALL_CLOCK:
2510         case MSR_KVM_WALL_CLOCK_NEW:
2511                 data = vcpu->kvm->arch.wall_clock;
2512                 break;
2513         case MSR_KVM_SYSTEM_TIME:
2514         case MSR_KVM_SYSTEM_TIME_NEW:
2515                 data = vcpu->arch.time;
2516                 break;
2517         case MSR_KVM_ASYNC_PF_EN:
2518                 data = vcpu->arch.apf.msr_val;
2519                 break;
2520         case MSR_KVM_STEAL_TIME:
2521                 data = vcpu->arch.st.msr_val;
2522                 break;
2523         case MSR_KVM_PV_EOI_EN:
2524                 data = vcpu->arch.pv_eoi.msr_val;
2525                 break;
2526         case MSR_IA32_P5_MC_ADDR:
2527         case MSR_IA32_P5_MC_TYPE:
2528         case MSR_IA32_MCG_CAP:
2529         case MSR_IA32_MCG_CTL:
2530         case MSR_IA32_MCG_STATUS:
2531         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2532                 return get_msr_mce(vcpu, msr, pdata);
2533         case MSR_K7_CLK_CTL:
2534                 /*
2535                  * Provide expected ramp-up count for K7. All other
2536                  * are set to zero, indicating minimum divisors for
2537                  * every field.
2538                  *
2539                  * This prevents guest kernels on AMD host with CPU
2540                  * type 6, model 8 and higher from exploding due to
2541                  * the rdmsr failing.
2542                  */
2543                 data = 0x20000000;
2544                 break;
2545         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2546                 if (kvm_hv_msr_partition_wide(msr)) {
2547                         int r;
2548                         mutex_lock(&vcpu->kvm->lock);
2549                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2550                         mutex_unlock(&vcpu->kvm->lock);
2551                         return r;
2552                 } else
2553                         return get_msr_hyperv(vcpu, msr, pdata);
2554                 break;
2555         case MSR_IA32_BBL_CR_CTL3:
2556                 /* This legacy MSR exists but isn't fully documented in current
2557                  * silicon.  It is however accessed by winxp in very narrow
2558                  * scenarios where it sets bit #19, itself documented as
2559                  * a "reserved" bit.  Best effort attempt to source coherent
2560                  * read data here should the balance of the register be
2561                  * interpreted by the guest:
2562                  *
2563                  * L2 cache control register 3: 64GB range, 256KB size,
2564                  * enabled, latency 0x1, configured
2565                  */
2566                 data = 0xbe702111;
2567                 break;
2568         case MSR_AMD64_OSVW_ID_LENGTH:
2569                 if (!guest_cpuid_has_osvw(vcpu))
2570                         return 1;
2571                 data = vcpu->arch.osvw.length;
2572                 break;
2573         case MSR_AMD64_OSVW_STATUS:
2574                 if (!guest_cpuid_has_osvw(vcpu))
2575                         return 1;
2576                 data = vcpu->arch.osvw.status;
2577                 break;
2578         default:
2579                 if (kvm_pmu_msr(vcpu, msr))
2580                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2581                 if (!ignore_msrs) {
2582                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2583                         return 1;
2584                 } else {
2585                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2586                         data = 0;
2587                 }
2588                 break;
2589         }
2590         *pdata = data;
2591         return 0;
2592 }
2593 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2594
2595 /*
2596  * Read or write a bunch of msrs. All parameters are kernel addresses.
2597  *
2598  * @return number of msrs set successfully.
2599  */
2600 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2601                     struct kvm_msr_entry *entries,
2602                     int (*do_msr)(struct kvm_vcpu *vcpu,
2603                                   unsigned index, u64 *data))
2604 {
2605         int i, idx;
2606
2607         idx = srcu_read_lock(&vcpu->kvm->srcu);
2608         for (i = 0; i < msrs->nmsrs; ++i)
2609                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2610                         break;
2611         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2612
2613         return i;
2614 }
2615
2616 /*
2617  * Read or write a bunch of msrs. Parameters are user addresses.
2618  *
2619  * @return number of msrs set successfully.
2620  */
2621 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2622                   int (*do_msr)(struct kvm_vcpu *vcpu,
2623                                 unsigned index, u64 *data),
2624                   int writeback)
2625 {
2626         struct kvm_msrs msrs;
2627         struct kvm_msr_entry *entries;
2628         int r, n;
2629         unsigned size;
2630
2631         r = -EFAULT;
2632         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2633                 goto out;
2634
2635         r = -E2BIG;
2636         if (msrs.nmsrs >= MAX_IO_MSRS)
2637                 goto out;
2638
2639         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2640         entries = memdup_user(user_msrs->entries, size);
2641         if (IS_ERR(entries)) {
2642                 r = PTR_ERR(entries);
2643                 goto out;
2644         }
2645
2646         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2647         if (r < 0)
2648                 goto out_free;
2649
2650         r = -EFAULT;
2651         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2652                 goto out_free;
2653
2654         r = n;
2655
2656 out_free:
2657         kfree(entries);
2658 out:
2659         return r;
2660 }
2661
2662 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2663 {
2664         int r;
2665
2666         switch (ext) {
2667         case KVM_CAP_IRQCHIP:
2668         case KVM_CAP_HLT:
2669         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2670         case KVM_CAP_SET_TSS_ADDR:
2671         case KVM_CAP_EXT_CPUID:
2672         case KVM_CAP_EXT_EMUL_CPUID:
2673         case KVM_CAP_CLOCKSOURCE:
2674         case KVM_CAP_PIT:
2675         case KVM_CAP_NOP_IO_DELAY:
2676         case KVM_CAP_MP_STATE:
2677         case KVM_CAP_SYNC_MMU:
2678         case KVM_CAP_USER_NMI:
2679         case KVM_CAP_REINJECT_CONTROL:
2680         case KVM_CAP_IRQ_INJECT_STATUS:
2681         case KVM_CAP_IRQFD:
2682         case KVM_CAP_IOEVENTFD:
2683         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2684         case KVM_CAP_PIT2:
2685         case KVM_CAP_PIT_STATE2:
2686         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2687         case KVM_CAP_XEN_HVM:
2688         case KVM_CAP_ADJUST_CLOCK:
2689         case KVM_CAP_VCPU_EVENTS:
2690         case KVM_CAP_HYPERV:
2691         case KVM_CAP_HYPERV_VAPIC:
2692         case KVM_CAP_HYPERV_SPIN:
2693         case KVM_CAP_PCI_SEGMENT:
2694         case KVM_CAP_DEBUGREGS:
2695         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2696         case KVM_CAP_XSAVE:
2697         case KVM_CAP_ASYNC_PF:
2698         case KVM_CAP_GET_TSC_KHZ:
2699         case KVM_CAP_KVMCLOCK_CTRL:
2700         case KVM_CAP_READONLY_MEM:
2701         case KVM_CAP_HYPERV_TIME:
2702         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2703 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2704         case KVM_CAP_ASSIGN_DEV_IRQ:
2705         case KVM_CAP_PCI_2_3:
2706 #endif
2707                 r = 1;
2708                 break;
2709         case KVM_CAP_COALESCED_MMIO:
2710                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2711                 break;
2712         case KVM_CAP_VAPIC:
2713                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2714                 break;
2715         case KVM_CAP_NR_VCPUS:
2716                 r = KVM_SOFT_MAX_VCPUS;
2717                 break;
2718         case KVM_CAP_MAX_VCPUS:
2719                 r = KVM_MAX_VCPUS;
2720                 break;
2721         case KVM_CAP_NR_MEMSLOTS:
2722                 r = KVM_USER_MEM_SLOTS;
2723                 break;
2724         case KVM_CAP_PV_MMU:    /* obsolete */
2725                 r = 0;
2726                 break;
2727 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2728         case KVM_CAP_IOMMU:
2729                 r = iommu_present(&pci_bus_type);
2730                 break;
2731 #endif
2732         case KVM_CAP_MCE:
2733                 r = KVM_MAX_MCE_BANKS;
2734                 break;
2735         case KVM_CAP_XCRS:
2736                 r = cpu_has_xsave;
2737                 break;
2738         case KVM_CAP_TSC_CONTROL:
2739                 r = kvm_has_tsc_control;
2740                 break;
2741         case KVM_CAP_TSC_DEADLINE_TIMER:
2742                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2743                 break;
2744         default:
2745                 r = 0;
2746                 break;
2747         }
2748         return r;
2749
2750 }
2751
2752 long kvm_arch_dev_ioctl(struct file *filp,
2753                         unsigned int ioctl, unsigned long arg)
2754 {
2755         void __user *argp = (void __user *)arg;
2756         long r;
2757
2758         switch (ioctl) {
2759         case KVM_GET_MSR_INDEX_LIST: {
2760                 struct kvm_msr_list __user *user_msr_list = argp;
2761                 struct kvm_msr_list msr_list;
2762                 unsigned n;
2763
2764                 r = -EFAULT;
2765                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2766                         goto out;
2767                 n = msr_list.nmsrs;
2768                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2769                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2770                         goto out;
2771                 r = -E2BIG;
2772                 if (n < msr_list.nmsrs)
2773                         goto out;
2774                 r = -EFAULT;
2775                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2776                                  num_msrs_to_save * sizeof(u32)))
2777                         goto out;
2778                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2779                                  &emulated_msrs,
2780                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2781                         goto out;
2782                 r = 0;
2783                 break;
2784         }
2785         case KVM_GET_SUPPORTED_CPUID:
2786         case KVM_GET_EMULATED_CPUID: {
2787                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2788                 struct kvm_cpuid2 cpuid;
2789
2790                 r = -EFAULT;
2791                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2792                         goto out;
2793
2794                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2795                                             ioctl);
2796                 if (r)
2797                         goto out;
2798
2799                 r = -EFAULT;
2800                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2801                         goto out;
2802                 r = 0;
2803                 break;
2804         }
2805         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2806                 u64 mce_cap;
2807
2808                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2809                 r = -EFAULT;
2810                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2811                         goto out;
2812                 r = 0;
2813                 break;
2814         }
2815         default:
2816                 r = -EINVAL;
2817         }
2818 out:
2819         return r;
2820 }
2821
2822 static void wbinvd_ipi(void *garbage)
2823 {
2824         wbinvd();
2825 }
2826
2827 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2828 {
2829         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2830 }
2831
2832 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2833 {
2834         /* Address WBINVD may be executed by guest */
2835         if (need_emulate_wbinvd(vcpu)) {
2836                 if (kvm_x86_ops->has_wbinvd_exit())
2837                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2838                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2839                         smp_call_function_single(vcpu->cpu,
2840                                         wbinvd_ipi, NULL, 1);
2841         }
2842
2843         kvm_x86_ops->vcpu_load(vcpu, cpu);
2844
2845         /* Apply any externally detected TSC adjustments (due to suspend) */
2846         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2847                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2848                 vcpu->arch.tsc_offset_adjustment = 0;
2849                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2850         }
2851
2852         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2853                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2854                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2855                 if (tsc_delta < 0)
2856                         mark_tsc_unstable("KVM discovered backwards TSC");
2857                 if (check_tsc_unstable()) {
2858                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2859                                                 vcpu->arch.last_guest_tsc);
2860                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2861                         vcpu->arch.tsc_catchup = 1;
2862                 }
2863                 /*
2864                  * On a host with synchronized TSC, there is no need to update
2865                  * kvmclock on vcpu->cpu migration
2866                  */
2867                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2868                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2869                 if (vcpu->cpu != cpu)
2870                         kvm_migrate_timers(vcpu);
2871                 vcpu->cpu = cpu;
2872         }
2873
2874         accumulate_steal_time(vcpu);
2875         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2876 }
2877
2878 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2879 {
2880         kvm_x86_ops->vcpu_put(vcpu);
2881         kvm_put_guest_fpu(vcpu);
2882         vcpu->arch.last_host_tsc = native_read_tsc();
2883 }
2884
2885 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2886                                     struct kvm_lapic_state *s)
2887 {
2888         kvm_x86_ops->sync_pir_to_irr(vcpu);
2889         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2890
2891         return 0;
2892 }
2893
2894 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2895                                     struct kvm_lapic_state *s)
2896 {
2897         kvm_apic_post_state_restore(vcpu, s);
2898         update_cr8_intercept(vcpu);
2899
2900         return 0;
2901 }
2902
2903 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2904                                     struct kvm_interrupt *irq)
2905 {
2906         if (irq->irq >= KVM_NR_INTERRUPTS)
2907                 return -EINVAL;
2908         if (irqchip_in_kernel(vcpu->kvm))
2909                 return -ENXIO;
2910
2911         kvm_queue_interrupt(vcpu, irq->irq, false);
2912         kvm_make_request(KVM_REQ_EVENT, vcpu);
2913
2914         return 0;
2915 }
2916
2917 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2918 {
2919         kvm_inject_nmi(vcpu);
2920
2921         return 0;
2922 }
2923
2924 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2925                                            struct kvm_tpr_access_ctl *tac)
2926 {
2927         if (tac->flags)
2928                 return -EINVAL;
2929         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2930         return 0;
2931 }
2932
2933 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2934                                         u64 mcg_cap)
2935 {
2936         int r;
2937         unsigned bank_num = mcg_cap & 0xff, bank;
2938
2939         r = -EINVAL;
2940         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2941                 goto out;
2942         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2943                 goto out;
2944         r = 0;
2945         vcpu->arch.mcg_cap = mcg_cap;
2946         /* Init IA32_MCG_CTL to all 1s */
2947         if (mcg_cap & MCG_CTL_P)
2948                 vcpu->arch.mcg_ctl = ~(u64)0;
2949         /* Init IA32_MCi_CTL to all 1s */
2950         for (bank = 0; bank < bank_num; bank++)
2951                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2952 out:
2953         return r;
2954 }
2955
2956 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2957                                       struct kvm_x86_mce *mce)
2958 {
2959         u64 mcg_cap = vcpu->arch.mcg_cap;
2960         unsigned bank_num = mcg_cap & 0xff;
2961         u64 *banks = vcpu->arch.mce_banks;
2962
2963         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2964                 return -EINVAL;
2965         /*
2966          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2967          * reporting is disabled
2968          */
2969         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2970             vcpu->arch.mcg_ctl != ~(u64)0)
2971                 return 0;
2972         banks += 4 * mce->bank;
2973         /*
2974          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2975          * reporting is disabled for the bank
2976          */
2977         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2978                 return 0;
2979         if (mce->status & MCI_STATUS_UC) {
2980                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2981                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2982                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2983                         return 0;
2984                 }
2985                 if (banks[1] & MCI_STATUS_VAL)
2986                         mce->status |= MCI_STATUS_OVER;
2987                 banks[2] = mce->addr;
2988                 banks[3] = mce->misc;
2989                 vcpu->arch.mcg_status = mce->mcg_status;
2990                 banks[1] = mce->status;
2991                 kvm_queue_exception(vcpu, MC_VECTOR);
2992         } else if (!(banks[1] & MCI_STATUS_VAL)
2993                    || !(banks[1] & MCI_STATUS_UC)) {
2994                 if (banks[1] & MCI_STATUS_VAL)
2995                         mce->status |= MCI_STATUS_OVER;
2996                 banks[2] = mce->addr;
2997                 banks[3] = mce->misc;
2998                 banks[1] = mce->status;
2999         } else
3000                 banks[1] |= MCI_STATUS_OVER;
3001         return 0;
3002 }
3003
3004 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3005                                                struct kvm_vcpu_events *events)
3006 {
3007         process_nmi(vcpu);
3008         events->exception.injected =
3009                 vcpu->arch.exception.pending &&
3010                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3011         events->exception.nr = vcpu->arch.exception.nr;
3012         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3013         events->exception.pad = 0;
3014         events->exception.error_code = vcpu->arch.exception.error_code;
3015
3016         events->interrupt.injected =
3017                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3018         events->interrupt.nr = vcpu->arch.interrupt.nr;
3019         events->interrupt.soft = 0;
3020         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3021
3022         events->nmi.injected = vcpu->arch.nmi_injected;
3023         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3024         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3025         events->nmi.pad = 0;
3026
3027         events->sipi_vector = 0; /* never valid when reporting to user space */
3028
3029         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3030                          | KVM_VCPUEVENT_VALID_SHADOW);
3031         memset(&events->reserved, 0, sizeof(events->reserved));
3032 }
3033
3034 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3035                                               struct kvm_vcpu_events *events)
3036 {
3037         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3038                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3039                               | KVM_VCPUEVENT_VALID_SHADOW))
3040                 return -EINVAL;
3041
3042         process_nmi(vcpu);
3043         vcpu->arch.exception.pending = events->exception.injected;
3044         vcpu->arch.exception.nr = events->exception.nr;
3045         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3046         vcpu->arch.exception.error_code = events->exception.error_code;
3047
3048         vcpu->arch.interrupt.pending = events->interrupt.injected;
3049         vcpu->arch.interrupt.nr = events->interrupt.nr;
3050         vcpu->arch.interrupt.soft = events->interrupt.soft;
3051         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3052                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3053                                                   events->interrupt.shadow);
3054
3055         vcpu->arch.nmi_injected = events->nmi.injected;
3056         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3057                 vcpu->arch.nmi_pending = events->nmi.pending;
3058         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3059
3060         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3061             kvm_vcpu_has_lapic(vcpu))
3062                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3063
3064         kvm_make_request(KVM_REQ_EVENT, vcpu);
3065
3066         return 0;
3067 }
3068
3069 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3070                                              struct kvm_debugregs *dbgregs)
3071 {
3072         unsigned long val;
3073
3074         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3075         _kvm_get_dr(vcpu, 6, &val);
3076         dbgregs->dr6 = val;
3077         dbgregs->dr7 = vcpu->arch.dr7;
3078         dbgregs->flags = 0;
3079         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3080 }
3081
3082 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3083                                             struct kvm_debugregs *dbgregs)
3084 {
3085         if (dbgregs->flags)
3086                 return -EINVAL;
3087
3088         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3089         vcpu->arch.dr6 = dbgregs->dr6;
3090         kvm_update_dr6(vcpu);
3091         vcpu->arch.dr7 = dbgregs->dr7;
3092         kvm_update_dr7(vcpu);
3093
3094         return 0;
3095 }
3096
3097 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3098                                          struct kvm_xsave *guest_xsave)
3099 {
3100         if (cpu_has_xsave) {
3101                 memcpy(guest_xsave->region,
3102                         &vcpu->arch.guest_fpu.state->xsave,
3103                         vcpu->arch.guest_xstate_size);
3104                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] &=
3105                         vcpu->arch.guest_supported_xcr0 | XSTATE_FPSSE;
3106         } else {
3107                 memcpy(guest_xsave->region,
3108                         &vcpu->arch.guest_fpu.state->fxsave,
3109                         sizeof(struct i387_fxsave_struct));
3110                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3111                         XSTATE_FPSSE;
3112         }
3113 }
3114
3115 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3116                                         struct kvm_xsave *guest_xsave)
3117 {
3118         u64 xstate_bv =
3119                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3120
3121         if (cpu_has_xsave) {
3122                 /*
3123                  * Here we allow setting states that are not present in
3124                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3125                  * with old userspace.
3126                  */
3127                 if (xstate_bv & ~kvm_supported_xcr0())
3128                         return -EINVAL;
3129                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
3130                         guest_xsave->region, vcpu->arch.guest_xstate_size);
3131         } else {
3132                 if (xstate_bv & ~XSTATE_FPSSE)
3133                         return -EINVAL;
3134                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3135                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3136         }
3137         return 0;
3138 }
3139
3140 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3141                                         struct kvm_xcrs *guest_xcrs)
3142 {
3143         if (!cpu_has_xsave) {
3144                 guest_xcrs->nr_xcrs = 0;
3145                 return;
3146         }
3147
3148         guest_xcrs->nr_xcrs = 1;
3149         guest_xcrs->flags = 0;
3150         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3151         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3152 }
3153
3154 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3155                                        struct kvm_xcrs *guest_xcrs)
3156 {
3157         int i, r = 0;
3158
3159         if (!cpu_has_xsave)
3160                 return -EINVAL;
3161
3162         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3163                 return -EINVAL;
3164
3165         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3166                 /* Only support XCR0 currently */
3167                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3168                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3169                                 guest_xcrs->xcrs[i].value);
3170                         break;
3171                 }
3172         if (r)
3173                 r = -EINVAL;
3174         return r;
3175 }
3176
3177 /*
3178  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3179  * stopped by the hypervisor.  This function will be called from the host only.
3180  * EINVAL is returned when the host attempts to set the flag for a guest that
3181  * does not support pv clocks.
3182  */
3183 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3184 {
3185         if (!vcpu->arch.pv_time_enabled)
3186                 return -EINVAL;
3187         vcpu->arch.pvclock_set_guest_stopped_request = true;
3188         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3189         return 0;
3190 }
3191
3192 long kvm_arch_vcpu_ioctl(struct file *filp,
3193                          unsigned int ioctl, unsigned long arg)
3194 {
3195         struct kvm_vcpu *vcpu = filp->private_data;
3196         void __user *argp = (void __user *)arg;
3197         int r;
3198         union {
3199                 struct kvm_lapic_state *lapic;
3200                 struct kvm_xsave *xsave;
3201                 struct kvm_xcrs *xcrs;
3202                 void *buffer;
3203         } u;
3204
3205         u.buffer = NULL;
3206         switch (ioctl) {
3207         case KVM_GET_LAPIC: {
3208                 r = -EINVAL;
3209                 if (!vcpu->arch.apic)
3210                         goto out;
3211                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3212
3213                 r = -ENOMEM;
3214                 if (!u.lapic)
3215                         goto out;
3216                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3217                 if (r)
3218                         goto out;
3219                 r = -EFAULT;
3220                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3221                         goto out;
3222                 r = 0;
3223                 break;
3224         }
3225         case KVM_SET_LAPIC: {
3226                 r = -EINVAL;
3227                 if (!vcpu->arch.apic)
3228                         goto out;
3229                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3230                 if (IS_ERR(u.lapic))
3231                         return PTR_ERR(u.lapic);
3232
3233                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3234                 break;
3235         }
3236         case KVM_INTERRUPT: {
3237                 struct kvm_interrupt irq;
3238
3239                 r = -EFAULT;
3240                 if (copy_from_user(&irq, argp, sizeof irq))
3241                         goto out;
3242                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3243                 break;
3244         }
3245         case KVM_NMI: {
3246                 r = kvm_vcpu_ioctl_nmi(vcpu);
3247                 break;
3248         }
3249         case KVM_SET_CPUID: {
3250                 struct kvm_cpuid __user *cpuid_arg = argp;
3251                 struct kvm_cpuid cpuid;
3252
3253                 r = -EFAULT;
3254                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3255                         goto out;
3256                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3257                 break;
3258         }
3259         case KVM_SET_CPUID2: {
3260                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3261                 struct kvm_cpuid2 cpuid;
3262
3263                 r = -EFAULT;
3264                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3265                         goto out;
3266                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3267                                               cpuid_arg->entries);
3268                 break;
3269         }
3270         case KVM_GET_CPUID2: {
3271                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3272                 struct kvm_cpuid2 cpuid;
3273
3274                 r = -EFAULT;
3275                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3276                         goto out;
3277                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3278                                               cpuid_arg->entries);
3279                 if (r)
3280                         goto out;
3281                 r = -EFAULT;
3282                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3283                         goto out;
3284                 r = 0;
3285                 break;
3286         }
3287         case KVM_GET_MSRS:
3288                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3289                 break;
3290         case KVM_SET_MSRS:
3291                 r = msr_io(vcpu, argp, do_set_msr, 0);
3292                 break;
3293         case KVM_TPR_ACCESS_REPORTING: {
3294                 struct kvm_tpr_access_ctl tac;
3295
3296                 r = -EFAULT;
3297                 if (copy_from_user(&tac, argp, sizeof tac))
3298                         goto out;
3299                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3300                 if (r)
3301                         goto out;
3302                 r = -EFAULT;
3303                 if (copy_to_user(argp, &tac, sizeof tac))
3304                         goto out;
3305                 r = 0;
3306                 break;
3307         };
3308         case KVM_SET_VAPIC_ADDR: {
3309                 struct kvm_vapic_addr va;
3310
3311                 r = -EINVAL;
3312                 if (!irqchip_in_kernel(vcpu->kvm))
3313                         goto out;
3314                 r = -EFAULT;
3315                 if (copy_from_user(&va, argp, sizeof va))
3316                         goto out;
3317                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3318                 break;
3319         }
3320         case KVM_X86_SETUP_MCE: {
3321                 u64 mcg_cap;
3322
3323                 r = -EFAULT;
3324                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3325                         goto out;
3326                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3327                 break;
3328         }
3329         case KVM_X86_SET_MCE: {
3330                 struct kvm_x86_mce mce;
3331
3332                 r = -EFAULT;
3333                 if (copy_from_user(&mce, argp, sizeof mce))
3334                         goto out;
3335                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3336                 break;
3337         }
3338         case KVM_GET_VCPU_EVENTS: {
3339                 struct kvm_vcpu_events events;
3340
3341                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3342
3343                 r = -EFAULT;
3344                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3345                         break;
3346                 r = 0;
3347                 break;
3348         }
3349         case KVM_SET_VCPU_EVENTS: {
3350                 struct kvm_vcpu_events events;
3351
3352                 r = -EFAULT;
3353                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3354                         break;
3355
3356                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3357                 break;
3358         }
3359         case KVM_GET_DEBUGREGS: {
3360                 struct kvm_debugregs dbgregs;
3361
3362                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3363
3364                 r = -EFAULT;
3365                 if (copy_to_user(argp, &dbgregs,
3366                                  sizeof(struct kvm_debugregs)))
3367                         break;
3368                 r = 0;
3369                 break;
3370         }
3371         case KVM_SET_DEBUGREGS: {
3372                 struct kvm_debugregs dbgregs;
3373
3374                 r = -EFAULT;
3375                 if (copy_from_user(&dbgregs, argp,
3376                                    sizeof(struct kvm_debugregs)))
3377                         break;
3378
3379                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3380                 break;
3381         }
3382         case KVM_GET_XSAVE: {
3383                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3384                 r = -ENOMEM;
3385                 if (!u.xsave)
3386                         break;
3387
3388                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3389
3390                 r = -EFAULT;
3391                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3392                         break;
3393                 r = 0;
3394                 break;
3395         }
3396         case KVM_SET_XSAVE: {
3397                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3398                 if (IS_ERR(u.xsave))
3399                         return PTR_ERR(u.xsave);
3400
3401                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3402                 break;
3403         }
3404         case KVM_GET_XCRS: {
3405                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3406                 r = -ENOMEM;
3407                 if (!u.xcrs)
3408                         break;
3409
3410                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3411
3412                 r = -EFAULT;
3413                 if (copy_to_user(argp, u.xcrs,
3414                                  sizeof(struct kvm_xcrs)))
3415                         break;
3416                 r = 0;
3417                 break;
3418         }
3419         case KVM_SET_XCRS: {
3420                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3421                 if (IS_ERR(u.xcrs))
3422                         return PTR_ERR(u.xcrs);
3423
3424                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3425                 break;
3426         }
3427         case KVM_SET_TSC_KHZ: {
3428                 u32 user_tsc_khz;
3429
3430                 r = -EINVAL;
3431                 user_tsc_khz = (u32)arg;
3432
3433                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3434                         goto out;
3435
3436                 if (user_tsc_khz == 0)
3437                         user_tsc_khz = tsc_khz;
3438
3439                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3440
3441                 r = 0;
3442                 goto out;
3443         }
3444         case KVM_GET_TSC_KHZ: {
3445                 r = vcpu->arch.virtual_tsc_khz;
3446                 goto out;
3447         }
3448         case KVM_KVMCLOCK_CTRL: {
3449                 r = kvm_set_guest_paused(vcpu);
3450                 goto out;
3451         }
3452         default:
3453                 r = -EINVAL;
3454         }
3455 out:
3456         kfree(u.buffer);
3457         return r;
3458 }
3459
3460 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3461 {
3462         return VM_FAULT_SIGBUS;
3463 }
3464
3465 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3466 {
3467         int ret;
3468
3469         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3470                 return -EINVAL;
3471         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3472         return ret;
3473 }
3474
3475 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3476                                               u64 ident_addr)
3477 {
3478         kvm->arch.ept_identity_map_addr = ident_addr;
3479         return 0;
3480 }
3481
3482 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3483                                           u32 kvm_nr_mmu_pages)
3484 {
3485         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3486                 return -EINVAL;
3487
3488         mutex_lock(&kvm->slots_lock);
3489
3490         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3491         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3492
3493         mutex_unlock(&kvm->slots_lock);
3494         return 0;
3495 }
3496
3497 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3498 {
3499         return kvm->arch.n_max_mmu_pages;
3500 }
3501
3502 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3503 {
3504         int r;
3505
3506         r = 0;
3507         switch (chip->chip_id) {
3508         case KVM_IRQCHIP_PIC_MASTER:
3509                 memcpy(&chip->chip.pic,
3510                         &pic_irqchip(kvm)->pics[0],
3511                         sizeof(struct kvm_pic_state));
3512                 break;
3513         case KVM_IRQCHIP_PIC_SLAVE:
3514                 memcpy(&chip->chip.pic,
3515                         &pic_irqchip(kvm)->pics[1],
3516                         sizeof(struct kvm_pic_state));
3517                 break;
3518         case KVM_IRQCHIP_IOAPIC:
3519                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3520                 break;
3521         default:
3522                 r = -EINVAL;
3523                 break;
3524         }
3525         return r;
3526 }
3527
3528 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3529 {
3530         int r;
3531
3532         r = 0;
3533         switch (chip->chip_id) {
3534         case KVM_IRQCHIP_PIC_MASTER:
3535                 spin_lock(&pic_irqchip(kvm)->lock);
3536                 memcpy(&pic_irqchip(kvm)->pics[0],
3537                         &chip->chip.pic,
3538                         sizeof(struct kvm_pic_state));
3539                 spin_unlock(&pic_irqchip(kvm)->lock);
3540                 break;
3541         case KVM_IRQCHIP_PIC_SLAVE:
3542                 spin_lock(&pic_irqchip(kvm)->lock);
3543                 memcpy(&pic_irqchip(kvm)->pics[1],
3544                         &chip->chip.pic,
3545                         sizeof(struct kvm_pic_state));
3546                 spin_unlock(&pic_irqchip(kvm)->lock);
3547                 break;
3548         case KVM_IRQCHIP_IOAPIC:
3549                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3550                 break;
3551         default:
3552                 r = -EINVAL;
3553                 break;
3554         }
3555         kvm_pic_update_irq(pic_irqchip(kvm));
3556         return r;
3557 }
3558
3559 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3560 {
3561         int r = 0;
3562
3563         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3564         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3565         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3566         return r;
3567 }
3568
3569 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3570 {
3571         int r = 0;
3572
3573         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3574         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3575         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3576         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3577         return r;
3578 }
3579
3580 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3581 {
3582         int r = 0;
3583
3584         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3585         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3586                 sizeof(ps->channels));
3587         ps->flags = kvm->arch.vpit->pit_state.flags;
3588         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3589         memset(&ps->reserved, 0, sizeof(ps->reserved));
3590         return r;
3591 }
3592
3593 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3594 {
3595         int r = 0, start = 0;
3596         u32 prev_legacy, cur_legacy;
3597         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3598         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3599         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3600         if (!prev_legacy && cur_legacy)
3601                 start = 1;
3602         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3603                sizeof(kvm->arch.vpit->pit_state.channels));
3604         kvm->arch.vpit->pit_state.flags = ps->flags;
3605         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3606         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3607         return r;
3608 }
3609
3610 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3611                                  struct kvm_reinject_control *control)
3612 {
3613         if (!kvm->arch.vpit)
3614                 return -ENXIO;
3615         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3616         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3617         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3618         return 0;
3619 }
3620
3621 /**
3622  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3623  * @kvm: kvm instance
3624  * @log: slot id and address to which we copy the log
3625  *
3626  * We need to keep it in mind that VCPU threads can write to the bitmap
3627  * concurrently.  So, to avoid losing data, we keep the following order for
3628  * each bit:
3629  *
3630  *   1. Take a snapshot of the bit and clear it if needed.
3631  *   2. Write protect the corresponding page.
3632  *   3. Flush TLB's if needed.
3633  *   4. Copy the snapshot to the userspace.
3634  *
3635  * Between 2 and 3, the guest may write to the page using the remaining TLB
3636  * entry.  This is not a problem because the page will be reported dirty at
3637  * step 4 using the snapshot taken before and step 3 ensures that successive
3638  * writes will be logged for the next call.
3639  */
3640 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3641 {
3642         int r;
3643         struct kvm_memory_slot *memslot;
3644         unsigned long n, i;
3645         unsigned long *dirty_bitmap;
3646         unsigned long *dirty_bitmap_buffer;
3647         bool is_dirty = false;
3648
3649         mutex_lock(&kvm->slots_lock);
3650
3651         r = -EINVAL;
3652         if (log->slot >= KVM_USER_MEM_SLOTS)
3653                 goto out;
3654
3655         memslot = id_to_memslot(kvm->memslots, log->slot);
3656
3657         dirty_bitmap = memslot->dirty_bitmap;
3658         r = -ENOENT;
3659         if (!dirty_bitmap)
3660                 goto out;
3661
3662         n = kvm_dirty_bitmap_bytes(memslot);
3663
3664         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3665         memset(dirty_bitmap_buffer, 0, n);
3666
3667         spin_lock(&kvm->mmu_lock);
3668
3669         for (i = 0; i < n / sizeof(long); i++) {
3670                 unsigned long mask;
3671                 gfn_t offset;
3672
3673                 if (!dirty_bitmap[i])
3674                         continue;
3675
3676                 is_dirty = true;
3677
3678                 mask = xchg(&dirty_bitmap[i], 0);
3679                 dirty_bitmap_buffer[i] = mask;
3680
3681                 offset = i * BITS_PER_LONG;
3682                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3683         }
3684
3685         spin_unlock(&kvm->mmu_lock);
3686
3687         /* See the comments in kvm_mmu_slot_remove_write_access(). */
3688         lockdep_assert_held(&kvm->slots_lock);
3689
3690         /*
3691          * All the TLBs can be flushed out of mmu lock, see the comments in
3692          * kvm_mmu_slot_remove_write_access().
3693          */
3694         if (is_dirty)
3695                 kvm_flush_remote_tlbs(kvm);
3696
3697         r = -EFAULT;
3698         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3699                 goto out;
3700
3701         r = 0;
3702 out:
3703         mutex_unlock(&kvm->slots_lock);
3704         return r;
3705 }
3706
3707 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3708                         bool line_status)
3709 {
3710         if (!irqchip_in_kernel(kvm))
3711                 return -ENXIO;
3712
3713         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3714                                         irq_event->irq, irq_event->level,
3715                                         line_status);
3716         return 0;
3717 }
3718
3719 long kvm_arch_vm_ioctl(struct file *filp,
3720                        unsigned int ioctl, unsigned long arg)
3721 {
3722         struct kvm *kvm = filp->private_data;
3723         void __user *argp = (void __user *)arg;
3724         int r = -ENOTTY;
3725         /*
3726          * This union makes it completely explicit to gcc-3.x
3727          * that these two variables' stack usage should be
3728          * combined, not added together.
3729          */
3730         union {
3731                 struct kvm_pit_state ps;
3732                 struct kvm_pit_state2 ps2;
3733                 struct kvm_pit_config pit_config;
3734         } u;
3735
3736         switch (ioctl) {
3737         case KVM_SET_TSS_ADDR:
3738                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3739                 break;
3740         case KVM_SET_IDENTITY_MAP_ADDR: {
3741                 u64 ident_addr;
3742
3743                 r = -EFAULT;
3744                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3745                         goto out;
3746                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3747                 break;
3748         }
3749         case KVM_SET_NR_MMU_PAGES:
3750                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3751                 break;
3752         case KVM_GET_NR_MMU_PAGES:
3753                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3754                 break;
3755         case KVM_CREATE_IRQCHIP: {
3756                 struct kvm_pic *vpic;
3757
3758                 mutex_lock(&kvm->lock);
3759                 r = -EEXIST;
3760                 if (kvm->arch.vpic)
3761                         goto create_irqchip_unlock;
3762                 r = -EINVAL;
3763                 if (atomic_read(&kvm->online_vcpus))
3764                         goto create_irqchip_unlock;
3765                 r = -ENOMEM;
3766                 vpic = kvm_create_pic(kvm);
3767                 if (vpic) {
3768                         r = kvm_ioapic_init(kvm);
3769                         if (r) {
3770                                 mutex_lock(&kvm->slots_lock);
3771                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3772                                                           &vpic->dev_master);
3773                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3774                                                           &vpic->dev_slave);
3775                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3776                                                           &vpic->dev_eclr);
3777                                 mutex_unlock(&kvm->slots_lock);
3778                                 kfree(vpic);
3779                                 goto create_irqchip_unlock;
3780                         }
3781                 } else
3782                         goto create_irqchip_unlock;
3783                 smp_wmb();
3784                 kvm->arch.vpic = vpic;
3785                 smp_wmb();
3786                 r = kvm_setup_default_irq_routing(kvm);
3787                 if (r) {
3788                         mutex_lock(&kvm->slots_lock);
3789                         mutex_lock(&kvm->irq_lock);
3790                         kvm_ioapic_destroy(kvm);
3791                         kvm_destroy_pic(kvm);
3792                         mutex_unlock(&kvm->irq_lock);
3793                         mutex_unlock(&kvm->slots_lock);
3794                 }
3795         create_irqchip_unlock:
3796                 mutex_unlock(&kvm->lock);
3797                 break;
3798         }
3799         case KVM_CREATE_PIT:
3800                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3801                 goto create_pit;
3802         case KVM_CREATE_PIT2:
3803                 r = -EFAULT;
3804                 if (copy_from_user(&u.pit_config, argp,
3805                                    sizeof(struct kvm_pit_config)))
3806                         goto out;
3807         create_pit:
3808                 mutex_lock(&kvm->slots_lock);
3809                 r = -EEXIST;
3810                 if (kvm->arch.vpit)
3811                         goto create_pit_unlock;
3812                 r = -ENOMEM;
3813                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3814                 if (kvm->arch.vpit)
3815                         r = 0;
3816         create_pit_unlock:
3817                 mutex_unlock(&kvm->slots_lock);
3818                 break;
3819         case KVM_GET_IRQCHIP: {
3820                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3821                 struct kvm_irqchip *chip;
3822
3823                 chip = memdup_user(argp, sizeof(*chip));
3824                 if (IS_ERR(chip)) {
3825                         r = PTR_ERR(chip);
3826                         goto out;
3827                 }
3828
3829                 r = -ENXIO;
3830                 if (!irqchip_in_kernel(kvm))
3831                         goto get_irqchip_out;
3832                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3833                 if (r)
3834                         goto get_irqchip_out;
3835                 r = -EFAULT;
3836                 if (copy_to_user(argp, chip, sizeof *chip))
3837                         goto get_irqchip_out;
3838                 r = 0;
3839         get_irqchip_out:
3840                 kfree(chip);
3841                 break;
3842         }
3843         case KVM_SET_IRQCHIP: {
3844                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3845                 struct kvm_irqchip *chip;
3846
3847                 chip = memdup_user(argp, sizeof(*chip));
3848                 if (IS_ERR(chip)) {
3849                         r = PTR_ERR(chip);
3850                         goto out;
3851                 }
3852
3853                 r = -ENXIO;
3854                 if (!irqchip_in_kernel(kvm))
3855                         goto set_irqchip_out;
3856                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3857                 if (r)
3858                         goto set_irqchip_out;
3859                 r = 0;
3860         set_irqchip_out:
3861                 kfree(chip);
3862                 break;
3863         }
3864         case KVM_GET_PIT: {
3865                 r = -EFAULT;
3866                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3867                         goto out;
3868                 r = -ENXIO;
3869                 if (!kvm->arch.vpit)
3870                         goto out;
3871                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3872                 if (r)
3873                         goto out;
3874                 r = -EFAULT;
3875                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3876                         goto out;
3877                 r = 0;
3878                 break;
3879         }
3880         case KVM_SET_PIT: {
3881                 r = -EFAULT;
3882                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3883                         goto out;
3884                 r = -ENXIO;
3885                 if (!kvm->arch.vpit)
3886                         goto out;
3887                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3888                 break;
3889         }
3890         case KVM_GET_PIT2: {
3891                 r = -ENXIO;
3892                 if (!kvm->arch.vpit)
3893                         goto out;
3894                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3895                 if (r)
3896                         goto out;
3897                 r = -EFAULT;
3898                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3899                         goto out;
3900                 r = 0;
3901                 break;
3902         }
3903         case KVM_SET_PIT2: {
3904                 r = -EFAULT;
3905                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3906                         goto out;
3907                 r = -ENXIO;
3908                 if (!kvm->arch.vpit)
3909                         goto out;
3910                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3911                 break;
3912         }
3913         case KVM_REINJECT_CONTROL: {
3914                 struct kvm_reinject_control control;
3915                 r =  -EFAULT;
3916                 if (copy_from_user(&control, argp, sizeof(control)))
3917                         goto out;
3918                 r = kvm_vm_ioctl_reinject(kvm, &control);
3919                 break;
3920         }
3921         case KVM_XEN_HVM_CONFIG: {
3922                 r = -EFAULT;
3923                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3924                                    sizeof(struct kvm_xen_hvm_config)))
3925                         goto out;
3926                 r = -EINVAL;
3927                 if (kvm->arch.xen_hvm_config.flags)
3928                         goto out;
3929                 r = 0;
3930                 break;
3931         }
3932         case KVM_SET_CLOCK: {
3933                 struct kvm_clock_data user_ns;
3934                 u64 now_ns;
3935                 s64 delta;
3936
3937                 r = -EFAULT;
3938                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3939                         goto out;
3940
3941                 r = -EINVAL;
3942                 if (user_ns.flags)
3943                         goto out;
3944
3945                 r = 0;
3946                 local_irq_disable();
3947                 now_ns = get_kernel_ns();
3948                 delta = user_ns.clock - now_ns;
3949                 local_irq_enable();
3950                 kvm->arch.kvmclock_offset = delta;
3951                 kvm_gen_update_masterclock(kvm);
3952                 break;
3953         }
3954         case KVM_GET_CLOCK: {
3955                 struct kvm_clock_data user_ns;
3956                 u64 now_ns;
3957
3958                 local_irq_disable();
3959                 now_ns = get_kernel_ns();
3960                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3961                 local_irq_enable();
3962                 user_ns.flags = 0;
3963                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3964
3965                 r = -EFAULT;
3966                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3967                         goto out;
3968                 r = 0;
3969                 break;
3970         }
3971
3972         default:
3973                 ;
3974         }
3975 out:
3976         return r;
3977 }
3978
3979 static void kvm_init_msr_list(void)
3980 {
3981         u32 dummy[2];
3982         unsigned i, j;
3983
3984         /* skip the first msrs in the list. KVM-specific */
3985         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3986                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3987                         continue;
3988
3989                 /*
3990                  * Even MSRs that are valid in the host may not be exposed
3991                  * to the guests in some cases.  We could work around this
3992                  * in VMX with the generic MSR save/load machinery, but it
3993                  * is not really worthwhile since it will really only
3994                  * happen with nested virtualization.
3995                  */
3996                 switch (msrs_to_save[i]) {
3997                 case MSR_IA32_BNDCFGS:
3998                         if (!kvm_x86_ops->mpx_supported())
3999                                 continue;
4000                         break;
4001                 default:
4002                         break;
4003                 }
4004
4005                 if (j < i)
4006                         msrs_to_save[j] = msrs_to_save[i];
4007                 j++;
4008         }
4009         num_msrs_to_save = j;
4010 }
4011
4012 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4013                            const void *v)
4014 {
4015         int handled = 0;
4016         int n;
4017
4018         do {
4019                 n = min(len, 8);
4020                 if (!(vcpu->arch.apic &&
4021                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
4022                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
4023                         break;
4024                 handled += n;
4025                 addr += n;
4026                 len -= n;
4027                 v += n;
4028         } while (len);
4029
4030         return handled;
4031 }
4032
4033 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4034 {
4035         int handled = 0;
4036         int n;
4037
4038         do {
4039                 n = min(len, 8);
4040                 if (!(vcpu->arch.apic &&
4041                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
4042                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
4043                         break;
4044                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4045                 handled += n;
4046                 addr += n;
4047                 len -= n;
4048                 v += n;
4049         } while (len);
4050
4051         return handled;
4052 }
4053
4054 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4055                         struct kvm_segment *var, int seg)
4056 {
4057         kvm_x86_ops->set_segment(vcpu, var, seg);
4058 }
4059
4060 void kvm_get_segment(struct kvm_vcpu *vcpu,
4061                      struct kvm_segment *var, int seg)
4062 {
4063         kvm_x86_ops->get_segment(vcpu, var, seg);
4064 }
4065
4066 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
4067 {
4068         gpa_t t_gpa;
4069         struct x86_exception exception;
4070
4071         BUG_ON(!mmu_is_nested(vcpu));
4072
4073         /* NPT walks are always user-walks */
4074         access |= PFERR_USER_MASK;
4075         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
4076
4077         return t_gpa;
4078 }
4079
4080 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4081                               struct x86_exception *exception)
4082 {
4083         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4084         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4085 }
4086
4087  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4088                                 struct x86_exception *exception)
4089 {
4090         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4091         access |= PFERR_FETCH_MASK;
4092         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4093 }
4094
4095 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4096                                struct x86_exception *exception)
4097 {
4098         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4099         access |= PFERR_WRITE_MASK;
4100         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4101 }
4102
4103 /* uses this to access any guest's mapped memory without checking CPL */
4104 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4105                                 struct x86_exception *exception)
4106 {
4107         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4108 }
4109
4110 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4111                                       struct kvm_vcpu *vcpu, u32 access,
4112                                       struct x86_exception *exception)
4113 {
4114         void *data = val;
4115         int r = X86EMUL_CONTINUE;
4116
4117         while (bytes) {
4118                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4119                                                             exception);
4120                 unsigned offset = addr & (PAGE_SIZE-1);
4121                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4122                 int ret;
4123
4124                 if (gpa == UNMAPPED_GVA)
4125                         return X86EMUL_PROPAGATE_FAULT;
4126                 ret = kvm_read_guest_page(vcpu->kvm, gpa >> PAGE_SHIFT, data,
4127                                           offset, toread);
4128                 if (ret < 0) {
4129                         r = X86EMUL_IO_NEEDED;
4130                         goto out;
4131                 }
4132
4133                 bytes -= toread;
4134                 data += toread;
4135                 addr += toread;
4136         }
4137 out:
4138         return r;
4139 }
4140
4141 /* used for instruction fetching */
4142 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4143                                 gva_t addr, void *val, unsigned int bytes,
4144                                 struct x86_exception *exception)
4145 {
4146         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4147         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4148         unsigned offset;
4149         int ret;
4150
4151         /* Inline kvm_read_guest_virt_helper for speed.  */
4152         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4153                                                     exception);
4154         if (unlikely(gpa == UNMAPPED_GVA))
4155                 return X86EMUL_PROPAGATE_FAULT;
4156
4157         offset = addr & (PAGE_SIZE-1);
4158         if (WARN_ON(offset + bytes > PAGE_SIZE))
4159                 bytes = (unsigned)PAGE_SIZE - offset;
4160         ret = kvm_read_guest_page(vcpu->kvm, gpa >> PAGE_SHIFT, val,
4161                                   offset, bytes);
4162         if (unlikely(ret < 0))
4163                 return X86EMUL_IO_NEEDED;
4164
4165         return X86EMUL_CONTINUE;
4166 }
4167
4168 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4169                                gva_t addr, void *val, unsigned int bytes,
4170                                struct x86_exception *exception)
4171 {
4172         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4173         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4174
4175         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4176                                           exception);
4177 }
4178 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4179
4180 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4181                                       gva_t addr, void *val, unsigned int bytes,
4182                                       struct x86_exception *exception)
4183 {
4184         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4185         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4186 }
4187
4188 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4189                                        gva_t addr, void *val,
4190                                        unsigned int bytes,
4191                                        struct x86_exception *exception)
4192 {
4193         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4194         void *data = val;
4195         int r = X86EMUL_CONTINUE;
4196
4197         while (bytes) {
4198                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4199                                                              PFERR_WRITE_MASK,
4200                                                              exception);
4201                 unsigned offset = addr & (PAGE_SIZE-1);
4202                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4203                 int ret;
4204
4205                 if (gpa == UNMAPPED_GVA)
4206                         return X86EMUL_PROPAGATE_FAULT;
4207                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4208                 if (ret < 0) {
4209                         r = X86EMUL_IO_NEEDED;
4210                         goto out;
4211                 }
4212
4213                 bytes -= towrite;
4214                 data += towrite;
4215                 addr += towrite;
4216         }
4217 out:
4218         return r;
4219 }
4220 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4221
4222 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4223                                 gpa_t *gpa, struct x86_exception *exception,
4224                                 bool write)
4225 {
4226         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4227                 | (write ? PFERR_WRITE_MASK : 0);
4228
4229         if (vcpu_match_mmio_gva(vcpu, gva)
4230             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4231                                  vcpu->arch.access, access)) {
4232                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4233                                         (gva & (PAGE_SIZE - 1));
4234                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4235                 return 1;
4236         }
4237
4238         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4239
4240         if (*gpa == UNMAPPED_GVA)
4241                 return -1;
4242
4243         /* For APIC access vmexit */
4244         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4245                 return 1;
4246
4247         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4248                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4249                 return 1;
4250         }
4251
4252         return 0;
4253 }
4254
4255 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4256                         const void *val, int bytes)
4257 {
4258         int ret;
4259
4260         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4261         if (ret < 0)
4262                 return 0;
4263         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4264         return 1;
4265 }
4266
4267 struct read_write_emulator_ops {
4268         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4269                                   int bytes);
4270         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4271                                   void *val, int bytes);
4272         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4273                                int bytes, void *val);
4274         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4275                                     void *val, int bytes);
4276         bool write;
4277 };
4278
4279 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4280 {
4281         if (vcpu->mmio_read_completed) {
4282                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4283                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4284                 vcpu->mmio_read_completed = 0;
4285                 return 1;
4286         }
4287
4288         return 0;
4289 }
4290
4291 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4292                         void *val, int bytes)
4293 {
4294         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4295 }
4296
4297 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4298                          void *val, int bytes)
4299 {
4300         return emulator_write_phys(vcpu, gpa, val, bytes);
4301 }
4302
4303 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4304 {
4305         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4306         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4307 }
4308
4309 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4310                           void *val, int bytes)
4311 {
4312         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4313         return X86EMUL_IO_NEEDED;
4314 }
4315
4316 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4317                            void *val, int bytes)
4318 {
4319         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4320
4321         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4322         return X86EMUL_CONTINUE;
4323 }
4324
4325 static const struct read_write_emulator_ops read_emultor = {
4326         .read_write_prepare = read_prepare,
4327         .read_write_emulate = read_emulate,
4328         .read_write_mmio = vcpu_mmio_read,
4329         .read_write_exit_mmio = read_exit_mmio,
4330 };
4331
4332 static const struct read_write_emulator_ops write_emultor = {
4333         .read_write_emulate = write_emulate,
4334         .read_write_mmio = write_mmio,
4335         .read_write_exit_mmio = write_exit_mmio,
4336         .write = true,
4337 };
4338
4339 static int emulator_read_write_onepage(unsigned long addr, void *val,
4340                                        unsigned int bytes,
4341                                        struct x86_exception *exception,
4342                                        struct kvm_vcpu *vcpu,
4343                                        const struct read_write_emulator_ops *ops)
4344 {
4345         gpa_t gpa;
4346         int handled, ret;
4347         bool write = ops->write;
4348         struct kvm_mmio_fragment *frag;
4349
4350         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4351
4352         if (ret < 0)
4353                 return X86EMUL_PROPAGATE_FAULT;
4354
4355         /* For APIC access vmexit */
4356         if (ret)
4357                 goto mmio;
4358
4359         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4360                 return X86EMUL_CONTINUE;
4361
4362 mmio:
4363         /*
4364          * Is this MMIO handled locally?
4365          */
4366         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4367         if (handled == bytes)
4368                 return X86EMUL_CONTINUE;
4369
4370         gpa += handled;
4371         bytes -= handled;
4372         val += handled;
4373
4374         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4375         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4376         frag->gpa = gpa;
4377         frag->data = val;
4378         frag->len = bytes;
4379         return X86EMUL_CONTINUE;
4380 }
4381
4382 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4383                         void *val, unsigned int bytes,
4384                         struct x86_exception *exception,
4385                         const struct read_write_emulator_ops *ops)
4386 {
4387         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4388         gpa_t gpa;
4389         int rc;
4390
4391         if (ops->read_write_prepare &&
4392                   ops->read_write_prepare(vcpu, val, bytes))
4393                 return X86EMUL_CONTINUE;
4394
4395         vcpu->mmio_nr_fragments = 0;
4396
4397         /* Crossing a page boundary? */
4398         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4399                 int now;
4400
4401                 now = -addr & ~PAGE_MASK;
4402                 rc = emulator_read_write_onepage(addr, val, now, exception,
4403                                                  vcpu, ops);
4404
4405                 if (rc != X86EMUL_CONTINUE)
4406                         return rc;
4407                 addr += now;
4408                 val += now;
4409                 bytes -= now;
4410         }
4411
4412         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4413                                          vcpu, ops);
4414         if (rc != X86EMUL_CONTINUE)
4415                 return rc;
4416
4417         if (!vcpu->mmio_nr_fragments)
4418                 return rc;
4419
4420         gpa = vcpu->mmio_fragments[0].gpa;
4421
4422         vcpu->mmio_needed = 1;
4423         vcpu->mmio_cur_fragment = 0;
4424
4425         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4426         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4427         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4428         vcpu->run->mmio.phys_addr = gpa;
4429
4430         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4431 }
4432
4433 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4434                                   unsigned long addr,
4435                                   void *val,
4436                                   unsigned int bytes,
4437                                   struct x86_exception *exception)
4438 {
4439         return emulator_read_write(ctxt, addr, val, bytes,
4440                                    exception, &read_emultor);
4441 }
4442
4443 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4444                             unsigned long addr,
4445                             const void *val,
4446                             unsigned int bytes,
4447                             struct x86_exception *exception)
4448 {
4449         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4450                                    exception, &write_emultor);
4451 }
4452
4453 #define CMPXCHG_TYPE(t, ptr, old, new) \
4454         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4455
4456 #ifdef CONFIG_X86_64
4457 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4458 #else
4459 #  define CMPXCHG64(ptr, old, new) \
4460         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4461 #endif
4462
4463 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4464                                      unsigned long addr,
4465                                      const void *old,
4466                                      const void *new,
4467                                      unsigned int bytes,
4468                                      struct x86_exception *exception)
4469 {
4470         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4471         gpa_t gpa;
4472         struct page *page;
4473         char *kaddr;
4474         bool exchanged;
4475
4476         /* guests cmpxchg8b have to be emulated atomically */
4477         if (bytes > 8 || (bytes & (bytes - 1)))
4478                 goto emul_write;
4479
4480         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4481
4482         if (gpa == UNMAPPED_GVA ||
4483             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4484                 goto emul_write;
4485
4486         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4487                 goto emul_write;
4488
4489         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4490         if (is_error_page(page))
4491                 goto emul_write;
4492
4493         kaddr = kmap_atomic(page);
4494         kaddr += offset_in_page(gpa);
4495         switch (bytes) {
4496         case 1:
4497                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4498                 break;
4499         case 2:
4500                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4501                 break;
4502         case 4:
4503                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4504                 break;
4505         case 8:
4506                 exchanged = CMPXCHG64(kaddr, old, new);
4507                 break;
4508         default:
4509                 BUG();
4510         }
4511         kunmap_atomic(kaddr);
4512         kvm_release_page_dirty(page);
4513
4514         if (!exchanged)
4515                 return X86EMUL_CMPXCHG_FAILED;
4516
4517         mark_page_dirty(vcpu->kvm, gpa >> PAGE_SHIFT);
4518         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4519
4520         return X86EMUL_CONTINUE;
4521
4522 emul_write:
4523         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4524
4525         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4526 }
4527
4528 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4529 {
4530         /* TODO: String I/O for in kernel device */
4531         int r;
4532
4533         if (vcpu->arch.pio.in)
4534                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4535                                     vcpu->arch.pio.size, pd);
4536         else
4537                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4538                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4539                                      pd);
4540         return r;
4541 }
4542
4543 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4544                                unsigned short port, void *val,
4545                                unsigned int count, bool in)
4546 {
4547         vcpu->arch.pio.port = port;
4548         vcpu->arch.pio.in = in;
4549         vcpu->arch.pio.count  = count;
4550         vcpu->arch.pio.size = size;
4551
4552         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4553                 vcpu->arch.pio.count = 0;
4554                 return 1;
4555         }
4556
4557         vcpu->run->exit_reason = KVM_EXIT_IO;
4558         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4559         vcpu->run->io.size = size;
4560         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4561         vcpu->run->io.count = count;
4562         vcpu->run->io.port = port;
4563
4564         return 0;
4565 }
4566
4567 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4568                                     int size, unsigned short port, void *val,
4569                                     unsigned int count)
4570 {
4571         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4572         int ret;
4573
4574         if (vcpu->arch.pio.count)
4575                 goto data_avail;
4576
4577         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4578         if (ret) {
4579 data_avail:
4580                 memcpy(val, vcpu->arch.pio_data, size * count);
4581                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4582                 vcpu->arch.pio.count = 0;
4583                 return 1;
4584         }
4585
4586         return 0;
4587 }
4588
4589 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4590                                      int size, unsigned short port,
4591                                      const void *val, unsigned int count)
4592 {
4593         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4594
4595         memcpy(vcpu->arch.pio_data, val, size * count);
4596         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4597         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4598 }
4599
4600 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4601 {
4602         return kvm_x86_ops->get_segment_base(vcpu, seg);
4603 }
4604
4605 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4606 {
4607         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4608 }
4609
4610 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4611 {
4612         if (!need_emulate_wbinvd(vcpu))
4613                 return X86EMUL_CONTINUE;
4614
4615         if (kvm_x86_ops->has_wbinvd_exit()) {
4616                 int cpu = get_cpu();
4617
4618                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4619                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4620                                 wbinvd_ipi, NULL, 1);
4621                 put_cpu();
4622                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4623         } else
4624                 wbinvd();
4625         return X86EMUL_CONTINUE;
4626 }
4627 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4628
4629 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4630 {
4631         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4632 }
4633
4634 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4635 {
4636         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4637 }
4638
4639 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4640 {
4641
4642         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4643 }
4644
4645 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4646 {
4647         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4648 }
4649
4650 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4651 {
4652         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4653         unsigned long value;
4654
4655         switch (cr) {
4656         case 0:
4657                 value = kvm_read_cr0(vcpu);
4658                 break;
4659         case 2:
4660                 value = vcpu->arch.cr2;
4661                 break;
4662         case 3:
4663                 value = kvm_read_cr3(vcpu);
4664                 break;
4665         case 4:
4666                 value = kvm_read_cr4(vcpu);
4667                 break;
4668         case 8:
4669                 value = kvm_get_cr8(vcpu);
4670                 break;
4671         default:
4672                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4673                 return 0;
4674         }
4675
4676         return value;
4677 }
4678
4679 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4680 {
4681         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4682         int res = 0;
4683
4684         switch (cr) {
4685         case 0:
4686                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4687                 break;
4688         case 2:
4689                 vcpu->arch.cr2 = val;
4690                 break;
4691         case 3:
4692                 res = kvm_set_cr3(vcpu, val);
4693                 break;
4694         case 4:
4695                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4696                 break;
4697         case 8:
4698                 res = kvm_set_cr8(vcpu, val);
4699                 break;
4700         default:
4701                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4702                 res = -1;
4703         }
4704
4705         return res;
4706 }
4707
4708 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4709 {
4710         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4711 }
4712
4713 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4714 {
4715         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4716 }
4717
4718 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4719 {
4720         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4721 }
4722
4723 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4724 {
4725         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4726 }
4727
4728 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4729 {
4730         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4731 }
4732
4733 static unsigned long emulator_get_cached_segment_base(
4734         struct x86_emulate_ctxt *ctxt, int seg)
4735 {
4736         return get_segment_base(emul_to_vcpu(ctxt), seg);
4737 }
4738
4739 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4740                                  struct desc_struct *desc, u32 *base3,
4741                                  int seg)
4742 {
4743         struct kvm_segment var;
4744
4745         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4746         *selector = var.selector;
4747
4748         if (var.unusable) {
4749                 memset(desc, 0, sizeof(*desc));
4750                 return false;
4751         }
4752
4753         if (var.g)
4754                 var.limit >>= 12;
4755         set_desc_limit(desc, var.limit);
4756         set_desc_base(desc, (unsigned long)var.base);
4757 #ifdef CONFIG_X86_64
4758         if (base3)
4759                 *base3 = var.base >> 32;
4760 #endif
4761         desc->type = var.type;
4762         desc->s = var.s;
4763         desc->dpl = var.dpl;
4764         desc->p = var.present;
4765         desc->avl = var.avl;
4766         desc->l = var.l;
4767         desc->d = var.db;
4768         desc->g = var.g;
4769
4770         return true;
4771 }
4772
4773 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4774                                  struct desc_struct *desc, u32 base3,
4775                                  int seg)
4776 {
4777         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4778         struct kvm_segment var;
4779
4780         var.selector = selector;
4781         var.base = get_desc_base(desc);
4782 #ifdef CONFIG_X86_64
4783         var.base |= ((u64)base3) << 32;
4784 #endif
4785         var.limit = get_desc_limit(desc);
4786         if (desc->g)
4787                 var.limit = (var.limit << 12) | 0xfff;
4788         var.type = desc->type;
4789         var.dpl = desc->dpl;
4790         var.db = desc->d;
4791         var.s = desc->s;
4792         var.l = desc->l;
4793         var.g = desc->g;
4794         var.avl = desc->avl;
4795         var.present = desc->p;
4796         var.unusable = !var.present;
4797         var.padding = 0;
4798
4799         kvm_set_segment(vcpu, &var, seg);
4800         return;
4801 }
4802
4803 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4804                             u32 msr_index, u64 *pdata)
4805 {
4806         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4807 }
4808
4809 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4810                             u32 msr_index, u64 data)
4811 {
4812         struct msr_data msr;
4813
4814         msr.data = data;
4815         msr.index = msr_index;
4816         msr.host_initiated = false;
4817         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4818 }
4819
4820 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4821                               u32 pmc)
4822 {
4823         return kvm_pmu_check_pmc(emul_to_vcpu(ctxt), pmc);
4824 }
4825
4826 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4827                              u32 pmc, u64 *pdata)
4828 {
4829         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4830 }
4831
4832 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4833 {
4834         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4835 }
4836
4837 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4838 {
4839         preempt_disable();
4840         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4841         /*
4842          * CR0.TS may reference the host fpu state, not the guest fpu state,
4843          * so it may be clear at this point.
4844          */
4845         clts();
4846 }
4847
4848 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4849 {
4850         preempt_enable();
4851 }
4852
4853 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4854                               struct x86_instruction_info *info,
4855                               enum x86_intercept_stage stage)
4856 {
4857         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4858 }
4859
4860 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4861                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4862 {
4863         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4864 }
4865
4866 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4867 {
4868         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4869 }
4870
4871 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4872 {
4873         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4874 }
4875
4876 static const struct x86_emulate_ops emulate_ops = {
4877         .read_gpr            = emulator_read_gpr,
4878         .write_gpr           = emulator_write_gpr,
4879         .read_std            = kvm_read_guest_virt_system,
4880         .write_std           = kvm_write_guest_virt_system,
4881         .fetch               = kvm_fetch_guest_virt,
4882         .read_emulated       = emulator_read_emulated,
4883         .write_emulated      = emulator_write_emulated,
4884         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4885         .invlpg              = emulator_invlpg,
4886         .pio_in_emulated     = emulator_pio_in_emulated,
4887         .pio_out_emulated    = emulator_pio_out_emulated,
4888         .get_segment         = emulator_get_segment,
4889         .set_segment         = emulator_set_segment,
4890         .get_cached_segment_base = emulator_get_cached_segment_base,
4891         .get_gdt             = emulator_get_gdt,
4892         .get_idt             = emulator_get_idt,
4893         .set_gdt             = emulator_set_gdt,
4894         .set_idt             = emulator_set_idt,
4895         .get_cr              = emulator_get_cr,
4896         .set_cr              = emulator_set_cr,
4897         .cpl                 = emulator_get_cpl,
4898         .get_dr              = emulator_get_dr,
4899         .set_dr              = emulator_set_dr,
4900         .set_msr             = emulator_set_msr,
4901         .get_msr             = emulator_get_msr,
4902         .check_pmc           = emulator_check_pmc,
4903         .read_pmc            = emulator_read_pmc,
4904         .halt                = emulator_halt,
4905         .wbinvd              = emulator_wbinvd,
4906         .fix_hypercall       = emulator_fix_hypercall,
4907         .get_fpu             = emulator_get_fpu,
4908         .put_fpu             = emulator_put_fpu,
4909         .intercept           = emulator_intercept,
4910         .get_cpuid           = emulator_get_cpuid,
4911 };
4912
4913 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4914 {
4915         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4916         /*
4917          * an sti; sti; sequence only disable interrupts for the first
4918          * instruction. So, if the last instruction, be it emulated or
4919          * not, left the system with the INT_STI flag enabled, it
4920          * means that the last instruction is an sti. We should not
4921          * leave the flag on in this case. The same goes for mov ss
4922          */
4923         if (int_shadow & mask)
4924                 mask = 0;
4925         if (unlikely(int_shadow || mask)) {
4926                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4927                 if (!mask)
4928                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4929         }
4930 }
4931
4932 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4933 {
4934         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4935         if (ctxt->exception.vector == PF_VECTOR)
4936                 kvm_propagate_fault(vcpu, &ctxt->exception);
4937         else if (ctxt->exception.error_code_valid)
4938                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4939                                       ctxt->exception.error_code);
4940         else
4941                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4942 }
4943
4944 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4945 {
4946         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4947         int cs_db, cs_l;
4948
4949         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4950
4951         ctxt->eflags = kvm_get_rflags(vcpu);
4952         ctxt->eip = kvm_rip_read(vcpu);
4953         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4954                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4955                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
4956                      cs_db                              ? X86EMUL_MODE_PROT32 :
4957                                                           X86EMUL_MODE_PROT16;
4958         ctxt->guest_mode = is_guest_mode(vcpu);
4959
4960         init_decode_cache(ctxt);
4961         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4962 }
4963
4964 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4965 {
4966         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4967         int ret;
4968
4969         init_emulate_ctxt(vcpu);
4970
4971         ctxt->op_bytes = 2;
4972         ctxt->ad_bytes = 2;
4973         ctxt->_eip = ctxt->eip + inc_eip;
4974         ret = emulate_int_real(ctxt, irq);
4975
4976         if (ret != X86EMUL_CONTINUE)
4977                 return EMULATE_FAIL;
4978
4979         ctxt->eip = ctxt->_eip;
4980         kvm_rip_write(vcpu, ctxt->eip);
4981         kvm_set_rflags(vcpu, ctxt->eflags);
4982
4983         if (irq == NMI_VECTOR)
4984                 vcpu->arch.nmi_pending = 0;
4985         else
4986                 vcpu->arch.interrupt.pending = false;
4987
4988         return EMULATE_DONE;
4989 }
4990 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4991
4992 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4993 {
4994         int r = EMULATE_DONE;
4995
4996         ++vcpu->stat.insn_emulation_fail;
4997         trace_kvm_emulate_insn_failed(vcpu);
4998         if (!is_guest_mode(vcpu)) {
4999                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5000                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5001                 vcpu->run->internal.ndata = 0;
5002                 r = EMULATE_FAIL;
5003         }
5004         kvm_queue_exception(vcpu, UD_VECTOR);
5005
5006         return r;
5007 }
5008
5009 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5010                                   bool write_fault_to_shadow_pgtable,
5011                                   int emulation_type)
5012 {
5013         gpa_t gpa = cr2;
5014         pfn_t pfn;
5015
5016         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5017                 return false;
5018
5019         if (!vcpu->arch.mmu.direct_map) {
5020                 /*
5021                  * Write permission should be allowed since only
5022                  * write access need to be emulated.
5023                  */
5024                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5025
5026                 /*
5027                  * If the mapping is invalid in guest, let cpu retry
5028                  * it to generate fault.
5029                  */
5030                 if (gpa == UNMAPPED_GVA)
5031                         return true;
5032         }
5033
5034         /*
5035          * Do not retry the unhandleable instruction if it faults on the
5036          * readonly host memory, otherwise it will goto a infinite loop:
5037          * retry instruction -> write #PF -> emulation fail -> retry
5038          * instruction -> ...
5039          */
5040         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5041
5042         /*
5043          * If the instruction failed on the error pfn, it can not be fixed,
5044          * report the error to userspace.
5045          */
5046         if (is_error_noslot_pfn(pfn))
5047                 return false;
5048
5049         kvm_release_pfn_clean(pfn);
5050
5051         /* The instructions are well-emulated on direct mmu. */
5052         if (vcpu->arch.mmu.direct_map) {
5053                 unsigned int indirect_shadow_pages;
5054
5055                 spin_lock(&vcpu->kvm->mmu_lock);
5056                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5057                 spin_unlock(&vcpu->kvm->mmu_lock);
5058
5059                 if (indirect_shadow_pages)
5060                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5061
5062                 return true;
5063         }
5064
5065         /*
5066          * if emulation was due to access to shadowed page table
5067          * and it failed try to unshadow page and re-enter the
5068          * guest to let CPU execute the instruction.
5069          */
5070         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5071
5072         /*
5073          * If the access faults on its page table, it can not
5074          * be fixed by unprotecting shadow page and it should
5075          * be reported to userspace.
5076          */
5077         return !write_fault_to_shadow_pgtable;
5078 }
5079
5080 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5081                               unsigned long cr2,  int emulation_type)
5082 {
5083         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5084         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5085
5086         last_retry_eip = vcpu->arch.last_retry_eip;
5087         last_retry_addr = vcpu->arch.last_retry_addr;
5088
5089         /*
5090          * If the emulation is caused by #PF and it is non-page_table
5091          * writing instruction, it means the VM-EXIT is caused by shadow
5092          * page protected, we can zap the shadow page and retry this
5093          * instruction directly.
5094          *
5095          * Note: if the guest uses a non-page-table modifying instruction
5096          * on the PDE that points to the instruction, then we will unmap
5097          * the instruction and go to an infinite loop. So, we cache the
5098          * last retried eip and the last fault address, if we meet the eip
5099          * and the address again, we can break out of the potential infinite
5100          * loop.
5101          */
5102         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5103
5104         if (!(emulation_type & EMULTYPE_RETRY))
5105                 return false;
5106
5107         if (x86_page_table_writing_insn(ctxt))
5108                 return false;
5109
5110         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5111                 return false;
5112
5113         vcpu->arch.last_retry_eip = ctxt->eip;
5114         vcpu->arch.last_retry_addr = cr2;
5115
5116         if (!vcpu->arch.mmu.direct_map)
5117                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5118
5119         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5120
5121         return true;
5122 }
5123
5124 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5125 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5126
5127 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5128                                 unsigned long *db)
5129 {
5130         u32 dr6 = 0;
5131         int i;
5132         u32 enable, rwlen;
5133
5134         enable = dr7;
5135         rwlen = dr7 >> 16;
5136         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5137                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5138                         dr6 |= (1 << i);
5139         return dr6;
5140 }
5141
5142 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5143 {
5144         struct kvm_run *kvm_run = vcpu->run;
5145
5146         /*
5147          * rflags is the old, "raw" value of the flags.  The new value has
5148          * not been saved yet.
5149          *
5150          * This is correct even for TF set by the guest, because "the
5151          * processor will not generate this exception after the instruction
5152          * that sets the TF flag".
5153          */
5154         if (unlikely(rflags & X86_EFLAGS_TF)) {
5155                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5156                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5157                                                   DR6_RTM;
5158                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5159                         kvm_run->debug.arch.exception = DB_VECTOR;
5160                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5161                         *r = EMULATE_USER_EXIT;
5162                 } else {
5163                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5164                         /*
5165                          * "Certain debug exceptions may clear bit 0-3.  The
5166                          * remaining contents of the DR6 register are never
5167                          * cleared by the processor".
5168                          */
5169                         vcpu->arch.dr6 &= ~15;
5170                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5171                         kvm_queue_exception(vcpu, DB_VECTOR);
5172                 }
5173         }
5174 }
5175
5176 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5177 {
5178         struct kvm_run *kvm_run = vcpu->run;
5179         unsigned long eip = vcpu->arch.emulate_ctxt.eip;
5180         u32 dr6 = 0;
5181
5182         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5183             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5184                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5185                                            vcpu->arch.guest_debug_dr7,
5186                                            vcpu->arch.eff_db);
5187
5188                 if (dr6 != 0) {
5189                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5190                         kvm_run->debug.arch.pc = kvm_rip_read(vcpu) +
5191                                 get_segment_base(vcpu, VCPU_SREG_CS);
5192
5193                         kvm_run->debug.arch.exception = DB_VECTOR;
5194                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5195                         *r = EMULATE_USER_EXIT;
5196                         return true;
5197                 }
5198         }
5199
5200         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5201             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5202                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5203                                            vcpu->arch.dr7,
5204                                            vcpu->arch.db);
5205
5206                 if (dr6 != 0) {
5207                         vcpu->arch.dr6 &= ~15;
5208                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5209                         kvm_queue_exception(vcpu, DB_VECTOR);
5210                         *r = EMULATE_DONE;
5211                         return true;
5212                 }
5213         }
5214
5215         return false;
5216 }
5217
5218 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5219                             unsigned long cr2,
5220                             int emulation_type,
5221                             void *insn,
5222                             int insn_len)
5223 {
5224         int r;
5225         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5226         bool writeback = true;
5227         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5228
5229         /*
5230          * Clear write_fault_to_shadow_pgtable here to ensure it is
5231          * never reused.
5232          */
5233         vcpu->arch.write_fault_to_shadow_pgtable = false;
5234         kvm_clear_exception_queue(vcpu);
5235
5236         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5237                 init_emulate_ctxt(vcpu);
5238
5239                 /*
5240                  * We will reenter on the same instruction since
5241                  * we do not set complete_userspace_io.  This does not
5242                  * handle watchpoints yet, those would be handled in
5243                  * the emulate_ops.
5244                  */
5245                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5246                         return r;
5247
5248                 ctxt->interruptibility = 0;
5249                 ctxt->have_exception = false;
5250                 ctxt->exception.vector = -1;
5251                 ctxt->perm_ok = false;
5252
5253                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5254
5255                 r = x86_decode_insn(ctxt, insn, insn_len);
5256
5257                 trace_kvm_emulate_insn_start(vcpu);
5258                 ++vcpu->stat.insn_emulation;
5259                 if (r != EMULATION_OK)  {
5260                         if (emulation_type & EMULTYPE_TRAP_UD)
5261                                 return EMULATE_FAIL;
5262                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5263                                                 emulation_type))
5264                                 return EMULATE_DONE;
5265                         if (emulation_type & EMULTYPE_SKIP)
5266                                 return EMULATE_FAIL;
5267                         return handle_emulation_failure(vcpu);
5268                 }
5269         }
5270
5271         if (emulation_type & EMULTYPE_SKIP) {
5272                 kvm_rip_write(vcpu, ctxt->_eip);
5273                 if (ctxt->eflags & X86_EFLAGS_RF)
5274                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5275                 return EMULATE_DONE;
5276         }
5277
5278         if (retry_instruction(ctxt, cr2, emulation_type))
5279                 return EMULATE_DONE;
5280
5281         /* this is needed for vmware backdoor interface to work since it
5282            changes registers values  during IO operation */
5283         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5284                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5285                 emulator_invalidate_register_cache(ctxt);
5286         }
5287
5288 restart:
5289         r = x86_emulate_insn(ctxt);
5290
5291         if (r == EMULATION_INTERCEPTED)
5292                 return EMULATE_DONE;
5293
5294         if (r == EMULATION_FAILED) {
5295                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5296                                         emulation_type))
5297                         return EMULATE_DONE;
5298
5299                 return handle_emulation_failure(vcpu);
5300         }
5301
5302         if (ctxt->have_exception) {
5303                 inject_emulated_exception(vcpu);
5304                 r = EMULATE_DONE;
5305         } else if (vcpu->arch.pio.count) {
5306                 if (!vcpu->arch.pio.in) {
5307                         /* FIXME: return into emulator if single-stepping.  */
5308                         vcpu->arch.pio.count = 0;
5309                 } else {
5310                         writeback = false;
5311                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5312                 }
5313                 r = EMULATE_USER_EXIT;
5314         } else if (vcpu->mmio_needed) {
5315                 if (!vcpu->mmio_is_write)
5316                         writeback = false;
5317                 r = EMULATE_USER_EXIT;
5318                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5319         } else if (r == EMULATION_RESTART)
5320                 goto restart;
5321         else
5322                 r = EMULATE_DONE;
5323
5324         if (writeback) {
5325                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5326                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5327                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5328                 kvm_rip_write(vcpu, ctxt->eip);
5329                 if (r == EMULATE_DONE)
5330                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5331                 __kvm_set_rflags(vcpu, ctxt->eflags);
5332
5333                 /*
5334                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5335                  * do nothing, and it will be requested again as soon as
5336                  * the shadow expires.  But we still need to check here,
5337                  * because POPF has no interrupt shadow.
5338                  */
5339                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5340                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5341         } else
5342                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5343
5344         return r;
5345 }
5346 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5347
5348 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5349 {
5350         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5351         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5352                                             size, port, &val, 1);
5353         /* do not return to emulator after return from userspace */
5354         vcpu->arch.pio.count = 0;
5355         return ret;
5356 }
5357 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5358
5359 static void tsc_bad(void *info)
5360 {
5361         __this_cpu_write(cpu_tsc_khz, 0);
5362 }
5363
5364 static void tsc_khz_changed(void *data)
5365 {
5366         struct cpufreq_freqs *freq = data;
5367         unsigned long khz = 0;
5368
5369         if (data)
5370                 khz = freq->new;
5371         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5372                 khz = cpufreq_quick_get(raw_smp_processor_id());
5373         if (!khz)
5374                 khz = tsc_khz;
5375         __this_cpu_write(cpu_tsc_khz, khz);
5376 }
5377
5378 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5379                                      void *data)
5380 {
5381         struct cpufreq_freqs *freq = data;
5382         struct kvm *kvm;
5383         struct kvm_vcpu *vcpu;
5384         int i, send_ipi = 0;
5385
5386         /*
5387          * We allow guests to temporarily run on slowing clocks,
5388          * provided we notify them after, or to run on accelerating
5389          * clocks, provided we notify them before.  Thus time never
5390          * goes backwards.
5391          *
5392          * However, we have a problem.  We can't atomically update
5393          * the frequency of a given CPU from this function; it is
5394          * merely a notifier, which can be called from any CPU.
5395          * Changing the TSC frequency at arbitrary points in time
5396          * requires a recomputation of local variables related to
5397          * the TSC for each VCPU.  We must flag these local variables
5398          * to be updated and be sure the update takes place with the
5399          * new frequency before any guests proceed.
5400          *
5401          * Unfortunately, the combination of hotplug CPU and frequency
5402          * change creates an intractable locking scenario; the order
5403          * of when these callouts happen is undefined with respect to
5404          * CPU hotplug, and they can race with each other.  As such,
5405          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5406          * undefined; you can actually have a CPU frequency change take
5407          * place in between the computation of X and the setting of the
5408          * variable.  To protect against this problem, all updates of
5409          * the per_cpu tsc_khz variable are done in an interrupt
5410          * protected IPI, and all callers wishing to update the value
5411          * must wait for a synchronous IPI to complete (which is trivial
5412          * if the caller is on the CPU already).  This establishes the
5413          * necessary total order on variable updates.
5414          *
5415          * Note that because a guest time update may take place
5416          * anytime after the setting of the VCPU's request bit, the
5417          * correct TSC value must be set before the request.  However,
5418          * to ensure the update actually makes it to any guest which
5419          * starts running in hardware virtualization between the set
5420          * and the acquisition of the spinlock, we must also ping the
5421          * CPU after setting the request bit.
5422          *
5423          */
5424
5425         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5426                 return 0;
5427         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5428                 return 0;
5429
5430         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5431
5432         spin_lock(&kvm_lock);
5433         list_for_each_entry(kvm, &vm_list, vm_list) {
5434                 kvm_for_each_vcpu(i, vcpu, kvm) {
5435                         if (vcpu->cpu != freq->cpu)
5436                                 continue;
5437                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5438                         if (vcpu->cpu != smp_processor_id())
5439                                 send_ipi = 1;
5440                 }
5441         }
5442         spin_unlock(&kvm_lock);
5443
5444         if (freq->old < freq->new && send_ipi) {
5445                 /*
5446                  * We upscale the frequency.  Must make the guest
5447                  * doesn't see old kvmclock values while running with
5448                  * the new frequency, otherwise we risk the guest sees
5449                  * time go backwards.
5450                  *
5451                  * In case we update the frequency for another cpu
5452                  * (which might be in guest context) send an interrupt
5453                  * to kick the cpu out of guest context.  Next time
5454                  * guest context is entered kvmclock will be updated,
5455                  * so the guest will not see stale values.
5456                  */
5457                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5458         }
5459         return 0;
5460 }
5461
5462 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5463         .notifier_call  = kvmclock_cpufreq_notifier
5464 };
5465
5466 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5467                                         unsigned long action, void *hcpu)
5468 {
5469         unsigned int cpu = (unsigned long)hcpu;
5470
5471         switch (action) {
5472                 case CPU_ONLINE:
5473                 case CPU_DOWN_FAILED:
5474                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5475                         break;
5476                 case CPU_DOWN_PREPARE:
5477                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5478                         break;
5479         }
5480         return NOTIFY_OK;
5481 }
5482
5483 static struct notifier_block kvmclock_cpu_notifier_block = {
5484         .notifier_call  = kvmclock_cpu_notifier,
5485         .priority = -INT_MAX
5486 };
5487
5488 static void kvm_timer_init(void)
5489 {
5490         int cpu;
5491
5492         max_tsc_khz = tsc_khz;
5493
5494         cpu_notifier_register_begin();
5495         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5496 #ifdef CONFIG_CPU_FREQ
5497                 struct cpufreq_policy policy;
5498                 memset(&policy, 0, sizeof(policy));
5499                 cpu = get_cpu();
5500                 cpufreq_get_policy(&policy, cpu);
5501                 if (policy.cpuinfo.max_freq)
5502                         max_tsc_khz = policy.cpuinfo.max_freq;
5503                 put_cpu();
5504 #endif
5505                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5506                                           CPUFREQ_TRANSITION_NOTIFIER);
5507         }
5508         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5509         for_each_online_cpu(cpu)
5510                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5511
5512         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5513         cpu_notifier_register_done();
5514
5515 }
5516
5517 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5518
5519 int kvm_is_in_guest(void)
5520 {
5521         return __this_cpu_read(current_vcpu) != NULL;
5522 }
5523
5524 static int kvm_is_user_mode(void)
5525 {
5526         int user_mode = 3;
5527
5528         if (__this_cpu_read(current_vcpu))
5529                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5530
5531         return user_mode != 0;
5532 }
5533
5534 static unsigned long kvm_get_guest_ip(void)
5535 {
5536         unsigned long ip = 0;
5537
5538         if (__this_cpu_read(current_vcpu))
5539                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5540
5541         return ip;
5542 }
5543
5544 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5545         .is_in_guest            = kvm_is_in_guest,
5546         .is_user_mode           = kvm_is_user_mode,
5547         .get_guest_ip           = kvm_get_guest_ip,
5548 };
5549
5550 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5551 {
5552         __this_cpu_write(current_vcpu, vcpu);
5553 }
5554 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5555
5556 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5557 {
5558         __this_cpu_write(current_vcpu, NULL);
5559 }
5560 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5561
5562 static void kvm_set_mmio_spte_mask(void)
5563 {
5564         u64 mask;
5565         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5566
5567         /*
5568          * Set the reserved bits and the present bit of an paging-structure
5569          * entry to generate page fault with PFER.RSV = 1.
5570          */
5571          /* Mask the reserved physical address bits. */
5572         mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5573
5574         /* Bit 62 is always reserved for 32bit host. */
5575         mask |= 0x3ull << 62;
5576
5577         /* Set the present bit. */
5578         mask |= 1ull;
5579
5580 #ifdef CONFIG_X86_64
5581         /*
5582          * If reserved bit is not supported, clear the present bit to disable
5583          * mmio page fault.
5584          */
5585         if (maxphyaddr == 52)
5586                 mask &= ~1ull;
5587 #endif
5588
5589         kvm_mmu_set_mmio_spte_mask(mask);
5590 }
5591
5592 #ifdef CONFIG_X86_64
5593 static void pvclock_gtod_update_fn(struct work_struct *work)
5594 {
5595         struct kvm *kvm;
5596
5597         struct kvm_vcpu *vcpu;
5598         int i;
5599
5600         spin_lock(&kvm_lock);
5601         list_for_each_entry(kvm, &vm_list, vm_list)
5602                 kvm_for_each_vcpu(i, vcpu, kvm)
5603                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5604         atomic_set(&kvm_guest_has_master_clock, 0);
5605         spin_unlock(&kvm_lock);
5606 }
5607
5608 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5609
5610 /*
5611  * Notification about pvclock gtod data update.
5612  */
5613 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5614                                void *priv)
5615 {
5616         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5617         struct timekeeper *tk = priv;
5618
5619         update_pvclock_gtod(tk);
5620
5621         /* disable master clock if host does not trust, or does not
5622          * use, TSC clocksource
5623          */
5624         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5625             atomic_read(&kvm_guest_has_master_clock) != 0)
5626                 queue_work(system_long_wq, &pvclock_gtod_work);
5627
5628         return 0;
5629 }
5630
5631 static struct notifier_block pvclock_gtod_notifier = {
5632         .notifier_call = pvclock_gtod_notify,
5633 };
5634 #endif
5635
5636 int kvm_arch_init(void *opaque)
5637 {
5638         int r;
5639         struct kvm_x86_ops *ops = opaque;
5640
5641         if (kvm_x86_ops) {
5642                 printk(KERN_ERR "kvm: already loaded the other module\n");
5643                 r = -EEXIST;
5644                 goto out;
5645         }
5646
5647         if (!ops->cpu_has_kvm_support()) {
5648                 printk(KERN_ERR "kvm: no hardware support\n");
5649                 r = -EOPNOTSUPP;
5650                 goto out;
5651         }
5652         if (ops->disabled_by_bios()) {
5653                 printk(KERN_ERR "kvm: disabled by bios\n");
5654                 r = -EOPNOTSUPP;
5655                 goto out;
5656         }
5657
5658         r = -ENOMEM;
5659         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5660         if (!shared_msrs) {
5661                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5662                 goto out;
5663         }
5664
5665         r = kvm_mmu_module_init();
5666         if (r)
5667                 goto out_free_percpu;
5668
5669         kvm_set_mmio_spte_mask();
5670
5671         kvm_x86_ops = ops;
5672         kvm_init_msr_list();
5673
5674         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5675                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5676
5677         kvm_timer_init();
5678
5679         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5680
5681         if (cpu_has_xsave)
5682                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5683
5684         kvm_lapic_init();
5685 #ifdef CONFIG_X86_64
5686         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5687 #endif
5688
5689         return 0;
5690
5691 out_free_percpu:
5692         free_percpu(shared_msrs);
5693 out:
5694         return r;
5695 }
5696
5697 void kvm_arch_exit(void)
5698 {
5699         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5700
5701         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5702                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5703                                             CPUFREQ_TRANSITION_NOTIFIER);
5704         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5705 #ifdef CONFIG_X86_64
5706         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5707 #endif
5708         kvm_x86_ops = NULL;
5709         kvm_mmu_module_exit();
5710         free_percpu(shared_msrs);
5711 }
5712
5713 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5714 {
5715         ++vcpu->stat.halt_exits;
5716         if (irqchip_in_kernel(vcpu->kvm)) {
5717                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5718                 return 1;
5719         } else {
5720                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5721                 return 0;
5722         }
5723 }
5724 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5725
5726 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5727 {
5728         u64 param, ingpa, outgpa, ret;
5729         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5730         bool fast, longmode;
5731
5732         /*
5733          * hypercall generates UD from non zero cpl and real mode
5734          * per HYPER-V spec
5735          */
5736         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5737                 kvm_queue_exception(vcpu, UD_VECTOR);
5738                 return 0;
5739         }
5740
5741         longmode = is_64_bit_mode(vcpu);
5742
5743         if (!longmode) {
5744                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5745                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5746                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5747                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5748                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5749                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5750         }
5751 #ifdef CONFIG_X86_64
5752         else {
5753                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5754                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5755                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5756         }
5757 #endif
5758
5759         code = param & 0xffff;
5760         fast = (param >> 16) & 0x1;
5761         rep_cnt = (param >> 32) & 0xfff;
5762         rep_idx = (param >> 48) & 0xfff;
5763
5764         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5765
5766         switch (code) {
5767         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5768                 kvm_vcpu_on_spin(vcpu);
5769                 break;
5770         default:
5771                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5772                 break;
5773         }
5774
5775         ret = res | (((u64)rep_done & 0xfff) << 32);
5776         if (longmode) {
5777                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5778         } else {
5779                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5780                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5781         }
5782
5783         return 1;
5784 }
5785
5786 /*
5787  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5788  *
5789  * @apicid - apicid of vcpu to be kicked.
5790  */
5791 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5792 {
5793         struct kvm_lapic_irq lapic_irq;
5794
5795         lapic_irq.shorthand = 0;
5796         lapic_irq.dest_mode = 0;
5797         lapic_irq.dest_id = apicid;
5798
5799         lapic_irq.delivery_mode = APIC_DM_REMRD;
5800         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5801 }
5802
5803 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5804 {
5805         unsigned long nr, a0, a1, a2, a3, ret;
5806         int op_64_bit, r = 1;
5807
5808         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5809                 return kvm_hv_hypercall(vcpu);
5810
5811         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5812         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5813         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5814         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5815         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5816
5817         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5818
5819         op_64_bit = is_64_bit_mode(vcpu);
5820         if (!op_64_bit) {
5821                 nr &= 0xFFFFFFFF;
5822                 a0 &= 0xFFFFFFFF;
5823                 a1 &= 0xFFFFFFFF;
5824                 a2 &= 0xFFFFFFFF;
5825                 a3 &= 0xFFFFFFFF;
5826         }
5827
5828         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5829                 ret = -KVM_EPERM;
5830                 goto out;
5831         }
5832
5833         switch (nr) {
5834         case KVM_HC_VAPIC_POLL_IRQ:
5835                 ret = 0;
5836                 break;
5837         case KVM_HC_KICK_CPU:
5838                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5839                 ret = 0;
5840                 break;
5841         default:
5842                 ret = -KVM_ENOSYS;
5843                 break;
5844         }
5845 out:
5846         if (!op_64_bit)
5847                 ret = (u32)ret;
5848         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5849         ++vcpu->stat.hypercalls;
5850         return r;
5851 }
5852 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5853
5854 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5855 {
5856         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5857         char instruction[3];
5858         unsigned long rip = kvm_rip_read(vcpu);
5859
5860         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5861
5862         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5863 }
5864
5865 /*
5866  * Check if userspace requested an interrupt window, and that the
5867  * interrupt window is open.
5868  *
5869  * No need to exit to userspace if we already have an interrupt queued.
5870  */
5871 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5872 {
5873         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5874                 vcpu->run->request_interrupt_window &&
5875                 kvm_arch_interrupt_allowed(vcpu));
5876 }
5877
5878 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5879 {
5880         struct kvm_run *kvm_run = vcpu->run;
5881
5882         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5883         kvm_run->cr8 = kvm_get_cr8(vcpu);
5884         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5885         if (irqchip_in_kernel(vcpu->kvm))
5886                 kvm_run->ready_for_interrupt_injection = 1;
5887         else
5888                 kvm_run->ready_for_interrupt_injection =
5889                         kvm_arch_interrupt_allowed(vcpu) &&
5890                         !kvm_cpu_has_interrupt(vcpu) &&
5891                         !kvm_event_needs_reinjection(vcpu);
5892 }
5893
5894 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5895 {
5896         int max_irr, tpr;
5897
5898         if (!kvm_x86_ops->update_cr8_intercept)
5899                 return;
5900
5901         if (!vcpu->arch.apic)
5902                 return;
5903
5904         if (!vcpu->arch.apic->vapic_addr)
5905                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5906         else
5907                 max_irr = -1;
5908
5909         if (max_irr != -1)
5910                 max_irr >>= 4;
5911
5912         tpr = kvm_lapic_get_cr8(vcpu);
5913
5914         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5915 }
5916
5917 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5918 {
5919         int r;
5920
5921         /* try to reinject previous events if any */
5922         if (vcpu->arch.exception.pending) {
5923                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5924                                         vcpu->arch.exception.has_error_code,
5925                                         vcpu->arch.exception.error_code);
5926
5927                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5928                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5929                                              X86_EFLAGS_RF);
5930
5931                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5932                                           vcpu->arch.exception.has_error_code,
5933                                           vcpu->arch.exception.error_code,
5934                                           vcpu->arch.exception.reinject);
5935                 return 0;
5936         }
5937
5938         if (vcpu->arch.nmi_injected) {
5939                 kvm_x86_ops->set_nmi(vcpu);
5940                 return 0;
5941         }
5942
5943         if (vcpu->arch.interrupt.pending) {
5944                 kvm_x86_ops->set_irq(vcpu);
5945                 return 0;
5946         }
5947
5948         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5949                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5950                 if (r != 0)
5951                         return r;
5952         }
5953
5954         /* try to inject new event if pending */
5955         if (vcpu->arch.nmi_pending) {
5956                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5957                         --vcpu->arch.nmi_pending;
5958                         vcpu->arch.nmi_injected = true;
5959                         kvm_x86_ops->set_nmi(vcpu);
5960                 }
5961         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5962                 /*
5963                  * Because interrupts can be injected asynchronously, we are
5964                  * calling check_nested_events again here to avoid a race condition.
5965                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5966                  * proposal and current concerns.  Perhaps we should be setting
5967                  * KVM_REQ_EVENT only on certain events and not unconditionally?
5968                  */
5969                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5970                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5971                         if (r != 0)
5972                                 return r;
5973                 }
5974                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5975                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5976                                             false);
5977                         kvm_x86_ops->set_irq(vcpu);
5978                 }
5979         }
5980         return 0;
5981 }
5982
5983 static void process_nmi(struct kvm_vcpu *vcpu)
5984 {
5985         unsigned limit = 2;
5986
5987         /*
5988          * x86 is limited to one NMI running, and one NMI pending after it.
5989          * If an NMI is already in progress, limit further NMIs to just one.
5990          * Otherwise, allow two (and we'll inject the first one immediately).
5991          */
5992         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5993                 limit = 1;
5994
5995         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5996         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5997         kvm_make_request(KVM_REQ_EVENT, vcpu);
5998 }
5999
6000 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6001 {
6002         u64 eoi_exit_bitmap[4];
6003         u32 tmr[8];
6004
6005         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6006                 return;
6007
6008         memset(eoi_exit_bitmap, 0, 32);
6009         memset(tmr, 0, 32);
6010
6011         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
6012         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6013         kvm_apic_update_tmr(vcpu, tmr);
6014 }
6015
6016 /*
6017  * Returns 1 to let __vcpu_run() continue the guest execution loop without
6018  * exiting to the userspace.  Otherwise, the value will be returned to the
6019  * userspace.
6020  */
6021 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6022 {
6023         int r;
6024         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
6025                 vcpu->run->request_interrupt_window;
6026         bool req_immediate_exit = false;
6027
6028         if (vcpu->requests) {
6029                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6030                         kvm_mmu_unload(vcpu);
6031                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6032                         __kvm_migrate_timers(vcpu);
6033                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6034                         kvm_gen_update_masterclock(vcpu->kvm);
6035                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6036                         kvm_gen_kvmclock_update(vcpu);
6037                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6038                         r = kvm_guest_time_update(vcpu);
6039                         if (unlikely(r))
6040                                 goto out;
6041                 }
6042                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6043                         kvm_mmu_sync_roots(vcpu);
6044                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6045                         kvm_x86_ops->tlb_flush(vcpu);
6046                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6047                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6048                         r = 0;
6049                         goto out;
6050                 }
6051                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6052                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6053                         r = 0;
6054                         goto out;
6055                 }
6056                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6057                         vcpu->fpu_active = 0;
6058                         kvm_x86_ops->fpu_deactivate(vcpu);
6059                 }
6060                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6061                         /* Page is swapped out. Do synthetic halt */
6062                         vcpu->arch.apf.halted = true;
6063                         r = 1;
6064                         goto out;
6065                 }
6066                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6067                         record_steal_time(vcpu);
6068                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6069                         process_nmi(vcpu);
6070                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6071                         kvm_handle_pmu_event(vcpu);
6072                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6073                         kvm_deliver_pmi(vcpu);
6074                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6075                         vcpu_scan_ioapic(vcpu);
6076         }
6077
6078         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6079                 kvm_apic_accept_events(vcpu);
6080                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6081                         r = 1;
6082                         goto out;
6083                 }
6084
6085                 if (inject_pending_event(vcpu, req_int_win) != 0)
6086                         req_immediate_exit = true;
6087                 /* enable NMI/IRQ window open exits if needed */
6088                 else if (vcpu->arch.nmi_pending)
6089                         kvm_x86_ops->enable_nmi_window(vcpu);
6090                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6091                         kvm_x86_ops->enable_irq_window(vcpu);
6092
6093                 if (kvm_lapic_enabled(vcpu)) {
6094                         /*
6095                          * Update architecture specific hints for APIC
6096                          * virtual interrupt delivery.
6097                          */
6098                         if (kvm_x86_ops->hwapic_irr_update)
6099                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6100                                         kvm_lapic_find_highest_irr(vcpu));
6101                         update_cr8_intercept(vcpu);
6102                         kvm_lapic_sync_to_vapic(vcpu);
6103                 }
6104         }
6105
6106         r = kvm_mmu_reload(vcpu);
6107         if (unlikely(r)) {
6108                 goto cancel_injection;
6109         }
6110
6111         preempt_disable();
6112
6113         kvm_x86_ops->prepare_guest_switch(vcpu);
6114         if (vcpu->fpu_active)
6115                 kvm_load_guest_fpu(vcpu);
6116         kvm_load_guest_xcr0(vcpu);
6117
6118         vcpu->mode = IN_GUEST_MODE;
6119
6120         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6121
6122         /* We should set ->mode before check ->requests,
6123          * see the comment in make_all_cpus_request.
6124          */
6125         smp_mb__after_srcu_read_unlock();
6126
6127         local_irq_disable();
6128
6129         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6130             || need_resched() || signal_pending(current)) {
6131                 vcpu->mode = OUTSIDE_GUEST_MODE;
6132                 smp_wmb();
6133                 local_irq_enable();
6134                 preempt_enable();
6135                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6136                 r = 1;
6137                 goto cancel_injection;
6138         }
6139
6140         if (req_immediate_exit)
6141                 smp_send_reschedule(vcpu->cpu);
6142
6143         kvm_guest_enter();
6144
6145         if (unlikely(vcpu->arch.switch_db_regs)) {
6146                 set_debugreg(0, 7);
6147                 set_debugreg(vcpu->arch.eff_db[0], 0);
6148                 set_debugreg(vcpu->arch.eff_db[1], 1);
6149                 set_debugreg(vcpu->arch.eff_db[2], 2);
6150                 set_debugreg(vcpu->arch.eff_db[3], 3);
6151                 set_debugreg(vcpu->arch.dr6, 6);
6152         }
6153
6154         trace_kvm_entry(vcpu->vcpu_id);
6155         kvm_x86_ops->run(vcpu);
6156
6157         /*
6158          * Do this here before restoring debug registers on the host.  And
6159          * since we do this before handling the vmexit, a DR access vmexit
6160          * can (a) read the correct value of the debug registers, (b) set
6161          * KVM_DEBUGREG_WONT_EXIT again.
6162          */
6163         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6164                 int i;
6165
6166                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6167                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6168                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6169                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6170         }
6171
6172         /*
6173          * If the guest has used debug registers, at least dr7
6174          * will be disabled while returning to the host.
6175          * If we don't have active breakpoints in the host, we don't
6176          * care about the messed up debug address registers. But if
6177          * we have some of them active, restore the old state.
6178          */
6179         if (hw_breakpoint_active())
6180                 hw_breakpoint_restore();
6181
6182         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6183                                                            native_read_tsc());
6184
6185         vcpu->mode = OUTSIDE_GUEST_MODE;
6186         smp_wmb();
6187
6188         /* Interrupt is enabled by handle_external_intr() */
6189         kvm_x86_ops->handle_external_intr(vcpu);
6190
6191         ++vcpu->stat.exits;
6192
6193         /*
6194          * We must have an instruction between local_irq_enable() and
6195          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6196          * the interrupt shadow.  The stat.exits increment will do nicely.
6197          * But we need to prevent reordering, hence this barrier():
6198          */
6199         barrier();
6200
6201         kvm_guest_exit();
6202
6203         preempt_enable();
6204
6205         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6206
6207         /*
6208          * Profile KVM exit RIPs:
6209          */
6210         if (unlikely(prof_on == KVM_PROFILING)) {
6211                 unsigned long rip = kvm_rip_read(vcpu);
6212                 profile_hit(KVM_PROFILING, (void *)rip);
6213         }
6214
6215         if (unlikely(vcpu->arch.tsc_always_catchup))
6216                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6217
6218         if (vcpu->arch.apic_attention)
6219                 kvm_lapic_sync_from_vapic(vcpu);
6220
6221         r = kvm_x86_ops->handle_exit(vcpu);
6222         return r;
6223
6224 cancel_injection:
6225         kvm_x86_ops->cancel_injection(vcpu);
6226         if (unlikely(vcpu->arch.apic_attention))
6227                 kvm_lapic_sync_from_vapic(vcpu);
6228 out:
6229         return r;
6230 }
6231
6232
6233 static int __vcpu_run(struct kvm_vcpu *vcpu)
6234 {
6235         int r;
6236         struct kvm *kvm = vcpu->kvm;
6237
6238         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6239
6240         r = 1;
6241         while (r > 0) {
6242                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6243                     !vcpu->arch.apf.halted)
6244                         r = vcpu_enter_guest(vcpu);
6245                 else {
6246                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6247                         kvm_vcpu_block(vcpu);
6248                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6249                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6250                                 kvm_apic_accept_events(vcpu);
6251                                 switch(vcpu->arch.mp_state) {
6252                                 case KVM_MP_STATE_HALTED:
6253                                         vcpu->arch.pv.pv_unhalted = false;
6254                                         vcpu->arch.mp_state =
6255                                                 KVM_MP_STATE_RUNNABLE;
6256                                 case KVM_MP_STATE_RUNNABLE:
6257                                         vcpu->arch.apf.halted = false;
6258                                         break;
6259                                 case KVM_MP_STATE_INIT_RECEIVED:
6260                                         break;
6261                                 default:
6262                                         r = -EINTR;
6263                                         break;
6264                                 }
6265                         }
6266                 }
6267
6268                 if (r <= 0)
6269                         break;
6270
6271                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6272                 if (kvm_cpu_has_pending_timer(vcpu))
6273                         kvm_inject_pending_timer_irqs(vcpu);
6274
6275                 if (dm_request_for_irq_injection(vcpu)) {
6276                         r = -EINTR;
6277                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6278                         ++vcpu->stat.request_irq_exits;
6279                 }
6280
6281                 kvm_check_async_pf_completion(vcpu);
6282
6283                 if (signal_pending(current)) {
6284                         r = -EINTR;
6285                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6286                         ++vcpu->stat.signal_exits;
6287                 }
6288                 if (need_resched()) {
6289                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6290                         cond_resched();
6291                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6292                 }
6293         }
6294
6295         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6296
6297         return r;
6298 }
6299
6300 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6301 {
6302         int r;
6303         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6304         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6305         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6306         if (r != EMULATE_DONE)
6307                 return 0;
6308         return 1;
6309 }
6310
6311 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6312 {
6313         BUG_ON(!vcpu->arch.pio.count);
6314
6315         return complete_emulated_io(vcpu);
6316 }
6317
6318 /*
6319  * Implements the following, as a state machine:
6320  *
6321  * read:
6322  *   for each fragment
6323  *     for each mmio piece in the fragment
6324  *       write gpa, len
6325  *       exit
6326  *       copy data
6327  *   execute insn
6328  *
6329  * write:
6330  *   for each fragment
6331  *     for each mmio piece in the fragment
6332  *       write gpa, len
6333  *       copy data
6334  *       exit
6335  */
6336 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6337 {
6338         struct kvm_run *run = vcpu->run;
6339         struct kvm_mmio_fragment *frag;
6340         unsigned len;
6341
6342         BUG_ON(!vcpu->mmio_needed);
6343
6344         /* Complete previous fragment */
6345         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6346         len = min(8u, frag->len);
6347         if (!vcpu->mmio_is_write)
6348                 memcpy(frag->data, run->mmio.data, len);
6349
6350         if (frag->len <= 8) {
6351                 /* Switch to the next fragment. */
6352                 frag++;
6353                 vcpu->mmio_cur_fragment++;
6354         } else {
6355                 /* Go forward to the next mmio piece. */
6356                 frag->data += len;
6357                 frag->gpa += len;
6358                 frag->len -= len;
6359         }
6360
6361         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6362                 vcpu->mmio_needed = 0;
6363
6364                 /* FIXME: return into emulator if single-stepping.  */
6365                 if (vcpu->mmio_is_write)
6366                         return 1;
6367                 vcpu->mmio_read_completed = 1;
6368                 return complete_emulated_io(vcpu);
6369         }
6370
6371         run->exit_reason = KVM_EXIT_MMIO;
6372         run->mmio.phys_addr = frag->gpa;
6373         if (vcpu->mmio_is_write)
6374                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6375         run->mmio.len = min(8u, frag->len);
6376         run->mmio.is_write = vcpu->mmio_is_write;
6377         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6378         return 0;
6379 }
6380
6381
6382 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6383 {
6384         int r;
6385         sigset_t sigsaved;
6386
6387         if (!tsk_used_math(current) && init_fpu(current))
6388                 return -ENOMEM;
6389
6390         if (vcpu->sigset_active)
6391                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6392
6393         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6394                 kvm_vcpu_block(vcpu);
6395                 kvm_apic_accept_events(vcpu);
6396                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6397                 r = -EAGAIN;
6398                 goto out;
6399         }
6400
6401         /* re-sync apic's tpr */
6402         if (!irqchip_in_kernel(vcpu->kvm)) {
6403                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6404                         r = -EINVAL;
6405                         goto out;
6406                 }
6407         }
6408
6409         if (unlikely(vcpu->arch.complete_userspace_io)) {
6410                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6411                 vcpu->arch.complete_userspace_io = NULL;
6412                 r = cui(vcpu);
6413                 if (r <= 0)
6414                         goto out;
6415         } else
6416                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6417
6418         r = __vcpu_run(vcpu);
6419
6420 out:
6421         post_kvm_run_save(vcpu);
6422         if (vcpu->sigset_active)
6423                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6424
6425         return r;
6426 }
6427
6428 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6429 {
6430         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6431                 /*
6432                  * We are here if userspace calls get_regs() in the middle of
6433                  * instruction emulation. Registers state needs to be copied
6434                  * back from emulation context to vcpu. Userspace shouldn't do
6435                  * that usually, but some bad designed PV devices (vmware
6436                  * backdoor interface) need this to work
6437                  */
6438                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6439                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6440         }
6441         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6442         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6443         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6444         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6445         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6446         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6447         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6448         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6449 #ifdef CONFIG_X86_64
6450         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6451         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6452         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6453         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6454         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6455         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6456         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6457         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6458 #endif
6459
6460         regs->rip = kvm_rip_read(vcpu);
6461         regs->rflags = kvm_get_rflags(vcpu);
6462
6463         return 0;
6464 }
6465
6466 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6467 {
6468         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6469         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6470
6471         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6472         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6473         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6474         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6475         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6476         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6477         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6478         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6479 #ifdef CONFIG_X86_64
6480         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6481         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6482         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6483         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6484         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6485         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6486         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6487         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6488 #endif
6489
6490         kvm_rip_write(vcpu, regs->rip);
6491         kvm_set_rflags(vcpu, regs->rflags);
6492
6493         vcpu->arch.exception.pending = false;
6494
6495         kvm_make_request(KVM_REQ_EVENT, vcpu);
6496
6497         return 0;
6498 }
6499
6500 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6501 {
6502         struct kvm_segment cs;
6503
6504         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6505         *db = cs.db;
6506         *l = cs.l;
6507 }
6508 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6509
6510 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6511                                   struct kvm_sregs *sregs)
6512 {
6513         struct desc_ptr dt;
6514
6515         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6516         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6517         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6518         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6519         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6520         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6521
6522         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6523         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6524
6525         kvm_x86_ops->get_idt(vcpu, &dt);
6526         sregs->idt.limit = dt.size;
6527         sregs->idt.base = dt.address;
6528         kvm_x86_ops->get_gdt(vcpu, &dt);
6529         sregs->gdt.limit = dt.size;
6530         sregs->gdt.base = dt.address;
6531
6532         sregs->cr0 = kvm_read_cr0(vcpu);
6533         sregs->cr2 = vcpu->arch.cr2;
6534         sregs->cr3 = kvm_read_cr3(vcpu);
6535         sregs->cr4 = kvm_read_cr4(vcpu);
6536         sregs->cr8 = kvm_get_cr8(vcpu);
6537         sregs->efer = vcpu->arch.efer;
6538         sregs->apic_base = kvm_get_apic_base(vcpu);
6539
6540         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6541
6542         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6543                 set_bit(vcpu->arch.interrupt.nr,
6544                         (unsigned long *)sregs->interrupt_bitmap);
6545
6546         return 0;
6547 }
6548
6549 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6550                                     struct kvm_mp_state *mp_state)
6551 {
6552         kvm_apic_accept_events(vcpu);
6553         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6554                                         vcpu->arch.pv.pv_unhalted)
6555                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6556         else
6557                 mp_state->mp_state = vcpu->arch.mp_state;
6558
6559         return 0;
6560 }
6561
6562 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6563                                     struct kvm_mp_state *mp_state)
6564 {
6565         if (!kvm_vcpu_has_lapic(vcpu) &&
6566             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6567                 return -EINVAL;
6568
6569         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6570                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6571                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6572         } else
6573                 vcpu->arch.mp_state = mp_state->mp_state;
6574         kvm_make_request(KVM_REQ_EVENT, vcpu);
6575         return 0;
6576 }
6577
6578 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6579                     int reason, bool has_error_code, u32 error_code)
6580 {
6581         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6582         int ret;
6583
6584         init_emulate_ctxt(vcpu);
6585
6586         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6587                                    has_error_code, error_code);
6588
6589         if (ret)
6590                 return EMULATE_FAIL;
6591
6592         kvm_rip_write(vcpu, ctxt->eip);
6593         kvm_set_rflags(vcpu, ctxt->eflags);
6594         kvm_make_request(KVM_REQ_EVENT, vcpu);
6595         return EMULATE_DONE;
6596 }
6597 EXPORT_SYMBOL_GPL(kvm_task_switch);
6598
6599 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6600                                   struct kvm_sregs *sregs)
6601 {
6602         struct msr_data apic_base_msr;
6603         int mmu_reset_needed = 0;
6604         int pending_vec, max_bits, idx;
6605         struct desc_ptr dt;
6606
6607         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6608                 return -EINVAL;
6609
6610         dt.size = sregs->idt.limit;
6611         dt.address = sregs->idt.base;
6612         kvm_x86_ops->set_idt(vcpu, &dt);
6613         dt.size = sregs->gdt.limit;
6614         dt.address = sregs->gdt.base;
6615         kvm_x86_ops->set_gdt(vcpu, &dt);
6616
6617         vcpu->arch.cr2 = sregs->cr2;
6618         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6619         vcpu->arch.cr3 = sregs->cr3;
6620         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6621
6622         kvm_set_cr8(vcpu, sregs->cr8);
6623
6624         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6625         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6626         apic_base_msr.data = sregs->apic_base;
6627         apic_base_msr.host_initiated = true;
6628         kvm_set_apic_base(vcpu, &apic_base_msr);
6629
6630         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6631         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6632         vcpu->arch.cr0 = sregs->cr0;
6633
6634         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6635         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6636         if (sregs->cr4 & X86_CR4_OSXSAVE)
6637                 kvm_update_cpuid(vcpu);
6638
6639         idx = srcu_read_lock(&vcpu->kvm->srcu);
6640         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6641                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6642                 mmu_reset_needed = 1;
6643         }
6644         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6645
6646         if (mmu_reset_needed)
6647                 kvm_mmu_reset_context(vcpu);
6648
6649         max_bits = KVM_NR_INTERRUPTS;
6650         pending_vec = find_first_bit(
6651                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6652         if (pending_vec < max_bits) {
6653                 kvm_queue_interrupt(vcpu, pending_vec, false);
6654                 pr_debug("Set back pending irq %d\n", pending_vec);
6655         }
6656
6657         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6658         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6659         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6660         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6661         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6662         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6663
6664         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6665         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6666
6667         update_cr8_intercept(vcpu);
6668
6669         /* Older userspace won't unhalt the vcpu on reset. */
6670         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6671             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6672             !is_protmode(vcpu))
6673                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6674
6675         kvm_make_request(KVM_REQ_EVENT, vcpu);
6676
6677         return 0;
6678 }
6679
6680 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6681                                         struct kvm_guest_debug *dbg)
6682 {
6683         unsigned long rflags;
6684         int i, r;
6685
6686         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6687                 r = -EBUSY;
6688                 if (vcpu->arch.exception.pending)
6689                         goto out;
6690                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6691                         kvm_queue_exception(vcpu, DB_VECTOR);
6692                 else
6693                         kvm_queue_exception(vcpu, BP_VECTOR);
6694         }
6695
6696         /*
6697          * Read rflags as long as potentially injected trace flags are still
6698          * filtered out.
6699          */
6700         rflags = kvm_get_rflags(vcpu);
6701
6702         vcpu->guest_debug = dbg->control;
6703         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6704                 vcpu->guest_debug = 0;
6705
6706         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6707                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6708                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6709                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6710         } else {
6711                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6712                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6713         }
6714         kvm_update_dr7(vcpu);
6715
6716         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6717                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6718                         get_segment_base(vcpu, VCPU_SREG_CS);
6719
6720         /*
6721          * Trigger an rflags update that will inject or remove the trace
6722          * flags.
6723          */
6724         kvm_set_rflags(vcpu, rflags);
6725
6726         kvm_x86_ops->update_db_bp_intercept(vcpu);
6727
6728         r = 0;
6729
6730 out:
6731
6732         return r;
6733 }
6734
6735 /*
6736  * Translate a guest virtual address to a guest physical address.
6737  */
6738 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6739                                     struct kvm_translation *tr)
6740 {
6741         unsigned long vaddr = tr->linear_address;
6742         gpa_t gpa;
6743         int idx;
6744
6745         idx = srcu_read_lock(&vcpu->kvm->srcu);
6746         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6747         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6748         tr->physical_address = gpa;
6749         tr->valid = gpa != UNMAPPED_GVA;
6750         tr->writeable = 1;
6751         tr->usermode = 0;
6752
6753         return 0;
6754 }
6755
6756 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6757 {
6758         struct i387_fxsave_struct *fxsave =
6759                         &vcpu->arch.guest_fpu.state->fxsave;
6760
6761         memcpy(fpu->fpr, fxsave->st_space, 128);
6762         fpu->fcw = fxsave->cwd;
6763         fpu->fsw = fxsave->swd;
6764         fpu->ftwx = fxsave->twd;
6765         fpu->last_opcode = fxsave->fop;
6766         fpu->last_ip = fxsave->rip;
6767         fpu->last_dp = fxsave->rdp;
6768         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6769
6770         return 0;
6771 }
6772
6773 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6774 {
6775         struct i387_fxsave_struct *fxsave =
6776                         &vcpu->arch.guest_fpu.state->fxsave;
6777
6778         memcpy(fxsave->st_space, fpu->fpr, 128);
6779         fxsave->cwd = fpu->fcw;
6780         fxsave->swd = fpu->fsw;
6781         fxsave->twd = fpu->ftwx;
6782         fxsave->fop = fpu->last_opcode;
6783         fxsave->rip = fpu->last_ip;
6784         fxsave->rdp = fpu->last_dp;
6785         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6786
6787         return 0;
6788 }
6789
6790 int fx_init(struct kvm_vcpu *vcpu)
6791 {
6792         int err;
6793
6794         err = fpu_alloc(&vcpu->arch.guest_fpu);
6795         if (err)
6796                 return err;
6797
6798         fpu_finit(&vcpu->arch.guest_fpu);
6799
6800         /*
6801          * Ensure guest xcr0 is valid for loading
6802          */
6803         vcpu->arch.xcr0 = XSTATE_FP;
6804
6805         vcpu->arch.cr0 |= X86_CR0_ET;
6806
6807         return 0;
6808 }
6809 EXPORT_SYMBOL_GPL(fx_init);
6810
6811 static void fx_free(struct kvm_vcpu *vcpu)
6812 {
6813         fpu_free(&vcpu->arch.guest_fpu);
6814 }
6815
6816 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6817 {
6818         if (vcpu->guest_fpu_loaded)
6819                 return;
6820
6821         /*
6822          * Restore all possible states in the guest,
6823          * and assume host would use all available bits.
6824          * Guest xcr0 would be loaded later.
6825          */
6826         kvm_put_guest_xcr0(vcpu);
6827         vcpu->guest_fpu_loaded = 1;
6828         __kernel_fpu_begin();
6829         fpu_restore_checking(&vcpu->arch.guest_fpu);
6830         trace_kvm_fpu(1);
6831 }
6832
6833 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6834 {
6835         kvm_put_guest_xcr0(vcpu);
6836
6837         if (!vcpu->guest_fpu_loaded)
6838                 return;
6839
6840         vcpu->guest_fpu_loaded = 0;
6841         fpu_save_init(&vcpu->arch.guest_fpu);
6842         __kernel_fpu_end();
6843         ++vcpu->stat.fpu_reload;
6844         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6845         trace_kvm_fpu(0);
6846 }
6847
6848 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6849 {
6850         kvmclock_reset(vcpu);
6851
6852         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6853         fx_free(vcpu);
6854         kvm_x86_ops->vcpu_free(vcpu);
6855 }
6856
6857 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6858                                                 unsigned int id)
6859 {
6860         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6861                 printk_once(KERN_WARNING
6862                 "kvm: SMP vm created on host with unstable TSC; "
6863                 "guest TSC will not be reliable\n");
6864         return kvm_x86_ops->vcpu_create(kvm, id);
6865 }
6866
6867 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6868 {
6869         int r;
6870
6871         vcpu->arch.mtrr_state.have_fixed = 1;
6872         r = vcpu_load(vcpu);
6873         if (r)
6874                 return r;
6875         kvm_vcpu_reset(vcpu);
6876         kvm_mmu_setup(vcpu);
6877         vcpu_put(vcpu);
6878
6879         return r;
6880 }
6881
6882 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6883 {
6884         int r;
6885         struct msr_data msr;
6886         struct kvm *kvm = vcpu->kvm;
6887
6888         r = vcpu_load(vcpu);
6889         if (r)
6890                 return r;
6891         msr.data = 0x0;
6892         msr.index = MSR_IA32_TSC;
6893         msr.host_initiated = true;
6894         kvm_write_tsc(vcpu, &msr);
6895         vcpu_put(vcpu);
6896
6897         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
6898                                         KVMCLOCK_SYNC_PERIOD);
6899
6900         return r;
6901 }
6902
6903 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6904 {
6905         int r;
6906         vcpu->arch.apf.msr_val = 0;
6907
6908         r = vcpu_load(vcpu);
6909         BUG_ON(r);
6910         kvm_mmu_unload(vcpu);
6911         vcpu_put(vcpu);
6912
6913         fx_free(vcpu);
6914         kvm_x86_ops->vcpu_free(vcpu);
6915 }
6916
6917 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6918 {
6919         atomic_set(&vcpu->arch.nmi_queued, 0);
6920         vcpu->arch.nmi_pending = 0;
6921         vcpu->arch.nmi_injected = false;
6922         kvm_clear_interrupt_queue(vcpu);
6923         kvm_clear_exception_queue(vcpu);
6924
6925         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6926         vcpu->arch.dr6 = DR6_INIT;
6927         kvm_update_dr6(vcpu);
6928         vcpu->arch.dr7 = DR7_FIXED_1;
6929         kvm_update_dr7(vcpu);
6930
6931         kvm_make_request(KVM_REQ_EVENT, vcpu);
6932         vcpu->arch.apf.msr_val = 0;
6933         vcpu->arch.st.msr_val = 0;
6934
6935         kvmclock_reset(vcpu);
6936
6937         kvm_clear_async_pf_completion_queue(vcpu);
6938         kvm_async_pf_hash_reset(vcpu);
6939         vcpu->arch.apf.halted = false;
6940
6941         kvm_pmu_reset(vcpu);
6942
6943         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6944         vcpu->arch.regs_avail = ~0;
6945         vcpu->arch.regs_dirty = ~0;
6946
6947         kvm_x86_ops->vcpu_reset(vcpu);
6948 }
6949
6950 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6951 {
6952         struct kvm_segment cs;
6953
6954         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6955         cs.selector = vector << 8;
6956         cs.base = vector << 12;
6957         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6958         kvm_rip_write(vcpu, 0);
6959 }
6960
6961 int kvm_arch_hardware_enable(void)
6962 {
6963         struct kvm *kvm;
6964         struct kvm_vcpu *vcpu;
6965         int i;
6966         int ret;
6967         u64 local_tsc;
6968         u64 max_tsc = 0;
6969         bool stable, backwards_tsc = false;
6970
6971         kvm_shared_msr_cpu_online();
6972         ret = kvm_x86_ops->hardware_enable();
6973         if (ret != 0)
6974                 return ret;
6975
6976         local_tsc = native_read_tsc();
6977         stable = !check_tsc_unstable();
6978         list_for_each_entry(kvm, &vm_list, vm_list) {
6979                 kvm_for_each_vcpu(i, vcpu, kvm) {
6980                         if (!stable && vcpu->cpu == smp_processor_id())
6981                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6982                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6983                                 backwards_tsc = true;
6984                                 if (vcpu->arch.last_host_tsc > max_tsc)
6985                                         max_tsc = vcpu->arch.last_host_tsc;
6986                         }
6987                 }
6988         }
6989
6990         /*
6991          * Sometimes, even reliable TSCs go backwards.  This happens on
6992          * platforms that reset TSC during suspend or hibernate actions, but
6993          * maintain synchronization.  We must compensate.  Fortunately, we can
6994          * detect that condition here, which happens early in CPU bringup,
6995          * before any KVM threads can be running.  Unfortunately, we can't
6996          * bring the TSCs fully up to date with real time, as we aren't yet far
6997          * enough into CPU bringup that we know how much real time has actually
6998          * elapsed; our helper function, get_kernel_ns() will be using boot
6999          * variables that haven't been updated yet.
7000          *
7001          * So we simply find the maximum observed TSC above, then record the
7002          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7003          * the adjustment will be applied.  Note that we accumulate
7004          * adjustments, in case multiple suspend cycles happen before some VCPU
7005          * gets a chance to run again.  In the event that no KVM threads get a
7006          * chance to run, we will miss the entire elapsed period, as we'll have
7007          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7008          * loose cycle time.  This isn't too big a deal, since the loss will be
7009          * uniform across all VCPUs (not to mention the scenario is extremely
7010          * unlikely). It is possible that a second hibernate recovery happens
7011          * much faster than a first, causing the observed TSC here to be
7012          * smaller; this would require additional padding adjustment, which is
7013          * why we set last_host_tsc to the local tsc observed here.
7014          *
7015          * N.B. - this code below runs only on platforms with reliable TSC,
7016          * as that is the only way backwards_tsc is set above.  Also note
7017          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7018          * have the same delta_cyc adjustment applied if backwards_tsc
7019          * is detected.  Note further, this adjustment is only done once,
7020          * as we reset last_host_tsc on all VCPUs to stop this from being
7021          * called multiple times (one for each physical CPU bringup).
7022          *
7023          * Platforms with unreliable TSCs don't have to deal with this, they
7024          * will be compensated by the logic in vcpu_load, which sets the TSC to
7025          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7026          * guarantee that they stay in perfect synchronization.
7027          */
7028         if (backwards_tsc) {
7029                 u64 delta_cyc = max_tsc - local_tsc;
7030                 backwards_tsc_observed = true;
7031                 list_for_each_entry(kvm, &vm_list, vm_list) {
7032                         kvm_for_each_vcpu(i, vcpu, kvm) {
7033                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7034                                 vcpu->arch.last_host_tsc = local_tsc;
7035                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
7036                                         &vcpu->requests);
7037                         }
7038
7039                         /*
7040                          * We have to disable TSC offset matching.. if you were
7041                          * booting a VM while issuing an S4 host suspend....
7042                          * you may have some problem.  Solving this issue is
7043                          * left as an exercise to the reader.
7044                          */
7045                         kvm->arch.last_tsc_nsec = 0;
7046                         kvm->arch.last_tsc_write = 0;
7047                 }
7048
7049         }
7050         return 0;
7051 }
7052
7053 void kvm_arch_hardware_disable(void)
7054 {
7055         kvm_x86_ops->hardware_disable();
7056         drop_user_return_notifiers();
7057 }
7058
7059 int kvm_arch_hardware_setup(void)
7060 {
7061         return kvm_x86_ops->hardware_setup();
7062 }
7063
7064 void kvm_arch_hardware_unsetup(void)
7065 {
7066         kvm_x86_ops->hardware_unsetup();
7067 }
7068
7069 void kvm_arch_check_processor_compat(void *rtn)
7070 {
7071         kvm_x86_ops->check_processor_compatibility(rtn);
7072 }
7073
7074 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7075 {
7076         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
7077 }
7078
7079 struct static_key kvm_no_apic_vcpu __read_mostly;
7080
7081 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7082 {
7083         struct page *page;
7084         struct kvm *kvm;
7085         int r;
7086
7087         BUG_ON(vcpu->kvm == NULL);
7088         kvm = vcpu->kvm;
7089
7090         vcpu->arch.pv.pv_unhalted = false;
7091         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7092         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
7093                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7094         else
7095                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7096
7097         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7098         if (!page) {
7099                 r = -ENOMEM;
7100                 goto fail;
7101         }
7102         vcpu->arch.pio_data = page_address(page);
7103
7104         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7105
7106         r = kvm_mmu_create(vcpu);
7107         if (r < 0)
7108                 goto fail_free_pio_data;
7109
7110         if (irqchip_in_kernel(kvm)) {
7111                 r = kvm_create_lapic(vcpu);
7112                 if (r < 0)
7113                         goto fail_mmu_destroy;
7114         } else
7115                 static_key_slow_inc(&kvm_no_apic_vcpu);
7116
7117         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7118                                        GFP_KERNEL);
7119         if (!vcpu->arch.mce_banks) {
7120                 r = -ENOMEM;
7121                 goto fail_free_lapic;
7122         }
7123         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7124
7125         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7126                 r = -ENOMEM;
7127                 goto fail_free_mce_banks;
7128         }
7129
7130         r = fx_init(vcpu);
7131         if (r)
7132                 goto fail_free_wbinvd_dirty_mask;
7133
7134         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7135         vcpu->arch.pv_time_enabled = false;
7136
7137         vcpu->arch.guest_supported_xcr0 = 0;
7138         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7139
7140         kvm_async_pf_hash_reset(vcpu);
7141         kvm_pmu_init(vcpu);
7142
7143         return 0;
7144 fail_free_wbinvd_dirty_mask:
7145         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7146 fail_free_mce_banks:
7147         kfree(vcpu->arch.mce_banks);
7148 fail_free_lapic:
7149         kvm_free_lapic(vcpu);
7150 fail_mmu_destroy:
7151         kvm_mmu_destroy(vcpu);
7152 fail_free_pio_data:
7153         free_page((unsigned long)vcpu->arch.pio_data);
7154 fail:
7155         return r;
7156 }
7157
7158 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7159 {
7160         int idx;
7161
7162         kvm_pmu_destroy(vcpu);
7163         kfree(vcpu->arch.mce_banks);
7164         kvm_free_lapic(vcpu);
7165         idx = srcu_read_lock(&vcpu->kvm->srcu);
7166         kvm_mmu_destroy(vcpu);
7167         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7168         free_page((unsigned long)vcpu->arch.pio_data);
7169         if (!irqchip_in_kernel(vcpu->kvm))
7170                 static_key_slow_dec(&kvm_no_apic_vcpu);
7171 }
7172
7173 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7174 {
7175         kvm_x86_ops->sched_in(vcpu, cpu);
7176 }
7177
7178 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7179 {
7180         if (type)
7181                 return -EINVAL;
7182
7183         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7184         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7185         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7186         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7187
7188         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7189         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7190         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7191         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7192                 &kvm->arch.irq_sources_bitmap);
7193
7194         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7195         mutex_init(&kvm->arch.apic_map_lock);
7196         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7197
7198         pvclock_update_vm_gtod_copy(kvm);
7199
7200         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7201         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7202
7203         return 0;
7204 }
7205
7206 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7207 {
7208         int r;
7209         r = vcpu_load(vcpu);
7210         BUG_ON(r);
7211         kvm_mmu_unload(vcpu);
7212         vcpu_put(vcpu);
7213 }
7214
7215 static void kvm_free_vcpus(struct kvm *kvm)
7216 {
7217         unsigned int i;
7218         struct kvm_vcpu *vcpu;
7219
7220         /*
7221          * Unpin any mmu pages first.
7222          */
7223         kvm_for_each_vcpu(i, vcpu, kvm) {
7224                 kvm_clear_async_pf_completion_queue(vcpu);
7225                 kvm_unload_vcpu_mmu(vcpu);
7226         }
7227         kvm_for_each_vcpu(i, vcpu, kvm)
7228                 kvm_arch_vcpu_free(vcpu);
7229
7230         mutex_lock(&kvm->lock);
7231         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7232                 kvm->vcpus[i] = NULL;
7233
7234         atomic_set(&kvm->online_vcpus, 0);
7235         mutex_unlock(&kvm->lock);
7236 }
7237
7238 void kvm_arch_sync_events(struct kvm *kvm)
7239 {
7240         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7241         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7242         kvm_free_all_assigned_devices(kvm);
7243         kvm_free_pit(kvm);
7244 }
7245
7246 void kvm_arch_destroy_vm(struct kvm *kvm)
7247 {
7248         if (current->mm == kvm->mm) {
7249                 /*
7250                  * Free memory regions allocated on behalf of userspace,
7251                  * unless the the memory map has changed due to process exit
7252                  * or fd copying.
7253                  */
7254                 struct kvm_userspace_memory_region mem;
7255                 memset(&mem, 0, sizeof(mem));
7256                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7257                 kvm_set_memory_region(kvm, &mem);
7258
7259                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7260                 kvm_set_memory_region(kvm, &mem);
7261
7262                 mem.slot = TSS_PRIVATE_MEMSLOT;
7263                 kvm_set_memory_region(kvm, &mem);
7264         }
7265         kvm_iommu_unmap_guest(kvm);
7266         kfree(kvm->arch.vpic);
7267         kfree(kvm->arch.vioapic);
7268         kvm_free_vcpus(kvm);
7269         if (kvm->arch.apic_access_page)
7270                 put_page(kvm->arch.apic_access_page);
7271         if (kvm->arch.ept_identity_pagetable)
7272                 put_page(kvm->arch.ept_identity_pagetable);
7273         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7274 }
7275
7276 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7277                            struct kvm_memory_slot *dont)
7278 {
7279         int i;
7280
7281         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7282                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7283                         kvm_kvfree(free->arch.rmap[i]);
7284                         free->arch.rmap[i] = NULL;
7285                 }
7286                 if (i == 0)
7287                         continue;
7288
7289                 if (!dont || free->arch.lpage_info[i - 1] !=
7290                              dont->arch.lpage_info[i - 1]) {
7291                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7292                         free->arch.lpage_info[i - 1] = NULL;
7293                 }
7294         }
7295 }
7296
7297 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7298                             unsigned long npages)
7299 {
7300         int i;
7301
7302         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7303                 unsigned long ugfn;
7304                 int lpages;
7305                 int level = i + 1;
7306
7307                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7308                                       slot->base_gfn, level) + 1;
7309
7310                 slot->arch.rmap[i] =
7311                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7312                 if (!slot->arch.rmap[i])
7313                         goto out_free;
7314                 if (i == 0)
7315                         continue;
7316
7317                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7318                                         sizeof(*slot->arch.lpage_info[i - 1]));
7319                 if (!slot->arch.lpage_info[i - 1])
7320                         goto out_free;
7321
7322                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7323                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7324                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7325                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7326                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7327                 /*
7328                  * If the gfn and userspace address are not aligned wrt each
7329                  * other, or if explicitly asked to, disable large page
7330                  * support for this slot
7331                  */
7332                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7333                     !kvm_largepages_enabled()) {
7334                         unsigned long j;
7335
7336                         for (j = 0; j < lpages; ++j)
7337                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7338                 }
7339         }
7340
7341         return 0;
7342
7343 out_free:
7344         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7345                 kvm_kvfree(slot->arch.rmap[i]);
7346                 slot->arch.rmap[i] = NULL;
7347                 if (i == 0)
7348                         continue;
7349
7350                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7351                 slot->arch.lpage_info[i - 1] = NULL;
7352         }
7353         return -ENOMEM;
7354 }
7355
7356 void kvm_arch_memslots_updated(struct kvm *kvm)
7357 {
7358         /*
7359          * memslots->generation has been incremented.
7360          * mmio generation may have reached its maximum value.
7361          */
7362         kvm_mmu_invalidate_mmio_sptes(kvm);
7363 }
7364
7365 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7366                                 struct kvm_memory_slot *memslot,
7367                                 struct kvm_userspace_memory_region *mem,
7368                                 enum kvm_mr_change change)
7369 {
7370         /*
7371          * Only private memory slots need to be mapped here since
7372          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7373          */
7374         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7375                 unsigned long userspace_addr;
7376
7377                 /*
7378                  * MAP_SHARED to prevent internal slot pages from being moved
7379                  * by fork()/COW.
7380                  */
7381                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7382                                          PROT_READ | PROT_WRITE,
7383                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7384
7385                 if (IS_ERR((void *)userspace_addr))
7386                         return PTR_ERR((void *)userspace_addr);
7387
7388                 memslot->userspace_addr = userspace_addr;
7389         }
7390
7391         return 0;
7392 }
7393
7394 void kvm_arch_commit_memory_region(struct kvm *kvm,
7395                                 struct kvm_userspace_memory_region *mem,
7396                                 const struct kvm_memory_slot *old,
7397                                 enum kvm_mr_change change)
7398 {
7399
7400         int nr_mmu_pages = 0;
7401
7402         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7403                 int ret;
7404
7405                 ret = vm_munmap(old->userspace_addr,
7406                                 old->npages * PAGE_SIZE);
7407                 if (ret < 0)
7408                         printk(KERN_WARNING
7409                                "kvm_vm_ioctl_set_memory_region: "
7410                                "failed to munmap memory\n");
7411         }
7412
7413         if (!kvm->arch.n_requested_mmu_pages)
7414                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7415
7416         if (nr_mmu_pages)
7417                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7418         /*
7419          * Write protect all pages for dirty logging.
7420          *
7421          * All the sptes including the large sptes which point to this
7422          * slot are set to readonly. We can not create any new large
7423          * spte on this slot until the end of the logging.
7424          *
7425          * See the comments in fast_page_fault().
7426          */
7427         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7428                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7429 }
7430
7431 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7432 {
7433         kvm_mmu_invalidate_zap_all_pages(kvm);
7434 }
7435
7436 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7437                                    struct kvm_memory_slot *slot)
7438 {
7439         kvm_mmu_invalidate_zap_all_pages(kvm);
7440 }
7441
7442 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7443 {
7444         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7445                 kvm_x86_ops->check_nested_events(vcpu, false);
7446
7447         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7448                 !vcpu->arch.apf.halted)
7449                 || !list_empty_careful(&vcpu->async_pf.done)
7450                 || kvm_apic_has_events(vcpu)
7451                 || vcpu->arch.pv.pv_unhalted
7452                 || atomic_read(&vcpu->arch.nmi_queued) ||
7453                 (kvm_arch_interrupt_allowed(vcpu) &&
7454                  kvm_cpu_has_interrupt(vcpu));
7455 }
7456
7457 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7458 {
7459         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7460 }
7461
7462 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7463 {
7464         return kvm_x86_ops->interrupt_allowed(vcpu);
7465 }
7466
7467 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7468 {
7469         unsigned long current_rip = kvm_rip_read(vcpu) +
7470                 get_segment_base(vcpu, VCPU_SREG_CS);
7471
7472         return current_rip == linear_rip;
7473 }
7474 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7475
7476 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7477 {
7478         unsigned long rflags;
7479
7480         rflags = kvm_x86_ops->get_rflags(vcpu);
7481         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7482                 rflags &= ~X86_EFLAGS_TF;
7483         return rflags;
7484 }
7485 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7486
7487 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7488 {
7489         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7490             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7491                 rflags |= X86_EFLAGS_TF;
7492         kvm_x86_ops->set_rflags(vcpu, rflags);
7493 }
7494
7495 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7496 {
7497         __kvm_set_rflags(vcpu, rflags);
7498         kvm_make_request(KVM_REQ_EVENT, vcpu);
7499 }
7500 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7501
7502 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7503 {
7504         int r;
7505
7506         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7507               work->wakeup_all)
7508                 return;
7509
7510         r = kvm_mmu_reload(vcpu);
7511         if (unlikely(r))
7512                 return;
7513
7514         if (!vcpu->arch.mmu.direct_map &&
7515               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7516                 return;
7517
7518         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7519 }
7520
7521 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7522 {
7523         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7524 }
7525
7526 static inline u32 kvm_async_pf_next_probe(u32 key)
7527 {
7528         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7529 }
7530
7531 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7532 {
7533         u32 key = kvm_async_pf_hash_fn(gfn);
7534
7535         while (vcpu->arch.apf.gfns[key] != ~0)
7536                 key = kvm_async_pf_next_probe(key);
7537
7538         vcpu->arch.apf.gfns[key] = gfn;
7539 }
7540
7541 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7542 {
7543         int i;
7544         u32 key = kvm_async_pf_hash_fn(gfn);
7545
7546         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7547                      (vcpu->arch.apf.gfns[key] != gfn &&
7548                       vcpu->arch.apf.gfns[key] != ~0); i++)
7549                 key = kvm_async_pf_next_probe(key);
7550
7551         return key;
7552 }
7553
7554 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7555 {
7556         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7557 }
7558
7559 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7560 {
7561         u32 i, j, k;
7562
7563         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7564         while (true) {
7565                 vcpu->arch.apf.gfns[i] = ~0;
7566                 do {
7567                         j = kvm_async_pf_next_probe(j);
7568                         if (vcpu->arch.apf.gfns[j] == ~0)
7569                                 return;
7570                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7571                         /*
7572                          * k lies cyclically in ]i,j]
7573                          * |    i.k.j |
7574                          * |....j i.k.| or  |.k..j i...|
7575                          */
7576                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7577                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7578                 i = j;
7579         }
7580 }
7581
7582 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7583 {
7584
7585         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7586                                       sizeof(val));
7587 }
7588
7589 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7590                                      struct kvm_async_pf *work)
7591 {
7592         struct x86_exception fault;
7593
7594         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7595         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7596
7597         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7598             (vcpu->arch.apf.send_user_only &&
7599              kvm_x86_ops->get_cpl(vcpu) == 0))
7600                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7601         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7602                 fault.vector = PF_VECTOR;
7603                 fault.error_code_valid = true;
7604                 fault.error_code = 0;
7605                 fault.nested_page_fault = false;
7606                 fault.address = work->arch.token;
7607                 kvm_inject_page_fault(vcpu, &fault);
7608         }
7609 }
7610
7611 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7612                                  struct kvm_async_pf *work)
7613 {
7614         struct x86_exception fault;
7615
7616         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7617         if (work->wakeup_all)
7618                 work->arch.token = ~0; /* broadcast wakeup */
7619         else
7620                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7621
7622         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7623             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7624                 fault.vector = PF_VECTOR;
7625                 fault.error_code_valid = true;
7626                 fault.error_code = 0;
7627                 fault.nested_page_fault = false;
7628                 fault.address = work->arch.token;
7629                 kvm_inject_page_fault(vcpu, &fault);
7630         }
7631         vcpu->arch.apf.halted = false;
7632         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7633 }
7634
7635 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7636 {
7637         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7638                 return true;
7639         else
7640                 return !kvm_event_needs_reinjection(vcpu) &&
7641                         kvm_x86_ops->interrupt_allowed(vcpu);
7642 }
7643
7644 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7645 {
7646         atomic_inc(&kvm->arch.noncoherent_dma_count);
7647 }
7648 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7649
7650 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7651 {
7652         atomic_dec(&kvm->arch.noncoherent_dma_count);
7653 }
7654 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7655
7656 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7657 {
7658         return atomic_read(&kvm->arch.noncoherent_dma_count);
7659 }
7660 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7661
7662 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7663 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7664 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7665 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7666 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7667 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7668 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7669 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7670 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7671 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7672 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7673 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7674 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
7675 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);