arch/x86/platform/uv/tlb_uv.c

   1 /*
   2  *      SGI UltraViolet TLB flush routines.
   3  *
   4  *      (c) 2008-2014 Cliff Wickman <cpw@sgi.com>, SGI.
   5  *
   6  *      This code is released under the GNU General Public License version 2 or
   7  *      later.
   8  */
   9 #include <linux/seq_file.h>
  10 #include <linux/proc_fs.h>
  11 #include <linux/debugfs.h>
  12 #include <linux/kernel.h>
  13 #include <linux/slab.h>
  14 #include <linux/delay.h>
  15
  16 #include <asm/mmu_context.h>
  17 #include <asm/uv/uv.h>
  18 #include <asm/uv/uv_mmrs.h>
  19 #include <asm/uv/uv_hub.h>
  20 #include <asm/uv/uv_bau.h>
  21 #include <asm/apic.h>
  22 #include <asm/idle.h>
  23 #include <asm/tsc.h>
  24 #include <asm/irq_vectors.h>
  25 #include <asm/timer.h>
  26
  27 static struct bau_operations ops;
  28
  29 static struct bau_operations uv123_bau_ops = {
  30         .bau_gpa_to_offset       = uv_gpa_to_offset,
  31         .read_l_sw_ack           = read_mmr_sw_ack,
  32         .read_g_sw_ack           = read_gmmr_sw_ack,
  33         .write_l_sw_ack          = write_mmr_sw_ack,
  34         .write_g_sw_ack          = write_gmmr_sw_ack,
  35         .write_payload_first     = write_mmr_payload_first,
  36         .write_payload_last      = write_mmr_payload_last,
  37 };
  38
  39 /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  40 static int timeout_base_ns[] = {
  41                 20,
  42                 160,
  43                 1280,
  44                 10240,
  45                 81920,
  46                 655360,
  47                 5242880,
  48                 167772160
  49 };
  50
  51 static int timeout_us;
  52 static bool nobau = true;
  53 static int nobau_perm;
  54 static cycles_t congested_cycles;
  55
  56 /* tunables: */
  57 static int max_concurr          = MAX_BAU_CONCURRENT;
  58 static int max_concurr_const    = MAX_BAU_CONCURRENT;
  59 static int plugged_delay        = PLUGGED_DELAY;
  60 static int plugsb4reset         = PLUGSB4RESET;
  61 static int giveup_limit         = GIVEUP_LIMIT;
  62 static int timeoutsb4reset      = TIMEOUTSB4RESET;
  63 static int ipi_reset_limit      = IPI_RESET_LIMIT;
  64 static int complete_threshold   = COMPLETE_THRESHOLD;
  65 static int congested_respns_us  = CONGESTED_RESPONSE_US;
  66 static int congested_reps       = CONGESTED_REPS;
  67 static int disabled_period      = DISABLED_PERIOD;
  68
  69 static struct tunables tunables[] = {
  70         {&max_concurr,           MAX_BAU_CONCURRENT}, /* must be [0] */
  71         {&plugged_delay,         PLUGGED_DELAY},
  72         {&plugsb4reset,          PLUGSB4RESET},
  73         {&timeoutsb4reset,       TIMEOUTSB4RESET},
  74         {&ipi_reset_limit,       IPI_RESET_LIMIT},
  75         {&complete_threshold,    COMPLETE_THRESHOLD},
  76         {&congested_respns_us,   CONGESTED_RESPONSE_US},
  77         {&congested_reps,        CONGESTED_REPS},
  78         {&disabled_period,       DISABLED_PERIOD},
  79         {&giveup_limit,          GIVEUP_LIMIT}
  80 };
  81
  82 static struct dentry *tunables_dir;
  83 static struct dentry *tunables_file;
  84
  85 /* these correspond to the statistics printed by ptc_seq_show() */
  86 static char *stat_description[] = {
  87         "sent:     number of shootdown messages sent",
  88         "stime:    time spent sending messages",
  89         "numuvhubs: number of hubs targeted with shootdown",
  90         "numuvhubs16: number times 16 or more hubs targeted",
  91         "numuvhubs8: number times 8 or more hubs targeted",
  92         "numuvhubs4: number times 4 or more hubs targeted",
  93         "numuvhubs2: number times 2 or more hubs targeted",
  94         "numuvhubs1: number times 1 hub targeted",
  95         "numcpus:  number of cpus targeted with shootdown",
  96         "dto:      number of destination timeouts",
  97         "retries:  destination timeout retries sent",
  98         "rok:   :  destination timeouts successfully retried",
  99         "resetp:   ipi-style resource resets for plugs",
 100         "resett:   ipi-style resource resets for timeouts",
 101         "giveup:   fall-backs to ipi-style shootdowns",
 102         "sto:      number of source timeouts",
 103         "bz:       number of stay-busy's",
 104         "throt:    number times spun in throttle",
 105         "swack:   image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
 106         "recv:     shootdown messages received",
 107         "rtime:    time spent processing messages",
 108         "all:      shootdown all-tlb messages",
 109         "one:      shootdown one-tlb messages",
 110         "mult:     interrupts that found multiple messages",
 111         "none:     interrupts that found no messages",
 112         "retry:    number of retry messages processed",
 113         "canc:     number messages canceled by retries",
 114         "nocan:    number retries that found nothing to cancel",
 115         "reset:    number of ipi-style reset requests processed",
 116         "rcan:     number messages canceled by reset requests",
 117         "disable:  number times use of the BAU was disabled",
 118         "enable:   number times use of the BAU was re-enabled"
 119 };
 120
 121 static int __init setup_bau(char *arg)
 122 {
 123         int result;
 124
 125         if (!arg)
 126                 return -EINVAL;
 127
 128         result = strtobool(arg, &nobau);
 129         if (result)
 130                 return result;
 131
 132         /* we need to flip the logic here, so that bau=y sets nobau to false */
 133         nobau = !nobau;
 134
 135         if (!nobau)
 136                 pr_info("UV BAU Enabled\n");
 137         else
 138                 pr_info("UV BAU Disabled\n");
 139
 140         return 0;
 141 }
 142 early_param("bau", setup_bau);
 143
 144 /* base pnode in this partition */
 145 static int uv_base_pnode __read_mostly;
 146
 147 static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
 148 static DEFINE_PER_CPU(struct bau_control, bau_control);
 149 static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
 150
 151 static void
 152 set_bau_on(void)
 153 {
 154         int cpu;
 155         struct bau_control *bcp;
 156
 157         if (nobau_perm) {
 158                 pr_info("BAU not initialized; cannot be turned on\n");
 159                 return;
 160         }
 161         nobau = false;
 162         for_each_present_cpu(cpu) {
 163                 bcp = &per_cpu(bau_control, cpu);
 164                 bcp->nobau = false;
 165         }
 166         pr_info("BAU turned on\n");
 167         return;
 168 }
 169
 170 static void
 171 set_bau_off(void)
 172 {
 173         int cpu;
 174         struct bau_control *bcp;
 175
 176         nobau = true;
 177         for_each_present_cpu(cpu) {
 178                 bcp = &per_cpu(bau_control, cpu);
 179                 bcp->nobau = true;
 180         }
 181         pr_info("BAU turned off\n");
 182         return;
 183 }
 184
 185 /*
 186  * Determine the first node on a uvhub. 'Nodes' are used for kernel
 187  * memory allocation.
 188  */
 189 static int __init uvhub_to_first_node(int uvhub)
 190 {
 191         int node, b;
 192
 193         for_each_online_node(node) {
 194                 b = uv_node_to_blade_id(node);
 195                 if (uvhub == b)
 196                         return node;
 197         }
 198         return -1;
 199 }
 200
 201 /*
 202  * Determine the apicid of the first cpu on a uvhub.
 203  */
 204 static int __init uvhub_to_first_apicid(int uvhub)
 205 {
 206         int cpu;
 207
 208         for_each_present_cpu(cpu)
 209                 if (uvhub == uv_cpu_to_blade_id(cpu))
 210                         return per_cpu(x86_cpu_to_apicid, cpu);
 211         return -1;
 212 }
 213
 214 /*
 215  * Free a software acknowledge hardware resource by clearing its Pending
 216  * bit. This will return a reply to the sender.
 217  * If the message has timed out, a reply has already been sent by the
 218  * hardware but the resource has not been released. In that case our
 219  * clear of the Timeout bit (as well) will free the resource. No reply will
 220  * be sent (the hardware will only do one reply per message).
 221  */
 222 static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
 223                                                 int do_acknowledge)
 224 {
 225         unsigned long dw;
 226         struct bau_pq_entry *msg;
 227
 228         msg = mdp->msg;
 229         if (!msg->canceled && do_acknowledge) {
 230                 dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
 231                 ops.write_l_sw_ack(dw);
 232         }
 233         msg->replied_to = 1;
 234         msg->swack_vec = 0;
 235 }
 236
 237 /*
 238  * Process the receipt of a RETRY message
 239  */
 240 static void bau_process_retry_msg(struct msg_desc *mdp,
 241                                         struct bau_control *bcp)
 242 {
 243         int i;
 244         int cancel_count = 0;
 245         unsigned long msg_res;
 246         unsigned long mmr = 0;
 247         struct bau_pq_entry *msg = mdp->msg;
 248         struct bau_pq_entry *msg2;
 249         struct ptc_stats *stat = bcp->statp;
 250
 251         stat->d_retries++;
 252         /*
 253          * cancel any message from msg+1 to the retry itself
 254          */
 255         for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
 256                 if (msg2 > mdp->queue_last)
 257                         msg2 = mdp->queue_first;
 258                 if (msg2 == msg)
 259                         break;
 260
 261                 /* same conditions for cancellation as do_reset */
 262                 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
 263                     (msg2->swack_vec) && ((msg2->swack_vec &
 264                         msg->swack_vec) == 0) &&
 265                     (msg2->sending_cpu == msg->sending_cpu) &&
 266                     (msg2->msg_type != MSG_NOOP)) {
 267                         mmr = ops.read_l_sw_ack();
 268                         msg_res = msg2->swack_vec;
 269                         /*
 270                          * This is a message retry; clear the resources held
 271                          * by the previous message only if they timed out.
 272                          * If it has not timed out we have an unexpected
 273                          * situation to report.
 274                          */
 275                         if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
 276                                 unsigned long mr;
 277                                 /*
 278                                  * Is the resource timed out?
 279                                  * Make everyone ignore the cancelled message.
 280                                  */
 281                                 msg2->canceled = 1;
 282                                 stat->d_canceled++;
 283                                 cancel_count++;
 284                                 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
 285                                 ops.write_l_sw_ack(mr);
 286                         }
 287                 }
 288         }
 289         if (!cancel_count)
 290                 stat->d_nocanceled++;
 291 }
 292
 293 /*
 294  * Do all the things a cpu should do for a TLB shootdown message.
 295  * Other cpu's may come here at the same time for this message.
 296  */
 297 static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
 298                                                 int do_acknowledge)
 299 {
 300         short socket_ack_count = 0;
 301         short *sp;
 302         struct atomic_short *asp;
 303         struct ptc_stats *stat = bcp->statp;
 304         struct bau_pq_entry *msg = mdp->msg;
 305         struct bau_control *smaster = bcp->socket_master;
 306
 307         /*
 308          * This must be a normal message, or retry of a normal message
 309          */
 310         if (msg->address == TLB_FLUSH_ALL) {
 311                 local_flush_tlb();
 312                 stat->d_alltlb++;
 313         } else {
 314                 __flush_tlb_one(msg->address);
 315                 stat->d_onetlb++;
 316         }
 317         stat->d_requestee++;
 318
 319         /*
 320          * One cpu on each uvhub has the additional job on a RETRY
 321          * of releasing the resource held by the message that is
 322          * being retried.  That message is identified by sending
 323          * cpu number.
 324          */
 325         if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
 326                 bau_process_retry_msg(mdp, bcp);
 327
 328         /*
 329          * This is a swack message, so we have to reply to it.
 330          * Count each responding cpu on the socket. This avoids
 331          * pinging the count's cache line back and forth between
 332          * the sockets.
 333          */
 334         sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
 335         asp = (struct atomic_short *)sp;
 336         socket_ack_count = atom_asr(1, asp);
 337         if (socket_ack_count == bcp->cpus_in_socket) {
 338                 int msg_ack_count;
 339                 /*
 340                  * Both sockets dump their completed count total into
 341                  * the message's count.
 342                  */
 343                 *sp = 0;
 344                 asp = (struct atomic_short *)&msg->acknowledge_count;
 345                 msg_ack_count = atom_asr(socket_ack_count, asp);
 346
 347                 if (msg_ack_count == bcp->cpus_in_uvhub) {
 348                         /*
 349                          * All cpus in uvhub saw it; reply
 350                          * (unless we are in the UV2 workaround)
 351                          */
 352                         reply_to_message(mdp, bcp, do_acknowledge);
 353                 }
 354         }
 355
 356         return;
 357 }
 358
 359 /*
 360  * Determine the first cpu on a pnode.
 361  */
 362 static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
 363 {
 364         int cpu;
 365         struct hub_and_pnode *hpp;
 366
 367         for_each_present_cpu(cpu) {
 368                 hpp = &smaster->thp[cpu];
 369                 if (pnode == hpp->pnode)
 370                         return cpu;
 371         }
 372         return -1;
 373 }
 374
 375 /*
 376  * Last resort when we get a large number of destination timeouts is
 377  * to clear resources held by a given cpu.
 378  * Do this with IPI so that all messages in the BAU message queue
 379  * can be identified by their nonzero swack_vec field.
 380  *
 381  * This is entered for a single cpu on the uvhub.
 382  * The sender want's this uvhub to free a specific message's
 383  * swack resources.
 384  */
 385 static void do_reset(void *ptr)
 386 {
 387         int i;
 388         struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
 389         struct reset_args *rap = (struct reset_args *)ptr;
 390         struct bau_pq_entry *msg;
 391         struct ptc_stats *stat = bcp->statp;
 392
 393         stat->d_resets++;
 394         /*
 395          * We're looking for the given sender, and
 396          * will free its swack resource.
 397          * If all cpu's finally responded after the timeout, its
 398          * message 'replied_to' was set.
 399          */
 400         for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
 401                 unsigned long msg_res;
 402                 /* do_reset: same conditions for cancellation as
 403                    bau_process_retry_msg() */
 404                 if ((msg->replied_to == 0) &&
 405                     (msg->canceled == 0) &&
 406                     (msg->sending_cpu == rap->sender) &&
 407                     (msg->swack_vec) &&
 408                     (msg->msg_type != MSG_NOOP)) {
 409                         unsigned long mmr;
 410                         unsigned long mr;
 411                         /*
 412                          * make everyone else ignore this message
 413                          */
 414                         msg->canceled = 1;
 415                         /*
 416                          * only reset the resource if it is still pending
 417                          */
 418                         mmr = ops.read_l_sw_ack();
 419                         msg_res = msg->swack_vec;
 420                         mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
 421                         if (mmr & msg_res) {
 422                                 stat->d_rcanceled++;
 423                                 ops.write_l_sw_ack(mr);
 424                         }
 425                 }
 426         }
 427         return;
 428 }
 429
 430 /*
 431  * Use IPI to get all target uvhubs to release resources held by
 432  * a given sending cpu number.
 433  */
 434 static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
 435 {
 436         int pnode;
 437         int apnode;
 438         int maskbits;
 439         int sender = bcp->cpu;
 440         cpumask_t *mask = bcp->uvhub_master->cpumask;
 441         struct bau_control *smaster = bcp->socket_master;
 442         struct reset_args reset_args;
 443
 444         reset_args.sender = sender;
 445         cpumask_clear(mask);
 446         /* find a single cpu for each uvhub in this distribution mask */
 447         maskbits = sizeof(struct pnmask) * BITSPERBYTE;
 448         /* each bit is a pnode relative to the partition base pnode */
 449         for (pnode = 0; pnode < maskbits; pnode++) {
 450                 int cpu;
 451                 if (!bau_uvhub_isset(pnode, distribution))
 452                         continue;
 453                 apnode = pnode + bcp->partition_base_pnode;
 454                 cpu = pnode_to_first_cpu(apnode, smaster);
 455                 cpumask_set_cpu(cpu, mask);
 456         }
 457
 458         /* IPI all cpus; preemption is already disabled */
 459         smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
 460         return;
 461 }
 462
 463 /*
 464  * Not to be confused with cycles_2_ns() from tsc.c; this gives a relative
 465  * number, not an absolute. It converts a duration in cycles to a duration in
 466  * ns.
 467  */
 468 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
 469 {
 470         struct cyc2ns_data *data = cyc2ns_read_begin();
 471         unsigned long long ns;
 472
 473         ns = mul_u64_u32_shr(cyc, data->cyc2ns_mul, data->cyc2ns_shift);
 474
 475         cyc2ns_read_end(data);
 476         return ns;
 477 }
 478
 479 /*
 480  * The reverse of the above; converts a duration in ns to a duration in cycles.
 481  */
 482 static inline unsigned long long ns_2_cycles(unsigned long long ns)
 483 {
 484         struct cyc2ns_data *data = cyc2ns_read_begin();
 485         unsigned long long cyc;
 486
 487         cyc = (ns << data->cyc2ns_shift) / data->cyc2ns_mul;
 488
 489         cyc2ns_read_end(data);
 490         return cyc;
 491 }
 492
 493 static inline unsigned long cycles_2_us(unsigned long long cyc)
 494 {
 495         return cycles_2_ns(cyc) / NSEC_PER_USEC;
 496 }
 497
 498 static inline cycles_t sec_2_cycles(unsigned long sec)
 499 {
 500         return ns_2_cycles(sec * NSEC_PER_SEC);
 501 }
 502
 503 static inline unsigned long long usec_2_cycles(unsigned long usec)
 504 {
 505         return ns_2_cycles(usec * NSEC_PER_USEC);
 506 }
 507
 508 /*
 509  * wait for all cpus on this hub to finish their sends and go quiet
 510  * leaves uvhub_quiesce set so that no new broadcasts are started by
 511  * bau_flush_send_and_wait()
 512  */
 513 static inline void quiesce_local_uvhub(struct bau_control *hmaster)
 514 {
 515         atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
 516 }
 517
 518 /*
 519  * mark this quiet-requestor as done
 520  */
 521 static inline void end_uvhub_quiesce(struct bau_control *hmaster)
 522 {
 523         atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
 524 }
 525
 526 static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
 527 {
 528         unsigned long descriptor_status;
 529
 530         descriptor_status = uv_read_local_mmr(mmr_offset);
 531         descriptor_status >>= right_shift;
 532         descriptor_status &= UV_ACT_STATUS_MASK;
 533         return descriptor_status;
 534 }
 535
 536 /*
 537  * Wait for completion of a broadcast software ack message
 538  * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
 539  */
 540 static int uv1_wait_completion(struct bau_desc *bau_desc,
 541                                 unsigned long mmr_offset, int right_shift,
 542                                 struct bau_control *bcp, long try)
 543 {
 544         unsigned long descriptor_status;
 545         cycles_t ttm;
 546         struct ptc_stats *stat = bcp->statp;
 547
 548         descriptor_status = uv1_read_status(mmr_offset, right_shift);
 549         /* spin on the status MMR, waiting for it to go idle */
 550         while ((descriptor_status != DS_IDLE)) {
 551                 /*
 552                  * Our software ack messages may be blocked because
 553                  * there are no swack resources available.  As long
 554                  * as none of them has timed out hardware will NACK
 555                  * our message and its state will stay IDLE.
 556                  */
 557                 if (descriptor_status == DS_SOURCE_TIMEOUT) {
 558                         stat->s_stimeout++;
 559                         return FLUSH_GIVEUP;
 560                 } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
 561                         stat->s_dtimeout++;
 562                         ttm = get_cycles();
 563
 564                         /*
 565                          * Our retries may be blocked by all destination
 566                          * swack resources being consumed, and a timeout
 567                          * pending.  In that case hardware returns the
 568                          * ERROR that looks like a destination timeout.
 569                          */
 570                         if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
 571                                 bcp->conseccompletes = 0;
 572                                 return FLUSH_RETRY_PLUGGED;
 573                         }
 574
 575                         bcp->conseccompletes = 0;
 576                         return FLUSH_RETRY_TIMEOUT;
 577                 } else {
 578                         /*
 579                          * descriptor_status is still BUSY
 580                          */
 581                         cpu_relax();
 582                 }
 583                 descriptor_status = uv1_read_status(mmr_offset, right_shift);
 584         }
 585         bcp->conseccompletes++;
 586         return FLUSH_COMPLETE;
 587 }
 588
 589 /*
 590  * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
 591  * But not currently used.
 592  */
 593 static unsigned long uv2_3_read_status(unsigned long offset, int rshft, int desc)
 594 {
 595         unsigned long descriptor_status;
 596
 597         descriptor_status =
 598                 ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
 599         return descriptor_status;
 600 }
 601
 602 /*
 603  * Return whether the status of the descriptor that is normally used for this
 604  * cpu (the one indexed by its hub-relative cpu number) is busy.
 605  * The status of the original 32 descriptors is always reflected in the 64
 606  * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
 607  * The bit provided by the activation_status_2 register is irrelevant to
 608  * the status if it is only being tested for busy or not busy.
 609  */
 610 int normal_busy(struct bau_control *bcp)
 611 {
 612         int cpu = bcp->uvhub_cpu;
 613         int mmr_offset;
 614         int right_shift;
 615
 616         mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
 617         right_shift = cpu * UV_ACT_STATUS_SIZE;
 618         return (((((read_lmmr(mmr_offset) >> right_shift) &
 619                                 UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
 620 }
 621
 622 /*
 623  * Entered when a bau descriptor has gone into a permanent busy wait because
 624  * of a hardware bug.
 625  * Workaround the bug.
 626  */
 627 int handle_uv2_busy(struct bau_control *bcp)
 628 {
 629         struct ptc_stats *stat = bcp->statp;
 630
 631         stat->s_uv2_wars++;
 632         bcp->busy = 1;
 633         return FLUSH_GIVEUP;
 634 }
 635
 636 static int uv2_3_wait_completion(struct bau_desc *bau_desc,
 637                                 unsigned long mmr_offset, int right_shift,
 638                                 struct bau_control *bcp, long try)
 639 {
 640         unsigned long descriptor_stat;
 641         cycles_t ttm;
 642         int desc = bcp->uvhub_cpu;
 643         long busy_reps = 0;
 644         struct ptc_stats *stat = bcp->statp;
 645
 646         descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
 647
 648         /* spin on the status MMR, waiting for it to go idle */
 649         while (descriptor_stat != UV2H_DESC_IDLE) {
 650                 if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
 651                         /*
 652                          * A h/w bug on the destination side may
 653                          * have prevented the message being marked
 654                          * pending, thus it doesn't get replied to
 655                          * and gets continually nacked until it times
 656                          * out with a SOURCE_TIMEOUT.
 657                          */
 658                         stat->s_stimeout++;
 659                         return FLUSH_GIVEUP;
 660                 } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
 661                         ttm = get_cycles();
 662
 663                         /*
 664                          * Our retries may be blocked by all destination
 665                          * swack resources being consumed, and a timeout
 666                          * pending.  In that case hardware returns the
 667                          * ERROR that looks like a destination timeout.
 668                          * Without using the extended status we have to
 669                          * deduce from the short time that this was a
 670                          * strong nack.
 671                          */
 672                         if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
 673                                 bcp->conseccompletes = 0;
 674                                 stat->s_plugged++;
 675                                 /* FLUSH_RETRY_PLUGGED causes hang on boot */
 676                                 return FLUSH_GIVEUP;
 677                         }
 678                         stat->s_dtimeout++;
 679                         bcp->conseccompletes = 0;
 680                         /* FLUSH_RETRY_TIMEOUT causes hang on boot */
 681                         return FLUSH_GIVEUP;
 682                 } else {
 683                         busy_reps++;
 684                         if (busy_reps > 1000000) {
 685                                 /* not to hammer on the clock */
 686                                 busy_reps = 0;
 687                                 ttm = get_cycles();
 688                                 if ((ttm - bcp->send_message) > bcp->timeout_interval)
 689                                         return handle_uv2_busy(bcp);
 690                         }
 691                         /*
 692                          * descriptor_stat is still BUSY
 693                          */
 694                         cpu_relax();
 695                 }
 696                 descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
 697         }
 698         bcp->conseccompletes++;
 699         return FLUSH_COMPLETE;
 700 }
 701
 702 /*
 703  * There are 2 status registers; each and array[32] of 2 bits. Set up for
 704  * which register to read and position in that register based on cpu in
 705  * current hub.
 706  */
 707 static int wait_completion(struct bau_desc *bau_desc, struct bau_control *bcp, long try)
 708 {
 709         int right_shift;
 710         unsigned long mmr_offset;
 711         int desc = bcp->uvhub_cpu;
 712
 713         if (desc < UV_CPUS_PER_AS) {
 714                 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
 715                 right_shift = desc * UV_ACT_STATUS_SIZE;
 716         } else {
 717                 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
 718                 right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
 719         }
 720
 721         if (bcp->uvhub_version == 1)
 722                 return uv1_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
 723         else
 724                 return uv2_3_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
 725 }
 726
 727 /*
 728  * Our retries are blocked by all destination sw ack resources being
 729  * in use, and a timeout is pending. In that case hardware immediately
 730  * returns the ERROR that looks like a destination timeout.
 731  */
 732 static void destination_plugged(struct bau_desc *bau_desc,
 733                         struct bau_control *bcp,
 734                         struct bau_control *hmaster, struct ptc_stats *stat)
 735 {
 736         udelay(bcp->plugged_delay);
 737         bcp->plugged_tries++;
 738
 739         if (bcp->plugged_tries >= bcp->plugsb4reset) {
 740                 bcp->plugged_tries = 0;
 741
 742                 quiesce_local_uvhub(hmaster);
 743
 744                 spin_lock(&hmaster->queue_lock);
 745                 reset_with_ipi(&bau_desc->distribution, bcp);
 746                 spin_unlock(&hmaster->queue_lock);
 747
 748                 end_uvhub_quiesce(hmaster);
 749
 750                 bcp->ipi_attempts++;
 751                 stat->s_resets_plug++;
 752         }
 753 }
 754
 755 static void destination_timeout(struct bau_desc *bau_desc,
 756                         struct bau_control *bcp, struct bau_control *hmaster,
 757                         struct ptc_stats *stat)
 758 {
 759         hmaster->max_concurr = 1;
 760         bcp->timeout_tries++;
 761         if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
 762                 bcp->timeout_tries = 0;
 763
 764                 quiesce_local_uvhub(hmaster);
 765
 766                 spin_lock(&hmaster->queue_lock);
 767                 reset_with_ipi(&bau_desc->distribution, bcp);
 768                 spin_unlock(&hmaster->queue_lock);
 769
 770                 end_uvhub_quiesce(hmaster);
 771
 772                 bcp->ipi_attempts++;
 773                 stat->s_resets_timeout++;
 774         }
 775 }
 776
 777 /*
 778  * Stop all cpus on a uvhub from using the BAU for a period of time.
 779  * This is reversed by check_enable.
 780  */
 781 static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
 782 {
 783         int tcpu;
 784         struct bau_control *tbcp;
 785         struct bau_control *hmaster;
 786         cycles_t tm1;
 787
 788         hmaster = bcp->uvhub_master;
 789         spin_lock(&hmaster->disable_lock);
 790         if (!bcp->baudisabled) {
 791                 stat->s_bau_disabled++;
 792                 tm1 = get_cycles();
 793                 for_each_present_cpu(tcpu) {
 794                         tbcp = &per_cpu(bau_control, tcpu);
 795                         if (tbcp->uvhub_master == hmaster) {
 796                                 tbcp->baudisabled = 1;
 797                                 tbcp->set_bau_on_time =
 798                                         tm1 + bcp->disabled_period;
 799                         }
 800                 }
 801         }
 802         spin_unlock(&hmaster->disable_lock);
 803 }
 804
 805 static void count_max_concurr(int stat, struct bau_control *bcp,
 806                                 struct bau_control *hmaster)
 807 {
 808         bcp->plugged_tries = 0;
 809         bcp->timeout_tries = 0;
 810         if (stat != FLUSH_COMPLETE)
 811                 return;
 812         if (bcp->conseccompletes <= bcp->complete_threshold)
 813                 return;
 814         if (hmaster->max_concurr >= hmaster->max_concurr_const)
 815                 return;
 816         hmaster->max_concurr++;
 817 }
 818
 819 static void record_send_stats(cycles_t time1, cycles_t time2,
 820                 struct bau_control *bcp, struct ptc_stats *stat,
 821                 int completion_status, int try)
 822 {
 823         cycles_t elapsed;
 824
 825         if (time2 > time1) {
 826                 elapsed = time2 - time1;
 827                 stat->s_time += elapsed;
 828
 829                 if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
 830                         bcp->period_requests++;
 831                         bcp->period_time += elapsed;
 832                         if ((elapsed > congested_cycles) &&
 833                             (bcp->period_requests > bcp->cong_reps) &&
 834                             ((bcp->period_time / bcp->period_requests) >
 835                                                         congested_cycles)) {
 836                                 stat->s_congested++;
 837                                 disable_for_period(bcp, stat);
 838                         }
 839                 }
 840         } else
 841                 stat->s_requestor--;
 842
 843         if (completion_status == FLUSH_COMPLETE && try > 1)
 844                 stat->s_retriesok++;
 845         else if (completion_status == FLUSH_GIVEUP) {
 846                 stat->s_giveup++;
 847                 if (get_cycles() > bcp->period_end)
 848                         bcp->period_giveups = 0;
 849                 bcp->period_giveups++;
 850                 if (bcp->period_giveups == 1)
 851                         bcp->period_end = get_cycles() + bcp->disabled_period;
 852                 if (bcp->period_giveups > bcp->giveup_limit) {
 853                         disable_for_period(bcp, stat);
 854                         stat->s_giveuplimit++;
 855                 }
 856         }
 857 }
 858
 859 /*
 860  * Because of a uv1 hardware bug only a limited number of concurrent
 861  * requests can be made.
 862  */
 863 static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
 864 {
 865         spinlock_t *lock = &hmaster->uvhub_lock;
 866         atomic_t *v;
 867
 868         v = &hmaster->active_descriptor_count;
 869         if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
 870                 stat->s_throttles++;
 871                 do {
 872                         cpu_relax();
 873                 } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
 874         }
 875 }
 876
 877 /*
 878  * Handle the completion status of a message send.
 879  */
 880 static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
 881                         struct bau_control *bcp, struct bau_control *hmaster,
 882                         struct ptc_stats *stat)
 883 {
 884         if (completion_status == FLUSH_RETRY_PLUGGED)
 885                 destination_plugged(bau_desc, bcp, hmaster, stat);
 886         else if (completion_status == FLUSH_RETRY_TIMEOUT)
 887                 destination_timeout(bau_desc, bcp, hmaster, stat);
 888 }
 889
 890 /*
 891  * Send a broadcast and wait for it to complete.
 892  *
 893  * The flush_mask contains the cpus the broadcast is to be sent to including
 894  * cpus that are on the local uvhub.
 895  *
 896  * Returns 0 if all flushing represented in the mask was done.
 897  * Returns 1 if it gives up entirely and the original cpu mask is to be
 898  * returned to the kernel.
 899  */
 900 int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
 901         struct bau_desc *bau_desc)
 902 {
 903         int seq_number = 0;
 904         int completion_stat = 0;
 905         int uv1 = 0;
 906         long try = 0;
 907         unsigned long index;
 908         cycles_t time1;
 909         cycles_t time2;
 910         struct ptc_stats *stat = bcp->statp;
 911         struct bau_control *hmaster = bcp->uvhub_master;
 912         struct uv1_bau_msg_header *uv1_hdr = NULL;
 913         struct uv2_3_bau_msg_header *uv2_3_hdr = NULL;
 914
 915         if (bcp->uvhub_version == 1) {
 916                 uv1 = 1;
 917                 uv1_throttle(hmaster, stat);
 918         }
 919
 920         while (hmaster->uvhub_quiesce)
 921                 cpu_relax();
 922
 923         time1 = get_cycles();
 924         if (uv1)
 925                 uv1_hdr = &bau_desc->header.uv1_hdr;
 926         else
 927                 /* uv2 and uv3 */
 928                 uv2_3_hdr = &bau_desc->header.uv2_3_hdr;
 929
 930         do {
 931                 if (try == 0) {
 932                         if (uv1)
 933                                 uv1_hdr->msg_type = MSG_REGULAR;
 934                         else
 935                                 uv2_3_hdr->msg_type = MSG_REGULAR;
 936                         seq_number = bcp->message_number++;
 937                 } else {
 938                         if (uv1)
 939                                 uv1_hdr->msg_type = MSG_RETRY;
 940                         else
 941                                 uv2_3_hdr->msg_type = MSG_RETRY;
 942                         stat->s_retry_messages++;
 943                 }
 944
 945                 if (uv1)
 946                         uv1_hdr->sequence = seq_number;
 947                 else
 948                         uv2_3_hdr->sequence = seq_number;
 949                 index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
 950                 bcp->send_message = get_cycles();
 951
 952                 write_mmr_activation(index);
 953
 954                 try++;
 955                 completion_stat = wait_completion(bau_desc, bcp, try);
 956
 957                 handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
 958
 959                 if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
 960                         bcp->ipi_attempts = 0;
 961                         stat->s_overipilimit++;
 962                         completion_stat = FLUSH_GIVEUP;
 963                         break;
 964                 }
 965                 cpu_relax();
 966         } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
 967                  (completion_stat == FLUSH_RETRY_TIMEOUT));
 968
 969         time2 = get_cycles();
 970
 971         count_max_concurr(completion_stat, bcp, hmaster);
 972
 973         while (hmaster->uvhub_quiesce)
 974                 cpu_relax();
 975
 976         atomic_dec(&hmaster->active_descriptor_count);
 977
 978         record_send_stats(time1, time2, bcp, stat, completion_stat, try);
 979
 980         if (completion_stat == FLUSH_GIVEUP)
 981                 /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
 982                 return 1;
 983         return 0;
 984 }
 985
 986 /*
 987  * The BAU is disabled for this uvhub. When the disabled time period has
 988  * expired re-enable it.
 989  * Return 0 if it is re-enabled for all cpus on this uvhub.
 990  */
 991 static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
 992 {
 993         int tcpu;
 994         struct bau_control *tbcp;
 995         struct bau_control *hmaster;
 996
 997         hmaster = bcp->uvhub_master;
 998         spin_lock(&hmaster->disable_lock);
 999         if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
1000                 stat->s_bau_reenabled++;
1001                 for_each_present_cpu(tcpu) {
1002                         tbcp = &per_cpu(bau_control, tcpu);
1003                         if (tbcp->uvhub_master == hmaster) {
1004                                 tbcp->baudisabled = 0;
1005                                 tbcp->period_requests = 0;
1006                                 tbcp->period_time = 0;
1007                                 tbcp->period_giveups = 0;
1008                         }
1009                 }
1010                 spin_unlock(&hmaster->disable_lock);
1011                 return 0;
1012         }
1013         spin_unlock(&hmaster->disable_lock);
1014         return -1;
1015 }
1016
1017 static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
1018                                 int remotes, struct bau_desc *bau_desc)
1019 {
1020         stat->s_requestor++;
1021         stat->s_ntargcpu += remotes + locals;
1022         stat->s_ntargremotes += remotes;
1023         stat->s_ntarglocals += locals;
1024
1025         /* uvhub statistics */
1026         hubs = bau_uvhub_weight(&bau_desc->distribution);
1027         if (locals) {
1028                 stat->s_ntarglocaluvhub++;
1029                 stat->s_ntargremoteuvhub += (hubs - 1);
1030         } else
1031                 stat->s_ntargremoteuvhub += hubs;
1032
1033         stat->s_ntarguvhub += hubs;
1034
1035         if (hubs >= 16)
1036                 stat->s_ntarguvhub16++;
1037         else if (hubs >= 8)
1038                 stat->s_ntarguvhub8++;
1039         else if (hubs >= 4)
1040                 stat->s_ntarguvhub4++;
1041         else if (hubs >= 2)
1042                 stat->s_ntarguvhub2++;
1043         else
1044                 stat->s_ntarguvhub1++;
1045 }
1046
1047 /*
1048  * Translate a cpu mask to the uvhub distribution mask in the BAU
1049  * activation descriptor.
1050  */
1051 static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
1052                         struct bau_desc *bau_desc, int *localsp, int *remotesp)
1053 {
1054         int cpu;
1055         int pnode;
1056         int cnt = 0;
1057         struct hub_and_pnode *hpp;
1058
1059         for_each_cpu(cpu, flush_mask) {
1060                 /*
1061                  * The distribution vector is a bit map of pnodes, relative
1062                  * to the partition base pnode (and the partition base nasid
1063                  * in the header).
1064                  * Translate cpu to pnode and hub using a local memory array.
1065                  */
1066                 hpp = &bcp->socket_master->thp[cpu];
1067                 pnode = hpp->pnode - bcp->partition_base_pnode;
1068                 bau_uvhub_set(pnode, &bau_desc->distribution);
1069                 cnt++;
1070                 if (hpp->uvhub == bcp->uvhub)
1071                         (*localsp)++;
1072                 else
1073                         (*remotesp)++;
1074         }
1075         if (!cnt)
1076                 return 1;
1077         return 0;
1078 }
1079
1080 /*
1081  * globally purge translation cache of a virtual address or all TLB's
1082  * @cpumask: mask of all cpu's in which the address is to be removed
1083  * @mm: mm_struct containing virtual address range
1084  * @start: start virtual address to be removed from TLB
1085  * @end: end virtual address to be remove from TLB
1086  * @cpu: the current cpu
1087  *
1088  * This is the entry point for initiating any UV global TLB shootdown.
1089  *
1090  * Purges the translation caches of all specified processors of the given
1091  * virtual address, or purges all TLB's on specified processors.
1092  *
1093  * The caller has derived the cpumask from the mm_struct.  This function
1094  * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
1095  *
1096  * The cpumask is converted into a uvhubmask of the uvhubs containing
1097  * those cpus.
1098  *
1099  * Note that this function should be called with preemption disabled.
1100  *
1101  * Returns NULL if all remote flushing was done.
1102  * Returns pointer to cpumask if some remote flushing remains to be
1103  * done.  The returned pointer is valid till preemption is re-enabled.
1104  */
1105 const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
1106                                                 struct mm_struct *mm,
1107                                                 unsigned long start,
1108                                                 unsigned long end,
1109                                                 unsigned int cpu)
1110 {
1111         int locals = 0;
1112         int remotes = 0;
1113         int hubs = 0;
1114         struct bau_desc *bau_desc;
1115         struct cpumask *flush_mask;
1116         struct ptc_stats *stat;
1117         struct bau_control *bcp;
1118         unsigned long descriptor_status;
1119         unsigned long status;
1120
1121         bcp = &per_cpu(bau_control, cpu);
1122
1123         if (bcp->nobau)
1124                 return cpumask;
1125
1126         stat = bcp->statp;
1127         stat->s_enters++;
1128
1129         if (bcp->busy) {
1130                 descriptor_status =
1131                         read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
1132                 status = ((descriptor_status >> (bcp->uvhub_cpu *
1133                         UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
1134                 if (status == UV2H_DESC_BUSY)
1135                         return cpumask;
1136                 bcp->busy = 0;
1137         }
1138
1139         /* bau was disabled due to slow response */
1140         if (bcp->baudisabled) {
1141                 if (check_enable(bcp, stat)) {
1142                         stat->s_ipifordisabled++;
1143                         return cpumask;
1144                 }
1145         }
1146
1147         /*
1148          * Each sending cpu has a per-cpu mask which it fills from the caller's
1149          * cpu mask.  All cpus are converted to uvhubs and copied to the
1150          * activation descriptor.
1151          */
1152         flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
1153         /* don't actually do a shootdown of the local cpu */
1154         cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
1155
1156         if (cpumask_test_cpu(cpu, cpumask))
1157                 stat->s_ntargself++;
1158
1159         bau_desc = bcp->descriptor_base;
1160         bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
1161         bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
1162         if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
1163                 return NULL;
1164
1165         record_send_statistics(stat, locals, hubs, remotes, bau_desc);
1166
1167         if (!end || (end - start) <= PAGE_SIZE)
1168                 bau_desc->payload.address = start;
1169         else
1170                 bau_desc->payload.address = TLB_FLUSH_ALL;
1171         bau_desc->payload.sending_cpu = cpu;
1172         /*
1173          * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
1174          * or 1 if it gave up and the original cpumask should be returned.
1175          */
1176         if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
1177                 return NULL;
1178         else
1179                 return cpumask;
1180 }
1181
1182 /*
1183  * Search the message queue for any 'other' unprocessed message with the
1184  * same software acknowledge resource bit vector as the 'msg' message.
1185  */
1186 struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
1187                                            struct bau_control *bcp)
1188 {
1189         struct bau_pq_entry *msg_next = msg + 1;
1190         unsigned char swack_vec = msg->swack_vec;
1191
1192         if (msg_next > bcp->queue_last)
1193                 msg_next = bcp->queue_first;
1194         while (msg_next != msg) {
1195                 if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
1196                                 (msg_next->swack_vec == swack_vec))
1197                         return msg_next;
1198                 msg_next++;
1199                 if (msg_next > bcp->queue_last)
1200                         msg_next = bcp->queue_first;
1201         }
1202         return NULL;
1203 }
1204
1205 /*
1206  * UV2 needs to work around a bug in which an arriving message has not
1207  * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
1208  * Such a message must be ignored.
1209  */
1210 void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
1211 {
1212         unsigned long mmr_image;
1213         unsigned char swack_vec;
1214         struct bau_pq_entry *msg = mdp->msg;
1215         struct bau_pq_entry *other_msg;
1216
1217         mmr_image = ops.read_l_sw_ack();
1218         swack_vec = msg->swack_vec;
1219
1220         if ((swack_vec & mmr_image) == 0) {
1221                 /*
1222                  * This message was assigned a swack resource, but no
1223                  * reserved acknowlegment is pending.
1224                  * The bug has prevented this message from setting the MMR.
1225                  */
1226                 /*
1227                  * Some message has set the MMR 'pending' bit; it might have
1228                  * been another message.  Look for that message.
1229                  */
1230                 other_msg = find_another_by_swack(msg, bcp);
1231                 if (other_msg) {
1232                         /*
1233                          * There is another. Process this one but do not
1234                          * ack it.
1235                          */
1236                         bau_process_message(mdp, bcp, 0);
1237                         /*
1238                          * Let the natural processing of that other message
1239                          * acknowledge it. Don't get the processing of sw_ack's
1240                          * out of order.
1241                          */
1242                         return;
1243                 }
1244         }
1245
1246         /*
1247          * Either the MMR shows this one pending a reply or there is no
1248          * other message using this sw_ack, so it is safe to acknowledge it.
1249          */
1250         bau_process_message(mdp, bcp, 1);
1251
1252         return;
1253 }
1254
1255 /*
1256  * The BAU message interrupt comes here. (registered by set_intr_gate)
1257  * See entry_64.S
1258  *
1259  * We received a broadcast assist message.
1260  *
1261  * Interrupts are disabled; this interrupt could represent
1262  * the receipt of several messages.
1263  *
1264  * All cores/threads on this hub get this interrupt.
1265  * The last one to see it does the software ack.
1266  * (the resource will not be freed until noninterruptable cpus see this
1267  *  interrupt; hardware may timeout the s/w ack and reply ERROR)
1268  */
1269 void uv_bau_message_interrupt(struct pt_regs *regs)
1270 {
1271         int count = 0;
1272         cycles_t time_start;
1273         struct bau_pq_entry *msg;
1274         struct bau_control *bcp;
1275         struct ptc_stats *stat;
1276         struct msg_desc msgdesc;
1277
1278         ack_APIC_irq();
1279         time_start = get_cycles();
1280
1281         bcp = &per_cpu(bau_control, smp_processor_id());
1282         stat = bcp->statp;
1283
1284         msgdesc.queue_first = bcp->queue_first;
1285         msgdesc.queue_last = bcp->queue_last;
1286
1287         msg = bcp->bau_msg_head;
1288         while (msg->swack_vec) {
1289                 count++;
1290
1291                 msgdesc.msg_slot = msg - msgdesc.queue_first;
1292                 msgdesc.msg = msg;
1293                 if (bcp->uvhub_version == 2)
1294                         process_uv2_message(&msgdesc, bcp);
1295                 else
1296                         /* no error workaround for uv1 or uv3 */
1297                         bau_process_message(&msgdesc, bcp, 1);
1298
1299                 msg++;
1300                 if (msg > msgdesc.queue_last)
1301                         msg = msgdesc.queue_first;
1302                 bcp->bau_msg_head = msg;
1303         }
1304         stat->d_time += (get_cycles() - time_start);
1305         if (!count)
1306                 stat->d_nomsg++;
1307         else if (count > 1)
1308                 stat->d_multmsg++;
1309 }
1310
1311 /*
1312  * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
1313  * shootdown message timeouts enabled.  The timeout does not cause
1314  * an interrupt, but causes an error message to be returned to
1315  * the sender.
1316  */
1317 static void __init enable_timeouts(void)
1318 {
1319         int uvhub;
1320         int nuvhubs;
1321         int pnode;
1322         unsigned long mmr_image;
1323
1324         nuvhubs = uv_num_possible_blades();
1325
1326         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
1327                 if (!uv_blade_nr_possible_cpus(uvhub))
1328                         continue;
1329
1330                 pnode = uv_blade_to_pnode(uvhub);
1331                 mmr_image = read_mmr_misc_control(pnode);
1332                 /*
1333                  * Set the timeout period and then lock it in, in three
1334                  * steps; captures and locks in the period.
1335                  *
1336                  * To program the period, the SOFT_ACK_MODE must be off.
1337                  */
1338                 mmr_image &= ~(1L << SOFTACK_MSHIFT);
1339                 write_mmr_misc_control(pnode, mmr_image);
1340                 /*
1341                  * Set the 4-bit period.
1342                  */
1343                 mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
1344                 mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
1345                 write_mmr_misc_control(pnode, mmr_image);
1346                 /*
1347                  * UV1:
1348                  * Subsequent reversals of the timebase bit (3) cause an
1349                  * immediate timeout of one or all INTD resources as
1350                  * indicated in bits 2:0 (7 causes all of them to timeout).
1351                  */
1352                 mmr_image |= (1L << SOFTACK_MSHIFT);
1353                 if (is_uv2_hub()) {
1354                         /* do not touch the legacy mode bit */
1355                         /* hw bug workaround; do not use extended status */
1356                         mmr_image &= ~(1L << UV2_EXT_SHFT);
1357                 } else if (is_uv3_hub()) {
1358                         mmr_image &= ~(1L << PREFETCH_HINT_SHFT);
1359                         mmr_image |= (1L << SB_STATUS_SHFT);
1360                 }
1361                 write_mmr_misc_control(pnode, mmr_image);
1362         }
1363 }
1364
1365 static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
1366 {
1367         if (*offset < num_possible_cpus())
1368                 return offset;
1369         return NULL;
1370 }
1371
1372 static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1373 {
1374         (*offset)++;
1375         if (*offset < num_possible_cpus())
1376                 return offset;
1377         return NULL;
1378 }
1379
1380 static void ptc_seq_stop(struct seq_file *file, void *data)
1381 {
1382 }
1383
1384 /*
1385  * Display the statistics thru /proc/sgi_uv/ptc_statistics
1386  * 'data' points to the cpu number
1387  * Note: see the descriptions in stat_description[].
1388  */
1389 static int ptc_seq_show(struct seq_file *file, void *data)
1390 {
1391         struct ptc_stats *stat;
1392         struct bau_control *bcp;
1393         int cpu;
1394
1395         cpu = *(loff_t *)data;
1396         if (!cpu) {
1397                 seq_puts(file,
1398                          "# cpu bauoff sent stime self locals remotes ncpus localhub ");
1399                 seq_puts(file, "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
1400                 seq_puts(file,
1401                          "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
1402                 seq_puts(file,
1403                          "rok resetp resett giveup sto bz throt disable ");
1404                 seq_puts(file,
1405                          "enable wars warshw warwaits enters ipidis plugged ");
1406                 seq_puts(file,
1407                          "ipiover glim cong swack recv rtime all one mult ");
1408                 seq_puts(file, "none retry canc nocan reset rcan\n");
1409         }
1410         if (cpu < num_possible_cpus() && cpu_online(cpu)) {
1411                 bcp = &per_cpu(bau_control, cpu);
1412                 if (bcp->nobau) {
1413                         seq_printf(file, "cpu %d bau disabled\n", cpu);
1414                         return 0;
1415                 }
1416                 stat = bcp->statp;
1417                 /* source side statistics */
1418                 seq_printf(file,
1419                         "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1420                            cpu, bcp->nobau, stat->s_requestor,
1421                            cycles_2_us(stat->s_time),
1422                            stat->s_ntargself, stat->s_ntarglocals,
1423                            stat->s_ntargremotes, stat->s_ntargcpu,
1424                            stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
1425                            stat->s_ntarguvhub, stat->s_ntarguvhub16);
1426                 seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
1427                            stat->s_ntarguvhub8, stat->s_ntarguvhub4,
1428                            stat->s_ntarguvhub2, stat->s_ntarguvhub1,
1429                            stat->s_dtimeout, stat->s_strongnacks);
1430                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
1431                            stat->s_retry_messages, stat->s_retriesok,
1432                            stat->s_resets_plug, stat->s_resets_timeout,
1433                            stat->s_giveup, stat->s_stimeout,
1434                            stat->s_busy, stat->s_throttles);
1435                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1436                            stat->s_bau_disabled, stat->s_bau_reenabled,
1437                            stat->s_uv2_wars, stat->s_uv2_wars_hw,
1438                            stat->s_uv2_war_waits, stat->s_enters,
1439                            stat->s_ipifordisabled, stat->s_plugged,
1440                            stat->s_overipilimit, stat->s_giveuplimit,
1441                            stat->s_congested);
1442
1443                 /* destination side statistics */
1444                 seq_printf(file,
1445                         "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
1446                            ops.read_g_sw_ack(uv_cpu_to_pnode(cpu)),
1447                            stat->d_requestee, cycles_2_us(stat->d_time),
1448                            stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
1449                            stat->d_nomsg, stat->d_retries, stat->d_canceled,
1450                            stat->d_nocanceled, stat->d_resets,
1451                            stat->d_rcanceled);
1452         }
1453         return 0;
1454 }
1455
1456 /*
1457  * Display the tunables thru debugfs
1458  */
1459 static ssize_t tunables_read(struct file *file, char __user *userbuf,
1460                                 size_t count, loff_t *ppos)
1461 {
1462         char *buf;
1463         int ret;
1464
1465         buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
1466                 "max_concur plugged_delay plugsb4reset timeoutsb4reset",
1467                 "ipi_reset_limit complete_threshold congested_response_us",
1468                 "congested_reps disabled_period giveup_limit",
1469                 max_concurr, plugged_delay, plugsb4reset,
1470                 timeoutsb4reset, ipi_reset_limit, complete_threshold,
1471                 congested_respns_us, congested_reps, disabled_period,
1472                 giveup_limit);
1473
1474         if (!buf)
1475                 return -ENOMEM;
1476
1477         ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
1478         kfree(buf);
1479         return ret;
1480 }
1481
1482 /*
1483  * handle a write to /proc/sgi_uv/ptc_statistics
1484  * -1: reset the statistics
1485  *  0: display meaning of the statistics
1486  */
1487 static ssize_t ptc_proc_write(struct file *file, const char __user *user,
1488                                 size_t count, loff_t *data)
1489 {
1490         int cpu;
1491         int i;
1492         int elements;
1493         long input_arg;
1494         char optstr[64];
1495         struct ptc_stats *stat;
1496
1497         if (count == 0 || count > sizeof(optstr))
1498                 return -EINVAL;
1499         if (copy_from_user(optstr, user, count))
1500                 return -EFAULT;
1501         optstr[count - 1] = '\0';
1502
1503         if (!strcmp(optstr, "on")) {
1504                 set_bau_on();
1505                 return count;
1506         } else if (!strcmp(optstr, "off")) {
1507                 set_bau_off();
1508                 return count;
1509         }
1510
1511         if (kstrtol(optstr, 10, &input_arg) < 0) {
1512                 pr_debug("%s is invalid\n", optstr);
1513                 return -EINVAL;
1514         }
1515
1516         if (input_arg == 0) {
1517                 elements = ARRAY_SIZE(stat_description);
1518                 pr_debug("# cpu:      cpu number\n");
1519                 pr_debug("Sender statistics:\n");
1520                 for (i = 0; i < elements; i++)
1521                         pr_debug("%s\n", stat_description[i]);
1522         } else if (input_arg == -1) {
1523                 for_each_present_cpu(cpu) {
1524                         stat = &per_cpu(ptcstats, cpu);
1525                         memset(stat, 0, sizeof(struct ptc_stats));
1526                 }
1527         }
1528
1529         return count;
1530 }
1531
1532 static int local_atoi(const char *name)
1533 {
1534         int val = 0;
1535
1536         for (;; name++) {
1537                 switch (*name) {
1538                 case '0' ... '9':
1539                         val = 10*val+(*name-'0');
1540                         break;
1541                 default:
1542                         return val;
1543                 }
1544         }
1545 }
1546
1547 /*
1548  * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
1549  * Zero values reset them to defaults.
1550  */
1551 static int parse_tunables_write(struct bau_control *bcp, char *instr,
1552                                 int count)
1553 {
1554         char *p;
1555         char *q;
1556         int cnt = 0;
1557         int val;
1558         int e = ARRAY_SIZE(tunables);
1559
1560         p = instr + strspn(instr, WHITESPACE);
1561         q = p;
1562         for (; *p; p = q + strspn(q, WHITESPACE)) {
1563                 q = p + strcspn(p, WHITESPACE);
1564                 cnt++;
1565                 if (q == p)
1566                         break;
1567         }
1568         if (cnt != e) {
1569                 pr_info("bau tunable error: should be %d values\n", e);
1570                 return -EINVAL;
1571         }
1572
1573         p = instr + strspn(instr, WHITESPACE);
1574         q = p;
1575         for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
1576                 q = p + strcspn(p, WHITESPACE);
1577                 val = local_atoi(p);
1578                 switch (cnt) {
1579                 case 0:
1580                         if (val == 0) {
1581                                 max_concurr = MAX_BAU_CONCURRENT;
1582                                 max_concurr_const = MAX_BAU_CONCURRENT;
1583                                 continue;
1584                         }
1585                         if (val < 1 || val > bcp->cpus_in_uvhub) {
1586                                 pr_debug(
1587                                 "Error: BAU max concurrent %d is invalid\n",
1588                                 val);
1589                                 return -EINVAL;
1590                         }
1591                         max_concurr = val;
1592                         max_concurr_const = val;
1593                         continue;
1594                 default:
1595                         if (val == 0)
1596                                 *tunables[cnt].tunp = tunables[cnt].deflt;
1597                         else
1598                                 *tunables[cnt].tunp = val;
1599                         continue;
1600                 }
1601                 if (q == p)
1602                         break;
1603         }
1604         return 0;
1605 }
1606
1607 /*
1608  * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
1609  */
1610 static ssize_t tunables_write(struct file *file, const char __user *user,
1611                                 size_t count, loff_t *data)
1612 {
1613         int cpu;
1614         int ret;
1615         char instr[100];
1616         struct bau_control *bcp;
1617
1618         if (count == 0 || count > sizeof(instr)-1)
1619                 return -EINVAL;
1620         if (copy_from_user(instr, user, count))
1621                 return -EFAULT;
1622
1623         instr[count] = '\0';
1624
1625         cpu = get_cpu();
1626         bcp = &per_cpu(bau_control, cpu);
1627         ret = parse_tunables_write(bcp, instr, count);
1628         put_cpu();
1629         if (ret)
1630                 return ret;
1631
1632         for_each_present_cpu(cpu) {
1633                 bcp = &per_cpu(bau_control, cpu);
1634                 bcp->max_concurr         = max_concurr;
1635                 bcp->max_concurr_const   = max_concurr;
1636                 bcp->plugged_delay       = plugged_delay;
1637                 bcp->plugsb4reset        = plugsb4reset;
1638                 bcp->timeoutsb4reset     = timeoutsb4reset;
1639                 bcp->ipi_reset_limit     = ipi_reset_limit;
1640                 bcp->complete_threshold  = complete_threshold;
1641                 bcp->cong_response_us    = congested_respns_us;
1642                 bcp->cong_reps           = congested_reps;
1643                 bcp->disabled_period     = sec_2_cycles(disabled_period);
1644                 bcp->giveup_limit        = giveup_limit;
1645         }
1646         return count;
1647 }
1648
1649 static const struct seq_operations uv_ptc_seq_ops = {
1650         .start          = ptc_seq_start,
1651         .next           = ptc_seq_next,
1652         .stop           = ptc_seq_stop,
1653         .show           = ptc_seq_show
1654 };
1655
1656 static int ptc_proc_open(struct inode *inode, struct file *file)
1657 {
1658         return seq_open(file, &uv_ptc_seq_ops);
1659 }
1660
1661 static int tunables_open(struct inode *inode, struct file *file)
1662 {
1663         return 0;
1664 }
1665
1666 static const struct file_operations proc_uv_ptc_operations = {
1667         .open           = ptc_proc_open,
1668         .read           = seq_read,
1669         .write          = ptc_proc_write,
1670         .llseek         = seq_lseek,
1671         .release        = seq_release,
1672 };
1673
1674 static const struct file_operations tunables_fops = {
1675         .open           = tunables_open,
1676         .read           = tunables_read,
1677         .write          = tunables_write,
1678         .llseek         = default_llseek,
1679 };
1680
1681 static int __init uv_ptc_init(void)
1682 {
1683         struct proc_dir_entry *proc_uv_ptc;
1684
1685         if (!is_uv_system())
1686                 return 0;
1687
1688         proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1689                                   &proc_uv_ptc_operations);
1690         if (!proc_uv_ptc) {
1691                 pr_err("unable to create %s proc entry\n",
1692                        UV_PTC_BASENAME);
1693                 return -EINVAL;
1694         }
1695
1696         tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
1697         if (!tunables_dir) {
1698                 pr_err("unable to create debugfs directory %s\n",
1699                        UV_BAU_TUNABLES_DIR);
1700                 return -EINVAL;
1701         }
1702         tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
1703                                         tunables_dir, NULL, &tunables_fops);
1704         if (!tunables_file) {
1705                 pr_err("unable to create debugfs file %s\n",
1706                        UV_BAU_TUNABLES_FILE);
1707                 return -EINVAL;
1708         }
1709         return 0;
1710 }
1711
1712 /*
1713  * Initialize the sending side's sending buffers.
1714  */
1715 static void activation_descriptor_init(int node, int pnode, int base_pnode)
1716 {
1717         int i;
1718         int cpu;
1719         int uv1 = 0;
1720         unsigned long gpa;
1721         unsigned long m;
1722         unsigned long n;
1723         size_t dsize;
1724         struct bau_desc *bau_desc;
1725         struct bau_desc *bd2;
1726         struct uv1_bau_msg_header *uv1_hdr;
1727         struct uv2_3_bau_msg_header *uv2_3_hdr;
1728         struct bau_control *bcp;
1729
1730         /*
1731          * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
1732          * per cpu; and one per cpu on the uvhub (ADP_SZ)
1733          */
1734         dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
1735         bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
1736         BUG_ON(!bau_desc);
1737
1738         gpa = uv_gpa(bau_desc);
1739         n = uv_gpa_to_gnode(gpa);
1740         m = ops.bau_gpa_to_offset(gpa);
1741         if (is_uv1_hub())
1742                 uv1 = 1;
1743
1744         /* the 14-bit pnode */
1745         write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
1746         /*
1747          * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
1748          * cpu even though we only use the first one; one descriptor can
1749          * describe a broadcast to 256 uv hubs.
1750          */
1751         for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
1752                 memset(bd2, 0, sizeof(struct bau_desc));
1753                 if (uv1) {
1754                         uv1_hdr = &bd2->header.uv1_hdr;
1755                         uv1_hdr->swack_flag = 1;
1756                         /*
1757                          * The base_dest_nasid set in the message header
1758                          * is the nasid of the first uvhub in the partition.
1759                          * The bit map will indicate destination pnode numbers
1760                          * relative to that base. They may not be consecutive
1761                          * if nasid striding is being used.
1762                          */
1763                         uv1_hdr->base_dest_nasid =
1764                                                   UV_PNODE_TO_NASID(base_pnode);
1765                         uv1_hdr->dest_subnodeid  = UV_LB_SUBNODEID;
1766                         uv1_hdr->command         = UV_NET_ENDPOINT_INTD;
1767                         uv1_hdr->int_both        = 1;
1768                         /*
1769                          * all others need to be set to zero:
1770                          *   fairness chaining multilevel count replied_to
1771                          */
1772                 } else {
1773                         /*
1774                          * BIOS uses legacy mode, but uv2 and uv3 hardware always
1775                          * uses native mode for selective broadcasts.
1776                          */
1777                         uv2_3_hdr = &bd2->header.uv2_3_hdr;
1778                         uv2_3_hdr->swack_flag      = 1;
1779                         uv2_3_hdr->base_dest_nasid =
1780                                                   UV_PNODE_TO_NASID(base_pnode);
1781                         uv2_3_hdr->dest_subnodeid  = UV_LB_SUBNODEID;
1782                         uv2_3_hdr->command         = UV_NET_ENDPOINT_INTD;
1783                 }
1784         }
1785         for_each_present_cpu(cpu) {
1786                 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1787                         continue;
1788                 bcp = &per_cpu(bau_control, cpu);
1789                 bcp->descriptor_base = bau_desc;
1790         }
1791 }
1792
1793 /*
1794  * initialize the destination side's receiving buffers
1795  * entered for each uvhub in the partition
1796  * - node is first node (kernel memory notion) on the uvhub
1797  * - pnode is the uvhub's physical identifier
1798  */
1799 static void pq_init(int node, int pnode)
1800 {
1801         int cpu;
1802         size_t plsize;
1803         char *cp;
1804         void *vp;
1805         unsigned long gnode, first, last, tail;
1806         struct bau_pq_entry *pqp;
1807         struct bau_control *bcp;
1808
1809         plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
1810         vp = kmalloc_node(plsize, GFP_KERNEL, node);
1811         pqp = (struct bau_pq_entry *)vp;
1812         BUG_ON(!pqp);
1813
1814         cp = (char *)pqp + 31;
1815         pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
1816
1817         for_each_present_cpu(cpu) {
1818                 if (pnode != uv_cpu_to_pnode(cpu))
1819                         continue;
1820                 /* for every cpu on this pnode: */
1821                 bcp = &per_cpu(bau_control, cpu);
1822                 bcp->queue_first        = pqp;
1823                 bcp->bau_msg_head       = pqp;
1824                 bcp->queue_last         = pqp + (DEST_Q_SIZE - 1);
1825         }
1826
1827         first = ops.bau_gpa_to_offset(uv_gpa(pqp));
1828         last = ops.bau_gpa_to_offset(uv_gpa(pqp + (DEST_Q_SIZE - 1)));
1829         tail = first;
1830         gnode = uv_gpa_to_gnode(uv_gpa(pqp));
1831         first = (gnode << UV_PAYLOADQ_GNODE_SHIFT) | tail;
1832
1833         write_mmr_payload_tail(pnode, tail);
1834         ops.write_payload_first(pnode, first);
1835         ops.write_payload_last(pnode, last);
1836         ops.write_g_sw_ack(pnode, 0xffffUL);
1837
1838         /* in effect, all msg_type's are set to MSG_NOOP */
1839         memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
1840 }
1841
1842 /*
1843  * Initialization of each UV hub's structures
1844  */
1845 static void __init init_uvhub(int uvhub, int vector, int base_pnode)
1846 {
1847         int node;
1848         int pnode;
1849         unsigned long apicid;
1850
1851         node = uvhub_to_first_node(uvhub);
1852         pnode = uv_blade_to_pnode(uvhub);
1853
1854         activation_descriptor_init(node, pnode, base_pnode);
1855
1856         pq_init(node, pnode);
1857         /*
1858          * The below initialization can't be in firmware because the
1859          * messaging IRQ will be determined by the OS.
1860          */
1861         apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
1862         write_mmr_data_config(pnode, ((apicid << 32) | vector));
1863 }
1864
1865 /*
1866  * We will set BAU_MISC_CONTROL with a timeout period.
1867  * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1868  * So the destination timeout period has to be calculated from them.
1869  */
1870 static int calculate_destination_timeout(void)
1871 {
1872         unsigned long mmr_image;
1873         int mult1;
1874         int mult2;
1875         int index;
1876         int base;
1877         int ret;
1878         unsigned long ts_ns;
1879
1880         if (is_uv1_hub()) {
1881                 mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
1882                 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1883                 index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1884                 mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
1885                 mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
1886                 ts_ns = timeout_base_ns[index];
1887                 ts_ns *= (mult1 * mult2);
1888                 ret = ts_ns / 1000;
1889         } else {
1890                 /* same destination timeout for uv2 and uv3 */
1891                 /* 4 bits  0/1 for 10/80us base, 3 bits of multiplier */
1892                 mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
1893                 mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
1894                 if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
1895                         base = 80;
1896                 else
1897                         base = 10;
1898                 mult1 = mmr_image & UV2_ACK_MASK;
1899                 ret = mult1 * base;
1900         }
1901         return ret;
1902 }
1903
1904 static void __init init_per_cpu_tunables(void)
1905 {
1906         int cpu;
1907         struct bau_control *bcp;
1908
1909         for_each_present_cpu(cpu) {
1910                 bcp = &per_cpu(bau_control, cpu);
1911                 bcp->baudisabled                = 0;
1912                 if (nobau)
1913                         bcp->nobau              = true;
1914                 bcp->statp                      = &per_cpu(ptcstats, cpu);
1915                 /* time interval to catch a hardware stay-busy bug */
1916                 bcp->timeout_interval           = usec_2_cycles(2*timeout_us);
1917                 bcp->max_concurr                = max_concurr;
1918                 bcp->max_concurr_const          = max_concurr;
1919                 bcp->plugged_delay              = plugged_delay;
1920                 bcp->plugsb4reset               = plugsb4reset;
1921                 bcp->timeoutsb4reset            = timeoutsb4reset;
1922                 bcp->ipi_reset_limit            = ipi_reset_limit;
1923                 bcp->complete_threshold         = complete_threshold;
1924                 bcp->cong_response_us           = congested_respns_us;
1925                 bcp->cong_reps                  = congested_reps;
1926                 bcp->disabled_period            = sec_2_cycles(disabled_period);
1927                 bcp->giveup_limit               = giveup_limit;
1928                 spin_lock_init(&bcp->queue_lock);
1929                 spin_lock_init(&bcp->uvhub_lock);
1930                 spin_lock_init(&bcp->disable_lock);
1931         }
1932 }
1933
1934 /*
1935  * Scan all cpus to collect blade and socket summaries.
1936  */
1937 static int __init get_cpu_topology(int base_pnode,
1938                                         struct uvhub_desc *uvhub_descs,
1939                                         unsigned char *uvhub_mask)
1940 {
1941         int cpu;
1942         int pnode;
1943         int uvhub;
1944         int socket;
1945         struct bau_control *bcp;
1946         struct uvhub_desc *bdp;
1947         struct socket_desc *sdp;
1948
1949         for_each_present_cpu(cpu) {
1950                 bcp = &per_cpu(bau_control, cpu);
1951
1952                 memset(bcp, 0, sizeof(struct bau_control));
1953
1954                 pnode = uv_cpu_hub_info(cpu)->pnode;
1955                 if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
1956                         pr_emerg(
1957                                 "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
1958                                 cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
1959                         return 1;
1960                 }
1961
1962                 bcp->osnode = cpu_to_node(cpu);
1963                 bcp->partition_base_pnode = base_pnode;
1964
1965                 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1966                 *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
1967                 bdp = &uvhub_descs[uvhub];
1968
1969                 bdp->num_cpus++;
1970                 bdp->uvhub = uvhub;
1971                 bdp->pnode = pnode;
1972
1973                 /* kludge: 'assuming' one node per socket, and assuming that
1974                    disabling a socket just leaves a gap in node numbers */
1975                 socket = bcp->osnode & 1;
1976                 bdp->socket_mask |= (1 << socket);
1977                 sdp = &bdp->socket[socket];
1978                 sdp->cpu_number[sdp->num_cpus] = cpu;
1979                 sdp->num_cpus++;
1980                 if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
1981                         pr_emerg("%d cpus per socket invalid\n",
1982                                 sdp->num_cpus);
1983                         return 1;
1984                 }
1985         }
1986         return 0;
1987 }
1988
1989 /*
1990  * Each socket is to get a local array of pnodes/hubs.
1991  */
1992 static void make_per_cpu_thp(struct bau_control *smaster)
1993 {
1994         int cpu;
1995         size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
1996
1997         smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
1998         memset(smaster->thp, 0, hpsz);
1999         for_each_present_cpu(cpu) {
2000                 smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
2001                 smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
2002         }
2003 }
2004
2005 /*
2006  * Each uvhub is to get a local cpumask.
2007  */
2008 static void make_per_hub_cpumask(struct bau_control *hmaster)
2009 {
2010         int sz = sizeof(cpumask_t);
2011
2012         hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
2013 }
2014
2015 /*
2016  * Initialize all the per_cpu information for the cpu's on a given socket,
2017  * given what has been gathered into the socket_desc struct.
2018  * And reports the chosen hub and socket masters back to the caller.
2019  */
2020 static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
2021                         struct bau_control **smasterp,
2022                         struct bau_control **hmasterp)
2023 {
2024         int i;
2025         int cpu;
2026         struct bau_control *bcp;
2027
2028         for (i = 0; i < sdp->num_cpus; i++) {
2029                 cpu = sdp->cpu_number[i];
2030                 bcp = &per_cpu(bau_control, cpu);
2031                 bcp->cpu = cpu;
2032                 if (i == 0) {
2033                         *smasterp = bcp;
2034                         if (!(*hmasterp))
2035                                 *hmasterp = bcp;
2036                 }
2037                 bcp->cpus_in_uvhub = bdp->num_cpus;
2038                 bcp->cpus_in_socket = sdp->num_cpus;
2039                 bcp->socket_master = *smasterp;
2040                 bcp->uvhub = bdp->uvhub;
2041                 if (is_uv1_hub())
2042                         bcp->uvhub_version = 1;
2043                 else if (is_uv2_hub())
2044                         bcp->uvhub_version = 2;
2045                 else if (is_uv3_hub())
2046                         bcp->uvhub_version = 3;
2047                 else {
2048                         pr_emerg("uvhub version not 1, 2, or 3\n");
2049                         return 1;
2050                 }
2051                 bcp->uvhub_master = *hmasterp;
2052                 bcp->uvhub_cpu = uv_cpu_blade_processor_id(cpu);
2053
2054                 if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
2055                         pr_emerg("%d cpus per uvhub invalid\n",
2056                                 bcp->uvhub_cpu);
2057                         return 1;
2058                 }
2059         }
2060         return 0;
2061 }
2062
2063 /*
2064  * Summarize the blade and socket topology into the per_cpu structures.
2065  */
2066 static int __init summarize_uvhub_sockets(int nuvhubs,
2067                         struct uvhub_desc *uvhub_descs,
2068                         unsigned char *uvhub_mask)
2069 {
2070         int socket;
2071         int uvhub;
2072         unsigned short socket_mask;
2073
2074         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2075                 struct uvhub_desc *bdp;
2076                 struct bau_control *smaster = NULL;
2077                 struct bau_control *hmaster = NULL;
2078
2079                 if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
2080                         continue;
2081
2082                 bdp = &uvhub_descs[uvhub];
2083                 socket_mask = bdp->socket_mask;
2084                 socket = 0;
2085                 while (socket_mask) {
2086                         struct socket_desc *sdp;
2087                         if ((socket_mask & 1)) {
2088                                 sdp = &bdp->socket[socket];
2089                                 if (scan_sock(sdp, bdp, &smaster, &hmaster))
2090                                         return 1;
2091                                 make_per_cpu_thp(smaster);
2092                         }
2093                         socket++;
2094                         socket_mask = (socket_mask >> 1);
2095                 }
2096                 make_per_hub_cpumask(hmaster);
2097         }
2098         return 0;
2099 }
2100
2101 /*
2102  * initialize the bau_control structure for each cpu
2103  */
2104 static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
2105 {
2106         unsigned char *uvhub_mask;
2107         void *vp;
2108         struct uvhub_desc *uvhub_descs;
2109
2110         timeout_us = calculate_destination_timeout();
2111
2112         vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
2113         uvhub_descs = (struct uvhub_desc *)vp;
2114         memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
2115         uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
2116
2117         if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
2118                 goto fail;
2119
2120         if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
2121                 goto fail;
2122
2123         kfree(uvhub_descs);
2124         kfree(uvhub_mask);
2125         init_per_cpu_tunables();
2126         return 0;
2127
2128 fail:
2129         kfree(uvhub_descs);
2130         kfree(uvhub_mask);
2131         return 1;
2132 }
2133
2134 /*
2135  * Initialization of BAU-related structures
2136  */
2137 static int __init uv_bau_init(void)
2138 {
2139         int uvhub;
2140         int pnode;
2141         int nuvhubs;
2142         int cur_cpu;
2143         int cpus;
2144         int vector;
2145         cpumask_var_t *mask;
2146
2147         if (!is_uv_system())
2148                 return 0;
2149
2150         if (is_uv3_hub())
2151                 ops = uv123_bau_ops;
2152         else if (is_uv2_hub())
2153                 ops = uv123_bau_ops;
2154         else if (is_uv1_hub())
2155                 ops = uv123_bau_ops;
2156
2157         for_each_possible_cpu(cur_cpu) {
2158                 mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
2159                 zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
2160         }
2161
2162         nuvhubs = uv_num_possible_blades();
2163         congested_cycles = usec_2_cycles(congested_respns_us);
2164
2165         uv_base_pnode = 0x7fffffff;
2166         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2167                 cpus = uv_blade_nr_possible_cpus(uvhub);
2168                 if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
2169                         uv_base_pnode = uv_blade_to_pnode(uvhub);
2170         }
2171
2172         enable_timeouts();
2173
2174         if (init_per_cpu(nuvhubs, uv_base_pnode)) {
2175                 set_bau_off();
2176                 nobau_perm = 1;
2177                 return 0;
2178         }
2179
2180         vector = UV_BAU_MESSAGE;
2181         for_each_possible_blade(uvhub) {
2182                 if (uv_blade_nr_possible_cpus(uvhub))
2183                         init_uvhub(uvhub, vector, uv_base_pnode);
2184         }
2185
2186         alloc_intr_gate(vector, uv_bau_message_intr1);
2187
2188         for_each_possible_blade(uvhub) {
2189                 if (uv_blade_nr_possible_cpus(uvhub)) {
2190                         unsigned long val;
2191                         unsigned long mmr;
2192                         pnode = uv_blade_to_pnode(uvhub);
2193                         /* INIT the bau */
2194                         val = 1L << 63;
2195                         write_gmmr_activation(pnode, val);
2196                         mmr = 1; /* should be 1 to broadcast to both sockets */
2197                         if (!is_uv1_hub())
2198                                 write_mmr_data_broadcast(pnode, mmr);
2199                 }
2200         }
2201
2202         return 0;
2203 }
2204 core_initcall(uv_bau_init);
2205 fs_initcall(uv_ptc_init);