arch/x86/platform/uv/tlb_uv.c

   1 /*
   2  *      SGI UltraViolet TLB flush routines.
   3  *
   4  *      (c) 2008-2014 Cliff Wickman <cpw@sgi.com>, SGI.
   5  *
   6  *      This code is released under the GNU General Public License version 2 or
   7  *      later.
   8  */
   9 #include <linux/seq_file.h>
  10 #include <linux/proc_fs.h>
  11 #include <linux/debugfs.h>
  12 #include <linux/kernel.h>
  13 #include <linux/slab.h>
  14 #include <linux/delay.h>
  15
  16 #include <asm/mmu_context.h>
  17 #include <asm/uv/uv.h>
  18 #include <asm/uv/uv_mmrs.h>
  19 #include <asm/uv/uv_hub.h>
  20 #include <asm/uv/uv_bau.h>
  21 #include <asm/apic.h>
  22 #include <asm/idle.h>
  23 #include <asm/tsc.h>
  24 #include <asm/irq_vectors.h>
  25 #include <asm/timer.h>
  26
  27 static struct bau_operations ops;
  28
  29 static struct bau_operations uv123_bau_ops = {
  30         .bau_gpa_to_offset       = uv_gpa_to_offset,
  31         .read_l_sw_ack           = read_mmr_sw_ack,
  32         .read_g_sw_ack           = read_gmmr_sw_ack,
  33         .write_l_sw_ack          = write_mmr_sw_ack,
  34         .write_g_sw_ack          = write_gmmr_sw_ack,
  35         .write_payload_first     = write_mmr_payload_first,
  36         .write_payload_last      = write_mmr_payload_last,
  37 };
  38
  39 static struct bau_operations uv4_bau_ops = {
  40         .bau_gpa_to_offset       = uv_gpa_to_soc_phys_ram,
  41         .read_l_sw_ack           = read_mmr_proc_sw_ack,
  42         .read_g_sw_ack           = read_gmmr_proc_sw_ack,
  43         .write_l_sw_ack          = write_mmr_proc_sw_ack,
  44         .write_g_sw_ack          = write_gmmr_proc_sw_ack,
  45         .write_payload_first     = write_mmr_proc_payload_first,
  46         .write_payload_last      = write_mmr_proc_payload_last,
  47 };
  48
  49
  50 /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  51 static int timeout_base_ns[] = {
  52                 20,
  53                 160,
  54                 1280,
  55                 10240,
  56                 81920,
  57                 655360,
  58                 5242880,
  59                 167772160
  60 };
  61
  62 static int timeout_us;
  63 static bool nobau = true;
  64 static int nobau_perm;
  65 static cycles_t congested_cycles;
  66
  67 /* tunables: */
  68 static int max_concurr          = MAX_BAU_CONCURRENT;
  69 static int max_concurr_const    = MAX_BAU_CONCURRENT;
  70 static int plugged_delay        = PLUGGED_DELAY;
  71 static int plugsb4reset         = PLUGSB4RESET;
  72 static int giveup_limit         = GIVEUP_LIMIT;
  73 static int timeoutsb4reset      = TIMEOUTSB4RESET;
  74 static int ipi_reset_limit      = IPI_RESET_LIMIT;
  75 static int complete_threshold   = COMPLETE_THRESHOLD;
  76 static int congested_respns_us  = CONGESTED_RESPONSE_US;
  77 static int congested_reps       = CONGESTED_REPS;
  78 static int disabled_period      = DISABLED_PERIOD;
  79
  80 static struct tunables tunables[] = {
  81         {&max_concurr,           MAX_BAU_CONCURRENT}, /* must be [0] */
  82         {&plugged_delay,         PLUGGED_DELAY},
  83         {&plugsb4reset,          PLUGSB4RESET},
  84         {&timeoutsb4reset,       TIMEOUTSB4RESET},
  85         {&ipi_reset_limit,       IPI_RESET_LIMIT},
  86         {&complete_threshold,    COMPLETE_THRESHOLD},
  87         {&congested_respns_us,   CONGESTED_RESPONSE_US},
  88         {&congested_reps,        CONGESTED_REPS},
  89         {&disabled_period,       DISABLED_PERIOD},
  90         {&giveup_limit,          GIVEUP_LIMIT}
  91 };
  92
  93 static struct dentry *tunables_dir;
  94 static struct dentry *tunables_file;
  95
  96 /* these correspond to the statistics printed by ptc_seq_show() */
  97 static char *stat_description[] = {
  98         "sent:     number of shootdown messages sent",
  99         "stime:    time spent sending messages",
 100         "numuvhubs: number of hubs targeted with shootdown",
 101         "numuvhubs16: number times 16 or more hubs targeted",
 102         "numuvhubs8: number times 8 or more hubs targeted",
 103         "numuvhubs4: number times 4 or more hubs targeted",
 104         "numuvhubs2: number times 2 or more hubs targeted",
 105         "numuvhubs1: number times 1 hub targeted",
 106         "numcpus:  number of cpus targeted with shootdown",
 107         "dto:      number of destination timeouts",
 108         "retries:  destination timeout retries sent",
 109         "rok:   :  destination timeouts successfully retried",
 110         "resetp:   ipi-style resource resets for plugs",
 111         "resett:   ipi-style resource resets for timeouts",
 112         "giveup:   fall-backs to ipi-style shootdowns",
 113         "sto:      number of source timeouts",
 114         "bz:       number of stay-busy's",
 115         "throt:    number times spun in throttle",
 116         "swack:   image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
 117         "recv:     shootdown messages received",
 118         "rtime:    time spent processing messages",
 119         "all:      shootdown all-tlb messages",
 120         "one:      shootdown one-tlb messages",
 121         "mult:     interrupts that found multiple messages",
 122         "none:     interrupts that found no messages",
 123         "retry:    number of retry messages processed",
 124         "canc:     number messages canceled by retries",
 125         "nocan:    number retries that found nothing to cancel",
 126         "reset:    number of ipi-style reset requests processed",
 127         "rcan:     number messages canceled by reset requests",
 128         "disable:  number times use of the BAU was disabled",
 129         "enable:   number times use of the BAU was re-enabled"
 130 };
 131
 132 static int __init setup_bau(char *arg)
 133 {
 134         int result;
 135
 136         if (!arg)
 137                 return -EINVAL;
 138
 139         result = strtobool(arg, &nobau);
 140         if (result)
 141                 return result;
 142
 143         /* we need to flip the logic here, so that bau=y sets nobau to false */
 144         nobau = !nobau;
 145
 146         if (!nobau)
 147                 pr_info("UV BAU Enabled\n");
 148         else
 149                 pr_info("UV BAU Disabled\n");
 150
 151         return 0;
 152 }
 153 early_param("bau", setup_bau);
 154
 155 /* base pnode in this partition */
 156 static int uv_base_pnode __read_mostly;
 157
 158 static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
 159 static DEFINE_PER_CPU(struct bau_control, bau_control);
 160 static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
 161
 162 static void
 163 set_bau_on(void)
 164 {
 165         int cpu;
 166         struct bau_control *bcp;
 167
 168         if (nobau_perm) {
 169                 pr_info("BAU not initialized; cannot be turned on\n");
 170                 return;
 171         }
 172         nobau = false;
 173         for_each_present_cpu(cpu) {
 174                 bcp = &per_cpu(bau_control, cpu);
 175                 bcp->nobau = false;
 176         }
 177         pr_info("BAU turned on\n");
 178         return;
 179 }
 180
 181 static void
 182 set_bau_off(void)
 183 {
 184         int cpu;
 185         struct bau_control *bcp;
 186
 187         nobau = true;
 188         for_each_present_cpu(cpu) {
 189                 bcp = &per_cpu(bau_control, cpu);
 190                 bcp->nobau = true;
 191         }
 192         pr_info("BAU turned off\n");
 193         return;
 194 }
 195
 196 /*
 197  * Determine the first node on a uvhub. 'Nodes' are used for kernel
 198  * memory allocation.
 199  */
 200 static int __init uvhub_to_first_node(int uvhub)
 201 {
 202         int node, b;
 203
 204         for_each_online_node(node) {
 205                 b = uv_node_to_blade_id(node);
 206                 if (uvhub == b)
 207                         return node;
 208         }
 209         return -1;
 210 }
 211
 212 /*
 213  * Determine the apicid of the first cpu on a uvhub.
 214  */
 215 static int __init uvhub_to_first_apicid(int uvhub)
 216 {
 217         int cpu;
 218
 219         for_each_present_cpu(cpu)
 220                 if (uvhub == uv_cpu_to_blade_id(cpu))
 221                         return per_cpu(x86_cpu_to_apicid, cpu);
 222         return -1;
 223 }
 224
 225 /*
 226  * Free a software acknowledge hardware resource by clearing its Pending
 227  * bit. This will return a reply to the sender.
 228  * If the message has timed out, a reply has already been sent by the
 229  * hardware but the resource has not been released. In that case our
 230  * clear of the Timeout bit (as well) will free the resource. No reply will
 231  * be sent (the hardware will only do one reply per message).
 232  */
 233 static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
 234                                                 int do_acknowledge)
 235 {
 236         unsigned long dw;
 237         struct bau_pq_entry *msg;
 238
 239         msg = mdp->msg;
 240         if (!msg->canceled && do_acknowledge) {
 241                 dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
 242                 ops.write_l_sw_ack(dw);
 243         }
 244         msg->replied_to = 1;
 245         msg->swack_vec = 0;
 246 }
 247
 248 /*
 249  * Process the receipt of a RETRY message
 250  */
 251 static void bau_process_retry_msg(struct msg_desc *mdp,
 252                                         struct bau_control *bcp)
 253 {
 254         int i;
 255         int cancel_count = 0;
 256         unsigned long msg_res;
 257         unsigned long mmr = 0;
 258         struct bau_pq_entry *msg = mdp->msg;
 259         struct bau_pq_entry *msg2;
 260         struct ptc_stats *stat = bcp->statp;
 261
 262         stat->d_retries++;
 263         /*
 264          * cancel any message from msg+1 to the retry itself
 265          */
 266         for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
 267                 if (msg2 > mdp->queue_last)
 268                         msg2 = mdp->queue_first;
 269                 if (msg2 == msg)
 270                         break;
 271
 272                 /* same conditions for cancellation as do_reset */
 273                 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
 274                     (msg2->swack_vec) && ((msg2->swack_vec &
 275                         msg->swack_vec) == 0) &&
 276                     (msg2->sending_cpu == msg->sending_cpu) &&
 277                     (msg2->msg_type != MSG_NOOP)) {
 278                         mmr = ops.read_l_sw_ack();
 279                         msg_res = msg2->swack_vec;
 280                         /*
 281                          * This is a message retry; clear the resources held
 282                          * by the previous message only if they timed out.
 283                          * If it has not timed out we have an unexpected
 284                          * situation to report.
 285                          */
 286                         if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
 287                                 unsigned long mr;
 288                                 /*
 289                                  * Is the resource timed out?
 290                                  * Make everyone ignore the cancelled message.
 291                                  */
 292                                 msg2->canceled = 1;
 293                                 stat->d_canceled++;
 294                                 cancel_count++;
 295                                 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
 296                                 ops.write_l_sw_ack(mr);
 297                         }
 298                 }
 299         }
 300         if (!cancel_count)
 301                 stat->d_nocanceled++;
 302 }
 303
 304 /*
 305  * Do all the things a cpu should do for a TLB shootdown message.
 306  * Other cpu's may come here at the same time for this message.
 307  */
 308 static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
 309                                                 int do_acknowledge)
 310 {
 311         short socket_ack_count = 0;
 312         short *sp;
 313         struct atomic_short *asp;
 314         struct ptc_stats *stat = bcp->statp;
 315         struct bau_pq_entry *msg = mdp->msg;
 316         struct bau_control *smaster = bcp->socket_master;
 317
 318         /*
 319          * This must be a normal message, or retry of a normal message
 320          */
 321         if (msg->address == TLB_FLUSH_ALL) {
 322                 local_flush_tlb();
 323                 stat->d_alltlb++;
 324         } else {
 325                 __flush_tlb_one(msg->address);
 326                 stat->d_onetlb++;
 327         }
 328         stat->d_requestee++;
 329
 330         /*
 331          * One cpu on each uvhub has the additional job on a RETRY
 332          * of releasing the resource held by the message that is
 333          * being retried.  That message is identified by sending
 334          * cpu number.
 335          */
 336         if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
 337                 bau_process_retry_msg(mdp, bcp);
 338
 339         /*
 340          * This is a swack message, so we have to reply to it.
 341          * Count each responding cpu on the socket. This avoids
 342          * pinging the count's cache line back and forth between
 343          * the sockets.
 344          */
 345         sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
 346         asp = (struct atomic_short *)sp;
 347         socket_ack_count = atom_asr(1, asp);
 348         if (socket_ack_count == bcp->cpus_in_socket) {
 349                 int msg_ack_count;
 350                 /*
 351                  * Both sockets dump their completed count total into
 352                  * the message's count.
 353                  */
 354                 *sp = 0;
 355                 asp = (struct atomic_short *)&msg->acknowledge_count;
 356                 msg_ack_count = atom_asr(socket_ack_count, asp);
 357
 358                 if (msg_ack_count == bcp->cpus_in_uvhub) {
 359                         /*
 360                          * All cpus in uvhub saw it; reply
 361                          * (unless we are in the UV2 workaround)
 362                          */
 363                         reply_to_message(mdp, bcp, do_acknowledge);
 364                 }
 365         }
 366
 367         return;
 368 }
 369
 370 /*
 371  * Determine the first cpu on a pnode.
 372  */
 373 static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
 374 {
 375         int cpu;
 376         struct hub_and_pnode *hpp;
 377
 378         for_each_present_cpu(cpu) {
 379                 hpp = &smaster->thp[cpu];
 380                 if (pnode == hpp->pnode)
 381                         return cpu;
 382         }
 383         return -1;
 384 }
 385
 386 /*
 387  * Last resort when we get a large number of destination timeouts is
 388  * to clear resources held by a given cpu.
 389  * Do this with IPI so that all messages in the BAU message queue
 390  * can be identified by their nonzero swack_vec field.
 391  *
 392  * This is entered for a single cpu on the uvhub.
 393  * The sender want's this uvhub to free a specific message's
 394  * swack resources.
 395  */
 396 static void do_reset(void *ptr)
 397 {
 398         int i;
 399         struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
 400         struct reset_args *rap = (struct reset_args *)ptr;
 401         struct bau_pq_entry *msg;
 402         struct ptc_stats *stat = bcp->statp;
 403
 404         stat->d_resets++;
 405         /*
 406          * We're looking for the given sender, and
 407          * will free its swack resource.
 408          * If all cpu's finally responded after the timeout, its
 409          * message 'replied_to' was set.
 410          */
 411         for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
 412                 unsigned long msg_res;
 413                 /* do_reset: same conditions for cancellation as
 414                    bau_process_retry_msg() */
 415                 if ((msg->replied_to == 0) &&
 416                     (msg->canceled == 0) &&
 417                     (msg->sending_cpu == rap->sender) &&
 418                     (msg->swack_vec) &&
 419                     (msg->msg_type != MSG_NOOP)) {
 420                         unsigned long mmr;
 421                         unsigned long mr;
 422                         /*
 423                          * make everyone else ignore this message
 424                          */
 425                         msg->canceled = 1;
 426                         /*
 427                          * only reset the resource if it is still pending
 428                          */
 429                         mmr = ops.read_l_sw_ack();
 430                         msg_res = msg->swack_vec;
 431                         mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
 432                         if (mmr & msg_res) {
 433                                 stat->d_rcanceled++;
 434                                 ops.write_l_sw_ack(mr);
 435                         }
 436                 }
 437         }
 438         return;
 439 }
 440
 441 /*
 442  * Use IPI to get all target uvhubs to release resources held by
 443  * a given sending cpu number.
 444  */
 445 static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
 446 {
 447         int pnode;
 448         int apnode;
 449         int maskbits;
 450         int sender = bcp->cpu;
 451         cpumask_t *mask = bcp->uvhub_master->cpumask;
 452         struct bau_control *smaster = bcp->socket_master;
 453         struct reset_args reset_args;
 454
 455         reset_args.sender = sender;
 456         cpumask_clear(mask);
 457         /* find a single cpu for each uvhub in this distribution mask */
 458         maskbits = sizeof(struct pnmask) * BITSPERBYTE;
 459         /* each bit is a pnode relative to the partition base pnode */
 460         for (pnode = 0; pnode < maskbits; pnode++) {
 461                 int cpu;
 462                 if (!bau_uvhub_isset(pnode, distribution))
 463                         continue;
 464                 apnode = pnode + bcp->partition_base_pnode;
 465                 cpu = pnode_to_first_cpu(apnode, smaster);
 466                 cpumask_set_cpu(cpu, mask);
 467         }
 468
 469         /* IPI all cpus; preemption is already disabled */
 470         smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
 471         return;
 472 }
 473
 474 /*
 475  * Not to be confused with cycles_2_ns() from tsc.c; this gives a relative
 476  * number, not an absolute. It converts a duration in cycles to a duration in
 477  * ns.
 478  */
 479 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
 480 {
 481         struct cyc2ns_data *data = cyc2ns_read_begin();
 482         unsigned long long ns;
 483
 484         ns = mul_u64_u32_shr(cyc, data->cyc2ns_mul, data->cyc2ns_shift);
 485
 486         cyc2ns_read_end(data);
 487         return ns;
 488 }
 489
 490 /*
 491  * The reverse of the above; converts a duration in ns to a duration in cycles.
 492  */
 493 static inline unsigned long long ns_2_cycles(unsigned long long ns)
 494 {
 495         struct cyc2ns_data *data = cyc2ns_read_begin();
 496         unsigned long long cyc;
 497
 498         cyc = (ns << data->cyc2ns_shift) / data->cyc2ns_mul;
 499
 500         cyc2ns_read_end(data);
 501         return cyc;
 502 }
 503
 504 static inline unsigned long cycles_2_us(unsigned long long cyc)
 505 {
 506         return cycles_2_ns(cyc) / NSEC_PER_USEC;
 507 }
 508
 509 static inline cycles_t sec_2_cycles(unsigned long sec)
 510 {
 511         return ns_2_cycles(sec * NSEC_PER_SEC);
 512 }
 513
 514 static inline unsigned long long usec_2_cycles(unsigned long usec)
 515 {
 516         return ns_2_cycles(usec * NSEC_PER_USEC);
 517 }
 518
 519 /*
 520  * wait for all cpus on this hub to finish their sends and go quiet
 521  * leaves uvhub_quiesce set so that no new broadcasts are started by
 522  * bau_flush_send_and_wait()
 523  */
 524 static inline void quiesce_local_uvhub(struct bau_control *hmaster)
 525 {
 526         atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
 527 }
 528
 529 /*
 530  * mark this quiet-requestor as done
 531  */
 532 static inline void end_uvhub_quiesce(struct bau_control *hmaster)
 533 {
 534         atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
 535 }
 536
 537 static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
 538 {
 539         unsigned long descriptor_status;
 540
 541         descriptor_status = uv_read_local_mmr(mmr_offset);
 542         descriptor_status >>= right_shift;
 543         descriptor_status &= UV_ACT_STATUS_MASK;
 544         return descriptor_status;
 545 }
 546
 547 /*
 548  * Wait for completion of a broadcast software ack message
 549  * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
 550  */
 551 static int uv1_wait_completion(struct bau_desc *bau_desc,
 552                                 unsigned long mmr_offset, int right_shift,
 553                                 struct bau_control *bcp, long try)
 554 {
 555         unsigned long descriptor_status;
 556         cycles_t ttm;
 557         struct ptc_stats *stat = bcp->statp;
 558
 559         descriptor_status = uv1_read_status(mmr_offset, right_shift);
 560         /* spin on the status MMR, waiting for it to go idle */
 561         while ((descriptor_status != DS_IDLE)) {
 562                 /*
 563                  * Our software ack messages may be blocked because
 564                  * there are no swack resources available.  As long
 565                  * as none of them has timed out hardware will NACK
 566                  * our message and its state will stay IDLE.
 567                  */
 568                 if (descriptor_status == DS_SOURCE_TIMEOUT) {
 569                         stat->s_stimeout++;
 570                         return FLUSH_GIVEUP;
 571                 } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
 572                         stat->s_dtimeout++;
 573                         ttm = get_cycles();
 574
 575                         /*
 576                          * Our retries may be blocked by all destination
 577                          * swack resources being consumed, and a timeout
 578                          * pending.  In that case hardware returns the
 579                          * ERROR that looks like a destination timeout.
 580                          */
 581                         if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
 582                                 bcp->conseccompletes = 0;
 583                                 return FLUSH_RETRY_PLUGGED;
 584                         }
 585
 586                         bcp->conseccompletes = 0;
 587                         return FLUSH_RETRY_TIMEOUT;
 588                 } else {
 589                         /*
 590                          * descriptor_status is still BUSY
 591                          */
 592                         cpu_relax();
 593                 }
 594                 descriptor_status = uv1_read_status(mmr_offset, right_shift);
 595         }
 596         bcp->conseccompletes++;
 597         return FLUSH_COMPLETE;
 598 }
 599
 600 /*
 601  * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
 602  * But not currently used.
 603  */
 604 static unsigned long uv2_3_read_status(unsigned long offset, int rshft, int desc)
 605 {
 606         unsigned long descriptor_status;
 607
 608         descriptor_status =
 609                 ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
 610         return descriptor_status;
 611 }
 612
 613 /*
 614  * Return whether the status of the descriptor that is normally used for this
 615  * cpu (the one indexed by its hub-relative cpu number) is busy.
 616  * The status of the original 32 descriptors is always reflected in the 64
 617  * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
 618  * The bit provided by the activation_status_2 register is irrelevant to
 619  * the status if it is only being tested for busy or not busy.
 620  */
 621 int normal_busy(struct bau_control *bcp)
 622 {
 623         int cpu = bcp->uvhub_cpu;
 624         int mmr_offset;
 625         int right_shift;
 626
 627         mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
 628         right_shift = cpu * UV_ACT_STATUS_SIZE;
 629         return (((((read_lmmr(mmr_offset) >> right_shift) &
 630                                 UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
 631 }
 632
 633 /*
 634  * Entered when a bau descriptor has gone into a permanent busy wait because
 635  * of a hardware bug.
 636  * Workaround the bug.
 637  */
 638 int handle_uv2_busy(struct bau_control *bcp)
 639 {
 640         struct ptc_stats *stat = bcp->statp;
 641
 642         stat->s_uv2_wars++;
 643         bcp->busy = 1;
 644         return FLUSH_GIVEUP;
 645 }
 646
 647 static int uv2_3_wait_completion(struct bau_desc *bau_desc,
 648                                 unsigned long mmr_offset, int right_shift,
 649                                 struct bau_control *bcp, long try)
 650 {
 651         unsigned long descriptor_stat;
 652         cycles_t ttm;
 653         int desc = bcp->uvhub_cpu;
 654         long busy_reps = 0;
 655         struct ptc_stats *stat = bcp->statp;
 656
 657         descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
 658
 659         /* spin on the status MMR, waiting for it to go idle */
 660         while (descriptor_stat != UV2H_DESC_IDLE) {
 661                 if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
 662                         /*
 663                          * A h/w bug on the destination side may
 664                          * have prevented the message being marked
 665                          * pending, thus it doesn't get replied to
 666                          * and gets continually nacked until it times
 667                          * out with a SOURCE_TIMEOUT.
 668                          */
 669                         stat->s_stimeout++;
 670                         return FLUSH_GIVEUP;
 671                 } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
 672                         ttm = get_cycles();
 673
 674                         /*
 675                          * Our retries may be blocked by all destination
 676                          * swack resources being consumed, and a timeout
 677                          * pending.  In that case hardware returns the
 678                          * ERROR that looks like a destination timeout.
 679                          * Without using the extended status we have to
 680                          * deduce from the short time that this was a
 681                          * strong nack.
 682                          */
 683                         if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
 684                                 bcp->conseccompletes = 0;
 685                                 stat->s_plugged++;
 686                                 /* FLUSH_RETRY_PLUGGED causes hang on boot */
 687                                 return FLUSH_GIVEUP;
 688                         }
 689                         stat->s_dtimeout++;
 690                         bcp->conseccompletes = 0;
 691                         /* FLUSH_RETRY_TIMEOUT causes hang on boot */
 692                         return FLUSH_GIVEUP;
 693                 } else {
 694                         busy_reps++;
 695                         if (busy_reps > 1000000) {
 696                                 /* not to hammer on the clock */
 697                                 busy_reps = 0;
 698                                 ttm = get_cycles();
 699                                 if ((ttm - bcp->send_message) > bcp->timeout_interval)
 700                                         return handle_uv2_busy(bcp);
 701                         }
 702                         /*
 703                          * descriptor_stat is still BUSY
 704                          */
 705                         cpu_relax();
 706                 }
 707                 descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
 708         }
 709         bcp->conseccompletes++;
 710         return FLUSH_COMPLETE;
 711 }
 712
 713 /*
 714  * There are 2 status registers; each and array[32] of 2 bits. Set up for
 715  * which register to read and position in that register based on cpu in
 716  * current hub.
 717  */
 718 static int wait_completion(struct bau_desc *bau_desc, struct bau_control *bcp, long try)
 719 {
 720         int right_shift;
 721         unsigned long mmr_offset;
 722         int desc = bcp->uvhub_cpu;
 723
 724         if (desc < UV_CPUS_PER_AS) {
 725                 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
 726                 right_shift = desc * UV_ACT_STATUS_SIZE;
 727         } else {
 728                 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
 729                 right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
 730         }
 731
 732         if (bcp->uvhub_version == 1)
 733                 return uv1_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
 734         else
 735                 return uv2_3_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
 736 }
 737
 738 /*
 739  * Our retries are blocked by all destination sw ack resources being
 740  * in use, and a timeout is pending. In that case hardware immediately
 741  * returns the ERROR that looks like a destination timeout.
 742  */
 743 static void destination_plugged(struct bau_desc *bau_desc,
 744                         struct bau_control *bcp,
 745                         struct bau_control *hmaster, struct ptc_stats *stat)
 746 {
 747         udelay(bcp->plugged_delay);
 748         bcp->plugged_tries++;
 749
 750         if (bcp->plugged_tries >= bcp->plugsb4reset) {
 751                 bcp->plugged_tries = 0;
 752
 753                 quiesce_local_uvhub(hmaster);
 754
 755                 spin_lock(&hmaster->queue_lock);
 756                 reset_with_ipi(&bau_desc->distribution, bcp);
 757                 spin_unlock(&hmaster->queue_lock);
 758
 759                 end_uvhub_quiesce(hmaster);
 760
 761                 bcp->ipi_attempts++;
 762                 stat->s_resets_plug++;
 763         }
 764 }
 765
 766 static void destination_timeout(struct bau_desc *bau_desc,
 767                         struct bau_control *bcp, struct bau_control *hmaster,
 768                         struct ptc_stats *stat)
 769 {
 770         hmaster->max_concurr = 1;
 771         bcp->timeout_tries++;
 772         if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
 773                 bcp->timeout_tries = 0;
 774
 775                 quiesce_local_uvhub(hmaster);
 776
 777                 spin_lock(&hmaster->queue_lock);
 778                 reset_with_ipi(&bau_desc->distribution, bcp);
 779                 spin_unlock(&hmaster->queue_lock);
 780
 781                 end_uvhub_quiesce(hmaster);
 782
 783                 bcp->ipi_attempts++;
 784                 stat->s_resets_timeout++;
 785         }
 786 }
 787
 788 /*
 789  * Stop all cpus on a uvhub from using the BAU for a period of time.
 790  * This is reversed by check_enable.
 791  */
 792 static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
 793 {
 794         int tcpu;
 795         struct bau_control *tbcp;
 796         struct bau_control *hmaster;
 797         cycles_t tm1;
 798
 799         hmaster = bcp->uvhub_master;
 800         spin_lock(&hmaster->disable_lock);
 801         if (!bcp->baudisabled) {
 802                 stat->s_bau_disabled++;
 803                 tm1 = get_cycles();
 804                 for_each_present_cpu(tcpu) {
 805                         tbcp = &per_cpu(bau_control, tcpu);
 806                         if (tbcp->uvhub_master == hmaster) {
 807                                 tbcp->baudisabled = 1;
 808                                 tbcp->set_bau_on_time =
 809                                         tm1 + bcp->disabled_period;
 810                         }
 811                 }
 812         }
 813         spin_unlock(&hmaster->disable_lock);
 814 }
 815
 816 static void count_max_concurr(int stat, struct bau_control *bcp,
 817                                 struct bau_control *hmaster)
 818 {
 819         bcp->plugged_tries = 0;
 820         bcp->timeout_tries = 0;
 821         if (stat != FLUSH_COMPLETE)
 822                 return;
 823         if (bcp->conseccompletes <= bcp->complete_threshold)
 824                 return;
 825         if (hmaster->max_concurr >= hmaster->max_concurr_const)
 826                 return;
 827         hmaster->max_concurr++;
 828 }
 829
 830 static void record_send_stats(cycles_t time1, cycles_t time2,
 831                 struct bau_control *bcp, struct ptc_stats *stat,
 832                 int completion_status, int try)
 833 {
 834         cycles_t elapsed;
 835
 836         if (time2 > time1) {
 837                 elapsed = time2 - time1;
 838                 stat->s_time += elapsed;
 839
 840                 if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
 841                         bcp->period_requests++;
 842                         bcp->period_time += elapsed;
 843                         if ((elapsed > congested_cycles) &&
 844                             (bcp->period_requests > bcp->cong_reps) &&
 845                             ((bcp->period_time / bcp->period_requests) >
 846                                                         congested_cycles)) {
 847                                 stat->s_congested++;
 848                                 disable_for_period(bcp, stat);
 849                         }
 850                 }
 851         } else
 852                 stat->s_requestor--;
 853
 854         if (completion_status == FLUSH_COMPLETE && try > 1)
 855                 stat->s_retriesok++;
 856         else if (completion_status == FLUSH_GIVEUP) {
 857                 stat->s_giveup++;
 858                 if (get_cycles() > bcp->period_end)
 859                         bcp->period_giveups = 0;
 860                 bcp->period_giveups++;
 861                 if (bcp->period_giveups == 1)
 862                         bcp->period_end = get_cycles() + bcp->disabled_period;
 863                 if (bcp->period_giveups > bcp->giveup_limit) {
 864                         disable_for_period(bcp, stat);
 865                         stat->s_giveuplimit++;
 866                 }
 867         }
 868 }
 869
 870 /*
 871  * Because of a uv1 hardware bug only a limited number of concurrent
 872  * requests can be made.
 873  */
 874 static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
 875 {
 876         spinlock_t *lock = &hmaster->uvhub_lock;
 877         atomic_t *v;
 878
 879         v = &hmaster->active_descriptor_count;
 880         if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
 881                 stat->s_throttles++;
 882                 do {
 883                         cpu_relax();
 884                 } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
 885         }
 886 }
 887
 888 /*
 889  * Handle the completion status of a message send.
 890  */
 891 static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
 892                         struct bau_control *bcp, struct bau_control *hmaster,
 893                         struct ptc_stats *stat)
 894 {
 895         if (completion_status == FLUSH_RETRY_PLUGGED)
 896                 destination_plugged(bau_desc, bcp, hmaster, stat);
 897         else if (completion_status == FLUSH_RETRY_TIMEOUT)
 898                 destination_timeout(bau_desc, bcp, hmaster, stat);
 899 }
 900
 901 /*
 902  * Send a broadcast and wait for it to complete.
 903  *
 904  * The flush_mask contains the cpus the broadcast is to be sent to including
 905  * cpus that are on the local uvhub.
 906  *
 907  * Returns 0 if all flushing represented in the mask was done.
 908  * Returns 1 if it gives up entirely and the original cpu mask is to be
 909  * returned to the kernel.
 910  */
 911 int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
 912         struct bau_desc *bau_desc)
 913 {
 914         int seq_number = 0;
 915         int completion_stat = 0;
 916         int uv1 = 0;
 917         long try = 0;
 918         unsigned long index;
 919         cycles_t time1;
 920         cycles_t time2;
 921         struct ptc_stats *stat = bcp->statp;
 922         struct bau_control *hmaster = bcp->uvhub_master;
 923         struct uv1_bau_msg_header *uv1_hdr = NULL;
 924         struct uv2_3_bau_msg_header *uv2_3_hdr = NULL;
 925
 926         if (bcp->uvhub_version == 1) {
 927                 uv1 = 1;
 928                 uv1_throttle(hmaster, stat);
 929         }
 930
 931         while (hmaster->uvhub_quiesce)
 932                 cpu_relax();
 933
 934         time1 = get_cycles();
 935         if (uv1)
 936                 uv1_hdr = &bau_desc->header.uv1_hdr;
 937         else
 938                 /* uv2 and uv3 */
 939                 uv2_3_hdr = &bau_desc->header.uv2_3_hdr;
 940
 941         do {
 942                 if (try == 0) {
 943                         if (uv1)
 944                                 uv1_hdr->msg_type = MSG_REGULAR;
 945                         else
 946                                 uv2_3_hdr->msg_type = MSG_REGULAR;
 947                         seq_number = bcp->message_number++;
 948                 } else {
 949                         if (uv1)
 950                                 uv1_hdr->msg_type = MSG_RETRY;
 951                         else
 952                                 uv2_3_hdr->msg_type = MSG_RETRY;
 953                         stat->s_retry_messages++;
 954                 }
 955
 956                 if (uv1)
 957                         uv1_hdr->sequence = seq_number;
 958                 else
 959                         uv2_3_hdr->sequence = seq_number;
 960                 index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
 961                 bcp->send_message = get_cycles();
 962
 963                 write_mmr_activation(index);
 964
 965                 try++;
 966                 completion_stat = wait_completion(bau_desc, bcp, try);
 967
 968                 handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
 969
 970                 if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
 971                         bcp->ipi_attempts = 0;
 972                         stat->s_overipilimit++;
 973                         completion_stat = FLUSH_GIVEUP;
 974                         break;
 975                 }
 976                 cpu_relax();
 977         } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
 978                  (completion_stat == FLUSH_RETRY_TIMEOUT));
 979
 980         time2 = get_cycles();
 981
 982         count_max_concurr(completion_stat, bcp, hmaster);
 983
 984         while (hmaster->uvhub_quiesce)
 985                 cpu_relax();
 986
 987         atomic_dec(&hmaster->active_descriptor_count);
 988
 989         record_send_stats(time1, time2, bcp, stat, completion_stat, try);
 990
 991         if (completion_stat == FLUSH_GIVEUP)
 992                 /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
 993                 return 1;
 994         return 0;
 995 }
 996
 997 /*
 998  * The BAU is disabled for this uvhub. When the disabled time period has
 999  * expired re-enable it.
1000  * Return 0 if it is re-enabled for all cpus on this uvhub.
1001  */
1002 static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
1003 {
1004         int tcpu;
1005         struct bau_control *tbcp;
1006         struct bau_control *hmaster;
1007
1008         hmaster = bcp->uvhub_master;
1009         spin_lock(&hmaster->disable_lock);
1010         if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
1011                 stat->s_bau_reenabled++;
1012                 for_each_present_cpu(tcpu) {
1013                         tbcp = &per_cpu(bau_control, tcpu);
1014                         if (tbcp->uvhub_master == hmaster) {
1015                                 tbcp->baudisabled = 0;
1016                                 tbcp->period_requests = 0;
1017                                 tbcp->period_time = 0;
1018                                 tbcp->period_giveups = 0;
1019                         }
1020                 }
1021                 spin_unlock(&hmaster->disable_lock);
1022                 return 0;
1023         }
1024         spin_unlock(&hmaster->disable_lock);
1025         return -1;
1026 }
1027
1028 static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
1029                                 int remotes, struct bau_desc *bau_desc)
1030 {
1031         stat->s_requestor++;
1032         stat->s_ntargcpu += remotes + locals;
1033         stat->s_ntargremotes += remotes;
1034         stat->s_ntarglocals += locals;
1035
1036         /* uvhub statistics */
1037         hubs = bau_uvhub_weight(&bau_desc->distribution);
1038         if (locals) {
1039                 stat->s_ntarglocaluvhub++;
1040                 stat->s_ntargremoteuvhub += (hubs - 1);
1041         } else
1042                 stat->s_ntargremoteuvhub += hubs;
1043
1044         stat->s_ntarguvhub += hubs;
1045
1046         if (hubs >= 16)
1047                 stat->s_ntarguvhub16++;
1048         else if (hubs >= 8)
1049                 stat->s_ntarguvhub8++;
1050         else if (hubs >= 4)
1051                 stat->s_ntarguvhub4++;
1052         else if (hubs >= 2)
1053                 stat->s_ntarguvhub2++;
1054         else
1055                 stat->s_ntarguvhub1++;
1056 }
1057
1058 /*
1059  * Translate a cpu mask to the uvhub distribution mask in the BAU
1060  * activation descriptor.
1061  */
1062 static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
1063                         struct bau_desc *bau_desc, int *localsp, int *remotesp)
1064 {
1065         int cpu;
1066         int pnode;
1067         int cnt = 0;
1068         struct hub_and_pnode *hpp;
1069
1070         for_each_cpu(cpu, flush_mask) {
1071                 /*
1072                  * The distribution vector is a bit map of pnodes, relative
1073                  * to the partition base pnode (and the partition base nasid
1074                  * in the header).
1075                  * Translate cpu to pnode and hub using a local memory array.
1076                  */
1077                 hpp = &bcp->socket_master->thp[cpu];
1078                 pnode = hpp->pnode - bcp->partition_base_pnode;
1079                 bau_uvhub_set(pnode, &bau_desc->distribution);
1080                 cnt++;
1081                 if (hpp->uvhub == bcp->uvhub)
1082                         (*localsp)++;
1083                 else
1084                         (*remotesp)++;
1085         }
1086         if (!cnt)
1087                 return 1;
1088         return 0;
1089 }
1090
1091 /*
1092  * globally purge translation cache of a virtual address or all TLB's
1093  * @cpumask: mask of all cpu's in which the address is to be removed
1094  * @mm: mm_struct containing virtual address range
1095  * @start: start virtual address to be removed from TLB
1096  * @end: end virtual address to be remove from TLB
1097  * @cpu: the current cpu
1098  *
1099  * This is the entry point for initiating any UV global TLB shootdown.
1100  *
1101  * Purges the translation caches of all specified processors of the given
1102  * virtual address, or purges all TLB's on specified processors.
1103  *
1104  * The caller has derived the cpumask from the mm_struct.  This function
1105  * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
1106  *
1107  * The cpumask is converted into a uvhubmask of the uvhubs containing
1108  * those cpus.
1109  *
1110  * Note that this function should be called with preemption disabled.
1111  *
1112  * Returns NULL if all remote flushing was done.
1113  * Returns pointer to cpumask if some remote flushing remains to be
1114  * done.  The returned pointer is valid till preemption is re-enabled.
1115  */
1116 const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
1117                                                 struct mm_struct *mm,
1118                                                 unsigned long start,
1119                                                 unsigned long end,
1120                                                 unsigned int cpu)
1121 {
1122         int locals = 0;
1123         int remotes = 0;
1124         int hubs = 0;
1125         struct bau_desc *bau_desc;
1126         struct cpumask *flush_mask;
1127         struct ptc_stats *stat;
1128         struct bau_control *bcp;
1129         unsigned long descriptor_status;
1130         unsigned long status;
1131
1132         bcp = &per_cpu(bau_control, cpu);
1133
1134         if (bcp->nobau)
1135                 return cpumask;
1136
1137         stat = bcp->statp;
1138         stat->s_enters++;
1139
1140         if (bcp->busy) {
1141                 descriptor_status =
1142                         read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
1143                 status = ((descriptor_status >> (bcp->uvhub_cpu *
1144                         UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
1145                 if (status == UV2H_DESC_BUSY)
1146                         return cpumask;
1147                 bcp->busy = 0;
1148         }
1149
1150         /* bau was disabled due to slow response */
1151         if (bcp->baudisabled) {
1152                 if (check_enable(bcp, stat)) {
1153                         stat->s_ipifordisabled++;
1154                         return cpumask;
1155                 }
1156         }
1157
1158         /*
1159          * Each sending cpu has a per-cpu mask which it fills from the caller's
1160          * cpu mask.  All cpus are converted to uvhubs and copied to the
1161          * activation descriptor.
1162          */
1163         flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
1164         /* don't actually do a shootdown of the local cpu */
1165         cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
1166
1167         if (cpumask_test_cpu(cpu, cpumask))
1168                 stat->s_ntargself++;
1169
1170         bau_desc = bcp->descriptor_base;
1171         bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
1172         bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
1173         if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
1174                 return NULL;
1175
1176         record_send_statistics(stat, locals, hubs, remotes, bau_desc);
1177
1178         if (!end || (end - start) <= PAGE_SIZE)
1179                 bau_desc->payload.address = start;
1180         else
1181                 bau_desc->payload.address = TLB_FLUSH_ALL;
1182         bau_desc->payload.sending_cpu = cpu;
1183         /*
1184          * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
1185          * or 1 if it gave up and the original cpumask should be returned.
1186          */
1187         if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
1188                 return NULL;
1189         else
1190                 return cpumask;
1191 }
1192
1193 /*
1194  * Search the message queue for any 'other' unprocessed message with the
1195  * same software acknowledge resource bit vector as the 'msg' message.
1196  */
1197 struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
1198                                            struct bau_control *bcp)
1199 {
1200         struct bau_pq_entry *msg_next = msg + 1;
1201         unsigned char swack_vec = msg->swack_vec;
1202
1203         if (msg_next > bcp->queue_last)
1204                 msg_next = bcp->queue_first;
1205         while (msg_next != msg) {
1206                 if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
1207                                 (msg_next->swack_vec == swack_vec))
1208                         return msg_next;
1209                 msg_next++;
1210                 if (msg_next > bcp->queue_last)
1211                         msg_next = bcp->queue_first;
1212         }
1213         return NULL;
1214 }
1215
1216 /*
1217  * UV2 needs to work around a bug in which an arriving message has not
1218  * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
1219  * Such a message must be ignored.
1220  */
1221 void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
1222 {
1223         unsigned long mmr_image;
1224         unsigned char swack_vec;
1225         struct bau_pq_entry *msg = mdp->msg;
1226         struct bau_pq_entry *other_msg;
1227
1228         mmr_image = ops.read_l_sw_ack();
1229         swack_vec = msg->swack_vec;
1230
1231         if ((swack_vec & mmr_image) == 0) {
1232                 /*
1233                  * This message was assigned a swack resource, but no
1234                  * reserved acknowlegment is pending.
1235                  * The bug has prevented this message from setting the MMR.
1236                  */
1237                 /*
1238                  * Some message has set the MMR 'pending' bit; it might have
1239                  * been another message.  Look for that message.
1240                  */
1241                 other_msg = find_another_by_swack(msg, bcp);
1242                 if (other_msg) {
1243                         /*
1244                          * There is another. Process this one but do not
1245                          * ack it.
1246                          */
1247                         bau_process_message(mdp, bcp, 0);
1248                         /*
1249                          * Let the natural processing of that other message
1250                          * acknowledge it. Don't get the processing of sw_ack's
1251                          * out of order.
1252                          */
1253                         return;
1254                 }
1255         }
1256
1257         /*
1258          * Either the MMR shows this one pending a reply or there is no
1259          * other message using this sw_ack, so it is safe to acknowledge it.
1260          */
1261         bau_process_message(mdp, bcp, 1);
1262
1263         return;
1264 }
1265
1266 /*
1267  * The BAU message interrupt comes here. (registered by set_intr_gate)
1268  * See entry_64.S
1269  *
1270  * We received a broadcast assist message.
1271  *
1272  * Interrupts are disabled; this interrupt could represent
1273  * the receipt of several messages.
1274  *
1275  * All cores/threads on this hub get this interrupt.
1276  * The last one to see it does the software ack.
1277  * (the resource will not be freed until noninterruptable cpus see this
1278  *  interrupt; hardware may timeout the s/w ack and reply ERROR)
1279  */
1280 void uv_bau_message_interrupt(struct pt_regs *regs)
1281 {
1282         int count = 0;
1283         cycles_t time_start;
1284         struct bau_pq_entry *msg;
1285         struct bau_control *bcp;
1286         struct ptc_stats *stat;
1287         struct msg_desc msgdesc;
1288
1289         ack_APIC_irq();
1290         time_start = get_cycles();
1291
1292         bcp = &per_cpu(bau_control, smp_processor_id());
1293         stat = bcp->statp;
1294
1295         msgdesc.queue_first = bcp->queue_first;
1296         msgdesc.queue_last = bcp->queue_last;
1297
1298         msg = bcp->bau_msg_head;
1299         while (msg->swack_vec) {
1300                 count++;
1301
1302                 msgdesc.msg_slot = msg - msgdesc.queue_first;
1303                 msgdesc.msg = msg;
1304                 if (bcp->uvhub_version == 2)
1305                         process_uv2_message(&msgdesc, bcp);
1306                 else
1307                         /* no error workaround for uv1 or uv3 */
1308                         bau_process_message(&msgdesc, bcp, 1);
1309
1310                 msg++;
1311                 if (msg > msgdesc.queue_last)
1312                         msg = msgdesc.queue_first;
1313                 bcp->bau_msg_head = msg;
1314         }
1315         stat->d_time += (get_cycles() - time_start);
1316         if (!count)
1317                 stat->d_nomsg++;
1318         else if (count > 1)
1319                 stat->d_multmsg++;
1320 }
1321
1322 /*
1323  * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
1324  * shootdown message timeouts enabled.  The timeout does not cause
1325  * an interrupt, but causes an error message to be returned to
1326  * the sender.
1327  */
1328 static void __init enable_timeouts(void)
1329 {
1330         int uvhub;
1331         int nuvhubs;
1332         int pnode;
1333         unsigned long mmr_image;
1334
1335         nuvhubs = uv_num_possible_blades();
1336
1337         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
1338                 if (!uv_blade_nr_possible_cpus(uvhub))
1339                         continue;
1340
1341                 pnode = uv_blade_to_pnode(uvhub);
1342                 mmr_image = read_mmr_misc_control(pnode);
1343                 /*
1344                  * Set the timeout period and then lock it in, in three
1345                  * steps; captures and locks in the period.
1346                  *
1347                  * To program the period, the SOFT_ACK_MODE must be off.
1348                  */
1349                 mmr_image &= ~(1L << SOFTACK_MSHIFT);
1350                 write_mmr_misc_control(pnode, mmr_image);
1351                 /*
1352                  * Set the 4-bit period.
1353                  */
1354                 mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
1355                 mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
1356                 write_mmr_misc_control(pnode, mmr_image);
1357                 /*
1358                  * UV1:
1359                  * Subsequent reversals of the timebase bit (3) cause an
1360                  * immediate timeout of one or all INTD resources as
1361                  * indicated in bits 2:0 (7 causes all of them to timeout).
1362                  */
1363                 mmr_image |= (1L << SOFTACK_MSHIFT);
1364                 if (is_uv2_hub()) {
1365                         /* do not touch the legacy mode bit */
1366                         /* hw bug workaround; do not use extended status */
1367                         mmr_image &= ~(1L << UV2_EXT_SHFT);
1368                 } else if (is_uv3_hub()) {
1369                         mmr_image &= ~(1L << PREFETCH_HINT_SHFT);
1370                         mmr_image |= (1L << SB_STATUS_SHFT);
1371                 }
1372                 write_mmr_misc_control(pnode, mmr_image);
1373         }
1374 }
1375
1376 static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
1377 {
1378         if (*offset < num_possible_cpus())
1379                 return offset;
1380         return NULL;
1381 }
1382
1383 static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1384 {
1385         (*offset)++;
1386         if (*offset < num_possible_cpus())
1387                 return offset;
1388         return NULL;
1389 }
1390
1391 static void ptc_seq_stop(struct seq_file *file, void *data)
1392 {
1393 }
1394
1395 /*
1396  * Display the statistics thru /proc/sgi_uv/ptc_statistics
1397  * 'data' points to the cpu number
1398  * Note: see the descriptions in stat_description[].
1399  */
1400 static int ptc_seq_show(struct seq_file *file, void *data)
1401 {
1402         struct ptc_stats *stat;
1403         struct bau_control *bcp;
1404         int cpu;
1405
1406         cpu = *(loff_t *)data;
1407         if (!cpu) {
1408                 seq_puts(file,
1409                          "# cpu bauoff sent stime self locals remotes ncpus localhub ");
1410                 seq_puts(file, "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
1411                 seq_puts(file,
1412                          "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
1413                 seq_puts(file,
1414                          "rok resetp resett giveup sto bz throt disable ");
1415                 seq_puts(file,
1416                          "enable wars warshw warwaits enters ipidis plugged ");
1417                 seq_puts(file,
1418                          "ipiover glim cong swack recv rtime all one mult ");
1419                 seq_puts(file, "none retry canc nocan reset rcan\n");
1420         }
1421         if (cpu < num_possible_cpus() && cpu_online(cpu)) {
1422                 bcp = &per_cpu(bau_control, cpu);
1423                 if (bcp->nobau) {
1424                         seq_printf(file, "cpu %d bau disabled\n", cpu);
1425                         return 0;
1426                 }
1427                 stat = bcp->statp;
1428                 /* source side statistics */
1429                 seq_printf(file,
1430                         "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1431                            cpu, bcp->nobau, stat->s_requestor,
1432                            cycles_2_us(stat->s_time),
1433                            stat->s_ntargself, stat->s_ntarglocals,
1434                            stat->s_ntargremotes, stat->s_ntargcpu,
1435                            stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
1436                            stat->s_ntarguvhub, stat->s_ntarguvhub16);
1437                 seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
1438                            stat->s_ntarguvhub8, stat->s_ntarguvhub4,
1439                            stat->s_ntarguvhub2, stat->s_ntarguvhub1,
1440                            stat->s_dtimeout, stat->s_strongnacks);
1441                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
1442                            stat->s_retry_messages, stat->s_retriesok,
1443                            stat->s_resets_plug, stat->s_resets_timeout,
1444                            stat->s_giveup, stat->s_stimeout,
1445                            stat->s_busy, stat->s_throttles);
1446                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1447                            stat->s_bau_disabled, stat->s_bau_reenabled,
1448                            stat->s_uv2_wars, stat->s_uv2_wars_hw,
1449                            stat->s_uv2_war_waits, stat->s_enters,
1450                            stat->s_ipifordisabled, stat->s_plugged,
1451                            stat->s_overipilimit, stat->s_giveuplimit,
1452                            stat->s_congested);
1453
1454                 /* destination side statistics */
1455                 seq_printf(file,
1456                         "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
1457                            ops.read_g_sw_ack(uv_cpu_to_pnode(cpu)),
1458                            stat->d_requestee, cycles_2_us(stat->d_time),
1459                            stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
1460                            stat->d_nomsg, stat->d_retries, stat->d_canceled,
1461                            stat->d_nocanceled, stat->d_resets,
1462                            stat->d_rcanceled);
1463         }
1464         return 0;
1465 }
1466
1467 /*
1468  * Display the tunables thru debugfs
1469  */
1470 static ssize_t tunables_read(struct file *file, char __user *userbuf,
1471                                 size_t count, loff_t *ppos)
1472 {
1473         char *buf;
1474         int ret;
1475
1476         buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
1477                 "max_concur plugged_delay plugsb4reset timeoutsb4reset",
1478                 "ipi_reset_limit complete_threshold congested_response_us",
1479                 "congested_reps disabled_period giveup_limit",
1480                 max_concurr, plugged_delay, plugsb4reset,
1481                 timeoutsb4reset, ipi_reset_limit, complete_threshold,
1482                 congested_respns_us, congested_reps, disabled_period,
1483                 giveup_limit);
1484
1485         if (!buf)
1486                 return -ENOMEM;
1487
1488         ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
1489         kfree(buf);
1490         return ret;
1491 }
1492
1493 /*
1494  * handle a write to /proc/sgi_uv/ptc_statistics
1495  * -1: reset the statistics
1496  *  0: display meaning of the statistics
1497  */
1498 static ssize_t ptc_proc_write(struct file *file, const char __user *user,
1499                                 size_t count, loff_t *data)
1500 {
1501         int cpu;
1502         int i;
1503         int elements;
1504         long input_arg;
1505         char optstr[64];
1506         struct ptc_stats *stat;
1507
1508         if (count == 0 || count > sizeof(optstr))
1509                 return -EINVAL;
1510         if (copy_from_user(optstr, user, count))
1511                 return -EFAULT;
1512         optstr[count - 1] = '\0';
1513
1514         if (!strcmp(optstr, "on")) {
1515                 set_bau_on();
1516                 return count;
1517         } else if (!strcmp(optstr, "off")) {
1518                 set_bau_off();
1519                 return count;
1520         }
1521
1522         if (kstrtol(optstr, 10, &input_arg) < 0) {
1523                 pr_debug("%s is invalid\n", optstr);
1524                 return -EINVAL;
1525         }
1526
1527         if (input_arg == 0) {
1528                 elements = ARRAY_SIZE(stat_description);
1529                 pr_debug("# cpu:      cpu number\n");
1530                 pr_debug("Sender statistics:\n");
1531                 for (i = 0; i < elements; i++)
1532                         pr_debug("%s\n", stat_description[i]);
1533         } else if (input_arg == -1) {
1534                 for_each_present_cpu(cpu) {
1535                         stat = &per_cpu(ptcstats, cpu);
1536                         memset(stat, 0, sizeof(struct ptc_stats));
1537                 }
1538         }
1539
1540         return count;
1541 }
1542
1543 static int local_atoi(const char *name)
1544 {
1545         int val = 0;
1546
1547         for (;; name++) {
1548                 switch (*name) {
1549                 case '0' ... '9':
1550                         val = 10*val+(*name-'0');
1551                         break;
1552                 default:
1553                         return val;
1554                 }
1555         }
1556 }
1557
1558 /*
1559  * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
1560  * Zero values reset them to defaults.
1561  */
1562 static int parse_tunables_write(struct bau_control *bcp, char *instr,
1563                                 int count)
1564 {
1565         char *p;
1566         char *q;
1567         int cnt = 0;
1568         int val;
1569         int e = ARRAY_SIZE(tunables);
1570
1571         p = instr + strspn(instr, WHITESPACE);
1572         q = p;
1573         for (; *p; p = q + strspn(q, WHITESPACE)) {
1574                 q = p + strcspn(p, WHITESPACE);
1575                 cnt++;
1576                 if (q == p)
1577                         break;
1578         }
1579         if (cnt != e) {
1580                 pr_info("bau tunable error: should be %d values\n", e);
1581                 return -EINVAL;
1582         }
1583
1584         p = instr + strspn(instr, WHITESPACE);
1585         q = p;
1586         for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
1587                 q = p + strcspn(p, WHITESPACE);
1588                 val = local_atoi(p);
1589                 switch (cnt) {
1590                 case 0:
1591                         if (val == 0) {
1592                                 max_concurr = MAX_BAU_CONCURRENT;
1593                                 max_concurr_const = MAX_BAU_CONCURRENT;
1594                                 continue;
1595                         }
1596                         if (val < 1 || val > bcp->cpus_in_uvhub) {
1597                                 pr_debug(
1598                                 "Error: BAU max concurrent %d is invalid\n",
1599                                 val);
1600                                 return -EINVAL;
1601                         }
1602                         max_concurr = val;
1603                         max_concurr_const = val;
1604                         continue;
1605                 default:
1606                         if (val == 0)
1607                                 *tunables[cnt].tunp = tunables[cnt].deflt;
1608                         else
1609                                 *tunables[cnt].tunp = val;
1610                         continue;
1611                 }
1612                 if (q == p)
1613                         break;
1614         }
1615         return 0;
1616 }
1617
1618 /*
1619  * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
1620  */
1621 static ssize_t tunables_write(struct file *file, const char __user *user,
1622                                 size_t count, loff_t *data)
1623 {
1624         int cpu;
1625         int ret;
1626         char instr[100];
1627         struct bau_control *bcp;
1628
1629         if (count == 0 || count > sizeof(instr)-1)
1630                 return -EINVAL;
1631         if (copy_from_user(instr, user, count))
1632                 return -EFAULT;
1633
1634         instr[count] = '\0';
1635
1636         cpu = get_cpu();
1637         bcp = &per_cpu(bau_control, cpu);
1638         ret = parse_tunables_write(bcp, instr, count);
1639         put_cpu();
1640         if (ret)
1641                 return ret;
1642
1643         for_each_present_cpu(cpu) {
1644                 bcp = &per_cpu(bau_control, cpu);
1645                 bcp->max_concurr         = max_concurr;
1646                 bcp->max_concurr_const   = max_concurr;
1647                 bcp->plugged_delay       = plugged_delay;
1648                 bcp->plugsb4reset        = plugsb4reset;
1649                 bcp->timeoutsb4reset     = timeoutsb4reset;
1650                 bcp->ipi_reset_limit     = ipi_reset_limit;
1651                 bcp->complete_threshold  = complete_threshold;
1652                 bcp->cong_response_us    = congested_respns_us;
1653                 bcp->cong_reps           = congested_reps;
1654                 bcp->disabled_period     = sec_2_cycles(disabled_period);
1655                 bcp->giveup_limit        = giveup_limit;
1656         }
1657         return count;
1658 }
1659
1660 static const struct seq_operations uv_ptc_seq_ops = {
1661         .start          = ptc_seq_start,
1662         .next           = ptc_seq_next,
1663         .stop           = ptc_seq_stop,
1664         .show           = ptc_seq_show
1665 };
1666
1667 static int ptc_proc_open(struct inode *inode, struct file *file)
1668 {
1669         return seq_open(file, &uv_ptc_seq_ops);
1670 }
1671
1672 static int tunables_open(struct inode *inode, struct file *file)
1673 {
1674         return 0;
1675 }
1676
1677 static const struct file_operations proc_uv_ptc_operations = {
1678         .open           = ptc_proc_open,
1679         .read           = seq_read,
1680         .write          = ptc_proc_write,
1681         .llseek         = seq_lseek,
1682         .release        = seq_release,
1683 };
1684
1685 static const struct file_operations tunables_fops = {
1686         .open           = tunables_open,
1687         .read           = tunables_read,
1688         .write          = tunables_write,
1689         .llseek         = default_llseek,
1690 };
1691
1692 static int __init uv_ptc_init(void)
1693 {
1694         struct proc_dir_entry *proc_uv_ptc;
1695
1696         if (!is_uv_system())
1697                 return 0;
1698
1699         proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1700                                   &proc_uv_ptc_operations);
1701         if (!proc_uv_ptc) {
1702                 pr_err("unable to create %s proc entry\n",
1703                        UV_PTC_BASENAME);
1704                 return -EINVAL;
1705         }
1706
1707         tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
1708         if (!tunables_dir) {
1709                 pr_err("unable to create debugfs directory %s\n",
1710                        UV_BAU_TUNABLES_DIR);
1711                 return -EINVAL;
1712         }
1713         tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
1714                                         tunables_dir, NULL, &tunables_fops);
1715         if (!tunables_file) {
1716                 pr_err("unable to create debugfs file %s\n",
1717                        UV_BAU_TUNABLES_FILE);
1718                 return -EINVAL;
1719         }
1720         return 0;
1721 }
1722
1723 /*
1724  * Initialize the sending side's sending buffers.
1725  */
1726 static void activation_descriptor_init(int node, int pnode, int base_pnode)
1727 {
1728         int i;
1729         int cpu;
1730         int uv1 = 0;
1731         unsigned long gpa;
1732         unsigned long m;
1733         unsigned long n;
1734         size_t dsize;
1735         struct bau_desc *bau_desc;
1736         struct bau_desc *bd2;
1737         struct uv1_bau_msg_header *uv1_hdr;
1738         struct uv2_3_bau_msg_header *uv2_3_hdr;
1739         struct bau_control *bcp;
1740
1741         /*
1742          * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
1743          * per cpu; and one per cpu on the uvhub (ADP_SZ)
1744          */
1745         dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
1746         bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
1747         BUG_ON(!bau_desc);
1748
1749         gpa = uv_gpa(bau_desc);
1750         n = uv_gpa_to_gnode(gpa);
1751         m = ops.bau_gpa_to_offset(gpa);
1752         if (is_uv1_hub())
1753                 uv1 = 1;
1754
1755         /* the 14-bit pnode */
1756         write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
1757         /*
1758          * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
1759          * cpu even though we only use the first one; one descriptor can
1760          * describe a broadcast to 256 uv hubs.
1761          */
1762         for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
1763                 memset(bd2, 0, sizeof(struct bau_desc));
1764                 if (uv1) {
1765                         uv1_hdr = &bd2->header.uv1_hdr;
1766                         uv1_hdr->swack_flag = 1;
1767                         /*
1768                          * The base_dest_nasid set in the message header
1769                          * is the nasid of the first uvhub in the partition.
1770                          * The bit map will indicate destination pnode numbers
1771                          * relative to that base. They may not be consecutive
1772                          * if nasid striding is being used.
1773                          */
1774                         uv1_hdr->base_dest_nasid =
1775                                                   UV_PNODE_TO_NASID(base_pnode);
1776                         uv1_hdr->dest_subnodeid  = UV_LB_SUBNODEID;
1777                         uv1_hdr->command         = UV_NET_ENDPOINT_INTD;
1778                         uv1_hdr->int_both        = 1;
1779                         /*
1780                          * all others need to be set to zero:
1781                          *   fairness chaining multilevel count replied_to
1782                          */
1783                 } else {
1784                         /*
1785                          * BIOS uses legacy mode, but uv2 and uv3 hardware always
1786                          * uses native mode for selective broadcasts.
1787                          */
1788                         uv2_3_hdr = &bd2->header.uv2_3_hdr;
1789                         uv2_3_hdr->swack_flag      = 1;
1790                         uv2_3_hdr->base_dest_nasid =
1791                                                   UV_PNODE_TO_NASID(base_pnode);
1792                         uv2_3_hdr->dest_subnodeid  = UV_LB_SUBNODEID;
1793                         uv2_3_hdr->command         = UV_NET_ENDPOINT_INTD;
1794                 }
1795         }
1796         for_each_present_cpu(cpu) {
1797                 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1798                         continue;
1799                 bcp = &per_cpu(bau_control, cpu);
1800                 bcp->descriptor_base = bau_desc;
1801         }
1802 }
1803
1804 /*
1805  * initialize the destination side's receiving buffers
1806  * entered for each uvhub in the partition
1807  * - node is first node (kernel memory notion) on the uvhub
1808  * - pnode is the uvhub's physical identifier
1809  */
1810 static void pq_init(int node, int pnode)
1811 {
1812         int cpu;
1813         size_t plsize;
1814         char *cp;
1815         void *vp;
1816         unsigned long gnode, first, last, tail;
1817         struct bau_pq_entry *pqp;
1818         struct bau_control *bcp;
1819
1820         plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
1821         vp = kmalloc_node(plsize, GFP_KERNEL, node);
1822         pqp = (struct bau_pq_entry *)vp;
1823         BUG_ON(!pqp);
1824
1825         cp = (char *)pqp + 31;
1826         pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
1827
1828         for_each_present_cpu(cpu) {
1829                 if (pnode != uv_cpu_to_pnode(cpu))
1830                         continue;
1831                 /* for every cpu on this pnode: */
1832                 bcp = &per_cpu(bau_control, cpu);
1833                 bcp->queue_first        = pqp;
1834                 bcp->bau_msg_head       = pqp;
1835                 bcp->queue_last         = pqp + (DEST_Q_SIZE - 1);
1836         }
1837
1838         first = ops.bau_gpa_to_offset(uv_gpa(pqp));
1839         last = ops.bau_gpa_to_offset(uv_gpa(pqp + (DEST_Q_SIZE - 1)));
1840
1841         /*
1842          * Pre UV4, the gnode is required to locate the payload queue
1843          * and the payload queue tail must be maintained by the kernel.
1844          */
1845         bcp = &per_cpu(bau_control, smp_processor_id());
1846         if (bcp->uvhub_version <= 3) {
1847                 tail = first;
1848                 gnode = uv_gpa_to_gnode(uv_gpa(pqp));
1849                 first = (gnode << UV_PAYLOADQ_GNODE_SHIFT) | tail;
1850                 write_mmr_payload_tail(pnode, tail);
1851         }
1852
1853         ops.write_payload_first(pnode, first);
1854         ops.write_payload_last(pnode, last);
1855         ops.write_g_sw_ack(pnode, 0xffffUL);
1856
1857         /* in effect, all msg_type's are set to MSG_NOOP */
1858         memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
1859 }
1860
1861 /*
1862  * Initialization of each UV hub's structures
1863  */
1864 static void __init init_uvhub(int uvhub, int vector, int base_pnode)
1865 {
1866         int node;
1867         int pnode;
1868         unsigned long apicid;
1869
1870         node = uvhub_to_first_node(uvhub);
1871         pnode = uv_blade_to_pnode(uvhub);
1872
1873         activation_descriptor_init(node, pnode, base_pnode);
1874
1875         pq_init(node, pnode);
1876         /*
1877          * The below initialization can't be in firmware because the
1878          * messaging IRQ will be determined by the OS.
1879          */
1880         apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
1881         write_mmr_data_config(pnode, ((apicid << 32) | vector));
1882 }
1883
1884 /*
1885  * We will set BAU_MISC_CONTROL with a timeout period.
1886  * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1887  * So the destination timeout period has to be calculated from them.
1888  */
1889 static int calculate_destination_timeout(void)
1890 {
1891         unsigned long mmr_image;
1892         int mult1;
1893         int mult2;
1894         int index;
1895         int base;
1896         int ret;
1897         unsigned long ts_ns;
1898
1899         if (is_uv1_hub()) {
1900                 mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
1901                 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1902                 index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1903                 mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
1904                 mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
1905                 ts_ns = timeout_base_ns[index];
1906                 ts_ns *= (mult1 * mult2);
1907                 ret = ts_ns / 1000;
1908         } else {
1909                 /* same destination timeout for uv2 and uv3 */
1910                 /* 4 bits  0/1 for 10/80us base, 3 bits of multiplier */
1911                 mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
1912                 mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
1913                 if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
1914                         base = 80;
1915                 else
1916                         base = 10;
1917                 mult1 = mmr_image & UV2_ACK_MASK;
1918                 ret = mult1 * base;
1919         }
1920         return ret;
1921 }
1922
1923 static void __init init_per_cpu_tunables(void)
1924 {
1925         int cpu;
1926         struct bau_control *bcp;
1927
1928         for_each_present_cpu(cpu) {
1929                 bcp = &per_cpu(bau_control, cpu);
1930                 bcp->baudisabled                = 0;
1931                 if (nobau)
1932                         bcp->nobau              = true;
1933                 bcp->statp                      = &per_cpu(ptcstats, cpu);
1934                 /* time interval to catch a hardware stay-busy bug */
1935                 bcp->timeout_interval           = usec_2_cycles(2*timeout_us);
1936                 bcp->max_concurr                = max_concurr;
1937                 bcp->max_concurr_const          = max_concurr;
1938                 bcp->plugged_delay              = plugged_delay;
1939                 bcp->plugsb4reset               = plugsb4reset;
1940                 bcp->timeoutsb4reset            = timeoutsb4reset;
1941                 bcp->ipi_reset_limit            = ipi_reset_limit;
1942                 bcp->complete_threshold         = complete_threshold;
1943                 bcp->cong_response_us           = congested_respns_us;
1944                 bcp->cong_reps                  = congested_reps;
1945                 bcp->disabled_period            = sec_2_cycles(disabled_period);
1946                 bcp->giveup_limit               = giveup_limit;
1947                 spin_lock_init(&bcp->queue_lock);
1948                 spin_lock_init(&bcp->uvhub_lock);
1949                 spin_lock_init(&bcp->disable_lock);
1950         }
1951 }
1952
1953 /*
1954  * Scan all cpus to collect blade and socket summaries.
1955  */
1956 static int __init get_cpu_topology(int base_pnode,
1957                                         struct uvhub_desc *uvhub_descs,
1958                                         unsigned char *uvhub_mask)
1959 {
1960         int cpu;
1961         int pnode;
1962         int uvhub;
1963         int socket;
1964         struct bau_control *bcp;
1965         struct uvhub_desc *bdp;
1966         struct socket_desc *sdp;
1967
1968         for_each_present_cpu(cpu) {
1969                 bcp = &per_cpu(bau_control, cpu);
1970
1971                 memset(bcp, 0, sizeof(struct bau_control));
1972
1973                 pnode = uv_cpu_hub_info(cpu)->pnode;
1974                 if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
1975                         pr_emerg(
1976                                 "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
1977                                 cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
1978                         return 1;
1979                 }
1980
1981                 bcp->osnode = cpu_to_node(cpu);
1982                 bcp->partition_base_pnode = base_pnode;
1983
1984                 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1985                 *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
1986                 bdp = &uvhub_descs[uvhub];
1987
1988                 bdp->num_cpus++;
1989                 bdp->uvhub = uvhub;
1990                 bdp->pnode = pnode;
1991
1992                 /* kludge: 'assuming' one node per socket, and assuming that
1993                    disabling a socket just leaves a gap in node numbers */
1994                 socket = bcp->osnode & 1;
1995                 bdp->socket_mask |= (1 << socket);
1996                 sdp = &bdp->socket[socket];
1997                 sdp->cpu_number[sdp->num_cpus] = cpu;
1998                 sdp->num_cpus++;
1999                 if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
2000                         pr_emerg("%d cpus per socket invalid\n",
2001                                 sdp->num_cpus);
2002                         return 1;
2003                 }
2004         }
2005         return 0;
2006 }
2007
2008 /*
2009  * Each socket is to get a local array of pnodes/hubs.
2010  */
2011 static void make_per_cpu_thp(struct bau_control *smaster)
2012 {
2013         int cpu;
2014         size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
2015
2016         smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
2017         memset(smaster->thp, 0, hpsz);
2018         for_each_present_cpu(cpu) {
2019                 smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
2020                 smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
2021         }
2022 }
2023
2024 /*
2025  * Each uvhub is to get a local cpumask.
2026  */
2027 static void make_per_hub_cpumask(struct bau_control *hmaster)
2028 {
2029         int sz = sizeof(cpumask_t);
2030
2031         hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
2032 }
2033
2034 /*
2035  * Initialize all the per_cpu information for the cpu's on a given socket,
2036  * given what has been gathered into the socket_desc struct.
2037  * And reports the chosen hub and socket masters back to the caller.
2038  */
2039 static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
2040                         struct bau_control **smasterp,
2041                         struct bau_control **hmasterp)
2042 {
2043         int i;
2044         int cpu;
2045         struct bau_control *bcp;
2046
2047         for (i = 0; i < sdp->num_cpus; i++) {
2048                 cpu = sdp->cpu_number[i];
2049                 bcp = &per_cpu(bau_control, cpu);
2050                 bcp->cpu = cpu;
2051                 if (i == 0) {
2052                         *smasterp = bcp;
2053                         if (!(*hmasterp))
2054                                 *hmasterp = bcp;
2055                 }
2056                 bcp->cpus_in_uvhub = bdp->num_cpus;
2057                 bcp->cpus_in_socket = sdp->num_cpus;
2058                 bcp->socket_master = *smasterp;
2059                 bcp->uvhub = bdp->uvhub;
2060                 if (is_uv1_hub())
2061                         bcp->uvhub_version = 1;
2062                 else if (is_uv2_hub())
2063                         bcp->uvhub_version = 2;
2064                 else if (is_uv3_hub())
2065                         bcp->uvhub_version = 3;
2066                 else if (is_uv4_hub())
2067                         bcp->uvhub_version = 4;
2068                 else {
2069                         pr_emerg("uvhub version not 1, 2, 3, or 4\n");
2070                         return 1;
2071                 }
2072                 bcp->uvhub_master = *hmasterp;
2073                 bcp->uvhub_cpu = uv_cpu_blade_processor_id(cpu);
2074
2075                 if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
2076                         pr_emerg("%d cpus per uvhub invalid\n",
2077                                 bcp->uvhub_cpu);
2078                         return 1;
2079                 }
2080         }
2081         return 0;
2082 }
2083
2084 /*
2085  * Summarize the blade and socket topology into the per_cpu structures.
2086  */
2087 static int __init summarize_uvhub_sockets(int nuvhubs,
2088                         struct uvhub_desc *uvhub_descs,
2089                         unsigned char *uvhub_mask)
2090 {
2091         int socket;
2092         int uvhub;
2093         unsigned short socket_mask;
2094
2095         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2096                 struct uvhub_desc *bdp;
2097                 struct bau_control *smaster = NULL;
2098                 struct bau_control *hmaster = NULL;
2099
2100                 if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
2101                         continue;
2102
2103                 bdp = &uvhub_descs[uvhub];
2104                 socket_mask = bdp->socket_mask;
2105                 socket = 0;
2106                 while (socket_mask) {
2107                         struct socket_desc *sdp;
2108                         if ((socket_mask & 1)) {
2109                                 sdp = &bdp->socket[socket];
2110                                 if (scan_sock(sdp, bdp, &smaster, &hmaster))
2111                                         return 1;
2112                                 make_per_cpu_thp(smaster);
2113                         }
2114                         socket++;
2115                         socket_mask = (socket_mask >> 1);
2116                 }
2117                 make_per_hub_cpumask(hmaster);
2118         }
2119         return 0;
2120 }
2121
2122 /*
2123  * initialize the bau_control structure for each cpu
2124  */
2125 static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
2126 {
2127         unsigned char *uvhub_mask;
2128         void *vp;
2129         struct uvhub_desc *uvhub_descs;
2130
2131         if (is_uv3_hub() || is_uv2_hub() || is_uv1_hub())
2132                 timeout_us = calculate_destination_timeout();
2133
2134         vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
2135         uvhub_descs = (struct uvhub_desc *)vp;
2136         memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
2137         uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
2138
2139         if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
2140                 goto fail;
2141
2142         if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
2143                 goto fail;
2144
2145         kfree(uvhub_descs);
2146         kfree(uvhub_mask);
2147         init_per_cpu_tunables();
2148         return 0;
2149
2150 fail:
2151         kfree(uvhub_descs);
2152         kfree(uvhub_mask);
2153         return 1;
2154 }
2155
2156 /*
2157  * Initialization of BAU-related structures
2158  */
2159 static int __init uv_bau_init(void)
2160 {
2161         int uvhub;
2162         int pnode;
2163         int nuvhubs;
2164         int cur_cpu;
2165         int cpus;
2166         int vector;
2167         cpumask_var_t *mask;
2168
2169         if (!is_uv_system())
2170                 return 0;
2171
2172         if (is_uv4_hub())
2173                 ops = uv4_bau_ops;
2174         else if (is_uv3_hub())
2175                 ops = uv123_bau_ops;
2176         else if (is_uv2_hub())
2177                 ops = uv123_bau_ops;
2178         else if (is_uv1_hub())
2179                 ops = uv123_bau_ops;
2180
2181         for_each_possible_cpu(cur_cpu) {
2182                 mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
2183                 zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
2184         }
2185
2186         nuvhubs = uv_num_possible_blades();
2187         congested_cycles = usec_2_cycles(congested_respns_us);
2188
2189         uv_base_pnode = 0x7fffffff;
2190         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2191                 cpus = uv_blade_nr_possible_cpus(uvhub);
2192                 if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
2193                         uv_base_pnode = uv_blade_to_pnode(uvhub);
2194         }
2195
2196         /* software timeouts are not supported on UV4 */
2197         if (is_uv3_hub() || is_uv2_hub() || is_uv1_hub())
2198                 enable_timeouts();
2199
2200         if (init_per_cpu(nuvhubs, uv_base_pnode)) {
2201                 set_bau_off();
2202                 nobau_perm = 1;
2203                 return 0;
2204         }
2205
2206         vector = UV_BAU_MESSAGE;
2207         for_each_possible_blade(uvhub) {
2208                 if (uv_blade_nr_possible_cpus(uvhub))
2209                         init_uvhub(uvhub, vector, uv_base_pnode);
2210         }
2211
2212         alloc_intr_gate(vector, uv_bau_message_intr1);
2213
2214         for_each_possible_blade(uvhub) {
2215                 if (uv_blade_nr_possible_cpus(uvhub)) {
2216                         unsigned long val;
2217                         unsigned long mmr;
2218                         pnode = uv_blade_to_pnode(uvhub);
2219                         /* INIT the bau */
2220                         val = 1L << 63;
2221                         write_gmmr_activation(pnode, val);
2222                         mmr = 1; /* should be 1 to broadcast to both sockets */
2223                         if (!is_uv1_hub())
2224                                 write_mmr_data_broadcast(pnode, mmr);
2225                 }
2226         }
2227
2228         return 0;
2229 }
2230 core_initcall(uv_bau_init);
2231 fs_initcall(uv_ptc_init);