drivers/ata/ahci_mvebu.c

   1 /*
   2  * AHCI glue platform driver for Marvell EBU SOCs
   3  *
   4  * Copyright (C) 2014 Marvell
   5  *
   6  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   7  * Marcin Wojtas <mw@semihalf.com>
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2.  This program is licensed "as is" without any
  11  * warranty of any kind, whether express or implied.
  12  */
  13
  14 #include <linux/ahci_platform.h>
  15 #include <linux/kernel.h>
  16 #include <linux/mbus.h>
  17 #include <linux/module.h>
  18 #include <linux/of_device.h>
  19 #include <linux/platform_device.h>
  20 #include "ahci.h"
  21
  22 #define DRV_NAME "ahci-mvebu"
  23
  24 #define AHCI_VENDOR_SPECIFIC_0_ADDR  0xa0
  25 #define AHCI_VENDOR_SPECIFIC_0_DATA  0xa4
  26
  27 #define AHCI_WINDOW_CTRL(win)   (0x60 + ((win) << 4))
  28 #define AHCI_WINDOW_BASE(win)   (0x64 + ((win) << 4))
  29 #define AHCI_WINDOW_SIZE(win)   (0x68 + ((win) << 4))
  30
  31 static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
  32                                    const struct mbus_dram_target_info *dram)
  33 {
  34         int i;
  35
  36         for (i = 0; i < 4; i++) {
  37                 writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i));
  38                 writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i));
  39                 writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i));
  40         }
  41
  42         for (i = 0; i < dram->num_cs; i++) {
  43                 const struct mbus_dram_window *cs = dram->cs + i;
  44
  45                 writel((cs->mbus_attr << 8) |
  46                        (dram->mbus_dram_target_id << 4) | 1,
  47                        hpriv->mmio + AHCI_WINDOW_CTRL(i));
  48                 writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i));
  49                 writel(((cs->size - 1) & 0xffff0000),
  50                        hpriv->mmio + AHCI_WINDOW_SIZE(i));
  51         }
  52 }
  53
  54 static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
  55 {
  56         /*
  57          * Enable the regret bit to allow the SATA unit to regret a
  58          * request that didn't receive an acknowlegde and avoid a
  59          * deadlock
  60          */
  61         writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
  62         writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
  63 }
  64
  65 #ifdef CONFIG_PM_SLEEP
  66 static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state)
  67 {
  68         return ahci_platform_suspend_host(&pdev->dev);
  69 }
  70
  71 static int ahci_mvebu_resume(struct platform_device *pdev)
  72 {
  73         struct ata_host *host = platform_get_drvdata(pdev);
  74         struct ahci_host_priv *hpriv = host->private_data;
  75         const struct mbus_dram_target_info *dram;
  76
  77         dram = mv_mbus_dram_info();
  78         if (dram)
  79                 ahci_mvebu_mbus_config(hpriv, dram);
  80
  81         ahci_mvebu_regret_option(hpriv);
  82
  83         return ahci_platform_resume_host(&pdev->dev);
  84 }
  85 #else
  86 #define ahci_mvebu_suspend NULL
  87 #define ahci_mvebu_resume NULL
  88 #endif
  89
  90 static const struct ata_port_info ahci_mvebu_port_info = {
  91         .flags     = AHCI_FLAG_COMMON,
  92         .pio_mask  = ATA_PIO4,
  93         .udma_mask = ATA_UDMA6,
  94         .port_ops  = &ahci_platform_ops,
  95 };
  96
  97 static struct scsi_host_template ahci_platform_sht = {
  98         AHCI_SHT(DRV_NAME),
  99 };
 100
 101 static int ahci_mvebu_probe(struct platform_device *pdev)
 102 {
 103         struct ahci_host_priv *hpriv;
 104         const struct mbus_dram_target_info *dram;
 105         int rc;
 106
 107         hpriv = ahci_platform_get_resources(pdev);
 108         if (IS_ERR(hpriv))
 109                 return PTR_ERR(hpriv);
 110
 111         rc = ahci_platform_enable_resources(hpriv);
 112         if (rc)
 113                 return rc;
 114
 115         if (of_device_is_compatible(pdev->dev.of_node,
 116                                     "marvell,armada-380-ahci")) {
 117                 dram = mv_mbus_dram_info();
 118                 if (!dram)
 119                         return -ENODEV;
 120
 121                 ahci_mvebu_mbus_config(hpriv, dram);
 122                 ahci_mvebu_regret_option(hpriv);
 123         }
 124
 125         rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
 126                                      &ahci_platform_sht);
 127         if (rc)
 128                 goto disable_resources;
 129
 130         return 0;
 131
 132 disable_resources:
 133         ahci_platform_disable_resources(hpriv);
 134         return rc;
 135 }
 136
 137 static const struct of_device_id ahci_mvebu_of_match[] = {
 138         { .compatible = "marvell,armada-380-ahci", },
 139         { .compatible = "marvell,armada-3700-ahci", },
 140         { },
 141 };
 142 MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
 143
 144 /*
 145  * We currently don't provide power management related operations,
 146  * since there is no suspend/resume support at the platform level for
 147  * Armada 38x for the moment.
 148  */
 149 static struct platform_driver ahci_mvebu_driver = {
 150         .probe = ahci_mvebu_probe,
 151         .remove = ata_platform_remove_one,
 152         .suspend = ahci_mvebu_suspend,
 153         .resume = ahci_mvebu_resume,
 154         .driver = {
 155                 .name = DRV_NAME,
 156                 .of_match_table = ahci_mvebu_of_match,
 157         },
 158 };
 159 module_platform_driver(ahci_mvebu_driver);
 160
 161 MODULE_DESCRIPTION("Marvell EBU AHCI SATA driver");
 162 MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>, Marcin Wojtas <mw@semihalf.com>");
 163 MODULE_LICENSE("GPL");
 164 MODULE_ALIAS("platform:ahci_mvebu");