drivers/block/sx8.c

   1 /*
   2  *  sx8.c: Driver for Promise SATA SX8 looks-like-I2O hardware
   3  *
   4  *  Copyright 2004-2005 Red Hat, Inc.
   5  *
   6  *  Author/maintainer:  Jeff Garzik <jgarzik@pobox.com>
   7  *
   8  *  This file is subject to the terms and conditions of the GNU General Public
   9  *  License.  See the file "COPYING" in the main directory of this archive
  10  *  for more details.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/pci.h>
  17 #include <linux/slab.h>
  18 #include <linux/spinlock.h>
  19 #include <linux/blkdev.h>
  20 #include <linux/sched.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/compiler.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/bitops.h>
  25 #include <linux/delay.h>
  26 #include <linux/ktime.h>
  27 #include <linux/hdreg.h>
  28 #include <linux/dma-mapping.h>
  29 #include <linux/completion.h>
  30 #include <linux/scatterlist.h>
  31 #include <asm/io.h>
  32 #include <asm/uaccess.h>
  33
  34 #if 0
  35 #define CARM_DEBUG
  36 #define CARM_VERBOSE_DEBUG
  37 #else
  38 #undef CARM_DEBUG
  39 #undef CARM_VERBOSE_DEBUG
  40 #endif
  41 #undef CARM_NDEBUG
  42
  43 #define DRV_NAME "sx8"
  44 #define DRV_VERSION "1.0"
  45 #define PFX DRV_NAME ": "
  46
  47 MODULE_AUTHOR("Jeff Garzik");
  48 MODULE_LICENSE("GPL");
  49 MODULE_DESCRIPTION("Promise SATA SX8 block driver");
  50 MODULE_VERSION(DRV_VERSION);
  51
  52 /*
  53  * SX8 hardware has a single message queue for all ATA ports.
  54  * When this driver was written, the hardware (firmware?) would
  55  * corrupt data eventually, if more than one request was outstanding.
  56  * As one can imagine, having 8 ports bottlenecking on a single
  57  * command hurts performance.
  58  *
  59  * Based on user reports, later versions of the hardware (firmware?)
  60  * seem to be able to survive with more than one command queued.
  61  *
  62  * Therefore, we default to the safe option -- 1 command -- but
  63  * allow the user to increase this.
  64  *
  65  * SX8 should be able to support up to ~60 queued commands (CARM_MAX_REQ),
  66  * but problems seem to occur when you exceed ~30, even on newer hardware.
  67  */
  68 static int max_queue = 1;
  69 module_param(max_queue, int, 0444);
  70 MODULE_PARM_DESC(max_queue, "Maximum number of queued commands. (min==1, max==30, safe==1)");
  71
  72
  73 #define NEXT_RESP(idx)  ((idx + 1) % RMSG_Q_LEN)
  74
  75 /* 0xf is just arbitrary, non-zero noise; this is sorta like poisoning */
  76 #define TAG_ENCODE(tag) (((tag) << 16) | 0xf)
  77 #define TAG_DECODE(tag) (((tag) >> 16) & 0x1f)
  78 #define TAG_VALID(tag)  ((((tag) & 0xf) == 0xf) && (TAG_DECODE(tag) < 32))
  79
  80 /* note: prints function name for you */
  81 #ifdef CARM_DEBUG
  82 #define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  83 #ifdef CARM_VERBOSE_DEBUG
  84 #define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  85 #else
  86 #define VPRINTK(fmt, args...)
  87 #endif  /* CARM_VERBOSE_DEBUG */
  88 #else
  89 #define DPRINTK(fmt, args...)
  90 #define VPRINTK(fmt, args...)
  91 #endif  /* CARM_DEBUG */
  92
  93 #ifdef CARM_NDEBUG
  94 #define assert(expr)
  95 #else
  96 #define assert(expr) \
  97         if(unlikely(!(expr))) {                                   \
  98         printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
  99         #expr, __FILE__, __func__, __LINE__);          \
 100         }
 101 #endif
 102
 103 /* defines only for the constants which don't work well as enums */
 104 struct carm_host;
 105
 106 enum {
 107         /* adapter-wide limits */
 108         CARM_MAX_PORTS          = 8,
 109         CARM_SHM_SIZE           = (4096 << 7),
 110         CARM_MINORS_PER_MAJOR   = 256 / CARM_MAX_PORTS,
 111         CARM_MAX_WAIT_Q         = CARM_MAX_PORTS + 1,
 112
 113         /* command message queue limits */
 114         CARM_MAX_REQ            = 64,          /* max command msgs per host */
 115         CARM_MSG_LOW_WATER      = (CARM_MAX_REQ / 4),        /* refill mark */
 116
 117         /* S/G limits, host-wide and per-request */
 118         CARM_MAX_REQ_SG         = 32,        /* max s/g entries per request */
 119         CARM_MAX_HOST_SG        = 600,          /* max s/g entries per host */
 120         CARM_SG_LOW_WATER       = (CARM_MAX_HOST_SG / 4),   /* re-fill mark */
 121
 122         /* hardware registers */
 123         CARM_IHQP               = 0x1c,
 124         CARM_INT_STAT           = 0x10, /* interrupt status */
 125         CARM_INT_MASK           = 0x14, /* interrupt mask */
 126         CARM_HMUC               = 0x18, /* host message unit control */
 127         RBUF_ADDR_LO            = 0x20, /* response msg DMA buf low 32 bits */
 128         RBUF_ADDR_HI            = 0x24, /* response msg DMA buf high 32 bits */
 129         RBUF_BYTE_SZ            = 0x28,
 130         CARM_RESP_IDX           = 0x2c,
 131         CARM_CMS0               = 0x30, /* command message size reg 0 */
 132         CARM_LMUC               = 0x48,
 133         CARM_HMPHA              = 0x6c,
 134         CARM_INITC              = 0xb5,
 135
 136         /* bits in CARM_INT_{STAT,MASK} */
 137         INT_RESERVED            = 0xfffffff0,
 138         INT_WATCHDOG            = (1 << 3),     /* watchdog timer */
 139         INT_Q_OVERFLOW          = (1 << 2),     /* cmd msg q overflow */
 140         INT_Q_AVAILABLE         = (1 << 1),     /* cmd msg q has free space */
 141         INT_RESPONSE            = (1 << 0),     /* response msg available */
 142         INT_ACK_MASK            = INT_WATCHDOG | INT_Q_OVERFLOW,
 143         INT_DEF_MASK            = INT_RESERVED | INT_Q_OVERFLOW |
 144                                   INT_RESPONSE,
 145
 146         /* command messages, and related register bits */
 147         CARM_HAVE_RESP          = 0x01,
 148         CARM_MSG_READ           = 1,
 149         CARM_MSG_WRITE          = 2,
 150         CARM_MSG_VERIFY         = 3,
 151         CARM_MSG_GET_CAPACITY   = 4,
 152         CARM_MSG_FLUSH          = 5,
 153         CARM_MSG_IOCTL          = 6,
 154         CARM_MSG_ARRAY          = 8,
 155         CARM_MSG_MISC           = 9,
 156         CARM_CME                = (1 << 2),
 157         CARM_RME                = (1 << 1),
 158         CARM_WZBC               = (1 << 0),
 159         CARM_RMI                = (1 << 0),
 160         CARM_Q_FULL             = (1 << 3),
 161         CARM_MSG_SIZE           = 288,
 162         CARM_Q_LEN              = 48,
 163
 164         /* CARM_MSG_IOCTL messages */
 165         CARM_IOC_SCAN_CHAN      = 5,    /* scan channels for devices */
 166         CARM_IOC_GET_TCQ        = 13,   /* get tcq/ncq depth */
 167         CARM_IOC_SET_TCQ        = 14,   /* set tcq/ncq depth */
 168
 169         IOC_SCAN_CHAN_NODEV     = 0x1f,
 170         IOC_SCAN_CHAN_OFFSET    = 0x40,
 171
 172         /* CARM_MSG_ARRAY messages */
 173         CARM_ARRAY_INFO         = 0,
 174
 175         ARRAY_NO_EXIST          = (1 << 31),
 176
 177         /* response messages */
 178         RMSG_SZ                 = 8,    /* sizeof(struct carm_response) */
 179         RMSG_Q_LEN              = 48,   /* resp. msg list length */
 180         RMSG_OK                 = 1,    /* bit indicating msg was successful */
 181                                         /* length of entire resp. msg buffer */
 182         RBUF_LEN                = RMSG_SZ * RMSG_Q_LEN,
 183
 184         PDC_SHM_SIZE            = (4096 << 7), /* length of entire h/w buffer */
 185
 186         /* CARM_MSG_MISC messages */
 187         MISC_GET_FW_VER         = 2,
 188         MISC_ALLOC_MEM          = 3,
 189         MISC_SET_TIME           = 5,
 190
 191         /* MISC_GET_FW_VER feature bits */
 192         FW_VER_4PORT            = (1 << 2), /* 1=4 ports, 0=8 ports */
 193         FW_VER_NON_RAID         = (1 << 1), /* 1=non-RAID firmware, 0=RAID */
 194         FW_VER_ZCR              = (1 << 0), /* zero channel RAID (whatever that is) */
 195
 196         /* carm_host flags */
 197         FL_NON_RAID             = FW_VER_NON_RAID,
 198         FL_4PORT                = FW_VER_4PORT,
 199         FL_FW_VER_MASK          = (FW_VER_NON_RAID | FW_VER_4PORT),
 200         FL_DAC                  = (1 << 16),
 201         FL_DYN_MAJOR            = (1 << 17),
 202 };
 203
 204 enum {
 205         CARM_SG_BOUNDARY        = 0xffffUL,         /* s/g segment boundary */
 206 };
 207
 208 enum scatter_gather_types {
 209         SGT_32BIT               = 0,
 210         SGT_64BIT               = 1,
 211 };
 212
 213 enum host_states {
 214         HST_INVALID,            /* invalid state; never used */
 215         HST_ALLOC_BUF,          /* setting up master SHM area */
 216         HST_ERROR,              /* we never leave here */
 217         HST_PORT_SCAN,          /* start dev scan */
 218         HST_DEV_SCAN_START,     /* start per-device probe */
 219         HST_DEV_SCAN,           /* continue per-device probe */
 220         HST_DEV_ACTIVATE,       /* activate devices we found */
 221         HST_PROBE_FINISHED,     /* probe is complete */
 222         HST_PROBE_START,        /* initiate probe */
 223         HST_SYNC_TIME,          /* tell firmware what time it is */
 224         HST_GET_FW_VER,         /* get firmware version, adapter port cnt */
 225 };
 226
 227 #ifdef CARM_DEBUG
 228 static const char *state_name[] = {
 229         "HST_INVALID",
 230         "HST_ALLOC_BUF",
 231         "HST_ERROR",
 232         "HST_PORT_SCAN",
 233         "HST_DEV_SCAN_START",
 234         "HST_DEV_SCAN",
 235         "HST_DEV_ACTIVATE",
 236         "HST_PROBE_FINISHED",
 237         "HST_PROBE_START",
 238         "HST_SYNC_TIME",
 239         "HST_GET_FW_VER",
 240 };
 241 #endif
 242
 243 struct carm_port {
 244         unsigned int                    port_no;
 245         struct gendisk                  *disk;
 246         struct carm_host                *host;
 247
 248         /* attached device characteristics */
 249         u64                             capacity;
 250         char                            name[41];
 251         u16                             dev_geom_head;
 252         u16                             dev_geom_sect;
 253         u16                             dev_geom_cyl;
 254 };
 255
 256 struct carm_request {
 257         unsigned int                    tag;
 258         int                             n_elem;
 259         unsigned int                    msg_type;
 260         unsigned int                    msg_subtype;
 261         unsigned int                    msg_bucket;
 262         struct request                  *rq;
 263         struct carm_port                *port;
 264         struct scatterlist              sg[CARM_MAX_REQ_SG];
 265 };
 266
 267 struct carm_host {
 268         unsigned long                   flags;
 269         void                            __iomem *mmio;
 270         void                            *shm;
 271         dma_addr_t                      shm_dma;
 272
 273         int                             major;
 274         int                             id;
 275         char                            name[32];
 276
 277         spinlock_t                      lock;
 278         struct pci_dev                  *pdev;
 279         unsigned int                    state;
 280         u32                             fw_ver;
 281
 282         struct request_queue            *oob_q;
 283         unsigned int                    n_oob;
 284
 285         unsigned int                    hw_sg_used;
 286
 287         unsigned int                    resp_idx;
 288
 289         unsigned int                    wait_q_prod;
 290         unsigned int                    wait_q_cons;
 291         struct request_queue            *wait_q[CARM_MAX_WAIT_Q];
 292
 293         unsigned int                    n_msgs;
 294         u64                             msg_alloc;
 295         struct carm_request             req[CARM_MAX_REQ];
 296         void                            *msg_base;
 297         dma_addr_t                      msg_dma;
 298
 299         int                             cur_scan_dev;
 300         unsigned long                   dev_active;
 301         unsigned long                   dev_present;
 302         struct carm_port                port[CARM_MAX_PORTS];
 303
 304         struct work_struct              fsm_task;
 305
 306         struct completion               probe_comp;
 307 };
 308
 309 struct carm_response {
 310         __le32 ret_handle;
 311         __le32 status;
 312 }  __attribute__((packed));
 313
 314 struct carm_msg_sg {
 315         __le32 start;
 316         __le32 len;
 317 }  __attribute__((packed));
 318
 319 struct carm_msg_rw {
 320         u8 type;
 321         u8 id;
 322         u8 sg_count;
 323         u8 sg_type;
 324         __le32 handle;
 325         __le32 lba;
 326         __le16 lba_count;
 327         __le16 lba_high;
 328         struct carm_msg_sg sg[32];
 329 }  __attribute__((packed));
 330
 331 struct carm_msg_allocbuf {
 332         u8 type;
 333         u8 subtype;
 334         u8 n_sg;
 335         u8 sg_type;
 336         __le32 handle;
 337         __le32 addr;
 338         __le32 len;
 339         __le32 evt_pool;
 340         __le32 n_evt;
 341         __le32 rbuf_pool;
 342         __le32 n_rbuf;
 343         __le32 msg_pool;
 344         __le32 n_msg;
 345         struct carm_msg_sg sg[8];
 346 }  __attribute__((packed));
 347
 348 struct carm_msg_ioctl {
 349         u8 type;
 350         u8 subtype;
 351         u8 array_id;
 352         u8 reserved1;
 353         __le32 handle;
 354         __le32 data_addr;
 355         u32 reserved2;
 356 }  __attribute__((packed));
 357
 358 struct carm_msg_sync_time {
 359         u8 type;
 360         u8 subtype;
 361         u16 reserved1;
 362         __le32 handle;
 363         u32 reserved2;
 364         __le32 timestamp;
 365 }  __attribute__((packed));
 366
 367 struct carm_msg_get_fw_ver {
 368         u8 type;
 369         u8 subtype;
 370         u16 reserved1;
 371         __le32 handle;
 372         __le32 data_addr;
 373         u32 reserved2;
 374 }  __attribute__((packed));
 375
 376 struct carm_fw_ver {
 377         __le32 version;
 378         u8 features;
 379         u8 reserved1;
 380         u16 reserved2;
 381 }  __attribute__((packed));
 382
 383 struct carm_array_info {
 384         __le32 size;
 385
 386         __le16 size_hi;
 387         __le16 stripe_size;
 388
 389         __le32 mode;
 390
 391         __le16 stripe_blk_sz;
 392         __le16 reserved1;
 393
 394         __le16 cyl;
 395         __le16 head;
 396
 397         __le16 sect;
 398         u8 array_id;
 399         u8 reserved2;
 400
 401         char name[40];
 402
 403         __le32 array_status;
 404
 405         /* device list continues beyond this point? */
 406 }  __attribute__((packed));
 407
 408 static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
 409 static void carm_remove_one (struct pci_dev *pdev);
 410 static int carm_bdev_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 411
 412 static const struct pci_device_id carm_pci_tbl[] = {
 413         { PCI_VENDOR_ID_PROMISE, 0x8000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
 414         { PCI_VENDOR_ID_PROMISE, 0x8002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
 415         { }     /* terminate list */
 416 };
 417 MODULE_DEVICE_TABLE(pci, carm_pci_tbl);
 418
 419 static struct pci_driver carm_driver = {
 420         .name           = DRV_NAME,
 421         .id_table       = carm_pci_tbl,
 422         .probe          = carm_init_one,
 423         .remove         = carm_remove_one,
 424 };
 425
 426 static const struct block_device_operations carm_bd_ops = {
 427         .owner          = THIS_MODULE,
 428         .getgeo         = carm_bdev_getgeo,
 429 };
 430
 431 static unsigned int carm_host_id;
 432 static unsigned long carm_major_alloc;
 433
 434
 435
 436 static int carm_bdev_getgeo(struct block_device *bdev, struct hd_geometry *geo)
 437 {
 438         struct carm_port *port = bdev->bd_disk->private_data;
 439
 440         geo->heads = (u8) port->dev_geom_head;
 441         geo->sectors = (u8) port->dev_geom_sect;
 442         geo->cylinders = port->dev_geom_cyl;
 443         return 0;
 444 }
 445
 446 static const u32 msg_sizes[] = { 32, 64, 128, CARM_MSG_SIZE };
 447
 448 static inline int carm_lookup_bucket(u32 msg_size)
 449 {
 450         int i;
 451
 452         for (i = 0; i < ARRAY_SIZE(msg_sizes); i++)
 453                 if (msg_size <= msg_sizes[i])
 454                         return i;
 455
 456         return -ENOENT;
 457 }
 458
 459 static void carm_init_buckets(void __iomem *mmio)
 460 {
 461         unsigned int i;
 462
 463         for (i = 0; i < ARRAY_SIZE(msg_sizes); i++)
 464                 writel(msg_sizes[i], mmio + CARM_CMS0 + (4 * i));
 465 }
 466
 467 static inline void *carm_ref_msg(struct carm_host *host,
 468                                  unsigned int msg_idx)
 469 {
 470         return host->msg_base + (msg_idx * CARM_MSG_SIZE);
 471 }
 472
 473 static inline dma_addr_t carm_ref_msg_dma(struct carm_host *host,
 474                                           unsigned int msg_idx)
 475 {
 476         return host->msg_dma + (msg_idx * CARM_MSG_SIZE);
 477 }
 478
 479 static int carm_send_msg(struct carm_host *host,
 480                          struct carm_request *crq)
 481 {
 482         void __iomem *mmio = host->mmio;
 483         u32 msg = (u32) carm_ref_msg_dma(host, crq->tag);
 484         u32 cm_bucket = crq->msg_bucket;
 485         u32 tmp;
 486         int rc = 0;
 487
 488         VPRINTK("ENTER\n");
 489
 490         tmp = readl(mmio + CARM_HMUC);
 491         if (tmp & CARM_Q_FULL) {
 492 #if 0
 493                 tmp = readl(mmio + CARM_INT_MASK);
 494                 tmp |= INT_Q_AVAILABLE;
 495                 writel(tmp, mmio + CARM_INT_MASK);
 496                 readl(mmio + CARM_INT_MASK);    /* flush */
 497 #endif
 498                 DPRINTK("host msg queue full\n");
 499                 rc = -EBUSY;
 500         } else {
 501                 writel(msg | (cm_bucket << 1), mmio + CARM_IHQP);
 502                 readl(mmio + CARM_IHQP);        /* flush */
 503         }
 504
 505         return rc;
 506 }
 507
 508 static struct carm_request *carm_get_request(struct carm_host *host)
 509 {
 510         unsigned int i;
 511
 512         /* obey global hardware limit on S/G entries */
 513         if (host->hw_sg_used >= (CARM_MAX_HOST_SG - CARM_MAX_REQ_SG))
 514                 return NULL;
 515
 516         for (i = 0; i < max_queue; i++)
 517                 if ((host->msg_alloc & (1ULL << i)) == 0) {
 518                         struct carm_request *crq = &host->req[i];
 519                         crq->port = NULL;
 520                         crq->n_elem = 0;
 521
 522                         host->msg_alloc |= (1ULL << i);
 523                         host->n_msgs++;
 524
 525                         assert(host->n_msgs <= CARM_MAX_REQ);
 526                         sg_init_table(crq->sg, CARM_MAX_REQ_SG);
 527                         return crq;
 528                 }
 529
 530         DPRINTK("no request available, returning NULL\n");
 531         return NULL;
 532 }
 533
 534 static int carm_put_request(struct carm_host *host, struct carm_request *crq)
 535 {
 536         assert(crq->tag < max_queue);
 537
 538         if (unlikely((host->msg_alloc & (1ULL << crq->tag)) == 0))
 539                 return -EINVAL; /* tried to clear a tag that was not active */
 540
 541         assert(host->hw_sg_used >= crq->n_elem);
 542
 543         host->msg_alloc &= ~(1ULL << crq->tag);
 544         host->hw_sg_used -= crq->n_elem;
 545         host->n_msgs--;
 546
 547         return 0;
 548 }
 549
 550 static struct carm_request *carm_get_special(struct carm_host *host)
 551 {
 552         unsigned long flags;
 553         struct carm_request *crq = NULL;
 554         struct request *rq;
 555         int tries = 5000;
 556
 557         while (tries-- > 0) {
 558                 spin_lock_irqsave(&host->lock, flags);
 559                 crq = carm_get_request(host);
 560                 spin_unlock_irqrestore(&host->lock, flags);
 561
 562                 if (crq)
 563                         break;
 564                 msleep(10);
 565         }
 566
 567         if (!crq)
 568                 return NULL;
 569
 570         rq = blk_get_request(host->oob_q, WRITE /* bogus */, GFP_KERNEL);
 571         if (IS_ERR(rq)) {
 572                 spin_lock_irqsave(&host->lock, flags);
 573                 carm_put_request(host, crq);
 574                 spin_unlock_irqrestore(&host->lock, flags);
 575                 return NULL;
 576         }
 577
 578         crq->rq = rq;
 579         return crq;
 580 }
 581
 582 static int carm_array_info (struct carm_host *host, unsigned int array_idx)
 583 {
 584         struct carm_msg_ioctl *ioc;
 585         unsigned int idx;
 586         u32 msg_data;
 587         dma_addr_t msg_dma;
 588         struct carm_request *crq;
 589         int rc;
 590
 591         crq = carm_get_special(host);
 592         if (!crq) {
 593                 rc = -ENOMEM;
 594                 goto err_out;
 595         }
 596
 597         idx = crq->tag;
 598
 599         ioc = carm_ref_msg(host, idx);
 600         msg_dma = carm_ref_msg_dma(host, idx);
 601         msg_data = (u32) (msg_dma + sizeof(struct carm_array_info));
 602
 603         crq->msg_type = CARM_MSG_ARRAY;
 604         crq->msg_subtype = CARM_ARRAY_INFO;
 605         rc = carm_lookup_bucket(sizeof(struct carm_msg_ioctl) +
 606                                 sizeof(struct carm_array_info));
 607         BUG_ON(rc < 0);
 608         crq->msg_bucket = (u32) rc;
 609
 610         memset(ioc, 0, sizeof(*ioc));
 611         ioc->type       = CARM_MSG_ARRAY;
 612         ioc->subtype    = CARM_ARRAY_INFO;
 613         ioc->array_id   = (u8) array_idx;
 614         ioc->handle     = cpu_to_le32(TAG_ENCODE(idx));
 615         ioc->data_addr  = cpu_to_le32(msg_data);
 616
 617         spin_lock_irq(&host->lock);
 618         assert(host->state == HST_DEV_SCAN_START ||
 619                host->state == HST_DEV_SCAN);
 620         spin_unlock_irq(&host->lock);
 621
 622         DPRINTK("blk_execute_rq_nowait, tag == %u\n", idx);
 623         crq->rq->cmd_type = REQ_TYPE_DRV_PRIV;
 624         crq->rq->special = crq;
 625         blk_execute_rq_nowait(host->oob_q, NULL, crq->rq, true, NULL);
 626
 627         return 0;
 628
 629 err_out:
 630         spin_lock_irq(&host->lock);
 631         host->state = HST_ERROR;
 632         spin_unlock_irq(&host->lock);
 633         return rc;
 634 }
 635
 636 typedef unsigned int (*carm_sspc_t)(struct carm_host *, unsigned int, void *);
 637
 638 static int carm_send_special (struct carm_host *host, carm_sspc_t func)
 639 {
 640         struct carm_request *crq;
 641         struct carm_msg_ioctl *ioc;
 642         void *mem;
 643         unsigned int idx, msg_size;
 644         int rc;
 645
 646         crq = carm_get_special(host);
 647         if (!crq)
 648                 return -ENOMEM;
 649
 650         idx = crq->tag;
 651
 652         mem = carm_ref_msg(host, idx);
 653
 654         msg_size = func(host, idx, mem);
 655
 656         ioc = mem;
 657         crq->msg_type = ioc->type;
 658         crq->msg_subtype = ioc->subtype;
 659         rc = carm_lookup_bucket(msg_size);
 660         BUG_ON(rc < 0);
 661         crq->msg_bucket = (u32) rc;
 662
 663         DPRINTK("blk_execute_rq_nowait, tag == %u\n", idx);
 664         crq->rq->cmd_type = REQ_TYPE_DRV_PRIV;
 665         crq->rq->special = crq;
 666         blk_execute_rq_nowait(host->oob_q, NULL, crq->rq, true, NULL);
 667
 668         return 0;
 669 }
 670
 671 static unsigned int carm_fill_sync_time(struct carm_host *host,
 672                                         unsigned int idx, void *mem)
 673 {
 674         struct carm_msg_sync_time *st = mem;
 675
 676         time64_t tv = ktime_get_real_seconds();
 677
 678         memset(st, 0, sizeof(*st));
 679         st->type        = CARM_MSG_MISC;
 680         st->subtype     = MISC_SET_TIME;
 681         st->handle      = cpu_to_le32(TAG_ENCODE(idx));
 682         st->timestamp   = cpu_to_le32(tv);
 683
 684         return sizeof(struct carm_msg_sync_time);
 685 }
 686
 687 static unsigned int carm_fill_alloc_buf(struct carm_host *host,
 688                                         unsigned int idx, void *mem)
 689 {
 690         struct carm_msg_allocbuf *ab = mem;
 691
 692         memset(ab, 0, sizeof(*ab));
 693         ab->type        = CARM_MSG_MISC;
 694         ab->subtype     = MISC_ALLOC_MEM;
 695         ab->handle      = cpu_to_le32(TAG_ENCODE(idx));
 696         ab->n_sg        = 1;
 697         ab->sg_type     = SGT_32BIT;
 698         ab->addr        = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1));
 699         ab->len         = cpu_to_le32(PDC_SHM_SIZE >> 1);
 700         ab->evt_pool    = cpu_to_le32(host->shm_dma + (16 * 1024));
 701         ab->n_evt       = cpu_to_le32(1024);
 702         ab->rbuf_pool   = cpu_to_le32(host->shm_dma);
 703         ab->n_rbuf      = cpu_to_le32(RMSG_Q_LEN);
 704         ab->msg_pool    = cpu_to_le32(host->shm_dma + RBUF_LEN);
 705         ab->n_msg       = cpu_to_le32(CARM_Q_LEN);
 706         ab->sg[0].start = cpu_to_le32(host->shm_dma + (PDC_SHM_SIZE >> 1));
 707         ab->sg[0].len   = cpu_to_le32(65536);
 708
 709         return sizeof(struct carm_msg_allocbuf);
 710 }
 711
 712 static unsigned int carm_fill_scan_channels(struct carm_host *host,
 713                                             unsigned int idx, void *mem)
 714 {
 715         struct carm_msg_ioctl *ioc = mem;
 716         u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) +
 717                               IOC_SCAN_CHAN_OFFSET);
 718
 719         memset(ioc, 0, sizeof(*ioc));
 720         ioc->type       = CARM_MSG_IOCTL;
 721         ioc->subtype    = CARM_IOC_SCAN_CHAN;
 722         ioc->handle     = cpu_to_le32(TAG_ENCODE(idx));
 723         ioc->data_addr  = cpu_to_le32(msg_data);
 724
 725         /* fill output data area with "no device" default values */
 726         mem += IOC_SCAN_CHAN_OFFSET;
 727         memset(mem, IOC_SCAN_CHAN_NODEV, CARM_MAX_PORTS);
 728
 729         return IOC_SCAN_CHAN_OFFSET + CARM_MAX_PORTS;
 730 }
 731
 732 static unsigned int carm_fill_get_fw_ver(struct carm_host *host,
 733                                          unsigned int idx, void *mem)
 734 {
 735         struct carm_msg_get_fw_ver *ioc = mem;
 736         u32 msg_data = (u32) (carm_ref_msg_dma(host, idx) + sizeof(*ioc));
 737
 738         memset(ioc, 0, sizeof(*ioc));
 739         ioc->type       = CARM_MSG_MISC;
 740         ioc->subtype    = MISC_GET_FW_VER;
 741         ioc->handle     = cpu_to_le32(TAG_ENCODE(idx));
 742         ioc->data_addr  = cpu_to_le32(msg_data);
 743
 744         return sizeof(struct carm_msg_get_fw_ver) +
 745                sizeof(struct carm_fw_ver);
 746 }
 747
 748 static inline void carm_end_request_queued(struct carm_host *host,
 749                                            struct carm_request *crq,
 750                                            int error)
 751 {
 752         struct request *req = crq->rq;
 753         int rc;
 754
 755         __blk_end_request_all(req, error);
 756
 757         rc = carm_put_request(host, crq);
 758         assert(rc == 0);
 759 }
 760
 761 static inline void carm_push_q (struct carm_host *host, struct request_queue *q)
 762 {
 763         unsigned int idx = host->wait_q_prod % CARM_MAX_WAIT_Q;
 764
 765         blk_stop_queue(q);
 766         VPRINTK("STOPPED QUEUE %p\n", q);
 767
 768         host->wait_q[idx] = q;
 769         host->wait_q_prod++;
 770         BUG_ON(host->wait_q_prod == host->wait_q_cons); /* overrun */
 771 }
 772
 773 static inline struct request_queue *carm_pop_q(struct carm_host *host)
 774 {
 775         unsigned int idx;
 776
 777         if (host->wait_q_prod == host->wait_q_cons)
 778                 return NULL;
 779
 780         idx = host->wait_q_cons % CARM_MAX_WAIT_Q;
 781         host->wait_q_cons++;
 782
 783         return host->wait_q[idx];
 784 }
 785
 786 static inline void carm_round_robin(struct carm_host *host)
 787 {
 788         struct request_queue *q = carm_pop_q(host);
 789         if (q) {
 790                 blk_start_queue(q);
 791                 VPRINTK("STARTED QUEUE %p\n", q);
 792         }
 793 }
 794
 795 static inline void carm_end_rq(struct carm_host *host, struct carm_request *crq,
 796                                int error)
 797 {
 798         carm_end_request_queued(host, crq, error);
 799         if (max_queue == 1)
 800                 carm_round_robin(host);
 801         else if ((host->n_msgs <= CARM_MSG_LOW_WATER) &&
 802                  (host->hw_sg_used <= CARM_SG_LOW_WATER)) {
 803                 carm_round_robin(host);
 804         }
 805 }
 806
 807 static void carm_oob_rq_fn(struct request_queue *q)
 808 {
 809         struct carm_host *host = q->queuedata;
 810         struct carm_request *crq;
 811         struct request *rq;
 812         int rc;
 813
 814         while (1) {
 815                 DPRINTK("get req\n");
 816                 rq = blk_fetch_request(q);
 817                 if (!rq)
 818                         break;
 819
 820                 crq = rq->special;
 821                 assert(crq != NULL);
 822                 assert(crq->rq == rq);
 823
 824                 crq->n_elem = 0;
 825
 826                 DPRINTK("send req\n");
 827                 rc = carm_send_msg(host, crq);
 828                 if (rc) {
 829                         blk_requeue_request(q, rq);
 830                         carm_push_q(host, q);
 831                         return;         /* call us again later, eventually */
 832                 }
 833         }
 834 }
 835
 836 static void carm_rq_fn(struct request_queue *q)
 837 {
 838         struct carm_port *port = q->queuedata;
 839         struct carm_host *host = port->host;
 840         struct carm_msg_rw *msg;
 841         struct carm_request *crq;
 842         struct request *rq;
 843         struct scatterlist *sg;
 844         int writing = 0, pci_dir, i, n_elem, rc;
 845         u32 tmp;
 846         unsigned int msg_size;
 847
 848 queue_one_request:
 849         VPRINTK("get req\n");
 850         rq = blk_peek_request(q);
 851         if (!rq)
 852                 return;
 853
 854         crq = carm_get_request(host);
 855         if (!crq) {
 856                 carm_push_q(host, q);
 857                 return;         /* call us again later, eventually */
 858         }
 859         crq->rq = rq;
 860
 861         blk_start_request(rq);
 862
 863         if (rq_data_dir(rq) == WRITE) {
 864                 writing = 1;
 865                 pci_dir = PCI_DMA_TODEVICE;
 866         } else {
 867                 pci_dir = PCI_DMA_FROMDEVICE;
 868         }
 869
 870         /* get scatterlist from block layer */
 871         sg = &crq->sg[0];
 872         n_elem = blk_rq_map_sg(q, rq, sg);
 873         if (n_elem <= 0) {
 874                 carm_end_rq(host, crq, -EIO);
 875                 return;         /* request with no s/g entries? */
 876         }
 877
 878         /* map scatterlist to PCI bus addresses */
 879         n_elem = pci_map_sg(host->pdev, sg, n_elem, pci_dir);
 880         if (n_elem <= 0) {
 881                 carm_end_rq(host, crq, -EIO);
 882                 return;         /* request with no s/g entries? */
 883         }
 884         crq->n_elem = n_elem;
 885         crq->port = port;
 886         host->hw_sg_used += n_elem;
 887
 888         /*
 889          * build read/write message
 890          */
 891
 892         VPRINTK("build msg\n");
 893         msg = (struct carm_msg_rw *) carm_ref_msg(host, crq->tag);
 894
 895         if (writing) {
 896                 msg->type = CARM_MSG_WRITE;
 897                 crq->msg_type = CARM_MSG_WRITE;
 898         } else {
 899                 msg->type = CARM_MSG_READ;
 900                 crq->msg_type = CARM_MSG_READ;
 901         }
 902
 903         msg->id         = port->port_no;
 904         msg->sg_count   = n_elem;
 905         msg->sg_type    = SGT_32BIT;
 906         msg->handle     = cpu_to_le32(TAG_ENCODE(crq->tag));
 907         msg->lba        = cpu_to_le32(blk_rq_pos(rq) & 0xffffffff);
 908         tmp             = (blk_rq_pos(rq) >> 16) >> 16;
 909         msg->lba_high   = cpu_to_le16( (u16) tmp );
 910         msg->lba_count  = cpu_to_le16(blk_rq_sectors(rq));
 911
 912         msg_size = sizeof(struct carm_msg_rw) - sizeof(msg->sg);
 913         for (i = 0; i < n_elem; i++) {
 914                 struct carm_msg_sg *carm_sg = &msg->sg[i];
 915                 carm_sg->start = cpu_to_le32(sg_dma_address(&crq->sg[i]));
 916                 carm_sg->len = cpu_to_le32(sg_dma_len(&crq->sg[i]));
 917                 msg_size += sizeof(struct carm_msg_sg);
 918         }
 919
 920         rc = carm_lookup_bucket(msg_size);
 921         BUG_ON(rc < 0);
 922         crq->msg_bucket = (u32) rc;
 923
 924         /*
 925          * queue read/write message to hardware
 926          */
 927
 928         VPRINTK("send msg, tag == %u\n", crq->tag);
 929         rc = carm_send_msg(host, crq);
 930         if (rc) {
 931                 carm_put_request(host, crq);
 932                 blk_requeue_request(q, rq);
 933                 carm_push_q(host, q);
 934                 return;         /* call us again later, eventually */
 935         }
 936
 937         goto queue_one_request;
 938 }
 939
 940 static void carm_handle_array_info(struct carm_host *host,
 941                                    struct carm_request *crq, u8 *mem,
 942                                    int error)
 943 {
 944         struct carm_port *port;
 945         u8 *msg_data = mem + sizeof(struct carm_array_info);
 946         struct carm_array_info *desc = (struct carm_array_info *) msg_data;
 947         u64 lo, hi;
 948         int cur_port;
 949         size_t slen;
 950
 951         DPRINTK("ENTER\n");
 952
 953         carm_end_rq(host, crq, error);
 954
 955         if (error)
 956                 goto out;
 957         if (le32_to_cpu(desc->array_status) & ARRAY_NO_EXIST)
 958                 goto out;
 959
 960         cur_port = host->cur_scan_dev;
 961
 962         /* should never occur */
 963         if ((cur_port < 0) || (cur_port >= CARM_MAX_PORTS)) {
 964                 printk(KERN_ERR PFX "BUG: cur_scan_dev==%d, array_id==%d\n",
 965                        cur_port, (int) desc->array_id);
 966                 goto out;
 967         }
 968
 969         port = &host->port[cur_port];
 970
 971         lo = (u64) le32_to_cpu(desc->size);
 972         hi = (u64) le16_to_cpu(desc->size_hi);
 973
 974         port->capacity = lo | (hi << 32);
 975         port->dev_geom_head = le16_to_cpu(desc->head);
 976         port->dev_geom_sect = le16_to_cpu(desc->sect);
 977         port->dev_geom_cyl = le16_to_cpu(desc->cyl);
 978
 979         host->dev_active |= (1 << cur_port);
 980
 981         strncpy(port->name, desc->name, sizeof(port->name));
 982         port->name[sizeof(port->name) - 1] = 0;
 983         slen = strlen(port->name);
 984         while (slen && (port->name[slen - 1] == ' ')) {
 985                 port->name[slen - 1] = 0;
 986                 slen--;
 987         }
 988
 989         printk(KERN_INFO DRV_NAME "(%s): port %u device %Lu sectors\n",
 990                pci_name(host->pdev), port->port_no,
 991                (unsigned long long) port->capacity);
 992         printk(KERN_INFO DRV_NAME "(%s): port %u device \"%s\"\n",
 993                pci_name(host->pdev), port->port_no, port->name);
 994
 995 out:
 996         assert(host->state == HST_DEV_SCAN);
 997         schedule_work(&host->fsm_task);
 998 }
 999
1000 static void carm_handle_scan_chan(struct carm_host *host,
1001                                   struct carm_request *crq, u8 *mem,
1002                                   int error)
1003 {
1004         u8 *msg_data = mem + IOC_SCAN_CHAN_OFFSET;
1005         unsigned int i, dev_count = 0;
1006         int new_state = HST_DEV_SCAN_START;
1007
1008         DPRINTK("ENTER\n");
1009
1010         carm_end_rq(host, crq, error);
1011
1012         if (error) {
1013                 new_state = HST_ERROR;
1014                 goto out;
1015         }
1016
1017         /* TODO: scan and support non-disk devices */
1018         for (i = 0; i < 8; i++)
1019                 if (msg_data[i] == 0) { /* direct-access device (disk) */
1020                         host->dev_present |= (1 << i);
1021                         dev_count++;
1022                 }
1023
1024         printk(KERN_INFO DRV_NAME "(%s): found %u interesting devices\n",
1025                pci_name(host->pdev), dev_count);
1026
1027 out:
1028         assert(host->state == HST_PORT_SCAN);
1029         host->state = new_state;
1030         schedule_work(&host->fsm_task);
1031 }
1032
1033 static void carm_handle_generic(struct carm_host *host,
1034                                 struct carm_request *crq, int error,
1035                                 int cur_state, int next_state)
1036 {
1037         DPRINTK("ENTER\n");
1038
1039         carm_end_rq(host, crq, error);
1040
1041         assert(host->state == cur_state);
1042         if (error)
1043                 host->state = HST_ERROR;
1044         else
1045                 host->state = next_state;
1046         schedule_work(&host->fsm_task);
1047 }
1048
1049 static inline void carm_handle_rw(struct carm_host *host,
1050                                   struct carm_request *crq, int error)
1051 {
1052         int pci_dir;
1053
1054         VPRINTK("ENTER\n");
1055
1056         if (rq_data_dir(crq->rq) == WRITE)
1057                 pci_dir = PCI_DMA_TODEVICE;
1058         else
1059                 pci_dir = PCI_DMA_FROMDEVICE;
1060
1061         pci_unmap_sg(host->pdev, &crq->sg[0], crq->n_elem, pci_dir);
1062
1063         carm_end_rq(host, crq, error);
1064 }
1065
1066 static inline void carm_handle_resp(struct carm_host *host,
1067                                     __le32 ret_handle_le, u32 status)
1068 {
1069         u32 handle = le32_to_cpu(ret_handle_le);
1070         unsigned int msg_idx;
1071         struct carm_request *crq;
1072         int error = (status == RMSG_OK) ? 0 : -EIO;
1073         u8 *mem;
1074
1075         VPRINTK("ENTER, handle == 0x%x\n", handle);
1076
1077         if (unlikely(!TAG_VALID(handle))) {
1078                 printk(KERN_ERR DRV_NAME "(%s): BUG: invalid tag 0x%x\n",
1079                        pci_name(host->pdev), handle);
1080                 return;
1081         }
1082
1083         msg_idx = TAG_DECODE(handle);
1084         VPRINTK("tag == %u\n", msg_idx);
1085
1086         crq = &host->req[msg_idx];
1087
1088         /* fast path */
1089         if (likely(crq->msg_type == CARM_MSG_READ ||
1090                    crq->msg_type == CARM_MSG_WRITE)) {
1091                 carm_handle_rw(host, crq, error);
1092                 return;
1093         }
1094
1095         mem = carm_ref_msg(host, msg_idx);
1096
1097         switch (crq->msg_type) {
1098         case CARM_MSG_IOCTL: {
1099                 switch (crq->msg_subtype) {
1100                 case CARM_IOC_SCAN_CHAN:
1101                         carm_handle_scan_chan(host, crq, mem, error);
1102                         break;
1103                 default:
1104                         /* unknown / invalid response */
1105                         goto err_out;
1106                 }
1107                 break;
1108         }
1109
1110         case CARM_MSG_MISC: {
1111                 switch (crq->msg_subtype) {
1112                 case MISC_ALLOC_MEM:
1113                         carm_handle_generic(host, crq, error,
1114                                             HST_ALLOC_BUF, HST_SYNC_TIME);
1115                         break;
1116                 case MISC_SET_TIME:
1117                         carm_handle_generic(host, crq, error,
1118                                             HST_SYNC_TIME, HST_GET_FW_VER);
1119                         break;
1120                 case MISC_GET_FW_VER: {
1121                         struct carm_fw_ver *ver = (struct carm_fw_ver *)
1122                                 (mem + sizeof(struct carm_msg_get_fw_ver));
1123                         if (!error) {
1124                                 host->fw_ver = le32_to_cpu(ver->version);
1125                                 host->flags |= (ver->features & FL_FW_VER_MASK);
1126                         }
1127                         carm_handle_generic(host, crq, error,
1128                                             HST_GET_FW_VER, HST_PORT_SCAN);
1129                         break;
1130                 }
1131                 default:
1132                         /* unknown / invalid response */
1133                         goto err_out;
1134                 }
1135                 break;
1136         }
1137
1138         case CARM_MSG_ARRAY: {
1139                 switch (crq->msg_subtype) {
1140                 case CARM_ARRAY_INFO:
1141                         carm_handle_array_info(host, crq, mem, error);
1142                         break;
1143                 default:
1144                         /* unknown / invalid response */
1145                         goto err_out;
1146                 }
1147                 break;
1148         }
1149
1150         default:
1151                 /* unknown / invalid response */
1152                 goto err_out;
1153         }
1154
1155         return;
1156
1157 err_out:
1158         printk(KERN_WARNING DRV_NAME "(%s): BUG: unhandled message type %d/%d\n",
1159                pci_name(host->pdev), crq->msg_type, crq->msg_subtype);
1160         carm_end_rq(host, crq, -EIO);
1161 }
1162
1163 static inline void carm_handle_responses(struct carm_host *host)
1164 {
1165         void __iomem *mmio = host->mmio;
1166         struct carm_response *resp = (struct carm_response *) host->shm;
1167         unsigned int work = 0;
1168         unsigned int idx = host->resp_idx % RMSG_Q_LEN;
1169
1170         while (1) {
1171                 u32 status = le32_to_cpu(resp[idx].status);
1172
1173                 if (status == 0xffffffff) {
1174                         VPRINTK("ending response on index %u\n", idx);
1175                         writel(idx << 3, mmio + CARM_RESP_IDX);
1176                         break;
1177                 }
1178
1179                 /* response to a message we sent */
1180                 else if ((status & (1 << 31)) == 0) {
1181                         VPRINTK("handling msg response on index %u\n", idx);
1182                         carm_handle_resp(host, resp[idx].ret_handle, status);
1183                         resp[idx].status = cpu_to_le32(0xffffffff);
1184                 }
1185
1186                 /* asynchronous events the hardware throws our way */
1187                 else if ((status & 0xff000000) == (1 << 31)) {
1188                         u8 *evt_type_ptr = (u8 *) &resp[idx];
1189                         u8 evt_type = *evt_type_ptr;
1190                         printk(KERN_WARNING DRV_NAME "(%s): unhandled event type %d\n",
1191                                pci_name(host->pdev), (int) evt_type);
1192                         resp[idx].status = cpu_to_le32(0xffffffff);
1193                 }
1194
1195                 idx = NEXT_RESP(idx);
1196                 work++;
1197         }
1198
1199         VPRINTK("EXIT, work==%u\n", work);
1200         host->resp_idx += work;
1201 }
1202
1203 static irqreturn_t carm_interrupt(int irq, void *__host)
1204 {
1205         struct carm_host *host = __host;
1206         void __iomem *mmio;
1207         u32 mask;
1208         int handled = 0;
1209         unsigned long flags;
1210
1211         if (!host) {
1212                 VPRINTK("no host\n");
1213                 return IRQ_NONE;
1214         }
1215
1216         spin_lock_irqsave(&host->lock, flags);
1217
1218         mmio = host->mmio;
1219
1220         /* reading should also clear interrupts */
1221         mask = readl(mmio + CARM_INT_STAT);
1222
1223         if (mask == 0 || mask == 0xffffffff) {
1224                 VPRINTK("no work, mask == 0x%x\n", mask);
1225                 goto out;
1226         }
1227
1228         if (mask & INT_ACK_MASK)
1229                 writel(mask, mmio + CARM_INT_STAT);
1230
1231         if (unlikely(host->state == HST_INVALID)) {
1232                 VPRINTK("not initialized yet, mask = 0x%x\n", mask);
1233                 goto out;
1234         }
1235
1236         if (mask & CARM_HAVE_RESP) {
1237                 handled = 1;
1238                 carm_handle_responses(host);
1239         }
1240
1241 out:
1242         spin_unlock_irqrestore(&host->lock, flags);
1243         VPRINTK("EXIT\n");
1244         return IRQ_RETVAL(handled);
1245 }
1246
1247 static void carm_fsm_task (struct work_struct *work)
1248 {
1249         struct carm_host *host =
1250                 container_of(work, struct carm_host, fsm_task);
1251         unsigned long flags;
1252         unsigned int state;
1253         int rc, i, next_dev;
1254         int reschedule = 0;
1255         int new_state = HST_INVALID;
1256
1257         spin_lock_irqsave(&host->lock, flags);
1258         state = host->state;
1259         spin_unlock_irqrestore(&host->lock, flags);
1260
1261         DPRINTK("ENTER, state == %s\n", state_name[state]);
1262
1263         switch (state) {
1264         case HST_PROBE_START:
1265                 new_state = HST_ALLOC_BUF;
1266                 reschedule = 1;
1267                 break;
1268
1269         case HST_ALLOC_BUF:
1270                 rc = carm_send_special(host, carm_fill_alloc_buf);
1271                 if (rc) {
1272                         new_state = HST_ERROR;
1273                         reschedule = 1;
1274                 }
1275                 break;
1276
1277         case HST_SYNC_TIME:
1278                 rc = carm_send_special(host, carm_fill_sync_time);
1279                 if (rc) {
1280                         new_state = HST_ERROR;
1281                         reschedule = 1;
1282                 }
1283                 break;
1284
1285         case HST_GET_FW_VER:
1286                 rc = carm_send_special(host, carm_fill_get_fw_ver);
1287                 if (rc) {
1288                         new_state = HST_ERROR;
1289                         reschedule = 1;
1290                 }
1291                 break;
1292
1293         case HST_PORT_SCAN:
1294                 rc = carm_send_special(host, carm_fill_scan_channels);
1295                 if (rc) {
1296                         new_state = HST_ERROR;
1297                         reschedule = 1;
1298                 }
1299                 break;
1300
1301         case HST_DEV_SCAN_START:
1302                 host->cur_scan_dev = -1;
1303                 new_state = HST_DEV_SCAN;
1304                 reschedule = 1;
1305                 break;
1306
1307         case HST_DEV_SCAN:
1308                 next_dev = -1;
1309                 for (i = host->cur_scan_dev + 1; i < CARM_MAX_PORTS; i++)
1310                         if (host->dev_present & (1 << i)) {
1311                                 next_dev = i;
1312                                 break;
1313                         }
1314
1315                 if (next_dev >= 0) {
1316                         host->cur_scan_dev = next_dev;
1317                         rc = carm_array_info(host, next_dev);
1318                         if (rc) {
1319                                 new_state = HST_ERROR;
1320                                 reschedule = 1;
1321                         }
1322                 } else {
1323                         new_state = HST_DEV_ACTIVATE;
1324                         reschedule = 1;
1325                 }
1326                 break;
1327
1328         case HST_DEV_ACTIVATE: {
1329                 int activated = 0;
1330                 for (i = 0; i < CARM_MAX_PORTS; i++)
1331                         if (host->dev_active & (1 << i)) {
1332                                 struct carm_port *port = &host->port[i];
1333                                 struct gendisk *disk = port->disk;
1334
1335                                 set_capacity(disk, port->capacity);
1336                                 add_disk(disk);
1337                                 activated++;
1338                         }
1339
1340                 printk(KERN_INFO DRV_NAME "(%s): %d ports activated\n",
1341                        pci_name(host->pdev), activated);
1342
1343                 new_state = HST_PROBE_FINISHED;
1344                 reschedule = 1;
1345                 break;
1346         }
1347
1348         case HST_PROBE_FINISHED:
1349                 complete(&host->probe_comp);
1350                 break;
1351
1352         case HST_ERROR:
1353                 /* FIXME: TODO */
1354                 break;
1355
1356         default:
1357                 /* should never occur */
1358                 printk(KERN_ERR PFX "BUG: unknown state %d\n", state);
1359                 assert(0);
1360                 break;
1361         }
1362
1363         if (new_state != HST_INVALID) {
1364                 spin_lock_irqsave(&host->lock, flags);
1365                 host->state = new_state;
1366                 spin_unlock_irqrestore(&host->lock, flags);
1367         }
1368         if (reschedule)
1369                 schedule_work(&host->fsm_task);
1370 }
1371
1372 static int carm_init_wait(void __iomem *mmio, u32 bits, unsigned int test_bit)
1373 {
1374         unsigned int i;
1375
1376         for (i = 0; i < 50000; i++) {
1377                 u32 tmp = readl(mmio + CARM_LMUC);
1378                 udelay(100);
1379
1380                 if (test_bit) {
1381                         if ((tmp & bits) == bits)
1382                                 return 0;
1383                 } else {
1384                         if ((tmp & bits) == 0)
1385                                 return 0;
1386                 }
1387
1388                 cond_resched();
1389         }
1390
1391         printk(KERN_ERR PFX "carm_init_wait timeout, bits == 0x%x, test_bit == %s\n",
1392                bits, test_bit ? "yes" : "no");
1393         return -EBUSY;
1394 }
1395
1396 static void carm_init_responses(struct carm_host *host)
1397 {
1398         void __iomem *mmio = host->mmio;
1399         unsigned int i;
1400         struct carm_response *resp = (struct carm_response *) host->shm;
1401
1402         for (i = 0; i < RMSG_Q_LEN; i++)
1403                 resp[i].status = cpu_to_le32(0xffffffff);
1404
1405         writel(0, mmio + CARM_RESP_IDX);
1406 }
1407
1408 static int carm_init_host(struct carm_host *host)
1409 {
1410         void __iomem *mmio = host->mmio;
1411         u32 tmp;
1412         u8 tmp8;
1413         int rc;
1414
1415         DPRINTK("ENTER\n");
1416
1417         writel(0, mmio + CARM_INT_MASK);
1418
1419         tmp8 = readb(mmio + CARM_INITC);
1420         if (tmp8 & 0x01) {
1421                 tmp8 &= ~0x01;
1422                 writeb(tmp8, mmio + CARM_INITC);
1423                 readb(mmio + CARM_INITC);       /* flush */
1424
1425                 DPRINTK("snooze...\n");
1426                 msleep(5000);
1427         }
1428
1429         tmp = readl(mmio + CARM_HMUC);
1430         if (tmp & CARM_CME) {
1431                 DPRINTK("CME bit present, waiting\n");
1432                 rc = carm_init_wait(mmio, CARM_CME, 1);
1433                 if (rc) {
1434                         DPRINTK("EXIT, carm_init_wait 1 failed\n");
1435                         return rc;
1436                 }
1437         }
1438         if (tmp & CARM_RME) {
1439                 DPRINTK("RME bit present, waiting\n");
1440                 rc = carm_init_wait(mmio, CARM_RME, 1);
1441                 if (rc) {
1442                         DPRINTK("EXIT, carm_init_wait 2 failed\n");
1443                         return rc;
1444                 }
1445         }
1446
1447         tmp &= ~(CARM_RME | CARM_CME);
1448         writel(tmp, mmio + CARM_HMUC);
1449         readl(mmio + CARM_HMUC);        /* flush */
1450
1451         rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 0);
1452         if (rc) {
1453                 DPRINTK("EXIT, carm_init_wait 3 failed\n");
1454                 return rc;
1455         }
1456
1457         carm_init_buckets(mmio);
1458
1459         writel(host->shm_dma & 0xffffffff, mmio + RBUF_ADDR_LO);
1460         writel((host->shm_dma >> 16) >> 16, mmio + RBUF_ADDR_HI);
1461         writel(RBUF_LEN, mmio + RBUF_BYTE_SZ);
1462
1463         tmp = readl(mmio + CARM_HMUC);
1464         tmp |= (CARM_RME | CARM_CME | CARM_WZBC);
1465         writel(tmp, mmio + CARM_HMUC);
1466         readl(mmio + CARM_HMUC);        /* flush */
1467
1468         rc = carm_init_wait(mmio, CARM_RME | CARM_CME, 1);
1469         if (rc) {
1470                 DPRINTK("EXIT, carm_init_wait 4 failed\n");
1471                 return rc;
1472         }
1473
1474         writel(0, mmio + CARM_HMPHA);
1475         writel(INT_DEF_MASK, mmio + CARM_INT_MASK);
1476
1477         carm_init_responses(host);
1478
1479         /* start initialization, probing state machine */
1480         spin_lock_irq(&host->lock);
1481         assert(host->state == HST_INVALID);
1482         host->state = HST_PROBE_START;
1483         spin_unlock_irq(&host->lock);
1484         schedule_work(&host->fsm_task);
1485
1486         DPRINTK("EXIT\n");
1487         return 0;
1488 }
1489
1490 static int carm_init_disks(struct carm_host *host)
1491 {
1492         unsigned int i;
1493         int rc = 0;
1494
1495         for (i = 0; i < CARM_MAX_PORTS; i++) {
1496                 struct gendisk *disk;
1497                 struct request_queue *q;
1498                 struct carm_port *port;
1499
1500                 port = &host->port[i];
1501                 port->host = host;
1502                 port->port_no = i;
1503
1504                 disk = alloc_disk(CARM_MINORS_PER_MAJOR);
1505                 if (!disk) {
1506                         rc = -ENOMEM;
1507                         break;
1508                 }
1509
1510                 port->disk = disk;
1511                 sprintf(disk->disk_name, DRV_NAME "/%u",
1512                         (unsigned int) (host->id * CARM_MAX_PORTS) + i);
1513                 disk->major = host->major;
1514                 disk->first_minor = i * CARM_MINORS_PER_MAJOR;
1515                 disk->fops = &carm_bd_ops;
1516                 disk->private_data = port;
1517
1518                 q = blk_init_queue(carm_rq_fn, &host->lock);
1519                 if (!q) {
1520                         rc = -ENOMEM;
1521                         break;
1522                 }
1523                 disk->queue = q;
1524                 blk_queue_max_segments(q, CARM_MAX_REQ_SG);
1525                 blk_queue_segment_boundary(q, CARM_SG_BOUNDARY);
1526
1527                 q->queuedata = port;
1528         }
1529
1530         return rc;
1531 }
1532
1533 static void carm_free_disks(struct carm_host *host)
1534 {
1535         unsigned int i;
1536
1537         for (i = 0; i < CARM_MAX_PORTS; i++) {
1538                 struct gendisk *disk = host->port[i].disk;
1539                 if (disk) {
1540                         struct request_queue *q = disk->queue;
1541
1542                         if (disk->flags & GENHD_FL_UP)
1543                                 del_gendisk(disk);
1544                         if (q)
1545                                 blk_cleanup_queue(q);
1546                         put_disk(disk);
1547                 }
1548         }
1549 }
1550
1551 static int carm_init_shm(struct carm_host *host)
1552 {
1553         host->shm = pci_alloc_consistent(host->pdev, CARM_SHM_SIZE,
1554                                          &host->shm_dma);
1555         if (!host->shm)
1556                 return -ENOMEM;
1557
1558         host->msg_base = host->shm + RBUF_LEN;
1559         host->msg_dma = host->shm_dma + RBUF_LEN;
1560
1561         memset(host->shm, 0xff, RBUF_LEN);
1562         memset(host->msg_base, 0, PDC_SHM_SIZE - RBUF_LEN);
1563
1564         return 0;
1565 }
1566
1567 static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1568 {
1569         struct carm_host *host;
1570         unsigned int pci_dac;
1571         int rc;
1572         struct request_queue *q;
1573         unsigned int i;
1574
1575         printk_once(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
1576
1577         rc = pci_enable_device(pdev);
1578         if (rc)
1579                 return rc;
1580
1581         rc = pci_request_regions(pdev, DRV_NAME);
1582         if (rc)
1583                 goto err_out;
1584
1585 #ifdef IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
1586         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1587         if (!rc) {
1588                 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
1589                 if (rc) {
1590                         printk(KERN_ERR DRV_NAME "(%s): consistent DMA mask failure\n",
1591                                 pci_name(pdev));
1592                         goto err_out_regions;
1593                 }
1594                 pci_dac = 1;
1595         } else {
1596 #endif
1597                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1598                 if (rc) {
1599                         printk(KERN_ERR DRV_NAME "(%s): DMA mask failure\n",
1600                                 pci_name(pdev));
1601                         goto err_out_regions;
1602                 }
1603                 pci_dac = 0;
1604 #ifdef IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
1605         }
1606 #endif
1607
1608         host = kzalloc(sizeof(*host), GFP_KERNEL);
1609         if (!host) {
1610                 printk(KERN_ERR DRV_NAME "(%s): memory alloc failure\n",
1611                        pci_name(pdev));
1612                 rc = -ENOMEM;
1613                 goto err_out_regions;
1614         }
1615
1616         host->pdev = pdev;
1617         host->flags = pci_dac ? FL_DAC : 0;
1618         spin_lock_init(&host->lock);
1619         INIT_WORK(&host->fsm_task, carm_fsm_task);
1620         init_completion(&host->probe_comp);
1621
1622         for (i = 0; i < ARRAY_SIZE(host->req); i++)
1623                 host->req[i].tag = i;
1624
1625         host->mmio = ioremap(pci_resource_start(pdev, 0),
1626                              pci_resource_len(pdev, 0));
1627         if (!host->mmio) {
1628                 printk(KERN_ERR DRV_NAME "(%s): MMIO alloc failure\n",
1629                        pci_name(pdev));
1630                 rc = -ENOMEM;
1631                 goto err_out_kfree;
1632         }
1633
1634         rc = carm_init_shm(host);
1635         if (rc) {
1636                 printk(KERN_ERR DRV_NAME "(%s): DMA SHM alloc failure\n",
1637                        pci_name(pdev));
1638                 goto err_out_iounmap;
1639         }
1640
1641         q = blk_init_queue(carm_oob_rq_fn, &host->lock);
1642         if (!q) {
1643                 printk(KERN_ERR DRV_NAME "(%s): OOB queue alloc failure\n",
1644                        pci_name(pdev));
1645                 rc = -ENOMEM;
1646                 goto err_out_pci_free;
1647         }
1648         host->oob_q = q;
1649         q->queuedata = host;
1650
1651         /*
1652          * Figure out which major to use: 160, 161, or dynamic
1653          */
1654         if (!test_and_set_bit(0, &carm_major_alloc))
1655                 host->major = 160;
1656         else if (!test_and_set_bit(1, &carm_major_alloc))
1657                 host->major = 161;
1658         else
1659                 host->flags |= FL_DYN_MAJOR;
1660
1661         host->id = carm_host_id;
1662         sprintf(host->name, DRV_NAME "%d", carm_host_id);
1663
1664         rc = register_blkdev(host->major, host->name);
1665         if (rc < 0)
1666                 goto err_out_free_majors;
1667         if (host->flags & FL_DYN_MAJOR)
1668                 host->major = rc;
1669
1670         rc = carm_init_disks(host);
1671         if (rc)
1672                 goto err_out_blkdev_disks;
1673
1674         pci_set_master(pdev);
1675
1676         rc = request_irq(pdev->irq, carm_interrupt, IRQF_SHARED, DRV_NAME, host);
1677         if (rc) {
1678                 printk(KERN_ERR DRV_NAME "(%s): irq alloc failure\n",
1679                        pci_name(pdev));
1680                 goto err_out_blkdev_disks;
1681         }
1682
1683         rc = carm_init_host(host);
1684         if (rc)
1685                 goto err_out_free_irq;
1686
1687         DPRINTK("waiting for probe_comp\n");
1688         wait_for_completion(&host->probe_comp);
1689
1690         printk(KERN_INFO "%s: pci %s, ports %d, io %llx, irq %u, major %d\n",
1691                host->name, pci_name(pdev), (int) CARM_MAX_PORTS,
1692                (unsigned long long)pci_resource_start(pdev, 0),
1693                    pdev->irq, host->major);
1694
1695         carm_host_id++;
1696         pci_set_drvdata(pdev, host);
1697         return 0;
1698
1699 err_out_free_irq:
1700         free_irq(pdev->irq, host);
1701 err_out_blkdev_disks:
1702         carm_free_disks(host);
1703         unregister_blkdev(host->major, host->name);
1704 err_out_free_majors:
1705         if (host->major == 160)
1706                 clear_bit(0, &carm_major_alloc);
1707         else if (host->major == 161)
1708                 clear_bit(1, &carm_major_alloc);
1709         blk_cleanup_queue(host->oob_q);
1710 err_out_pci_free:
1711         pci_free_consistent(pdev, CARM_SHM_SIZE, host->shm, host->shm_dma);
1712 err_out_iounmap:
1713         iounmap(host->mmio);
1714 err_out_kfree:
1715         kfree(host);
1716 err_out_regions:
1717         pci_release_regions(pdev);
1718 err_out:
1719         pci_disable_device(pdev);
1720         return rc;
1721 }
1722
1723 static void carm_remove_one (struct pci_dev *pdev)
1724 {
1725         struct carm_host *host = pci_get_drvdata(pdev);
1726
1727         if (!host) {
1728                 printk(KERN_ERR PFX "BUG: no host data for PCI(%s)\n",
1729                        pci_name(pdev));
1730                 return;
1731         }
1732
1733         free_irq(pdev->irq, host);
1734         carm_free_disks(host);
1735         unregister_blkdev(host->major, host->name);
1736         if (host->major == 160)
1737                 clear_bit(0, &carm_major_alloc);
1738         else if (host->major == 161)
1739                 clear_bit(1, &carm_major_alloc);
1740         blk_cleanup_queue(host->oob_q);
1741         pci_free_consistent(pdev, CARM_SHM_SIZE, host->shm, host->shm_dma);
1742         iounmap(host->mmio);
1743         kfree(host);
1744         pci_release_regions(pdev);
1745         pci_disable_device(pdev);
1746 }
1747
1748 module_pci_driver(carm_driver);