drivers/char/tpm/tpm_crb.c

   1 /*
   2  * Copyright (C) 2014 Intel Corporation
   3  *
   4  * Authors:
   5  * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
   6  *
   7  * Maintained by: <tpmdd-devel@lists.sourceforge.net>
   8  *
   9  * This device driver implements the TPM interface as defined in
  10  * the TCG CRB 2.0 TPM specification.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; version 2
  15  * of the License.
  16  */
  17
  18 #include <linux/acpi.h>
  19 #include <linux/highmem.h>
  20 #include <linux/rculist.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_device.h>
  23 #include "tpm.h"
  24
  25 #define ACPI_SIG_TPM2 "TPM2"
  26
  27 static const u8 CRB_ACPI_START_UUID[] = {
  28         /* 0000 */ 0xAB, 0x6C, 0xBF, 0x6B, 0x63, 0x54, 0x14, 0x47,
  29         /* 0008 */ 0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4
  30 };
  31
  32 enum crb_defaults {
  33         CRB_ACPI_START_REVISION_ID = 1,
  34         CRB_ACPI_START_INDEX = 1,
  35 };
  36
  37 enum crb_ca_request {
  38         CRB_CA_REQ_GO_IDLE      = BIT(0),
  39         CRB_CA_REQ_CMD_READY    = BIT(1),
  40 };
  41
  42 enum crb_ca_status {
  43         CRB_CA_STS_ERROR        = BIT(0),
  44         CRB_CA_STS_TPM_IDLE     = BIT(1),
  45 };
  46
  47 enum crb_start {
  48         CRB_START_INVOKE        = BIT(0),
  49 };
  50
  51 enum crb_cancel {
  52         CRB_CANCEL_INVOKE       = BIT(0),
  53 };
  54
  55 struct crb_control_area {
  56         u32 req;
  57         u32 sts;
  58         u32 cancel;
  59         u32 start;
  60         u32 int_enable;
  61         u32 int_sts;
  62         u32 cmd_size;
  63         u32 cmd_pa_low;
  64         u32 cmd_pa_high;
  65         u32 rsp_size;
  66         u64 rsp_pa;
  67 } __packed;
  68
  69 enum crb_status {
  70         CRB_STS_COMPLETE        = BIT(0),
  71 };
  72
  73 enum crb_flags {
  74         CRB_FL_ACPI_START       = BIT(0),
  75         CRB_FL_CRB_START        = BIT(1),
  76 };
  77
  78 struct crb_priv {
  79         unsigned int flags;
  80         struct resource res;
  81         void __iomem *iobase;
  82         struct crb_control_area __iomem *cca;
  83         u8 __iomem *cmd;
  84         u8 __iomem *rsp;
  85 };
  86
  87 static SIMPLE_DEV_PM_OPS(crb_pm, tpm_pm_suspend, tpm_pm_resume);
  88
  89 static u8 crb_status(struct tpm_chip *chip)
  90 {
  91         struct crb_priv *priv = chip->vendor.priv;
  92         u8 sts = 0;
  93
  94         if ((ioread32(&priv->cca->start) & CRB_START_INVOKE) !=
  95             CRB_START_INVOKE)
  96                 sts |= CRB_STS_COMPLETE;
  97
  98         return sts;
  99 }
 100
 101 static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count)
 102 {
 103         struct crb_priv *priv = chip->vendor.priv;
 104         unsigned int expected;
 105
 106         /* sanity check */
 107         if (count < 6)
 108                 return -EIO;
 109
 110         if (ioread32(&priv->cca->sts) & CRB_CA_STS_ERROR)
 111                 return -EIO;
 112
 113         memcpy_fromio(buf, priv->rsp, 6);
 114         expected = be32_to_cpup((__be32 *) &buf[2]);
 115
 116         if (expected > count)
 117                 return -EIO;
 118
 119         memcpy_fromio(&buf[6], &priv->rsp[6], expected - 6);
 120
 121         return expected;
 122 }
 123
 124 static int crb_do_acpi_start(struct tpm_chip *chip)
 125 {
 126         union acpi_object *obj;
 127         int rc;
 128
 129         obj = acpi_evaluate_dsm(chip->acpi_dev_handle,
 130                                 CRB_ACPI_START_UUID,
 131                                 CRB_ACPI_START_REVISION_ID,
 132                                 CRB_ACPI_START_INDEX,
 133                                 NULL);
 134         if (!obj)
 135                 return -ENXIO;
 136         rc = obj->integer.value == 0 ? 0 : -ENXIO;
 137         ACPI_FREE(obj);
 138         return rc;
 139 }
 140
 141 static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
 142 {
 143         struct crb_priv *priv = chip->vendor.priv;
 144         int rc = 0;
 145
 146         if (len > ioread32(&priv->cca->cmd_size)) {
 147                 dev_err(&chip->dev,
 148                         "invalid command count value %x %zx\n",
 149                         (unsigned int) len,
 150                         (size_t) ioread32(&priv->cca->cmd_size));
 151                 return -E2BIG;
 152         }
 153
 154         memcpy_toio(priv->cmd, buf, len);
 155
 156         /* Make sure that cmd is populated before issuing start. */
 157         wmb();
 158
 159         if (priv->flags & CRB_FL_CRB_START)
 160                 iowrite32(cpu_to_le32(CRB_START_INVOKE), &priv->cca->start);
 161
 162         if (priv->flags & CRB_FL_ACPI_START)
 163                 rc = crb_do_acpi_start(chip);
 164
 165         return rc;
 166 }
 167
 168 static void crb_cancel(struct tpm_chip *chip)
 169 {
 170         struct crb_priv *priv = chip->vendor.priv;
 171
 172         iowrite32(cpu_to_le32(CRB_CANCEL_INVOKE), &priv->cca->cancel);
 173
 174         /* Make sure that cmd is populated before issuing cancel. */
 175         wmb();
 176
 177         if ((priv->flags & CRB_FL_ACPI_START) && crb_do_acpi_start(chip))
 178                 dev_err(&chip->dev, "ACPI Start failed\n");
 179
 180         iowrite32(0, &priv->cca->cancel);
 181 }
 182
 183 static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
 184 {
 185         struct crb_priv *priv = chip->vendor.priv;
 186         u32 cancel = ioread32(&priv->cca->cancel);
 187
 188         return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
 189 }
 190
 191 static const struct tpm_class_ops tpm_crb = {
 192         .status = crb_status,
 193         .recv = crb_recv,
 194         .send = crb_send,
 195         .cancel = crb_cancel,
 196         .req_canceled = crb_req_canceled,
 197         .req_complete_mask = CRB_STS_COMPLETE,
 198         .req_complete_val = CRB_STS_COMPLETE,
 199 };
 200
 201 static int crb_init(struct acpi_device *device, struct crb_priv *priv)
 202 {
 203         struct tpm_chip *chip;
 204         int rc;
 205
 206         chip = tpmm_chip_alloc(&device->dev, &tpm_crb);
 207         if (IS_ERR(chip))
 208                 return PTR_ERR(chip);
 209
 210         chip->vendor.priv = priv;
 211         chip->acpi_dev_handle = device->handle;
 212         chip->flags = TPM_CHIP_FLAG_TPM2;
 213
 214         rc = tpm_get_timeouts(chip);
 215         if (rc)
 216                 return rc;
 217
 218         rc = tpm2_do_selftest(chip);
 219         if (rc)
 220                 return rc;
 221
 222         return tpm_chip_register(chip);
 223 }
 224
 225 static int crb_check_resource(struct acpi_resource *ares, void *data)
 226 {
 227         struct crb_priv *priv = data;
 228         struct resource res;
 229
 230         if (acpi_dev_resource_memory(ares, &res))
 231                 priv->res = res;
 232
 233         return 1;
 234 }
 235
 236 static void __iomem *crb_map_res(struct device *dev, struct crb_priv *priv,
 237                                  u64 start, u32 size)
 238 {
 239         struct resource new_res = {
 240                 .start  = start,
 241                 .end    = start + size - 1,
 242                 .flags  = IORESOURCE_MEM,
 243         };
 244
 245         /* Detect a 64 bit address on a 32 bit system */
 246         if (start != new_res.start)
 247                 return ERR_PTR(-EINVAL);
 248
 249         if (!resource_contains(&priv->res, &new_res))
 250                 return devm_ioremap_resource(dev, &new_res);
 251
 252         return priv->iobase + (new_res.start - priv->res.start);
 253 }
 254
 255 static int crb_map_io(struct acpi_device *device, struct crb_priv *priv,
 256                       struct acpi_table_tpm2 *buf)
 257 {
 258         struct list_head resources;
 259         struct device *dev = &device->dev;
 260         u64 pa;
 261         int ret;
 262
 263         INIT_LIST_HEAD(&resources);
 264         ret = acpi_dev_get_resources(device, &resources, crb_check_resource,
 265                                      priv);
 266         if (ret < 0)
 267                 return ret;
 268         acpi_dev_free_resource_list(&resources);
 269
 270         if (resource_type(&priv->res) != IORESOURCE_MEM) {
 271                 dev_err(dev,
 272                         FW_BUG "TPM2 ACPI table does not define a memory resource\n");
 273                 return -EINVAL;
 274         }
 275
 276         priv->iobase = devm_ioremap_resource(dev, &priv->res);
 277         if (IS_ERR(priv->iobase))
 278                 return PTR_ERR(priv->iobase);
 279
 280         priv->cca = crb_map_res(dev, priv, buf->control_address, 0x1000);
 281         if (IS_ERR(priv->cca))
 282                 return PTR_ERR(priv->cca);
 283
 284         pa = ((u64) ioread32(&priv->cca->cmd_pa_high) << 32) |
 285               (u64) ioread32(&priv->cca->cmd_pa_low);
 286         priv->cmd = crb_map_res(dev, priv, pa, ioread32(&priv->cca->cmd_size));
 287         if (IS_ERR(priv->cmd))
 288                 return PTR_ERR(priv->cmd);
 289
 290         memcpy_fromio(&pa, &priv->cca->rsp_pa, 8);
 291         pa = le64_to_cpu(pa);
 292         priv->rsp = crb_map_res(dev, priv, pa, ioread32(&priv->cca->rsp_size));
 293         return PTR_ERR_OR_ZERO(priv->rsp);
 294 }
 295
 296 static int crb_acpi_add(struct acpi_device *device)
 297 {
 298         struct acpi_table_tpm2 *buf;
 299         struct crb_priv *priv;
 300         struct device *dev = &device->dev;
 301         acpi_status status;
 302         u32 sm;
 303         int rc;
 304
 305         status = acpi_get_table(ACPI_SIG_TPM2, 1,
 306                                 (struct acpi_table_header **) &buf);
 307         if (ACPI_FAILURE(status) || buf->header.length < sizeof(*buf)) {
 308                 dev_err(dev, FW_BUG "failed to get TPM2 ACPI table\n");
 309                 return -EINVAL;
 310         }
 311
 312         /* Should the FIFO driver handle this? */
 313         sm = buf->start_method;
 314         if (sm == ACPI_TPM2_MEMORY_MAPPED)
 315                 return -ENODEV;
 316
 317         priv = devm_kzalloc(dev, sizeof(struct crb_priv), GFP_KERNEL);
 318         if (!priv)
 319                 return -ENOMEM;
 320
 321         /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs
 322          * report only ACPI start but in practice seems to require both
 323          * ACPI start and CRB start.
 324          */
 325         if (sm == ACPI_TPM2_COMMAND_BUFFER || sm == ACPI_TPM2_MEMORY_MAPPED ||
 326             !strcmp(acpi_device_hid(device), "MSFT0101"))
 327                 priv->flags |= CRB_FL_CRB_START;
 328
 329         if (sm == ACPI_TPM2_START_METHOD ||
 330             sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD)
 331                 priv->flags |= CRB_FL_ACPI_START;
 332
 333         rc = crb_map_io(device, priv, buf);
 334         if (rc)
 335                 return rc;
 336
 337         return crb_init(device, priv);
 338 }
 339
 340 static int crb_acpi_remove(struct acpi_device *device)
 341 {
 342         struct device *dev = &device->dev;
 343         struct tpm_chip *chip = dev_get_drvdata(dev);
 344
 345         tpm_chip_unregister(chip);
 346
 347         if (chip->flags & TPM_CHIP_FLAG_TPM2)
 348                 tpm2_shutdown(chip, TPM2_SU_CLEAR);
 349
 350         return 0;
 351 }
 352
 353 static struct acpi_device_id crb_device_ids[] = {
 354         {"MSFT0101", 0},
 355         {"", 0},
 356 };
 357 MODULE_DEVICE_TABLE(acpi, crb_device_ids);
 358
 359 static struct acpi_driver crb_acpi_driver = {
 360         .name = "tpm_crb",
 361         .ids = crb_device_ids,
 362         .ops = {
 363                 .add = crb_acpi_add,
 364                 .remove = crb_acpi_remove,
 365         },
 366         .drv = {
 367                 .pm = &crb_pm,
 368         },
 369 };
 370
 371 module_acpi_driver(crb_acpi_driver);
 372 MODULE_AUTHOR("Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>");
 373 MODULE_DESCRIPTION("TPM2 Driver");
 374 MODULE_VERSION("0.1");
 375 MODULE_LICENSE("GPL");