drivers/cpufreq/intel_pstate.c

   1 /*
   2  * intel_pstate.c: Native P state management for Intel processors
   3  *
   4  * (C) Copyright 2012 Intel Corporation
   5  * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; version 2
  10  * of the License.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/kernel_stat.h>
  15 #include <linux/module.h>
  16 #include <linux/ktime.h>
  17 #include <linux/hrtimer.h>
  18 #include <linux/tick.h>
  19 #include <linux/slab.h>
  20 #include <linux/sched.h>
  21 #include <linux/list.h>
  22 #include <linux/cpu.h>
  23 #include <linux/cpufreq.h>
  24 #include <linux/sysfs.h>
  25 #include <linux/types.h>
  26 #include <linux/fs.h>
  27 #include <linux/debugfs.h>
  28 #include <linux/acpi.h>
  29 #include <trace/events/power.h>
  30
  31 #include <asm/div64.h>
  32 #include <asm/msr.h>
  33 #include <asm/cpu_device_id.h>
  34
  35 #define BYT_RATIOS              0x66a
  36 #define BYT_VIDS                0x66b
  37 #define BYT_TURBO_RATIOS        0x66c
  38 #define BYT_TURBO_VIDS          0x66d
  39
  40 #define FRAC_BITS 8
  41 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
  42 #define fp_toint(X) ((X) >> FRAC_BITS)
  43
  44
  45 static inline int32_t mul_fp(int32_t x, int32_t y)
  46 {
  47         return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
  48 }
  49
  50 static inline int32_t div_fp(int32_t x, int32_t y)
  51 {
  52         return div_s64((int64_t)x << FRAC_BITS, y);
  53 }
  54
  55 static inline int ceiling_fp(int32_t x)
  56 {
  57         int mask, ret;
  58
  59         ret = fp_toint(x);
  60         mask = (1 << FRAC_BITS) - 1;
  61         if (x & mask)
  62                 ret += 1;
  63         return ret;
  64 }
  65
  66 struct sample {
  67         int32_t core_pct_busy;
  68         u64 aperf;
  69         u64 mperf;
  70         int freq;
  71         ktime_t time;
  72 };
  73
  74 struct pstate_data {
  75         int     current_pstate;
  76         int     min_pstate;
  77         int     max_pstate;
  78         int     scaling;
  79         int     turbo_pstate;
  80 };
  81
  82 struct vid_data {
  83         int min;
  84         int max;
  85         int turbo;
  86         int32_t ratio;
  87 };
  88
  89 struct _pid {
  90         int setpoint;
  91         int32_t integral;
  92         int32_t p_gain;
  93         int32_t i_gain;
  94         int32_t d_gain;
  95         int deadband;
  96         int32_t last_err;
  97 };
  98
  99 struct cpudata {
 100         int cpu;
 101
 102         struct timer_list timer;
 103
 104         struct pstate_data pstate;
 105         struct vid_data vid;
 106         struct _pid pid;
 107
 108         ktime_t last_sample_time;
 109         u64     prev_aperf;
 110         u64     prev_mperf;
 111         struct sample sample;
 112 };
 113
 114 static struct cpudata **all_cpu_data;
 115 struct pstate_adjust_policy {
 116         int sample_rate_ms;
 117         int deadband;
 118         int setpoint;
 119         int p_gain_pct;
 120         int d_gain_pct;
 121         int i_gain_pct;
 122 };
 123
 124 struct pstate_funcs {
 125         int (*get_max)(void);
 126         int (*get_min)(void);
 127         int (*get_turbo)(void);
 128         int (*get_scaling)(void);
 129         void (*set)(struct cpudata*, int pstate);
 130         void (*get_vid)(struct cpudata *);
 131 };
 132
 133 struct cpu_defaults {
 134         struct pstate_adjust_policy pid_policy;
 135         struct pstate_funcs funcs;
 136 };
 137
 138 static struct pstate_adjust_policy pid_params;
 139 static struct pstate_funcs pstate_funcs;
 140 static int hwp_active;
 141
 142 struct perf_limits {
 143         int no_turbo;
 144         int turbo_disabled;
 145         int max_perf_pct;
 146         int min_perf_pct;
 147         int32_t max_perf;
 148         int32_t min_perf;
 149         int max_policy_pct;
 150         int max_sysfs_pct;
 151 };
 152
 153 static struct perf_limits limits = {
 154         .no_turbo = 0,
 155         .turbo_disabled = 0,
 156         .max_perf_pct = 100,
 157         .max_perf = int_tofp(1),
 158         .min_perf_pct = 0,
 159         .min_perf = 0,
 160         .max_policy_pct = 100,
 161         .max_sysfs_pct = 100,
 162 };
 163
 164 static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
 165                              int deadband, int integral) {
 166         pid->setpoint = setpoint;
 167         pid->deadband  = deadband;
 168         pid->integral  = int_tofp(integral);
 169         pid->last_err  = int_tofp(setpoint) - int_tofp(busy);
 170 }
 171
 172 static inline void pid_p_gain_set(struct _pid *pid, int percent)
 173 {
 174         pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
 175 }
 176
 177 static inline void pid_i_gain_set(struct _pid *pid, int percent)
 178 {
 179         pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
 180 }
 181
 182 static inline void pid_d_gain_set(struct _pid *pid, int percent)
 183 {
 184         pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
 185 }
 186
 187 static signed int pid_calc(struct _pid *pid, int32_t busy)
 188 {
 189         signed int result;
 190         int32_t pterm, dterm, fp_error;
 191         int32_t integral_limit;
 192
 193         fp_error = int_tofp(pid->setpoint) - busy;
 194
 195         if (abs(fp_error) <= int_tofp(pid->deadband))
 196                 return 0;
 197
 198         pterm = mul_fp(pid->p_gain, fp_error);
 199
 200         pid->integral += fp_error;
 201
 202         /*
 203          * We limit the integral here so that it will never
 204          * get higher than 30.  This prevents it from becoming
 205          * too large an input over long periods of time and allows
 206          * it to get factored out sooner.
 207          *
 208          * The value of 30 was chosen through experimentation.
 209          */
 210         integral_limit = int_tofp(30);
 211         if (pid->integral > integral_limit)
 212                 pid->integral = integral_limit;
 213         if (pid->integral < -integral_limit)
 214                 pid->integral = -integral_limit;
 215
 216         dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
 217         pid->last_err = fp_error;
 218
 219         result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
 220         result = result + (1 << (FRAC_BITS-1));
 221         return (signed int)fp_toint(result);
 222 }
 223
 224 static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
 225 {
 226         pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
 227         pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
 228         pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
 229
 230         pid_reset(&cpu->pid, pid_params.setpoint, 100, pid_params.deadband, 0);
 231 }
 232
 233 static inline void intel_pstate_reset_all_pid(void)
 234 {
 235         unsigned int cpu;
 236
 237         for_each_online_cpu(cpu) {
 238                 if (all_cpu_data[cpu])
 239                         intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
 240         }
 241 }
 242
 243 static inline void update_turbo_state(void)
 244 {
 245         u64 misc_en;
 246         struct cpudata *cpu;
 247
 248         cpu = all_cpu_data[0];
 249         rdmsrl(MSR_IA32_MISC_ENABLE, misc_en);
 250         limits.turbo_disabled =
 251                 (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ||
 252                  cpu->pstate.max_pstate == cpu->pstate.turbo_pstate);
 253 }
 254
 255 #define PCT_TO_HWP(x) (x * 255 / 100)
 256 static void intel_pstate_hwp_set(void)
 257 {
 258         int min, max, cpu;
 259         u64 value, freq;
 260
 261         get_online_cpus();
 262
 263         for_each_online_cpu(cpu) {
 264                 rdmsrl_on_cpu(cpu, MSR_HWP_REQUEST, &value);
 265                 min = PCT_TO_HWP(limits.min_perf_pct);
 266                 value &= ~HWP_MIN_PERF(~0L);
 267                 value |= HWP_MIN_PERF(min);
 268
 269                 max = PCT_TO_HWP(limits.max_perf_pct);
 270                 if (limits.no_turbo) {
 271                         rdmsrl( MSR_HWP_CAPABILITIES, freq);
 272                         max = HWP_GUARANTEED_PERF(freq);
 273                 }
 274
 275                 value &= ~HWP_MAX_PERF(~0L);
 276                 value |= HWP_MAX_PERF(max);
 277                 wrmsrl_on_cpu(cpu, MSR_HWP_REQUEST, value);
 278         }
 279
 280         put_online_cpus();
 281 }
 282
 283 /************************** debugfs begin ************************/
 284 static int pid_param_set(void *data, u64 val)
 285 {
 286         *(u32 *)data = val;
 287         intel_pstate_reset_all_pid();
 288         return 0;
 289 }
 290
 291 static int pid_param_get(void *data, u64 *val)
 292 {
 293         *val = *(u32 *)data;
 294         return 0;
 295 }
 296 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get, pid_param_set, "%llu\n");
 297
 298 struct pid_param {
 299         char *name;
 300         void *value;
 301 };
 302
 303 static struct pid_param pid_files[] = {
 304         {"sample_rate_ms", &pid_params.sample_rate_ms},
 305         {"d_gain_pct", &pid_params.d_gain_pct},
 306         {"i_gain_pct", &pid_params.i_gain_pct},
 307         {"deadband", &pid_params.deadband},
 308         {"setpoint", &pid_params.setpoint},
 309         {"p_gain_pct", &pid_params.p_gain_pct},
 310         {NULL, NULL}
 311 };
 312
 313 static void __init intel_pstate_debug_expose_params(void)
 314 {
 315         struct dentry *debugfs_parent;
 316         int i = 0;
 317
 318         if (hwp_active)
 319                 return;
 320         debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
 321         if (IS_ERR_OR_NULL(debugfs_parent))
 322                 return;
 323         while (pid_files[i].name) {
 324                 debugfs_create_file(pid_files[i].name, 0660,
 325                                     debugfs_parent, pid_files[i].value,
 326                                     &fops_pid_param);
 327                 i++;
 328         }
 329 }
 330
 331 /************************** debugfs end ************************/
 332
 333 /************************** sysfs begin ************************/
 334 #define show_one(file_name, object)                                     \
 335         static ssize_t show_##file_name                                 \
 336         (struct kobject *kobj, struct attribute *attr, char *buf)       \
 337         {                                                               \
 338                 return sprintf(buf, "%u\n", limits.object);             \
 339         }
 340
 341 static ssize_t show_turbo_pct(struct kobject *kobj,
 342                                 struct attribute *attr, char *buf)
 343 {
 344         struct cpudata *cpu;
 345         int total, no_turbo, turbo_pct;
 346         uint32_t turbo_fp;
 347
 348         cpu = all_cpu_data[0];
 349
 350         total = cpu->pstate.turbo_pstate - cpu->pstate.min_pstate + 1;
 351         no_turbo = cpu->pstate.max_pstate - cpu->pstate.min_pstate + 1;
 352         turbo_fp = div_fp(int_tofp(no_turbo), int_tofp(total));
 353         turbo_pct = 100 - fp_toint(mul_fp(turbo_fp, int_tofp(100)));
 354         return sprintf(buf, "%u\n", turbo_pct);
 355 }
 356
 357 static ssize_t show_no_turbo(struct kobject *kobj,
 358                              struct attribute *attr, char *buf)
 359 {
 360         ssize_t ret;
 361
 362         update_turbo_state();
 363         if (limits.turbo_disabled)
 364                 ret = sprintf(buf, "%u\n", limits.turbo_disabled);
 365         else
 366                 ret = sprintf(buf, "%u\n", limits.no_turbo);
 367
 368         return ret;
 369 }
 370
 371 static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
 372                               const char *buf, size_t count)
 373 {
 374         unsigned int input;
 375         int ret;
 376
 377         ret = sscanf(buf, "%u", &input);
 378         if (ret != 1)
 379                 return -EINVAL;
 380
 381         update_turbo_state();
 382         if (limits.turbo_disabled) {
 383                 pr_warn("Turbo disabled by BIOS or unavailable on processor\n");
 384                 return -EPERM;
 385         }
 386
 387         limits.no_turbo = clamp_t(int, input, 0, 1);
 388
 389         if (hwp_active)
 390                 intel_pstate_hwp_set();
 391
 392         return count;
 393 }
 394
 395 static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
 396                                   const char *buf, size_t count)
 397 {
 398         unsigned int input;
 399         int ret;
 400
 401         ret = sscanf(buf, "%u", &input);
 402         if (ret != 1)
 403                 return -EINVAL;
 404
 405         limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
 406         limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
 407         limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
 408
 409         if (hwp_active)
 410                 intel_pstate_hwp_set();
 411         return count;
 412 }
 413
 414 static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
 415                                   const char *buf, size_t count)
 416 {
 417         unsigned int input;
 418         int ret;
 419
 420         ret = sscanf(buf, "%u", &input);
 421         if (ret != 1)
 422                 return -EINVAL;
 423         limits.min_perf_pct = clamp_t(int, input, 0 , 100);
 424         limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
 425
 426         if (hwp_active)
 427                 intel_pstate_hwp_set();
 428         return count;
 429 }
 430
 431 show_one(max_perf_pct, max_perf_pct);
 432 show_one(min_perf_pct, min_perf_pct);
 433
 434 define_one_global_rw(no_turbo);
 435 define_one_global_rw(max_perf_pct);
 436 define_one_global_rw(min_perf_pct);
 437 define_one_global_ro(turbo_pct);
 438
 439 static struct attribute *intel_pstate_attributes[] = {
 440         &no_turbo.attr,
 441         &max_perf_pct.attr,
 442         &min_perf_pct.attr,
 443         &turbo_pct.attr,
 444         NULL
 445 };
 446
 447 static struct attribute_group intel_pstate_attr_group = {
 448         .attrs = intel_pstate_attributes,
 449 };
 450
 451 static void __init intel_pstate_sysfs_expose_params(void)
 452 {
 453         struct kobject *intel_pstate_kobject;
 454         int rc;
 455
 456         intel_pstate_kobject = kobject_create_and_add("intel_pstate",
 457                                                 &cpu_subsys.dev_root->kobj);
 458         BUG_ON(!intel_pstate_kobject);
 459         rc = sysfs_create_group(intel_pstate_kobject, &intel_pstate_attr_group);
 460         BUG_ON(rc);
 461 }
 462 /************************** sysfs end ************************/
 463
 464 static void intel_pstate_hwp_enable(void)
 465 {
 466         hwp_active++;
 467         pr_info("intel_pstate HWP enabled\n");
 468
 469         wrmsrl( MSR_PM_ENABLE, 0x1);
 470 }
 471
 472 static int byt_get_min_pstate(void)
 473 {
 474         u64 value;
 475
 476         rdmsrl(BYT_RATIOS, value);
 477         return (value >> 8) & 0x7F;
 478 }
 479
 480 static int byt_get_max_pstate(void)
 481 {
 482         u64 value;
 483
 484         rdmsrl(BYT_RATIOS, value);
 485         return (value >> 16) & 0x7F;
 486 }
 487
 488 static int byt_get_turbo_pstate(void)
 489 {
 490         u64 value;
 491
 492         rdmsrl(BYT_TURBO_RATIOS, value);
 493         return value & 0x7F;
 494 }
 495
 496 static void byt_set_pstate(struct cpudata *cpudata, int pstate)
 497 {
 498         u64 val;
 499         int32_t vid_fp;
 500         u32 vid;
 501
 502         val = pstate << 8;
 503         if (limits.no_turbo && !limits.turbo_disabled)
 504                 val |= (u64)1 << 32;
 505
 506         vid_fp = cpudata->vid.min + mul_fp(
 507                 int_tofp(pstate - cpudata->pstate.min_pstate),
 508                 cpudata->vid.ratio);
 509
 510         vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
 511         vid = ceiling_fp(vid_fp);
 512
 513         if (pstate > cpudata->pstate.max_pstate)
 514                 vid = cpudata->vid.turbo;
 515
 516         val |= vid;
 517
 518         wrmsrl(MSR_IA32_PERF_CTL, val);
 519 }
 520
 521 #define BYT_BCLK_FREQS 5
 522 static int byt_freq_table[BYT_BCLK_FREQS] = { 833, 1000, 1333, 1167, 800};
 523
 524 static int byt_get_scaling(void)
 525 {
 526         u64 value;
 527         int i;
 528
 529         rdmsrl(MSR_FSB_FREQ, value);
 530         i = value & 0x3;
 531
 532         BUG_ON(i > BYT_BCLK_FREQS);
 533
 534         return byt_freq_table[i] * 100;
 535 }
 536
 537 static void byt_get_vid(struct cpudata *cpudata)
 538 {
 539         u64 value;
 540
 541         rdmsrl(BYT_VIDS, value);
 542         cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
 543         cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
 544         cpudata->vid.ratio = div_fp(
 545                 cpudata->vid.max - cpudata->vid.min,
 546                 int_tofp(cpudata->pstate.max_pstate -
 547                         cpudata->pstate.min_pstate));
 548
 549         rdmsrl(BYT_TURBO_VIDS, value);
 550         cpudata->vid.turbo = value & 0x7f;
 551 }
 552
 553 static int core_get_min_pstate(void)
 554 {
 555         u64 value;
 556
 557         rdmsrl(MSR_PLATFORM_INFO, value);
 558         return (value >> 40) & 0xFF;
 559 }
 560
 561 static int core_get_max_pstate(void)
 562 {
 563         u64 value;
 564
 565         rdmsrl(MSR_PLATFORM_INFO, value);
 566         return (value >> 8) & 0xFF;
 567 }
 568
 569 static int core_get_turbo_pstate(void)
 570 {
 571         u64 value;
 572         int nont, ret;
 573
 574         rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
 575         nont = core_get_max_pstate();
 576         ret = (value) & 255;
 577         if (ret <= nont)
 578                 ret = nont;
 579         return ret;
 580 }
 581
 582 static inline int core_get_scaling(void)
 583 {
 584         return 100000;
 585 }
 586
 587 static void core_set_pstate(struct cpudata *cpudata, int pstate)
 588 {
 589         u64 val;
 590
 591         val = pstate << 8;
 592         if (limits.no_turbo && !limits.turbo_disabled)
 593                 val |= (u64)1 << 32;
 594
 595         wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
 596 }
 597
 598 static struct cpu_defaults core_params = {
 599         .pid_policy = {
 600                 .sample_rate_ms = 10,
 601                 .deadband = 0,
 602                 .setpoint = 97,
 603                 .p_gain_pct = 20,
 604                 .d_gain_pct = 0,
 605                 .i_gain_pct = 0,
 606         },
 607         .funcs = {
 608                 .get_max = core_get_max_pstate,
 609                 .get_min = core_get_min_pstate,
 610                 .get_turbo = core_get_turbo_pstate,
 611                 .get_scaling = core_get_scaling,
 612                 .set = core_set_pstate,
 613         },
 614 };
 615
 616 static struct cpu_defaults byt_params = {
 617         .pid_policy = {
 618                 .sample_rate_ms = 10,
 619                 .deadband = 0,
 620                 .setpoint = 97,
 621                 .p_gain_pct = 14,
 622                 .d_gain_pct = 0,
 623                 .i_gain_pct = 4,
 624         },
 625         .funcs = {
 626                 .get_max = byt_get_max_pstate,
 627                 .get_min = byt_get_min_pstate,
 628                 .get_turbo = byt_get_turbo_pstate,
 629                 .set = byt_set_pstate,
 630                 .get_scaling = byt_get_scaling,
 631                 .get_vid = byt_get_vid,
 632         },
 633 };
 634
 635 static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
 636 {
 637         int max_perf = cpu->pstate.turbo_pstate;
 638         int max_perf_adj;
 639         int min_perf;
 640
 641         if (limits.no_turbo || limits.turbo_disabled)
 642                 max_perf = cpu->pstate.max_pstate;
 643
 644         /*
 645          * performance can be limited by user through sysfs, by cpufreq
 646          * policy, or by cpu specific default values determined through
 647          * experimentation.
 648          */
 649         max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
 650         *max = clamp_t(int, max_perf_adj,
 651                         cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
 652
 653         min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
 654         *min = clamp_t(int, min_perf, cpu->pstate.min_pstate, max_perf);
 655 }
 656
 657 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
 658 {
 659         int max_perf, min_perf;
 660
 661         update_turbo_state();
 662
 663         intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
 664
 665         pstate = clamp_t(int, pstate, min_perf, max_perf);
 666
 667         if (pstate == cpu->pstate.current_pstate)
 668                 return;
 669
 670         trace_cpu_frequency(pstate * cpu->pstate.scaling, cpu->cpu);
 671
 672         cpu->pstate.current_pstate = pstate;
 673
 674         pstate_funcs.set(cpu, pstate);
 675 }
 676
 677 static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
 678 {
 679         cpu->pstate.min_pstate = pstate_funcs.get_min();
 680         cpu->pstate.max_pstate = pstate_funcs.get_max();
 681         cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
 682         cpu->pstate.scaling = pstate_funcs.get_scaling();
 683
 684         if (pstate_funcs.get_vid)
 685                 pstate_funcs.get_vid(cpu);
 686         intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
 687 }
 688
 689 static inline void intel_pstate_calc_busy(struct cpudata *cpu)
 690 {
 691         struct sample *sample = &cpu->sample;
 692         int64_t core_pct;
 693
 694         core_pct = int_tofp(sample->aperf) * int_tofp(100);
 695         core_pct = div64_u64(core_pct, int_tofp(sample->mperf));
 696
 697         sample->freq = fp_toint(
 698                 mul_fp(int_tofp(
 699                         cpu->pstate.max_pstate * cpu->pstate.scaling / 100),
 700                         core_pct));
 701
 702         sample->core_pct_busy = (int32_t)core_pct;
 703 }
 704
 705 static inline void intel_pstate_sample(struct cpudata *cpu)
 706 {
 707         u64 aperf, mperf;
 708         unsigned long flags;
 709
 710         local_irq_save(flags);
 711         rdmsrl(MSR_IA32_APERF, aperf);
 712         rdmsrl(MSR_IA32_MPERF, mperf);
 713         local_irq_restore(flags);
 714
 715         cpu->last_sample_time = cpu->sample.time;
 716         cpu->sample.time = ktime_get();
 717         cpu->sample.aperf = aperf;
 718         cpu->sample.mperf = mperf;
 719         cpu->sample.aperf -= cpu->prev_aperf;
 720         cpu->sample.mperf -= cpu->prev_mperf;
 721
 722         intel_pstate_calc_busy(cpu);
 723
 724         cpu->prev_aperf = aperf;
 725         cpu->prev_mperf = mperf;
 726 }
 727
 728 static inline void intel_hwp_set_sample_time(struct cpudata *cpu)
 729 {
 730         int delay;
 731
 732         delay = msecs_to_jiffies(50);
 733         mod_timer_pinned(&cpu->timer, jiffies + delay);
 734 }
 735
 736 static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
 737 {
 738         int delay;
 739
 740         delay = msecs_to_jiffies(pid_params.sample_rate_ms);
 741         mod_timer_pinned(&cpu->timer, jiffies + delay);
 742 }
 743
 744 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
 745 {
 746         int32_t core_busy, max_pstate, current_pstate, sample_ratio;
 747         u32 duration_us;
 748         u32 sample_time;
 749
 750         /*
 751          * core_busy is the ratio of actual performance to max
 752          * max_pstate is the max non turbo pstate available
 753          * current_pstate was the pstate that was requested during
 754          *      the last sample period.
 755          *
 756          * We normalize core_busy, which was our actual percent
 757          * performance to what we requested during the last sample
 758          * period. The result will be a percentage of busy at a
 759          * specified pstate.
 760          */
 761         core_busy = cpu->sample.core_pct_busy;
 762         max_pstate = int_tofp(cpu->pstate.max_pstate);
 763         current_pstate = int_tofp(cpu->pstate.current_pstate);
 764         core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
 765
 766         /*
 767          * Since we have a deferred timer, it will not fire unless
 768          * we are in C0.  So, determine if the actual elapsed time
 769          * is significantly greater (3x) than our sample interval.  If it
 770          * is, then we were idle for a long enough period of time
 771          * to adjust our busyness.
 772          */
 773         sample_time = pid_params.sample_rate_ms  * USEC_PER_MSEC;
 774         duration_us = (u32) ktime_us_delta(cpu->sample.time,
 775                                            cpu->last_sample_time);
 776         if (duration_us > sample_time * 3) {
 777                 sample_ratio = div_fp(int_tofp(sample_time),
 778                                       int_tofp(duration_us));
 779                 core_busy = mul_fp(core_busy, sample_ratio);
 780         }
 781
 782         return core_busy;
 783 }
 784
 785 static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
 786 {
 787         int32_t busy_scaled;
 788         struct _pid *pid;
 789         signed int ctl;
 790
 791         pid = &cpu->pid;
 792         busy_scaled = intel_pstate_get_scaled_busy(cpu);
 793
 794         ctl = pid_calc(pid, busy_scaled);
 795
 796         /* Negative values of ctl increase the pstate and vice versa */
 797         intel_pstate_set_pstate(cpu, cpu->pstate.current_pstate - ctl);
 798 }
 799
 800 static void intel_hwp_timer_func(unsigned long __data)
 801 {
 802         struct cpudata *cpu = (struct cpudata *) __data;
 803
 804         intel_pstate_sample(cpu);
 805         intel_hwp_set_sample_time(cpu);
 806 }
 807
 808 static void intel_pstate_timer_func(unsigned long __data)
 809 {
 810         struct cpudata *cpu = (struct cpudata *) __data;
 811         struct sample *sample;
 812
 813         intel_pstate_sample(cpu);
 814
 815         sample = &cpu->sample;
 816
 817         intel_pstate_adjust_busy_pstate(cpu);
 818
 819         trace_pstate_sample(fp_toint(sample->core_pct_busy),
 820                         fp_toint(intel_pstate_get_scaled_busy(cpu)),
 821                         cpu->pstate.current_pstate,
 822                         sample->mperf,
 823                         sample->aperf,
 824                         sample->freq);
 825
 826         intel_pstate_set_sample_time(cpu);
 827 }
 828
 829 #define ICPU(model, policy) \
 830         { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
 831                         (unsigned long)&policy }
 832
 833 static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
 834         ICPU(0x2a, core_params),
 835         ICPU(0x2d, core_params),
 836         ICPU(0x37, byt_params),
 837         ICPU(0x3a, core_params),
 838         ICPU(0x3c, core_params),
 839         ICPU(0x3d, core_params),
 840         ICPU(0x3e, core_params),
 841         ICPU(0x3f, core_params),
 842         ICPU(0x45, core_params),
 843         ICPU(0x46, core_params),
 844         ICPU(0x47, core_params),
 845         ICPU(0x4c, byt_params),
 846         ICPU(0x4e, core_params),
 847         ICPU(0x4f, core_params),
 848         ICPU(0x56, core_params),
 849         {}
 850 };
 851 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
 852
 853 static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] = {
 854         ICPU(0x56, core_params),
 855         {}
 856 };
 857
 858 static int intel_pstate_init_cpu(unsigned int cpunum)
 859 {
 860         struct cpudata *cpu;
 861
 862         if (!all_cpu_data[cpunum])
 863                 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata),
 864                                                GFP_KERNEL);
 865         if (!all_cpu_data[cpunum])
 866                 return -ENOMEM;
 867
 868         cpu = all_cpu_data[cpunum];
 869
 870         cpu->cpu = cpunum;
 871         intel_pstate_get_cpu_pstates(cpu);
 872
 873         init_timer_deferrable(&cpu->timer);
 874         cpu->timer.data = (unsigned long)cpu;
 875         cpu->timer.expires = jiffies + HZ/100;
 876
 877         if (!hwp_active)
 878                 cpu->timer.function = intel_pstate_timer_func;
 879         else
 880                 cpu->timer.function = intel_hwp_timer_func;
 881
 882         intel_pstate_busy_pid_reset(cpu);
 883         intel_pstate_sample(cpu);
 884
 885         add_timer_on(&cpu->timer, cpunum);
 886
 887         pr_debug("Intel pstate controlling: cpu %d\n", cpunum);
 888
 889         return 0;
 890 }
 891
 892 static unsigned int intel_pstate_get(unsigned int cpu_num)
 893 {
 894         struct sample *sample;
 895         struct cpudata *cpu;
 896
 897         cpu = all_cpu_data[cpu_num];
 898         if (!cpu)
 899                 return 0;
 900         sample = &cpu->sample;
 901         return sample->freq;
 902 }
 903
 904 static int intel_pstate_set_policy(struct cpufreq_policy *policy)
 905 {
 906         if (!policy->cpuinfo.max_freq)
 907                 return -ENODEV;
 908
 909         if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
 910                 limits.min_perf_pct = 100;
 911                 limits.min_perf = int_tofp(1);
 912                 limits.max_policy_pct = 100;
 913                 limits.max_perf_pct = 100;
 914                 limits.max_perf = int_tofp(1);
 915                 limits.no_turbo = 0;
 916                 return 0;
 917         }
 918
 919         limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
 920         limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
 921         limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
 922
 923         limits.max_policy_pct = (policy->max * 100) / policy->cpuinfo.max_freq;
 924         limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
 925         limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
 926         limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
 927
 928         if (hwp_active)
 929                 intel_pstate_hwp_set();
 930
 931         return 0;
 932 }
 933
 934 static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
 935 {
 936         cpufreq_verify_within_cpu_limits(policy);
 937
 938         if (policy->policy != CPUFREQ_POLICY_POWERSAVE &&
 939             policy->policy != CPUFREQ_POLICY_PERFORMANCE)
 940                 return -EINVAL;
 941
 942         return 0;
 943 }
 944
 945 static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
 946 {
 947         int cpu_num = policy->cpu;
 948         struct cpudata *cpu = all_cpu_data[cpu_num];
 949
 950         pr_info("intel_pstate CPU %d exiting\n", cpu_num);
 951
 952         del_timer_sync(&all_cpu_data[cpu_num]->timer);
 953         if (hwp_active)
 954                 return;
 955
 956         intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
 957 }
 958
 959 static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
 960 {
 961         struct cpudata *cpu;
 962         int rc;
 963
 964         rc = intel_pstate_init_cpu(policy->cpu);
 965         if (rc)
 966                 return rc;
 967
 968         cpu = all_cpu_data[policy->cpu];
 969
 970         if (limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
 971                 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
 972         else
 973                 policy->policy = CPUFREQ_POLICY_POWERSAVE;
 974
 975         policy->min = cpu->pstate.min_pstate * cpu->pstate.scaling;
 976         policy->max = cpu->pstate.turbo_pstate * cpu->pstate.scaling;
 977
 978         /* cpuinfo and default policy values */
 979         policy->cpuinfo.min_freq = cpu->pstate.min_pstate * cpu->pstate.scaling;
 980         policy->cpuinfo.max_freq =
 981                 cpu->pstate.turbo_pstate * cpu->pstate.scaling;
 982         policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
 983         cpumask_set_cpu(policy->cpu, policy->cpus);
 984
 985         return 0;
 986 }
 987
 988 static struct cpufreq_driver intel_pstate_driver = {
 989         .flags          = CPUFREQ_CONST_LOOPS,
 990         .verify         = intel_pstate_verify_policy,
 991         .setpolicy      = intel_pstate_set_policy,
 992         .get            = intel_pstate_get,
 993         .init           = intel_pstate_cpu_init,
 994         .stop_cpu       = intel_pstate_stop_cpu,
 995         .name           = "intel_pstate",
 996 };
 997
 998 static int __initdata no_load;
 999 static int __initdata no_hwp;
1000 static unsigned int force_load;
1001
1002 static int intel_pstate_msrs_not_valid(void)
1003 {
1004         /* Check that all the msr's we are using are valid. */
1005         u64 aperf, mperf, tmp;
1006
1007         rdmsrl(MSR_IA32_APERF, aperf);
1008         rdmsrl(MSR_IA32_MPERF, mperf);
1009
1010         if (!pstate_funcs.get_max() ||
1011             !pstate_funcs.get_min() ||
1012             !pstate_funcs.get_turbo())
1013                 return -ENODEV;
1014
1015         rdmsrl(MSR_IA32_APERF, tmp);
1016         if (!(tmp - aperf))
1017                 return -ENODEV;
1018
1019         rdmsrl(MSR_IA32_MPERF, tmp);
1020         if (!(tmp - mperf))
1021                 return -ENODEV;
1022
1023         return 0;
1024 }
1025
1026 static void copy_pid_params(struct pstate_adjust_policy *policy)
1027 {
1028         pid_params.sample_rate_ms = policy->sample_rate_ms;
1029         pid_params.p_gain_pct = policy->p_gain_pct;
1030         pid_params.i_gain_pct = policy->i_gain_pct;
1031         pid_params.d_gain_pct = policy->d_gain_pct;
1032         pid_params.deadband = policy->deadband;
1033         pid_params.setpoint = policy->setpoint;
1034 }
1035
1036 static void copy_cpu_funcs(struct pstate_funcs *funcs)
1037 {
1038         pstate_funcs.get_max   = funcs->get_max;
1039         pstate_funcs.get_min   = funcs->get_min;
1040         pstate_funcs.get_turbo = funcs->get_turbo;
1041         pstate_funcs.get_scaling = funcs->get_scaling;
1042         pstate_funcs.set       = funcs->set;
1043         pstate_funcs.get_vid   = funcs->get_vid;
1044 }
1045
1046 #if IS_ENABLED(CONFIG_ACPI)
1047 #include <acpi/processor.h>
1048
1049 static bool intel_pstate_no_acpi_pss(void)
1050 {
1051         int i;
1052
1053         for_each_possible_cpu(i) {
1054                 acpi_status status;
1055                 union acpi_object *pss;
1056                 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1057                 struct acpi_processor *pr = per_cpu(processors, i);
1058
1059                 if (!pr)
1060                         continue;
1061
1062                 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
1063                 if (ACPI_FAILURE(status))
1064                         continue;
1065
1066                 pss = buffer.pointer;
1067                 if (pss && pss->type == ACPI_TYPE_PACKAGE) {
1068                         kfree(pss);
1069                         return false;
1070                 }
1071
1072                 kfree(pss);
1073         }
1074
1075         return true;
1076 }
1077
1078 static bool intel_pstate_has_acpi_ppc(void)
1079 {
1080         int i;
1081
1082         for_each_possible_cpu(i) {
1083                 struct acpi_processor *pr = per_cpu(processors, i);
1084
1085                 if (!pr)
1086                         continue;
1087                 if (acpi_has_method(pr->handle, "_PPC"))
1088                         return true;
1089         }
1090         return false;
1091 }
1092
1093 enum {
1094         PSS,
1095         PPC,
1096 };
1097
1098 struct hw_vendor_info {
1099         u16  valid;
1100         char oem_id[ACPI_OEM_ID_SIZE];
1101         char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
1102         int  oem_pwr_table;
1103 };
1104
1105 /* Hardware vendor-specific info that has its own power management modes */
1106 static struct hw_vendor_info vendor_info[] = {
1107         {1, "HP    ", "ProLiant", PSS},
1108         {1, "ORACLE", "X4-2    ", PPC},
1109         {1, "ORACLE", "X4-2L   ", PPC},
1110         {1, "ORACLE", "X4-2B   ", PPC},
1111         {1, "ORACLE", "X3-2    ", PPC},
1112         {1, "ORACLE", "X3-2L   ", PPC},
1113         {1, "ORACLE", "X3-2B   ", PPC},
1114         {1, "ORACLE", "X4470M2 ", PPC},
1115         {1, "ORACLE", "X4270M3 ", PPC},
1116         {1, "ORACLE", "X4270M2 ", PPC},
1117         {1, "ORACLE", "X4170M2 ", PPC},
1118         {0, "", ""},
1119 };
1120
1121 static bool intel_pstate_platform_pwr_mgmt_exists(void)
1122 {
1123         struct acpi_table_header hdr;
1124         struct hw_vendor_info *v_info;
1125         const struct x86_cpu_id *id;
1126         u64 misc_pwr;
1127
1128         id = x86_match_cpu(intel_pstate_cpu_oob_ids);
1129         if (id) {
1130                 rdmsrl(MSR_MISC_PWR_MGMT, misc_pwr);
1131                 if ( misc_pwr & (1 << 8))
1132                         return true;
1133         }
1134
1135         if (acpi_disabled ||
1136             ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
1137                 return false;
1138
1139         for (v_info = vendor_info; v_info->valid; v_info++) {
1140                 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE) &&
1141                         !strncmp(hdr.oem_table_id, v_info->oem_table_id,
1142                                                 ACPI_OEM_TABLE_ID_SIZE))
1143                         switch (v_info->oem_pwr_table) {
1144                         case PSS:
1145                                 return intel_pstate_no_acpi_pss();
1146                         case PPC:
1147                                 return intel_pstate_has_acpi_ppc() &&
1148                                         (!force_load);
1149                         }
1150         }
1151
1152         return false;
1153 }
1154 #else /* CONFIG_ACPI not enabled */
1155 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
1156 static inline bool intel_pstate_has_acpi_ppc(void) { return false; }
1157 #endif /* CONFIG_ACPI */
1158
1159 static int __init intel_pstate_init(void)
1160 {
1161         int cpu, rc = 0;
1162         const struct x86_cpu_id *id;
1163         struct cpu_defaults *cpu_info;
1164         struct cpuinfo_x86 *c = &boot_cpu_data;
1165
1166         if (no_load)
1167                 return -ENODEV;
1168
1169         id = x86_match_cpu(intel_pstate_cpu_ids);
1170         if (!id)
1171                 return -ENODEV;
1172
1173         /*
1174          * The Intel pstate driver will be ignored if the platform
1175          * firmware has its own power management modes.
1176          */
1177         if (intel_pstate_platform_pwr_mgmt_exists())
1178                 return -ENODEV;
1179
1180         cpu_info = (struct cpu_defaults *)id->driver_data;
1181
1182         copy_pid_params(&cpu_info->pid_policy);
1183         copy_cpu_funcs(&cpu_info->funcs);
1184
1185         if (intel_pstate_msrs_not_valid())
1186                 return -ENODEV;
1187
1188         pr_info("Intel P-state driver initializing.\n");
1189
1190         all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
1191         if (!all_cpu_data)
1192                 return -ENOMEM;
1193
1194         if (cpu_has(c,X86_FEATURE_HWP) && !no_hwp)
1195                 intel_pstate_hwp_enable();
1196
1197         rc = cpufreq_register_driver(&intel_pstate_driver);
1198         if (rc)
1199                 goto out;
1200
1201         intel_pstate_debug_expose_params();
1202         intel_pstate_sysfs_expose_params();
1203
1204         return rc;
1205 out:
1206         get_online_cpus();
1207         for_each_online_cpu(cpu) {
1208                 if (all_cpu_data[cpu]) {
1209                         del_timer_sync(&all_cpu_data[cpu]->timer);
1210                         kfree(all_cpu_data[cpu]);
1211                 }
1212         }
1213
1214         put_online_cpus();
1215         vfree(all_cpu_data);
1216         return -ENODEV;
1217 }
1218 device_initcall(intel_pstate_init);
1219
1220 static int __init intel_pstate_setup(char *str)
1221 {
1222         if (!str)
1223                 return -EINVAL;
1224
1225         if (!strcmp(str, "disable"))
1226                 no_load = 1;
1227         if (!strcmp(str, "no_hwp"))
1228                 no_hwp = 1;
1229         if (!strcmp(str, "force"))
1230                 force_load = 1;
1231         return 0;
1232 }
1233 early_param("intel_pstate", intel_pstate_setup);
1234
1235 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
1236 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
1237 MODULE_LICENSE("GPL");