drivers/dma/dmatest.c

   1 /*
   2  * DMA Engine test module
   3  *
   4  * Copyright (C) 2007 Atmel Corporation
   5  * Copyright (C) 2013 Intel Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/delay.h>
  14 #include <linux/dma-mapping.h>
  15 #include <linux/dmaengine.h>
  16 #include <linux/freezer.h>
  17 #include <linux/init.h>
  18 #include <linux/kthread.h>
  19 #include <linux/module.h>
  20 #include <linux/moduleparam.h>
  21 #include <linux/random.h>
  22 #include <linux/slab.h>
  23 #include <linux/wait.h>
  24
  25 static unsigned int test_buf_size = 16384;
  26 module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
  27 MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  28
  29 static char test_channel[20];
  30 module_param_string(channel, test_channel, sizeof(test_channel),
  31                 S_IRUGO | S_IWUSR);
  32 MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  33
  34 static char test_device[32];
  35 module_param_string(device, test_device, sizeof(test_device),
  36                 S_IRUGO | S_IWUSR);
  37 MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  38
  39 static unsigned int threads_per_chan = 1;
  40 module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
  41 MODULE_PARM_DESC(threads_per_chan,
  42                 "Number of threads to start per channel (default: 1)");
  43
  44 static unsigned int max_channels;
  45 module_param(max_channels, uint, S_IRUGO | S_IWUSR);
  46 MODULE_PARM_DESC(max_channels,
  47                 "Maximum number of channels to use (default: all)");
  48
  49 static unsigned int iterations;
  50 module_param(iterations, uint, S_IRUGO | S_IWUSR);
  51 MODULE_PARM_DESC(iterations,
  52                 "Iterations before stopping test (default: infinite)");
  53
  54 static unsigned int sg_buffers = 1;
  55 module_param(sg_buffers, uint, S_IRUGO | S_IWUSR);
  56 MODULE_PARM_DESC(sg_buffers,
  57                 "Number of scatter gather buffers (default: 1)");
  58
  59 static unsigned int dmatest = 1;
  60 module_param(dmatest, uint, S_IRUGO | S_IWUSR);
  61 MODULE_PARM_DESC(dmatest,
  62                 "dmatest 0-memcpy 1-slave_sg (default: 1)");
  63
  64 static unsigned int xor_sources = 3;
  65 module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
  66 MODULE_PARM_DESC(xor_sources,
  67                 "Number of xor source buffers (default: 3)");
  68
  69 static unsigned int pq_sources = 3;
  70 module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
  71 MODULE_PARM_DESC(pq_sources,
  72                 "Number of p+q source buffers (default: 3)");
  73
  74 static int timeout = 3000;
  75 module_param(timeout, uint, S_IRUGO | S_IWUSR);
  76 MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
  77                  "Pass -1 for infinite timeout");
  78
  79 static bool noverify;
  80 module_param(noverify, bool, S_IRUGO | S_IWUSR);
  81 MODULE_PARM_DESC(noverify, "Disable random data setup and verification");
  82
  83 static bool verbose;
  84 module_param(verbose, bool, S_IRUGO | S_IWUSR);
  85 MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
  86
  87 /**
  88  * struct dmatest_params - test parameters.
  89  * @buf_size:           size of the memcpy test buffer
  90  * @channel:            bus ID of the channel to test
  91  * @device:             bus ID of the DMA Engine to test
  92  * @threads_per_chan:   number of threads to start per channel
  93  * @max_channels:       maximum number of channels to use
  94  * @iterations:         iterations before stopping test
  95  * @xor_sources:        number of xor source buffers
  96  * @pq_sources:         number of p+q source buffers
  97  * @timeout:            transfer timeout in msec, -1 for infinite timeout
  98  */
  99 struct dmatest_params {
 100         unsigned int    buf_size;
 101         char            channel[20];
 102         char            device[32];
 103         unsigned int    threads_per_chan;
 104         unsigned int    max_channels;
 105         unsigned int    iterations;
 106         unsigned int    xor_sources;
 107         unsigned int    pq_sources;
 108         int             timeout;
 109         bool            noverify;
 110 };
 111
 112 /**
 113  * struct dmatest_info - test information.
 114  * @params:             test parameters
 115  * @lock:               access protection to the fields of this structure
 116  */
 117 static struct dmatest_info {
 118         /* Test parameters */
 119         struct dmatest_params   params;
 120
 121         /* Internal state */
 122         struct list_head        channels;
 123         unsigned int            nr_channels;
 124         struct mutex            lock;
 125         bool                    did_init;
 126 } test_info = {
 127         .channels = LIST_HEAD_INIT(test_info.channels),
 128         .lock = __MUTEX_INITIALIZER(test_info.lock),
 129 };
 130
 131 static int dmatest_run_set(const char *val, const struct kernel_param *kp);
 132 static int dmatest_run_get(char *val, const struct kernel_param *kp);
 133 static const struct kernel_param_ops run_ops = {
 134         .set = dmatest_run_set,
 135         .get = dmatest_run_get,
 136 };
 137 static bool dmatest_run;
 138 module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
 139 MODULE_PARM_DESC(run, "Run the test (default: false)");
 140
 141 /* Maximum amount of mismatched bytes in buffer to print */
 142 #define MAX_ERROR_COUNT         32
 143
 144 /*
 145  * Initialization patterns. All bytes in the source buffer has bit 7
 146  * set, all bytes in the destination buffer has bit 7 cleared.
 147  *
 148  * Bit 6 is set for all bytes which are to be copied by the DMA
 149  * engine. Bit 5 is set for all bytes which are to be overwritten by
 150  * the DMA engine.
 151  *
 152  * The remaining bits are the inverse of a counter which increments by
 153  * one for each byte address.
 154  */
 155 #define PATTERN_SRC             0x80
 156 #define PATTERN_DST             0x00
 157 #define PATTERN_COPY            0x40
 158 #define PATTERN_OVERWRITE       0x20
 159 #define PATTERN_COUNT_MASK      0x1f
 160
 161 struct dmatest_thread {
 162         struct list_head        node;
 163         struct dmatest_info     *info;
 164         struct task_struct      *task;
 165         struct dma_chan         *chan;
 166         u8                      **srcs;
 167         u8                      **dsts;
 168         enum dma_transaction_type type;
 169         bool                    done;
 170 };
 171
 172 struct dmatest_chan {
 173         struct list_head        node;
 174         struct dma_chan         *chan;
 175         struct list_head        threads;
 176 };
 177
 178 static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
 179 static bool wait;
 180
 181 static bool is_threaded_test_run(struct dmatest_info *info)
 182 {
 183         struct dmatest_chan *dtc;
 184
 185         list_for_each_entry(dtc, &info->channels, node) {
 186                 struct dmatest_thread *thread;
 187
 188                 list_for_each_entry(thread, &dtc->threads, node) {
 189                         if (!thread->done)
 190                                 return true;
 191                 }
 192         }
 193
 194         return false;
 195 }
 196
 197 static int dmatest_wait_get(char *val, const struct kernel_param *kp)
 198 {
 199         struct dmatest_info *info = &test_info;
 200         struct dmatest_params *params = &info->params;
 201
 202         if (params->iterations)
 203                 wait_event(thread_wait, !is_threaded_test_run(info));
 204         wait = true;
 205         return param_get_bool(val, kp);
 206 }
 207
 208 static const struct kernel_param_ops wait_ops = {
 209         .get = dmatest_wait_get,
 210         .set = param_set_bool,
 211 };
 212 module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
 213 MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
 214
 215 static bool dmatest_match_channel(struct dmatest_params *params,
 216                 struct dma_chan *chan)
 217 {
 218         if (params->channel[0] == '\0')
 219                 return true;
 220         return strcmp(dma_chan_name(chan), params->channel) == 0;
 221 }
 222
 223 static bool dmatest_match_device(struct dmatest_params *params,
 224                 struct dma_device *device)
 225 {
 226         if (params->device[0] == '\0')
 227                 return true;
 228         return strcmp(dev_name(device->dev), params->device) == 0;
 229 }
 230
 231 static unsigned long dmatest_random(void)
 232 {
 233         unsigned long buf;
 234
 235         prandom_bytes(&buf, sizeof(buf));
 236         return buf;
 237 }
 238
 239 static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
 240                 unsigned int buf_size)
 241 {
 242         unsigned int i;
 243         u8 *buf;
 244
 245         for (; (buf = *bufs); bufs++) {
 246                 for (i = 0; i < start; i++)
 247                         buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
 248                 for ( ; i < start + len; i++)
 249                         buf[i] = PATTERN_SRC | PATTERN_COPY
 250                                 | (~i & PATTERN_COUNT_MASK);
 251                 for ( ; i < buf_size; i++)
 252                         buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
 253                 buf++;
 254         }
 255 }
 256
 257 static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
 258                 unsigned int buf_size)
 259 {
 260         unsigned int i;
 261         u8 *buf;
 262
 263         for (; (buf = *bufs); bufs++) {
 264                 for (i = 0; i < start; i++)
 265                         buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
 266                 for ( ; i < start + len; i++)
 267                         buf[i] = PATTERN_DST | PATTERN_OVERWRITE
 268                                 | (~i & PATTERN_COUNT_MASK);
 269                 for ( ; i < buf_size; i++)
 270                         buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
 271         }
 272 }
 273
 274 static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
 275                 unsigned int counter, bool is_srcbuf)
 276 {
 277         u8              diff = actual ^ pattern;
 278         u8              expected = pattern | (~counter & PATTERN_COUNT_MASK);
 279         const char      *thread_name = current->comm;
 280
 281         if (is_srcbuf)
 282                 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
 283                         thread_name, index, expected, actual);
 284         else if ((pattern & PATTERN_COPY)
 285                         && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
 286                 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
 287                         thread_name, index, expected, actual);
 288         else if (diff & PATTERN_SRC)
 289                 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
 290                         thread_name, index, expected, actual);
 291         else
 292                 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
 293                         thread_name, index, expected, actual);
 294 }
 295
 296 static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
 297                 unsigned int end, unsigned int counter, u8 pattern,
 298                 bool is_srcbuf)
 299 {
 300         unsigned int i;
 301         unsigned int error_count = 0;
 302         u8 actual;
 303         u8 expected;
 304         u8 *buf;
 305         unsigned int counter_orig = counter;
 306
 307         for (; (buf = *bufs); bufs++) {
 308                 counter = counter_orig;
 309                 for (i = start; i < end; i++) {
 310                         actual = buf[i];
 311                         expected = pattern | (~counter & PATTERN_COUNT_MASK);
 312                         if (actual != expected) {
 313                                 if (error_count < MAX_ERROR_COUNT)
 314                                         dmatest_mismatch(actual, pattern, i,
 315                                                          counter, is_srcbuf);
 316                                 error_count++;
 317                         }
 318                         counter++;
 319                 }
 320         }
 321
 322         if (error_count > MAX_ERROR_COUNT)
 323                 pr_warn("%s: %u errors suppressed\n",
 324                         current->comm, error_count - MAX_ERROR_COUNT);
 325
 326         return error_count;
 327 }
 328
 329 /* poor man's completion - we want to use wait_event_freezable() on it */
 330 struct dmatest_done {
 331         bool                    done;
 332         wait_queue_head_t       *wait;
 333 };
 334
 335 static void dmatest_callback(void *arg)
 336 {
 337         struct dmatest_done *done = arg;
 338
 339         done->done = true;
 340         wake_up_all(done->wait);
 341 }
 342
 343 static unsigned int min_odd(unsigned int x, unsigned int y)
 344 {
 345         unsigned int val = min(x, y);
 346
 347         return val % 2 ? val : val - 1;
 348 }
 349
 350 static void result(const char *err, unsigned int n, unsigned int src_off,
 351                    unsigned int dst_off, unsigned int len, unsigned long data)
 352 {
 353         pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
 354                 current->comm, n, err, src_off, dst_off, len, data);
 355 }
 356
 357 static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
 358                        unsigned int dst_off, unsigned int len,
 359                        unsigned long data)
 360 {
 361         pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
 362                  current->comm, n, err, src_off, dst_off, len, data);
 363 }
 364
 365 #define verbose_result(err, n, src_off, dst_off, len, data) ({  \
 366         if (verbose)                                            \
 367                 result(err, n, src_off, dst_off, len, data);    \
 368         else                                                    \
 369                 dbg_result(err, n, src_off, dst_off, len, data);\
 370 })
 371
 372 static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
 373 {
 374         unsigned long long per_sec = 1000000;
 375
 376         if (runtime <= 0)
 377                 return 0;
 378
 379         /* drop precision until runtime is 32-bits */
 380         while (runtime > UINT_MAX) {
 381                 runtime >>= 1;
 382                 per_sec <<= 1;
 383         }
 384
 385         per_sec *= val;
 386         do_div(per_sec, runtime);
 387         return per_sec;
 388 }
 389
 390 static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
 391 {
 392         return dmatest_persec(runtime, len >> 10);
 393 }
 394
 395 /*
 396  * This function repeatedly tests DMA transfers of various lengths and
 397  * offsets for a given operation type until it is told to exit by
 398  * kthread_stop(). There may be multiple threads running this function
 399  * in parallel for a single channel, and there may be multiple channels
 400  * being tested in parallel.
 401  *
 402  * Before each test, the source and destination buffer is initialized
 403  * with a known pattern. This pattern is different depending on
 404  * whether it's in an area which is supposed to be copied or
 405  * overwritten, and different in the source and destination buffers.
 406  * So if the DMA engine doesn't copy exactly what we tell it to copy,
 407  * we'll notice.
 408  */
 409 static int dmatest_func(void *data)
 410 {
 411         DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
 412         struct dmatest_thread   *thread = data;
 413         struct dmatest_done     done = { .wait = &done_wait };
 414         struct dmatest_info     *info;
 415         struct dmatest_params   *params;
 416         struct dma_chan         *chan;
 417         struct dma_device       *dev;
 418         unsigned int            error_count;
 419         unsigned int            failed_tests = 0;
 420         unsigned int            total_tests = 0;
 421         dma_cookie_t            cookie;
 422         enum dma_status         status;
 423         enum dma_ctrl_flags     flags;
 424         u8                      *pq_coefs = NULL;
 425         int                     ret;
 426         int                     src_cnt;
 427         int                     dst_cnt;
 428         int                     i;
 429         ktime_t                 ktime;
 430         s64                     runtime = 0;
 431         unsigned long long      total_len = 0;
 432
 433         set_freezable();
 434
 435         ret = -ENOMEM;
 436
 437         smp_rmb();
 438         info = thread->info;
 439         params = &info->params;
 440         chan = thread->chan;
 441         dev = chan->device;
 442         if (thread->type == DMA_MEMCPY)
 443                 src_cnt = dst_cnt = 1;
 444         else if (thread->type == DMA_SG)
 445                 src_cnt = dst_cnt = sg_buffers;
 446         else if (thread->type == DMA_XOR) {
 447                 /* force odd to ensure dst = src */
 448                 src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
 449                 dst_cnt = 1;
 450         } else if (thread->type == DMA_PQ) {
 451                 /* force odd to ensure dst = src */
 452                 src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
 453                 dst_cnt = 2;
 454
 455                 pq_coefs = kmalloc(params->pq_sources+1, GFP_KERNEL);
 456                 if (!pq_coefs)
 457                         goto err_thread_type;
 458
 459                 for (i = 0; i < src_cnt; i++)
 460                         pq_coefs[i] = 1;
 461         } else
 462                 goto err_thread_type;
 463
 464         thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
 465         if (!thread->srcs)
 466                 goto err_srcs;
 467         for (i = 0; i < src_cnt; i++) {
 468                 thread->srcs[i] = kmalloc(params->buf_size, GFP_KERNEL);
 469                 if (!thread->srcs[i])
 470                         goto err_srcbuf;
 471         }
 472         thread->srcs[i] = NULL;
 473
 474         thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
 475         if (!thread->dsts)
 476                 goto err_dsts;
 477         for (i = 0; i < dst_cnt; i++) {
 478                 thread->dsts[i] = kmalloc(params->buf_size, GFP_KERNEL);
 479                 if (!thread->dsts[i])
 480                         goto err_dstbuf;
 481         }
 482         thread->dsts[i] = NULL;
 483
 484         set_user_nice(current, 10);
 485
 486         /*
 487          * src and dst buffers are freed by ourselves below
 488          */
 489         flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
 490
 491         ktime = ktime_get();
 492         while (!kthread_should_stop()
 493                && !(params->iterations && total_tests >= params->iterations)) {
 494                 struct dma_async_tx_descriptor *tx = NULL;
 495                 struct dmaengine_unmap_data *um;
 496                 dma_addr_t srcs[src_cnt];
 497                 dma_addr_t *dsts;
 498                 unsigned int src_off, dst_off, len;
 499                 u8 align = 0;
 500                 struct scatterlist tx_sg[src_cnt];
 501                 struct scatterlist rx_sg[src_cnt];
 502
 503                 total_tests++;
 504
 505                 /* honor alignment restrictions */
 506                 if (thread->type == DMA_MEMCPY)
 507                         align = dev->copy_align;
 508                 else if (thread->type == DMA_XOR)
 509                         align = dev->xor_align;
 510                 else if (thread->type == DMA_PQ)
 511                         align = dev->pq_align;
 512
 513                 if (1 << align > params->buf_size) {
 514                         pr_err("%u-byte buffer too small for %d-byte alignment\n",
 515                                params->buf_size, 1 << align);
 516                         break;
 517                 }
 518
 519                 if (params->noverify)
 520                         len = params->buf_size;
 521                 else
 522                         len = dmatest_random() % params->buf_size + 1;
 523
 524                 len = (len >> align) << align;
 525                 if (!len)
 526                         len = 1 << align;
 527
 528                 total_len += len;
 529
 530                 if (params->noverify) {
 531                         src_off = 0;
 532                         dst_off = 0;
 533                 } else {
 534                         src_off = dmatest_random() % (params->buf_size - len + 1);
 535                         dst_off = dmatest_random() % (params->buf_size - len + 1);
 536
 537                         src_off = (src_off >> align) << align;
 538                         dst_off = (dst_off >> align) << align;
 539
 540                         dmatest_init_srcs(thread->srcs, src_off, len,
 541                                           params->buf_size);
 542                         dmatest_init_dsts(thread->dsts, dst_off, len,
 543                                           params->buf_size);
 544                 }
 545
 546                 um = dmaengine_get_unmap_data(dev->dev, src_cnt+dst_cnt,
 547                                               GFP_KERNEL);
 548                 if (!um) {
 549                         failed_tests++;
 550                         result("unmap data NULL", total_tests,
 551                                src_off, dst_off, len, ret);
 552                         continue;
 553                 }
 554
 555                 um->len = params->buf_size;
 556                 for (i = 0; i < src_cnt; i++) {
 557                         void *buf = thread->srcs[i];
 558                         struct page *pg = virt_to_page(buf);
 559                         unsigned pg_off = (unsigned long) buf & ~PAGE_MASK;
 560
 561                         um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
 562                                                    um->len, DMA_TO_DEVICE);
 563                         srcs[i] = um->addr[i] + src_off;
 564                         ret = dma_mapping_error(dev->dev, um->addr[i]);
 565                         if (ret) {
 566                                 dmaengine_unmap_put(um);
 567                                 result("src mapping error", total_tests,
 568                                        src_off, dst_off, len, ret);
 569                                 failed_tests++;
 570                                 continue;
 571                         }
 572                         um->to_cnt++;
 573                 }
 574                 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
 575                 dsts = &um->addr[src_cnt];
 576                 for (i = 0; i < dst_cnt; i++) {
 577                         void *buf = thread->dsts[i];
 578                         struct page *pg = virt_to_page(buf);
 579                         unsigned pg_off = (unsigned long) buf & ~PAGE_MASK;
 580
 581                         dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
 582                                                DMA_BIDIRECTIONAL);
 583                         ret = dma_mapping_error(dev->dev, dsts[i]);
 584                         if (ret) {
 585                                 dmaengine_unmap_put(um);
 586                                 result("dst mapping error", total_tests,
 587                                        src_off, dst_off, len, ret);
 588                                 failed_tests++;
 589                                 continue;
 590                         }
 591                         um->bidi_cnt++;
 592                 }
 593
 594                 sg_init_table(tx_sg, src_cnt);
 595                 sg_init_table(rx_sg, src_cnt);
 596                 for (i = 0; i < src_cnt; i++) {
 597                         sg_dma_address(&rx_sg[i]) = srcs[i];
 598                         sg_dma_address(&tx_sg[i]) = dsts[i] + dst_off;
 599                         sg_dma_len(&tx_sg[i]) = len;
 600                         sg_dma_len(&rx_sg[i]) = len;
 601                 }
 602
 603                 if (thread->type == DMA_MEMCPY)
 604                         tx = dev->device_prep_dma_memcpy(chan,
 605                                                          dsts[0] + dst_off,
 606                                                          srcs[0], len, flags);
 607                 else if (thread->type == DMA_SG)
 608                         tx = dev->device_prep_dma_sg(chan, tx_sg, src_cnt,
 609                                                      rx_sg, src_cnt, flags);
 610                 else if (thread->type == DMA_XOR)
 611                         tx = dev->device_prep_dma_xor(chan,
 612                                                       dsts[0] + dst_off,
 613                                                       srcs, src_cnt,
 614                                                       len, flags);
 615                 else if (thread->type == DMA_PQ) {
 616                         dma_addr_t dma_pq[dst_cnt];
 617
 618                         for (i = 0; i < dst_cnt; i++)
 619                                 dma_pq[i] = dsts[i] + dst_off;
 620                         tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
 621                                                      src_cnt, pq_coefs,
 622                                                      len, flags);
 623                 }
 624
 625                 if (!tx) {
 626                         dmaengine_unmap_put(um);
 627                         result("prep error", total_tests, src_off,
 628                                dst_off, len, ret);
 629                         msleep(100);
 630                         failed_tests++;
 631                         continue;
 632                 }
 633
 634                 done.done = false;
 635                 tx->callback = dmatest_callback;
 636                 tx->callback_param = &done;
 637                 cookie = tx->tx_submit(tx);
 638
 639                 if (dma_submit_error(cookie)) {
 640                         dmaengine_unmap_put(um);
 641                         result("submit error", total_tests, src_off,
 642                                dst_off, len, ret);
 643                         msleep(100);
 644                         failed_tests++;
 645                         continue;
 646                 }
 647                 dma_async_issue_pending(chan);
 648
 649                 wait_event_freezable_timeout(done_wait, done.done,
 650                                              msecs_to_jiffies(params->timeout));
 651
 652                 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
 653
 654                 if (!done.done) {
 655                         /*
 656                          * We're leaving the timed out dma operation with
 657                          * dangling pointer to done_wait.  To make this
 658                          * correct, we'll need to allocate wait_done for
 659                          * each test iteration and perform "who's gonna
 660                          * free it this time?" dancing.  For now, just
 661                          * leave it dangling.
 662                          */
 663                         dmaengine_unmap_put(um);
 664                         result("test timed out", total_tests, src_off, dst_off,
 665                                len, 0);
 666                         failed_tests++;
 667                         continue;
 668                 } else if (status != DMA_COMPLETE) {
 669                         dmaengine_unmap_put(um);
 670                         result(status == DMA_ERROR ?
 671                                "completion error status" :
 672                                "completion busy status", total_tests, src_off,
 673                                dst_off, len, ret);
 674                         failed_tests++;
 675                         continue;
 676                 }
 677
 678                 dmaengine_unmap_put(um);
 679
 680                 if (params->noverify) {
 681                         verbose_result("test passed", total_tests, src_off,
 682                                        dst_off, len, 0);
 683                         continue;
 684                 }
 685
 686                 pr_debug("%s: verifying source buffer...\n", current->comm);
 687                 error_count = dmatest_verify(thread->srcs, 0, src_off,
 688                                 0, PATTERN_SRC, true);
 689                 error_count += dmatest_verify(thread->srcs, src_off,
 690                                 src_off + len, src_off,
 691                                 PATTERN_SRC | PATTERN_COPY, true);
 692                 error_count += dmatest_verify(thread->srcs, src_off + len,
 693                                 params->buf_size, src_off + len,
 694                                 PATTERN_SRC, true);
 695
 696                 pr_debug("%s: verifying dest buffer...\n", current->comm);
 697                 error_count += dmatest_verify(thread->dsts, 0, dst_off,
 698                                 0, PATTERN_DST, false);
 699                 error_count += dmatest_verify(thread->dsts, dst_off,
 700                                 dst_off + len, src_off,
 701                                 PATTERN_SRC | PATTERN_COPY, false);
 702                 error_count += dmatest_verify(thread->dsts, dst_off + len,
 703                                 params->buf_size, dst_off + len,
 704                                 PATTERN_DST, false);
 705
 706                 if (error_count) {
 707                         result("data error", total_tests, src_off, dst_off,
 708                                len, error_count);
 709                         failed_tests++;
 710                 } else {
 711                         verbose_result("test passed", total_tests, src_off,
 712                                        dst_off, len, 0);
 713                 }
 714         }
 715         runtime = ktime_us_delta(ktime_get(), ktime);
 716
 717         ret = 0;
 718 err_dstbuf:
 719         for (i = 0; thread->dsts[i]; i++)
 720                 kfree(thread->dsts[i]);
 721         kfree(thread->dsts);
 722 err_dsts:
 723 err_srcbuf:
 724         for (i = 0; thread->srcs[i]; i++)
 725                 kfree(thread->srcs[i]);
 726         kfree(thread->srcs);
 727 err_srcs:
 728         kfree(pq_coefs);
 729 err_thread_type:
 730         pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
 731                 current->comm, total_tests, failed_tests,
 732                 dmatest_persec(runtime, total_tests),
 733                 dmatest_KBs(runtime, total_len), ret);
 734
 735         /* terminate all transfers on specified channels */
 736         if (ret)
 737                 dmaengine_terminate_all(chan);
 738
 739         thread->done = true;
 740         wake_up(&thread_wait);
 741
 742         return ret;
 743 }
 744
 745 static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
 746 {
 747         struct dmatest_thread   *thread;
 748         struct dmatest_thread   *_thread;
 749         int                     ret;
 750
 751         list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
 752                 ret = kthread_stop(thread->task);
 753                 pr_debug("thread %s exited with status %d\n",
 754                          thread->task->comm, ret);
 755                 list_del(&thread->node);
 756                 put_task_struct(thread->task);
 757                 kfree(thread);
 758         }
 759
 760         /* terminate all transfers on specified channels */
 761         dmaengine_terminate_all(dtc->chan);
 762
 763         kfree(dtc);
 764 }
 765
 766 static int dmatest_add_threads(struct dmatest_info *info,
 767                 struct dmatest_chan *dtc, enum dma_transaction_type type)
 768 {
 769         struct dmatest_params *params = &info->params;
 770         struct dmatest_thread *thread;
 771         struct dma_chan *chan = dtc->chan;
 772         char *op;
 773         unsigned int i;
 774
 775         if (type == DMA_MEMCPY)
 776                 op = "copy";
 777         else if (type == DMA_SG)
 778                 op = "sg";
 779         else if (type == DMA_XOR)
 780                 op = "xor";
 781         else if (type == DMA_PQ)
 782                 op = "pq";
 783         else
 784                 return -EINVAL;
 785
 786         for (i = 0; i < params->threads_per_chan; i++) {
 787                 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
 788                 if (!thread) {
 789                         pr_warn("No memory for %s-%s%u\n",
 790                                 dma_chan_name(chan), op, i);
 791                         break;
 792                 }
 793                 thread->info = info;
 794                 thread->chan = dtc->chan;
 795                 thread->type = type;
 796                 smp_wmb();
 797                 thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
 798                                 dma_chan_name(chan), op, i);
 799                 if (IS_ERR(thread->task)) {
 800                         pr_warn("Failed to create thread %s-%s%u\n",
 801                                 dma_chan_name(chan), op, i);
 802                         kfree(thread);
 803                         break;
 804                 }
 805
 806                 /* srcbuf and dstbuf are allocated by the thread itself */
 807                 get_task_struct(thread->task);
 808                 list_add_tail(&thread->node, &dtc->threads);
 809                 wake_up_process(thread->task);
 810         }
 811
 812         return i;
 813 }
 814
 815 static int dmatest_add_channel(struct dmatest_info *info,
 816                 struct dma_chan *chan)
 817 {
 818         struct dmatest_chan     *dtc;
 819         struct dma_device       *dma_dev = chan->device;
 820         unsigned int            thread_count = 0;
 821         int cnt;
 822
 823         dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
 824         if (!dtc) {
 825                 pr_warn("No memory for %s\n", dma_chan_name(chan));
 826                 return -ENOMEM;
 827         }
 828
 829         dtc->chan = chan;
 830         INIT_LIST_HEAD(&dtc->threads);
 831
 832         if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
 833                 if (dmatest == 0) {
 834                         cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
 835                         thread_count += cnt > 0 ? cnt : 0;
 836                 }
 837         }
 838
 839         if (dma_has_cap(DMA_SG, dma_dev->cap_mask)) {
 840                 if (dmatest == 1) {
 841                         cnt = dmatest_add_threads(info, dtc, DMA_SG);
 842                         thread_count += cnt > 0 ? cnt : 0;
 843                 }
 844         }
 845
 846         if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
 847                 cnt = dmatest_add_threads(info, dtc, DMA_XOR);
 848                 thread_count += cnt > 0 ? cnt : 0;
 849         }
 850         if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
 851                 cnt = dmatest_add_threads(info, dtc, DMA_PQ);
 852                 thread_count += cnt > 0 ? cnt : 0;
 853         }
 854
 855         pr_info("Started %u threads using %s\n",
 856                 thread_count, dma_chan_name(chan));
 857
 858         list_add_tail(&dtc->node, &info->channels);
 859         info->nr_channels++;
 860
 861         return 0;
 862 }
 863
 864 static bool filter(struct dma_chan *chan, void *param)
 865 {
 866         struct dmatest_params *params = param;
 867
 868         if (!dmatest_match_channel(params, chan) ||
 869             !dmatest_match_device(params, chan->device))
 870                 return false;
 871         else
 872                 return true;
 873 }
 874
 875 static void request_channels(struct dmatest_info *info,
 876                              enum dma_transaction_type type)
 877 {
 878         dma_cap_mask_t mask;
 879
 880         dma_cap_zero(mask);
 881         dma_cap_set(type, mask);
 882         for (;;) {
 883                 struct dmatest_params *params = &info->params;
 884                 struct dma_chan *chan;
 885
 886                 chan = dma_request_channel(mask, filter, params);
 887                 if (chan) {
 888                         if (dmatest_add_channel(info, chan)) {
 889                                 dma_release_channel(chan);
 890                                 break; /* add_channel failed, punt */
 891                         }
 892                 } else
 893                         break; /* no more channels available */
 894                 if (params->max_channels &&
 895                     info->nr_channels >= params->max_channels)
 896                         break; /* we have all we need */
 897         }
 898 }
 899
 900 static void run_threaded_test(struct dmatest_info *info)
 901 {
 902         struct dmatest_params *params = &info->params;
 903
 904         /* Copy test parameters */
 905         params->buf_size = test_buf_size;
 906         strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
 907         strlcpy(params->device, strim(test_device), sizeof(params->device));
 908         params->threads_per_chan = threads_per_chan;
 909         params->max_channels = max_channels;
 910         params->iterations = iterations;
 911         params->xor_sources = xor_sources;
 912         params->pq_sources = pq_sources;
 913         params->timeout = timeout;
 914         params->noverify = noverify;
 915
 916         request_channels(info, DMA_MEMCPY);
 917         request_channels(info, DMA_XOR);
 918         request_channels(info, DMA_SG);
 919         request_channels(info, DMA_PQ);
 920 }
 921
 922 static void stop_threaded_test(struct dmatest_info *info)
 923 {
 924         struct dmatest_chan *dtc, *_dtc;
 925         struct dma_chan *chan;
 926
 927         list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
 928                 list_del(&dtc->node);
 929                 chan = dtc->chan;
 930                 dmatest_cleanup_channel(dtc);
 931                 pr_debug("dropped channel %s\n", dma_chan_name(chan));
 932                 dma_release_channel(chan);
 933         }
 934
 935         info->nr_channels = 0;
 936 }
 937
 938 static void restart_threaded_test(struct dmatest_info *info, bool run)
 939 {
 940         /* we might be called early to set run=, defer running until all
 941          * parameters have been evaluated
 942          */
 943         if (!info->did_init)
 944                 return;
 945
 946         /* Stop any running test first */
 947         stop_threaded_test(info);
 948
 949         /* Run test with new parameters */
 950         run_threaded_test(info);
 951 }
 952
 953 static int dmatest_run_get(char *val, const struct kernel_param *kp)
 954 {
 955         struct dmatest_info *info = &test_info;
 956
 957         mutex_lock(&info->lock);
 958         if (is_threaded_test_run(info)) {
 959                 dmatest_run = true;
 960         } else {
 961                 stop_threaded_test(info);
 962                 dmatest_run = false;
 963         }
 964         mutex_unlock(&info->lock);
 965
 966         return param_get_bool(val, kp);
 967 }
 968
 969 static int dmatest_run_set(const char *val, const struct kernel_param *kp)
 970 {
 971         struct dmatest_info *info = &test_info;
 972         int ret;
 973
 974         mutex_lock(&info->lock);
 975         ret = param_set_bool(val, kp);
 976         if (ret) {
 977                 mutex_unlock(&info->lock);
 978                 return ret;
 979         }
 980
 981         if (is_threaded_test_run(info))
 982                 ret = -EBUSY;
 983         else if (dmatest_run)
 984                 restart_threaded_test(info, dmatest_run);
 985
 986         mutex_unlock(&info->lock);
 987
 988         return ret;
 989 }
 990
 991 static int __init dmatest_init(void)
 992 {
 993         struct dmatest_info *info = &test_info;
 994         struct dmatest_params *params = &info->params;
 995
 996         if (dmatest_run) {
 997                 mutex_lock(&info->lock);
 998                 run_threaded_test(info);
 999                 mutex_unlock(&info->lock);
1000         }
1001
1002         if (params->iterations && wait)
1003                 wait_event(thread_wait, !is_threaded_test_run(info));
1004
1005         /* module parameters are stable, inittime tests are started,
1006          * let userspace take over 'run' control
1007          */
1008         info->did_init = true;
1009
1010         return 0;
1011 }
1012 /* when compiled-in wait for drivers to load first */
1013 late_initcall(dmatest_init);
1014
1015 static void __exit dmatest_exit(void)
1016 {
1017         struct dmatest_info *info = &test_info;
1018
1019         mutex_lock(&info->lock);
1020         stop_threaded_test(info);
1021         mutex_unlock(&info->lock);
1022 }
1023 module_exit(dmatest_exit);
1024
1025 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1026 MODULE_LICENSE("GPL v2");