drivers/gpio/gpio-pca953x.c

   1 /*
   2  *  PCA953x 4/8/16/24/40 bit I/O ports
   3  *
   4  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
   5  *  Copyright (C) 2007 Marvell International Ltd.
   6  *
   7  *  Derived from drivers/i2c/chips/pca9539.c
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; version 2 of the License.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/gpio.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/i2c.h>
  19 #include <linux/platform_data/pca953x.h>
  20 #include <linux/slab.h>
  21 #include <asm/unaligned.h>
  22 #include <linux/of_platform.h>
  23 #include <linux/acpi.h>
  24 #include <linux/regulator/consumer.h>
  25
  26 #define PCA953X_INPUT           0
  27 #define PCA953X_OUTPUT          1
  28 #define PCA953X_INVERT          2
  29 #define PCA953X_DIRECTION       3
  30
  31 #define REG_ADDR_AI             0x80
  32
  33 #define PCA957X_IN              0
  34 #define PCA957X_INVRT           1
  35 #define PCA957X_BKEN            2
  36 #define PCA957X_PUPD            3
  37 #define PCA957X_CFG             4
  38 #define PCA957X_OUT             5
  39 #define PCA957X_MSK             6
  40 #define PCA957X_INTS            7
  41
  42 #define PCAL953X_IN_LATCH       34
  43 #define PCAL953X_INT_MASK       37
  44 #define PCAL953X_INT_STAT       38
  45
  46 #define PCA_GPIO_MASK           0x00FF
  47 #define PCA_INT                 0x0100
  48 #define PCA_PCAL                0x0200
  49 #define PCA953X_TYPE            0x1000
  50 #define PCA957X_TYPE            0x2000
  51 #define PCA_TYPE_MASK           0xF000
  52
  53 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
  54
  55 static const struct i2c_device_id pca953x_id[] = {
  56         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
  57         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
  58         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  59         { "pca9536", 4  | PCA953X_TYPE, },
  60         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
  61         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
  62         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  63         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
  64         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  65         { "pca9556", 8  | PCA953X_TYPE, },
  66         { "pca9557", 8  | PCA953X_TYPE, },
  67         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
  68         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  69         { "pca9698", 40 | PCA953X_TYPE, },
  70
  71         { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
  72
  73         { "max7310", 8  | PCA953X_TYPE, },
  74         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
  75         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
  76         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
  77         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
  78         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
  79         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
  80         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
  81         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
  82         { "xra1202", 8  | PCA953X_TYPE },
  83         { }
  84 };
  85 MODULE_DEVICE_TABLE(i2c, pca953x_id);
  86
  87 static const struct acpi_device_id pca953x_acpi_ids[] = {
  88         { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
  89         { }
  90 };
  91 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
  92
  93 #define MAX_BANK 5
  94 #define BANK_SZ 8
  95
  96 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
  97
  98 struct pca953x_reg_config {
  99         int direction;
 100         int output;
 101         int input;
 102 };
 103
 104 static const struct pca953x_reg_config pca953x_regs = {
 105         .direction = PCA953X_DIRECTION,
 106         .output = PCA953X_OUTPUT,
 107         .input = PCA953X_INPUT,
 108 };
 109
 110 static const struct pca953x_reg_config pca957x_regs = {
 111         .direction = PCA957X_CFG,
 112         .output = PCA957X_OUT,
 113         .input = PCA957X_IN,
 114 };
 115
 116 struct pca953x_chip {
 117         unsigned gpio_start;
 118         u8 reg_output[MAX_BANK];
 119         u8 reg_direction[MAX_BANK];
 120         struct mutex i2c_lock;
 121
 122 #ifdef CONFIG_GPIO_PCA953X_IRQ
 123         struct mutex irq_lock;
 124         u8 irq_mask[MAX_BANK];
 125         u8 irq_stat[MAX_BANK];
 126         u8 irq_trig_raise[MAX_BANK];
 127         u8 irq_trig_fall[MAX_BANK];
 128 #endif
 129
 130         struct i2c_client *client;
 131         struct gpio_chip gpio_chip;
 132         const char *const *names;
 133         int     chip_type;
 134         unsigned long driver_data;
 135         struct regulator *regulator;
 136
 137         const struct pca953x_reg_config *regs;
 138
 139         int (*write_regs)(struct pca953x_chip *, int, u8 *);
 140 };
 141
 142 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
 143                                 int off)
 144 {
 145         int ret;
 146         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 147         int offset = off / BANK_SZ;
 148
 149         ret = i2c_smbus_read_byte_data(chip->client,
 150                                 (reg << bank_shift) + offset);
 151         *val = ret;
 152
 153         if (ret < 0) {
 154                 dev_err(&chip->client->dev, "failed reading register\n");
 155                 return ret;
 156         }
 157
 158         return 0;
 159 }
 160
 161 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
 162                                 int off)
 163 {
 164         int ret;
 165         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 166         int offset = off / BANK_SZ;
 167
 168         ret = i2c_smbus_write_byte_data(chip->client,
 169                                         (reg << bank_shift) + offset, val);
 170
 171         if (ret < 0) {
 172                 dev_err(&chip->client->dev, "failed writing register\n");
 173                 return ret;
 174         }
 175
 176         return 0;
 177 }
 178
 179 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
 180 {
 181         return i2c_smbus_write_byte_data(chip->client, reg, *val);
 182 }
 183
 184 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
 185 {
 186         __le16 word = cpu_to_le16(get_unaligned((u16 *)val));
 187
 188         return i2c_smbus_write_word_data(chip->client,
 189                                          reg << 1, (__force u16)word);
 190 }
 191
 192 static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
 193 {
 194         int ret;
 195
 196         ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]);
 197         if (ret < 0)
 198                 return ret;
 199
 200         return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]);
 201 }
 202
 203 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
 204 {
 205         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 206
 207         return i2c_smbus_write_i2c_block_data(chip->client,
 208                                               (reg << bank_shift) | REG_ADDR_AI,
 209                                               NBANK(chip), val);
 210 }
 211
 212 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
 213 {
 214         int ret = 0;
 215
 216         ret = chip->write_regs(chip, reg, val);
 217         if (ret < 0) {
 218                 dev_err(&chip->client->dev, "failed writing register\n");
 219                 return ret;
 220         }
 221
 222         return 0;
 223 }
 224
 225 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
 226 {
 227         int ret;
 228
 229         if (chip->gpio_chip.ngpio <= 8) {
 230                 ret = i2c_smbus_read_byte_data(chip->client, reg);
 231                 *val = ret;
 232         } else if (chip->gpio_chip.ngpio >= 24) {
 233                 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 234
 235                 ret = i2c_smbus_read_i2c_block_data(chip->client,
 236                                         (reg << bank_shift) | REG_ADDR_AI,
 237                                         NBANK(chip), val);
 238         } else {
 239                 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
 240                 val[0] = (u16)ret & 0xFF;
 241                 val[1] = (u16)ret >> 8;
 242         }
 243         if (ret < 0) {
 244                 dev_err(&chip->client->dev, "failed reading register\n");
 245                 return ret;
 246         }
 247
 248         return 0;
 249 }
 250
 251 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
 252 {
 253         struct pca953x_chip *chip = gpiochip_get_data(gc);
 254         u8 reg_val;
 255         int ret;
 256
 257         mutex_lock(&chip->i2c_lock);
 258         reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
 259
 260         ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
 261         if (ret)
 262                 goto exit;
 263
 264         chip->reg_direction[off / BANK_SZ] = reg_val;
 265 exit:
 266         mutex_unlock(&chip->i2c_lock);
 267         return ret;
 268 }
 269
 270 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
 271                 unsigned off, int val)
 272 {
 273         struct pca953x_chip *chip = gpiochip_get_data(gc);
 274         u8 reg_val;
 275         int ret;
 276
 277         mutex_lock(&chip->i2c_lock);
 278         /* set output level */
 279         if (val)
 280                 reg_val = chip->reg_output[off / BANK_SZ]
 281                         | (1u << (off % BANK_SZ));
 282         else
 283                 reg_val = chip->reg_output[off / BANK_SZ]
 284                         & ~(1u << (off % BANK_SZ));
 285
 286         ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
 287         if (ret)
 288                 goto exit;
 289
 290         chip->reg_output[off / BANK_SZ] = reg_val;
 291
 292         /* then direction */
 293         reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
 294         ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
 295         if (ret)
 296                 goto exit;
 297
 298         chip->reg_direction[off / BANK_SZ] = reg_val;
 299 exit:
 300         mutex_unlock(&chip->i2c_lock);
 301         return ret;
 302 }
 303
 304 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
 305 {
 306         struct pca953x_chip *chip = gpiochip_get_data(gc);
 307         u32 reg_val;
 308         int ret;
 309
 310         mutex_lock(&chip->i2c_lock);
 311         ret = pca953x_read_single(chip, chip->regs->input, &reg_val, off);
 312         mutex_unlock(&chip->i2c_lock);
 313         if (ret < 0) {
 314                 /* NOTE:  diagnostic already emitted; that's all we should
 315                  * do unless gpio_*_value_cansleep() calls become different
 316                  * from their nonsleeping siblings (and report faults).
 317                  */
 318                 return 0;
 319         }
 320
 321         return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
 322 }
 323
 324 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
 325 {
 326         struct pca953x_chip *chip = gpiochip_get_data(gc);
 327         u8 reg_val;
 328         int ret;
 329
 330         mutex_lock(&chip->i2c_lock);
 331         if (val)
 332                 reg_val = chip->reg_output[off / BANK_SZ]
 333                         | (1u << (off % BANK_SZ));
 334         else
 335                 reg_val = chip->reg_output[off / BANK_SZ]
 336                         & ~(1u << (off % BANK_SZ));
 337
 338         ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
 339         if (ret)
 340                 goto exit;
 341
 342         chip->reg_output[off / BANK_SZ] = reg_val;
 343 exit:
 344         mutex_unlock(&chip->i2c_lock);
 345 }
 346
 347 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
 348                 unsigned long *mask, unsigned long *bits)
 349 {
 350         struct pca953x_chip *chip = gpiochip_get_data(gc);
 351         u8 reg_val[MAX_BANK];
 352         int ret;
 353         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 354         int bank;
 355
 356         memcpy(reg_val, chip->reg_output, NBANK(chip));
 357         mutex_lock(&chip->i2c_lock);
 358         for(bank=0; bank<NBANK(chip); bank++) {
 359                 unsigned bankmask = mask[bank / sizeof(*mask)] >>
 360                                     ((bank % sizeof(*mask)) * 8);
 361                 if(bankmask) {
 362                         unsigned bankval  = bits[bank / sizeof(*bits)] >>
 363                                             ((bank % sizeof(*bits)) * 8);
 364                         reg_val[bank] = (reg_val[bank] & ~bankmask) | bankval;
 365                 }
 366         }
 367         ret = i2c_smbus_write_i2c_block_data(chip->client,
 368                                              chip->regs->output << bank_shift,
 369                                              NBANK(chip), reg_val);
 370         if (ret)
 371                 goto exit;
 372
 373         memcpy(chip->reg_output, reg_val, NBANK(chip));
 374 exit:
 375         mutex_unlock(&chip->i2c_lock);
 376 }
 377
 378 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 379 {
 380         struct gpio_chip *gc;
 381
 382         gc = &chip->gpio_chip;
 383
 384         gc->direction_input  = pca953x_gpio_direction_input;
 385         gc->direction_output = pca953x_gpio_direction_output;
 386         gc->get = pca953x_gpio_get_value;
 387         gc->set = pca953x_gpio_set_value;
 388         gc->set_multiple = pca953x_gpio_set_multiple;
 389         gc->can_sleep = true;
 390
 391         gc->base = chip->gpio_start;
 392         gc->ngpio = gpios;
 393         gc->label = chip->client->name;
 394         gc->parent = &chip->client->dev;
 395         gc->owner = THIS_MODULE;
 396         gc->names = chip->names;
 397 }
 398
 399 #ifdef CONFIG_GPIO_PCA953X_IRQ
 400 static void pca953x_irq_mask(struct irq_data *d)
 401 {
 402         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 403         struct pca953x_chip *chip = gpiochip_get_data(gc);
 404
 405         chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
 406 }
 407
 408 static void pca953x_irq_unmask(struct irq_data *d)
 409 {
 410         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 411         struct pca953x_chip *chip = gpiochip_get_data(gc);
 412
 413         chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
 414 }
 415
 416 static void pca953x_irq_bus_lock(struct irq_data *d)
 417 {
 418         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 419         struct pca953x_chip *chip = gpiochip_get_data(gc);
 420
 421         mutex_lock(&chip->irq_lock);
 422 }
 423
 424 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 425 {
 426         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 427         struct pca953x_chip *chip = gpiochip_get_data(gc);
 428         u8 new_irqs;
 429         int level, i;
 430         u8 invert_irq_mask[MAX_BANK];
 431
 432         if (chip->driver_data & PCA_PCAL) {
 433                 /* Enable latch on interrupt-enabled inputs */
 434                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
 435
 436                 for (i = 0; i < NBANK(chip); i++)
 437                         invert_irq_mask[i] = ~chip->irq_mask[i];
 438
 439                 /* Unmask enabled interrupts */
 440                 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
 441         }
 442
 443         /* Look for any newly setup interrupt */
 444         for (i = 0; i < NBANK(chip); i++) {
 445                 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
 446                 new_irqs &= ~chip->reg_direction[i];
 447
 448                 while (new_irqs) {
 449                         level = __ffs(new_irqs);
 450                         pca953x_gpio_direction_input(&chip->gpio_chip,
 451                                                         level + (BANK_SZ * i));
 452                         new_irqs &= ~(1 << level);
 453                 }
 454         }
 455
 456         mutex_unlock(&chip->irq_lock);
 457 }
 458
 459 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 460 {
 461         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 462         struct pca953x_chip *chip = gpiochip_get_data(gc);
 463         int bank_nb = d->hwirq / BANK_SZ;
 464         u8 mask = 1 << (d->hwirq % BANK_SZ);
 465
 466         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
 467                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
 468                         d->irq, type);
 469                 return -EINVAL;
 470         }
 471
 472         if (type & IRQ_TYPE_EDGE_FALLING)
 473                 chip->irq_trig_fall[bank_nb] |= mask;
 474         else
 475                 chip->irq_trig_fall[bank_nb] &= ~mask;
 476
 477         if (type & IRQ_TYPE_EDGE_RISING)
 478                 chip->irq_trig_raise[bank_nb] |= mask;
 479         else
 480                 chip->irq_trig_raise[bank_nb] &= ~mask;
 481
 482         return 0;
 483 }
 484
 485 static struct irq_chip pca953x_irq_chip = {
 486         .name                   = "pca953x",
 487         .irq_mask               = pca953x_irq_mask,
 488         .irq_unmask             = pca953x_irq_unmask,
 489         .irq_bus_lock           = pca953x_irq_bus_lock,
 490         .irq_bus_sync_unlock    = pca953x_irq_bus_sync_unlock,
 491         .irq_set_type           = pca953x_irq_set_type,
 492 };
 493
 494 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
 495 {
 496         u8 cur_stat[MAX_BANK];
 497         u8 old_stat[MAX_BANK];
 498         bool pending_seen = false;
 499         bool trigger_seen = false;
 500         u8 trigger[MAX_BANK];
 501         int ret, i;
 502
 503         if (chip->driver_data & PCA_PCAL) {
 504                 /* Read the current interrupt status from the device */
 505                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
 506                 if (ret)
 507                         return false;
 508
 509                 /* Check latched inputs and clear interrupt status */
 510                 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
 511                 if (ret)
 512                         return false;
 513
 514                 for (i = 0; i < NBANK(chip); i++) {
 515                         /* Apply filter for rising/falling edge selection */
 516                         pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
 517                                 (cur_stat[i] & chip->irq_trig_raise[i]);
 518                         pending[i] &= trigger[i];
 519                         if (pending[i])
 520                                 pending_seen = true;
 521                 }
 522
 523                 return pending_seen;
 524         }
 525
 526         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 527         if (ret)
 528                 return false;
 529
 530         /* Remove output pins from the equation */
 531         for (i = 0; i < NBANK(chip); i++)
 532                 cur_stat[i] &= chip->reg_direction[i];
 533
 534         memcpy(old_stat, chip->irq_stat, NBANK(chip));
 535
 536         for (i = 0; i < NBANK(chip); i++) {
 537                 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
 538                 if (trigger[i])
 539                         trigger_seen = true;
 540         }
 541
 542         if (!trigger_seen)
 543                 return false;
 544
 545         memcpy(chip->irq_stat, cur_stat, NBANK(chip));
 546
 547         for (i = 0; i < NBANK(chip); i++) {
 548                 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
 549                         (cur_stat[i] & chip->irq_trig_raise[i]);
 550                 pending[i] &= trigger[i];
 551                 if (pending[i])
 552                         pending_seen = true;
 553         }
 554
 555         return pending_seen;
 556 }
 557
 558 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 559 {
 560         struct pca953x_chip *chip = devid;
 561         u8 pending[MAX_BANK];
 562         u8 level;
 563         unsigned nhandled = 0;
 564         int i;
 565
 566         if (!pca953x_irq_pending(chip, pending))
 567                 return IRQ_NONE;
 568
 569         for (i = 0; i < NBANK(chip); i++) {
 570                 while (pending[i]) {
 571                         level = __ffs(pending[i]);
 572                         handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
 573                                                         level + (BANK_SZ * i)));
 574                         pending[i] &= ~(1 << level);
 575                         nhandled++;
 576                 }
 577         }
 578
 579         return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
 580 }
 581
 582 static int pca953x_irq_setup(struct pca953x_chip *chip,
 583                              int irq_base)
 584 {
 585         struct i2c_client *client = chip->client;
 586         int ret, i;
 587
 588         if (client->irq && irq_base != -1
 589                         && (chip->driver_data & PCA_INT)) {
 590
 591                 ret = pca953x_read_regs(chip,
 592                                         chip->regs->input, chip->irq_stat);
 593                 if (ret)
 594                         return ret;
 595
 596                 /*
 597                  * There is no way to know which GPIO line generated the
 598                  * interrupt.  We have to rely on the previous read for
 599                  * this purpose.
 600                  */
 601                 for (i = 0; i < NBANK(chip); i++)
 602                         chip->irq_stat[i] &= chip->reg_direction[i];
 603                 mutex_init(&chip->irq_lock);
 604
 605                 ret = devm_request_threaded_irq(&client->dev,
 606                                         client->irq,
 607                                            NULL,
 608                                            pca953x_irq_handler,
 609                                            IRQF_TRIGGER_LOW | IRQF_ONESHOT |
 610                                                    IRQF_SHARED,
 611                                            dev_name(&client->dev), chip);
 612                 if (ret) {
 613                         dev_err(&client->dev, "failed to request irq %d\n",
 614                                 client->irq);
 615                         return ret;
 616                 }
 617
 618                 ret =  gpiochip_irqchip_add(&chip->gpio_chip,
 619                                             &pca953x_irq_chip,
 620                                             irq_base,
 621                                             handle_simple_irq,
 622                                             IRQ_TYPE_NONE);
 623                 if (ret) {
 624                         dev_err(&client->dev,
 625                                 "could not connect irqchip to gpiochip\n");
 626                         return ret;
 627                 }
 628
 629                 gpiochip_set_chained_irqchip(&chip->gpio_chip,
 630                                              &pca953x_irq_chip,
 631                                              client->irq, NULL);
 632         }
 633
 634         return 0;
 635 }
 636
 637 #else /* CONFIG_GPIO_PCA953X_IRQ */
 638 static int pca953x_irq_setup(struct pca953x_chip *chip,
 639                              int irq_base)
 640 {
 641         struct i2c_client *client = chip->client;
 642
 643         if (irq_base != -1 && (chip->driver_data & PCA_INT))
 644                 dev_warn(&client->dev, "interrupt support not compiled in\n");
 645
 646         return 0;
 647 }
 648 #endif
 649
 650 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
 651 {
 652         int ret;
 653         u8 val[MAX_BANK];
 654
 655         chip->regs = &pca953x_regs;
 656
 657         ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
 658         if (ret)
 659                 goto out;
 660
 661         ret = pca953x_read_regs(chip, chip->regs->direction,
 662                                 chip->reg_direction);
 663         if (ret)
 664                 goto out;
 665
 666         /* set platform specific polarity inversion */
 667         if (invert)
 668                 memset(val, 0xFF, NBANK(chip));
 669         else
 670                 memset(val, 0, NBANK(chip));
 671
 672         ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
 673 out:
 674         return ret;
 675 }
 676
 677 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 678 {
 679         int ret;
 680         u8 val[MAX_BANK];
 681
 682         chip->regs = &pca957x_regs;
 683
 684         ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
 685         if (ret)
 686                 goto out;
 687         ret = pca953x_read_regs(chip, chip->regs->direction,
 688                                 chip->reg_direction);
 689         if (ret)
 690                 goto out;
 691
 692         /* set platform specific polarity inversion */
 693         if (invert)
 694                 memset(val, 0xFF, NBANK(chip));
 695         else
 696                 memset(val, 0, NBANK(chip));
 697         ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
 698         if (ret)
 699                 goto out;
 700
 701         /* To enable register 6, 7 to control pull up and pull down */
 702         memset(val, 0x02, NBANK(chip));
 703         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
 704         if (ret)
 705                 goto out;
 706
 707         return 0;
 708 out:
 709         return ret;
 710 }
 711
 712 static const struct of_device_id pca953x_dt_ids[];
 713
 714 static int pca953x_probe(struct i2c_client *client,
 715                                    const struct i2c_device_id *id)
 716 {
 717         struct pca953x_platform_data *pdata;
 718         struct pca953x_chip *chip;
 719         int irq_base = 0;
 720         int ret;
 721         u32 invert = 0;
 722         struct regulator *reg;
 723
 724         chip = devm_kzalloc(&client->dev,
 725                         sizeof(struct pca953x_chip), GFP_KERNEL);
 726         if (chip == NULL)
 727                 return -ENOMEM;
 728
 729         pdata = dev_get_platdata(&client->dev);
 730         if (pdata) {
 731                 irq_base = pdata->irq_base;
 732                 chip->gpio_start = pdata->gpio_base;
 733                 invert = pdata->invert;
 734                 chip->names = pdata->names;
 735         } else {
 736                 chip->gpio_start = -1;
 737                 irq_base = 0;
 738         }
 739
 740         chip->client = client;
 741
 742         reg = devm_regulator_get(&client->dev, "vcc");
 743         if (IS_ERR(reg)) {
 744                 ret = PTR_ERR(reg);
 745                 if (ret != -EPROBE_DEFER)
 746                         dev_err(&client->dev, "reg get err: %d\n", ret);
 747                 return ret;
 748         }
 749         ret = regulator_enable(reg);
 750         if (ret) {
 751                 dev_err(&client->dev, "reg en err: %d\n", ret);
 752                 return ret;
 753         }
 754         chip->regulator = reg;
 755
 756         if (id) {
 757                 chip->driver_data = id->driver_data;
 758         } else {
 759                 const struct acpi_device_id *id;
 760                 const struct of_device_id *match;
 761
 762                 match = of_match_device(pca953x_dt_ids, &client->dev);
 763                 if (match) {
 764                         chip->driver_data = (int)(uintptr_t)match->data;
 765                 } else {
 766                         id = acpi_match_device(pca953x_acpi_ids, &client->dev);
 767                         if (!id) {
 768                                 ret = -ENODEV;
 769                                 goto err_exit;
 770                         }
 771
 772                         chip->driver_data = id->driver_data;
 773                 }
 774         }
 775
 776         chip->chip_type = PCA_CHIP_TYPE(chip->driver_data);
 777
 778         mutex_init(&chip->i2c_lock);
 779
 780         /* initialize cached registers from their original values.
 781          * we can't share this chip with another i2c master.
 782          */
 783         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
 784
 785         if (chip->gpio_chip.ngpio <= 8) {
 786                 chip->write_regs = pca953x_write_regs_8;
 787         } else if (chip->gpio_chip.ngpio >= 24) {
 788                 chip->write_regs = pca953x_write_regs_24;
 789         } else {
 790                 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
 791                         chip->write_regs = pca953x_write_regs_16;
 792                 else
 793                         chip->write_regs = pca957x_write_regs_16;
 794         }
 795
 796         if (chip->chip_type == PCA953X_TYPE)
 797                 ret = device_pca953x_init(chip, invert);
 798         else
 799                 ret = device_pca957x_init(chip, invert);
 800         if (ret)
 801                 goto err_exit;
 802
 803         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
 804         if (ret)
 805                 goto err_exit;
 806
 807         ret = pca953x_irq_setup(chip, irq_base);
 808         if (ret)
 809                 goto err_exit;
 810
 811         if (pdata && pdata->setup) {
 812                 ret = pdata->setup(client, chip->gpio_chip.base,
 813                                 chip->gpio_chip.ngpio, pdata->context);
 814                 if (ret < 0)
 815                         dev_warn(&client->dev, "setup failed, %d\n", ret);
 816         }
 817
 818         i2c_set_clientdata(client, chip);
 819         return 0;
 820
 821 err_exit:
 822         regulator_disable(chip->regulator);
 823         return ret;
 824 }
 825
 826 static int pca953x_remove(struct i2c_client *client)
 827 {
 828         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
 829         struct pca953x_chip *chip = i2c_get_clientdata(client);
 830         int ret;
 831
 832         if (pdata && pdata->teardown) {
 833                 ret = pdata->teardown(client, chip->gpio_chip.base,
 834                                 chip->gpio_chip.ngpio, pdata->context);
 835                 if (ret < 0)
 836                         dev_err(&client->dev, "%s failed, %d\n",
 837                                         "teardown", ret);
 838         } else {
 839                 ret = 0;
 840         }
 841
 842         regulator_disable(chip->regulator);
 843
 844         return ret;
 845 }
 846
 847 /* convenience to stop overlong match-table lines */
 848 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
 849 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
 850
 851 static const struct of_device_id pca953x_dt_ids[] = {
 852         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
 853         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
 854         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
 855         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
 856         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
 857         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
 858         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
 859         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
 860         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
 861         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
 862         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
 863         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
 864         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
 865         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
 866
 867         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
 868         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
 869         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
 870         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
 871
 872         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
 873         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
 874         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
 875         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
 876         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
 877
 878         { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), },
 879
 880         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
 881         { }
 882 };
 883
 884 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
 885
 886 static struct i2c_driver pca953x_driver = {
 887         .driver = {
 888                 .name   = "pca953x",
 889                 .of_match_table = pca953x_dt_ids,
 890                 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
 891         },
 892         .probe          = pca953x_probe,
 893         .remove         = pca953x_remove,
 894         .id_table       = pca953x_id,
 895 };
 896
 897 static int __init pca953x_init(void)
 898 {
 899         return i2c_add_driver(&pca953x_driver);
 900 }
 901 /* register after i2c postcore initcall and before
 902  * subsys initcalls that may rely on these GPIOs
 903  */
 904 subsys_initcall(pca953x_init);
 905
 906 static void __exit pca953x_exit(void)
 907 {
 908         i2c_del_driver(&pca953x_driver);
 909 }
 910 module_exit(pca953x_exit);
 911
 912 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
 913 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
 914 MODULE_LICENSE("GPL");