HID: multitouch: fix input mode switching on some Elan panels
[cascardo/linux.git] / drivers / gpu / drm / amd / scheduler / gpu_scheduler.h
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23
24 #ifndef _GPU_SCHEDULER_H_
25 #define _GPU_SCHEDULER_H_
26
27 #include <linux/kfifo.h>
28 #include <linux/fence.h>
29
30 struct amd_gpu_scheduler;
31 struct amd_sched_rq;
32
33 /**
34  * A scheduler entity is a wrapper around a job queue or a group
35  * of other entities. Entities take turns emitting jobs from their 
36  * job queues to corresponding hardware ring based on scheduling
37  * policy.
38 */
39 struct amd_sched_entity {
40         struct list_head                list;
41         struct amd_sched_rq             *rq;
42         struct amd_gpu_scheduler        *sched;
43
44         spinlock_t                      queue_lock;
45         struct kfifo                    job_queue;
46
47         atomic_t                        fence_seq;
48         uint64_t                        fence_context;
49
50         struct fence                    *dependency;
51         struct fence_cb                 cb;
52 };
53
54 /**
55  * Run queue is a set of entities scheduling command submissions for
56  * one specific ring. It implements the scheduling policy that selects
57  * the next entity to emit commands from.
58 */
59 struct amd_sched_rq {
60         spinlock_t              lock;
61         struct list_head        entities;
62         struct amd_sched_entity *current_entity;
63 };
64
65 struct amd_sched_fence {
66         struct fence                    base;
67         struct fence_cb                 cb;
68         struct amd_gpu_scheduler        *sched;
69         spinlock_t                      lock;
70         void                            *owner;
71         struct delayed_work             dwork;
72         struct list_head                list;
73 };
74
75 struct amd_sched_job {
76         struct amd_gpu_scheduler        *sched;
77         struct amd_sched_entity         *s_entity;
78         struct amd_sched_fence          *s_fence;
79         void                            *owner;
80 };
81
82 extern const struct fence_ops amd_sched_fence_ops;
83 static inline struct amd_sched_fence *to_amd_sched_fence(struct fence *f)
84 {
85         struct amd_sched_fence *__f = container_of(f, struct amd_sched_fence, base);
86
87         if (__f->base.ops == &amd_sched_fence_ops)
88                 return __f;
89
90         return NULL;
91 }
92
93 /**
94  * Define the backend operations called by the scheduler,
95  * these functions should be implemented in driver side
96 */
97 struct amd_sched_backend_ops {
98         struct fence *(*dependency)(struct amd_sched_job *sched_job);
99         struct fence *(*run_job)(struct amd_sched_job *sched_job);
100 };
101
102 /**
103  * One scheduler is implemented for each hardware ring
104 */
105 struct amd_gpu_scheduler {
106         struct amd_sched_backend_ops    *ops;
107         uint32_t                        hw_submission_limit;
108         long                            timeout;
109         const char                      *name;
110         struct amd_sched_rq             sched_rq;
111         struct amd_sched_rq             kernel_rq;
112         wait_queue_head_t               wake_up_worker;
113         wait_queue_head_t               job_scheduled;
114         atomic_t                        hw_rq_count;
115         struct list_head                fence_list;
116         spinlock_t                      fence_list_lock;
117         struct task_struct              *thread;
118 };
119
120 int amd_sched_init(struct amd_gpu_scheduler *sched,
121                    struct amd_sched_backend_ops *ops,
122                    uint32_t hw_submission, long timeout, const char *name);
123 void amd_sched_fini(struct amd_gpu_scheduler *sched);
124
125 int amd_sched_entity_init(struct amd_gpu_scheduler *sched,
126                           struct amd_sched_entity *entity,
127                           struct amd_sched_rq *rq,
128                           uint32_t jobs);
129 void amd_sched_entity_fini(struct amd_gpu_scheduler *sched,
130                            struct amd_sched_entity *entity);
131 int amd_sched_entity_push_job(struct amd_sched_job *sched_job);
132
133 struct amd_sched_fence *amd_sched_fence_create(
134         struct amd_sched_entity *s_entity, void *owner);
135 void amd_sched_fence_signal(struct amd_sched_fence *fence);
136
137
138 #endif