2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * Freescale DCU drm device driver
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/clk.h>
13 #include <linux/clk-provider.h>
14 #include <linux/console.h>
16 #include <linux/mfd/syscon.h>
18 #include <linux/module.h>
19 #include <linux/of_platform.h>
20 #include <linux/platform_device.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
26 #include <drm/drm_atomic_helper.h>
27 #include <drm/drm_crtc_helper.h>
28 #include <drm/drm_fb_cma_helper.h>
29 #include <drm/drm_gem_cma_helper.h>
31 #include "fsl_dcu_drm_crtc.h"
32 #include "fsl_dcu_drm_drv.h"
35 static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
37 if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
43 static const struct regmap_config fsl_dcu_regmap_config = {
48 .volatile_reg = fsl_dcu_drm_is_volatile_reg,
51 static int fsl_dcu_drm_irq_init(struct drm_device *dev)
53 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
56 ret = drm_irq_install(dev, fsl_dev->irq);
58 dev_err(dev->dev, "failed to install IRQ handler\n");
60 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0);
61 regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
62 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
63 DCU_UPDATE_MODE_READREG);
68 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
70 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
73 ret = fsl_dcu_drm_modeset_init(fsl_dev);
75 dev_err(dev->dev, "failed to initialize mode setting\n");
79 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
81 dev_err(dev->dev, "failed to initialize vblank\n");
85 ret = fsl_dcu_drm_irq_init(dev);
88 dev->irq_enabled = true;
90 fsl_dcu_fbdev_init(dev);
94 drm_kms_helper_poll_fini(dev);
97 drm_fbdev_cma_fini(fsl_dev->fbdev);
99 drm_mode_config_cleanup(dev);
100 drm_vblank_cleanup(dev);
101 drm_irq_uninstall(dev);
102 dev->dev_private = NULL;
107 static int fsl_dcu_unload(struct drm_device *dev)
109 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
111 drm_kms_helper_poll_fini(dev);
114 drm_fbdev_cma_fini(fsl_dev->fbdev);
116 drm_mode_config_cleanup(dev);
117 drm_vblank_cleanup(dev);
118 drm_irq_uninstall(dev);
120 dev->dev_private = NULL;
125 static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
127 struct drm_device *dev = arg;
128 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
129 unsigned int int_status;
132 ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
134 dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
138 if (int_status & DCU_INT_STATUS_VBLANK)
139 drm_handle_vblank(dev, 0);
141 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
142 regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
143 DCU_UPDATE_MODE_READREG);
148 static int fsl_dcu_drm_enable_vblank(struct drm_device *dev, unsigned int pipe)
150 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
153 regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
154 value &= ~DCU_INT_MASK_VBLANK;
155 regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
160 static void fsl_dcu_drm_disable_vblank(struct drm_device *dev,
163 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
166 regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
167 value |= DCU_INT_MASK_VBLANK;
168 regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
171 static void fsl_dcu_drm_lastclose(struct drm_device *dev)
173 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
175 drm_fbdev_cma_restore_mode(fsl_dev->fbdev);
178 static const struct file_operations fsl_dcu_drm_fops = {
179 .owner = THIS_MODULE,
181 .release = drm_release,
182 .unlocked_ioctl = drm_ioctl,
184 .compat_ioctl = drm_compat_ioctl,
189 .mmap = drm_gem_cma_mmap,
192 static struct drm_driver fsl_dcu_drm_driver = {
193 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET
194 | DRIVER_PRIME | DRIVER_ATOMIC,
195 .lastclose = fsl_dcu_drm_lastclose,
196 .load = fsl_dcu_load,
197 .unload = fsl_dcu_unload,
198 .irq_handler = fsl_dcu_drm_irq,
199 .get_vblank_counter = drm_vblank_no_hw_counter,
200 .enable_vblank = fsl_dcu_drm_enable_vblank,
201 .disable_vblank = fsl_dcu_drm_disable_vblank,
202 .gem_free_object_unlocked = drm_gem_cma_free_object,
203 .gem_vm_ops = &drm_gem_cma_vm_ops,
204 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
205 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
206 .gem_prime_import = drm_gem_prime_import,
207 .gem_prime_export = drm_gem_prime_export,
208 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
209 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
210 .gem_prime_vmap = drm_gem_cma_prime_vmap,
211 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
212 .gem_prime_mmap = drm_gem_cma_prime_mmap,
213 .dumb_create = drm_gem_cma_dumb_create,
214 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
215 .dumb_destroy = drm_gem_dumb_destroy,
216 .fops = &fsl_dcu_drm_fops,
217 .name = "fsl-dcu-drm",
218 .desc = "Freescale DCU DRM",
224 #ifdef CONFIG_PM_SLEEP
225 static int fsl_dcu_drm_pm_suspend(struct device *dev)
227 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
232 disable_irq(fsl_dev->irq);
233 drm_kms_helper_poll_disable(fsl_dev->drm);
236 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 1);
239 fsl_dev->state = drm_atomic_helper_suspend(fsl_dev->drm);
240 if (IS_ERR(fsl_dev->state)) {
242 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0);
245 drm_kms_helper_poll_enable(fsl_dev->drm);
246 enable_irq(fsl_dev->irq);
247 return PTR_ERR(fsl_dev->state);
250 clk_disable_unprepare(fsl_dev->pix_clk);
251 clk_disable_unprepare(fsl_dev->clk);
256 static int fsl_dcu_drm_pm_resume(struct device *dev)
258 struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
264 ret = clk_prepare_enable(fsl_dev->clk);
266 dev_err(dev, "failed to enable dcu clk\n");
270 ret = clk_prepare_enable(fsl_dev->pix_clk);
272 dev_err(dev, "failed to enable pix clk\n");
276 fsl_dcu_drm_init_planes(fsl_dev->drm);
277 drm_atomic_helper_resume(fsl_dev->drm, fsl_dev->state);
280 drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0);
283 drm_kms_helper_poll_enable(fsl_dev->drm);
284 enable_irq(fsl_dev->irq);
290 static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
291 SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
294 static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
298 .layer_regs = LS1021A_LAYER_REG_NUM,
301 static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
305 .layer_regs = VF610_LAYER_REG_NUM,
308 static const struct of_device_id fsl_dcu_of_match[] = {
310 .compatible = "fsl,ls1021a-dcu",
311 .data = &fsl_dcu_ls1021a_data,
313 .compatible = "fsl,vf610-dcu",
314 .data = &fsl_dcu_vf610_data,
318 MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
320 static int fsl_dcu_drm_probe(struct platform_device *pdev)
322 struct fsl_dcu_drm_device *fsl_dev;
323 struct drm_device *drm;
324 struct device *dev = &pdev->dev;
325 struct resource *res;
327 struct drm_driver *driver = &fsl_dcu_drm_driver;
328 struct clk *pix_clk_in;
329 char pix_clk_name[32];
330 const char *pix_clk_in_name;
331 const struct of_device_id *id;
333 u8 div_ratio_shift = 0;
335 fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
339 id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
342 fsl_dev->soc = id->data;
344 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
346 dev_err(dev, "could not get memory IO resource\n");
350 base = devm_ioremap_resource(dev, res);
356 fsl_dev->irq = platform_get_irq(pdev, 0);
357 if (fsl_dev->irq < 0) {
358 dev_err(dev, "failed to get irq\n");
362 fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
363 &fsl_dcu_regmap_config);
364 if (IS_ERR(fsl_dev->regmap)) {
365 dev_err(dev, "regmap init failed\n");
366 return PTR_ERR(fsl_dev->regmap);
369 fsl_dev->clk = devm_clk_get(dev, "dcu");
370 if (IS_ERR(fsl_dev->clk)) {
371 dev_err(dev, "failed to get dcu clock\n");
372 return PTR_ERR(fsl_dev->clk);
374 ret = clk_prepare_enable(fsl_dev->clk);
376 dev_err(dev, "failed to enable dcu clk\n");
380 pix_clk_in = devm_clk_get(dev, "pix");
381 if (IS_ERR(pix_clk_in)) {
382 /* legancy binding, use dcu clock as pixel clock input */
383 pix_clk_in = fsl_dev->clk;
386 if (of_property_read_bool(dev->of_node, "big-endian"))
387 div_ratio_shift = 24;
389 pix_clk_in_name = __clk_get_name(pix_clk_in);
390 snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
391 fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
392 pix_clk_in_name, 0, base + DCU_DIV_RATIO,
393 div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
394 if (IS_ERR(fsl_dev->pix_clk)) {
395 dev_err(dev, "failed to register pix clk\n");
396 ret = PTR_ERR(fsl_dev->pix_clk);
400 ret = clk_prepare_enable(fsl_dev->pix_clk);
402 dev_err(dev, "failed to enable pix clk\n");
403 goto unregister_pix_clk;
406 fsl_dev->tcon = fsl_tcon_init(dev);
408 drm = drm_dev_alloc(driver, dev);
411 goto disable_pix_clk;
416 fsl_dev->np = dev->of_node;
417 drm->dev_private = fsl_dev;
418 dev_set_drvdata(dev, fsl_dev);
420 ret = drm_dev_register(drm, 0);
424 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
425 driver->major, driver->minor, driver->patchlevel,
426 driver->date, drm->primary->index);
433 clk_disable_unprepare(fsl_dev->pix_clk);
435 clk_unregister(fsl_dev->pix_clk);
437 clk_disable_unprepare(fsl_dev->clk);
441 static int fsl_dcu_drm_remove(struct platform_device *pdev)
443 struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
445 clk_disable_unprepare(fsl_dev->clk);
446 clk_disable_unprepare(fsl_dev->pix_clk);
447 clk_unregister(fsl_dev->pix_clk);
448 drm_put_dev(fsl_dev->drm);
453 static struct platform_driver fsl_dcu_drm_platform_driver = {
454 .probe = fsl_dcu_drm_probe,
455 .remove = fsl_dcu_drm_remove,
458 .pm = &fsl_dcu_drm_pm_ops,
459 .of_match_table = fsl_dcu_of_match,
463 module_platform_driver(fsl_dcu_drm_platform_driver);
465 MODULE_DESCRIPTION("Freescale DCU DRM Driver");
466 MODULE_LICENSE("GPL");