drivers/gpu/drm/i915/i915_debugfs.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Keith Packard <keithp@keithp.com>
  26  *
  27  */
  28
  29 #include <linux/seq_file.h>
  30 #include <linux/debugfs.h>
  31 #include <linux/slab.h>
  32 #include <linux/export.h>
  33 #include <generated/utsrelease.h>
  34 #include <drm/drmP.h>
  35 #include "intel_drv.h"
  36 #include "intel_ringbuffer.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39
  40 #define DRM_I915_RING_DEBUG 1
  41
  42
  43 #if defined(CONFIG_DEBUG_FS)
  44
  45 enum {
  46         ACTIVE_LIST,
  47         INACTIVE_LIST,
  48         PINNED_LIST,
  49 };
  50
  51 static const char *yesno(int v)
  52 {
  53         return v ? "yes" : "no";
  54 }
  55
  56 static int i915_capabilities(struct seq_file *m, void *data)
  57 {
  58         struct drm_info_node *node = (struct drm_info_node *) m->private;
  59         struct drm_device *dev = node->minor->dev;
  60         const struct intel_device_info *info = INTEL_INFO(dev);
  61
  62         seq_printf(m, "gen: %d\n", info->gen);
  63         seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
  64 #define PRINT_FLAG(x)  seq_printf(m, #x ": %s\n", yesno(info->x))
  65 #define SEP_SEMICOLON ;
  66         DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_SEMICOLON);
  67 #undef PRINT_FLAG
  68 #undef SEP_SEMICOLON
  69
  70         return 0;
  71 }
  72
  73 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
  74 {
  75         if (obj->user_pin_count > 0)
  76                 return "P";
  77         else if (obj->pin_count > 0)
  78                 return "p";
  79         else
  80                 return " ";
  81 }
  82
  83 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
  84 {
  85         switch (obj->tiling_mode) {
  86         default:
  87         case I915_TILING_NONE: return " ";
  88         case I915_TILING_X: return "X";
  89         case I915_TILING_Y: return "Y";
  90         }
  91 }
  92
  93 static const char *cache_level_str(int type)
  94 {
  95         switch (type) {
  96         case I915_CACHE_NONE: return " uncached";
  97         case I915_CACHE_LLC: return " snooped (LLC)";
  98         case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
  99         default: return "";
 100         }
 101 }
 102
 103 static void
 104 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
 105 {
 106         seq_printf(m, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
 107                    &obj->base,
 108                    get_pin_flag(obj),
 109                    get_tiling_flag(obj),
 110                    obj->base.size / 1024,
 111                    obj->base.read_domains,
 112                    obj->base.write_domain,
 113                    obj->last_read_seqno,
 114                    obj->last_write_seqno,
 115                    obj->last_fenced_seqno,
 116                    cache_level_str(obj->cache_level),
 117                    obj->dirty ? " dirty" : "",
 118                    obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
 119         if (obj->base.name)
 120                 seq_printf(m, " (name: %d)", obj->base.name);
 121         if (obj->pin_count)
 122                 seq_printf(m, " (pinned x %d)", obj->pin_count);
 123         if (obj->fence_reg != I915_FENCE_REG_NONE)
 124                 seq_printf(m, " (fence: %d)", obj->fence_reg);
 125         if (obj->gtt_space != NULL)
 126                 seq_printf(m, " (gtt offset: %08x, size: %08x)",
 127                            obj->gtt_offset, (unsigned int)obj->gtt_space->size);
 128         if (obj->stolen)
 129                 seq_printf(m, " (stolen: %08lx)", obj->stolen->start);
 130         if (obj->pin_mappable || obj->fault_mappable) {
 131                 char s[3], *t = s;
 132                 if (obj->pin_mappable)
 133                         *t++ = 'p';
 134                 if (obj->fault_mappable)
 135                         *t++ = 'f';
 136                 *t = '\0';
 137                 seq_printf(m, " (%s mappable)", s);
 138         }
 139         if (obj->ring != NULL)
 140                 seq_printf(m, " (%s)", obj->ring->name);
 141 }
 142
 143 static int i915_gem_object_list_info(struct seq_file *m, void *data)
 144 {
 145         struct drm_info_node *node = (struct drm_info_node *) m->private;
 146         uintptr_t list = (uintptr_t) node->info_ent->data;
 147         struct list_head *head;
 148         struct drm_device *dev = node->minor->dev;
 149         drm_i915_private_t *dev_priv = dev->dev_private;
 150         struct drm_i915_gem_object *obj;
 151         size_t total_obj_size, total_gtt_size;
 152         int count, ret;
 153
 154         ret = mutex_lock_interruptible(&dev->struct_mutex);
 155         if (ret)
 156                 return ret;
 157
 158         switch (list) {
 159         case ACTIVE_LIST:
 160                 seq_printf(m, "Active:\n");
 161                 head = &dev_priv->mm.active_list;
 162                 break;
 163         case INACTIVE_LIST:
 164                 seq_printf(m, "Inactive:\n");
 165                 head = &dev_priv->mm.inactive_list;
 166                 break;
 167         default:
 168                 mutex_unlock(&dev->struct_mutex);
 169                 return -EINVAL;
 170         }
 171
 172         total_obj_size = total_gtt_size = count = 0;
 173         list_for_each_entry(obj, head, mm_list) {
 174                 seq_printf(m, "   ");
 175                 describe_obj(m, obj);
 176                 seq_printf(m, "\n");
 177                 total_obj_size += obj->base.size;
 178                 total_gtt_size += obj->gtt_space->size;
 179                 count++;
 180         }
 181         mutex_unlock(&dev->struct_mutex);
 182
 183         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 184                    count, total_obj_size, total_gtt_size);
 185         return 0;
 186 }
 187
 188 #define count_objects(list, member) do { \
 189         list_for_each_entry(obj, list, member) { \
 190                 size += obj->gtt_space->size; \
 191                 ++count; \
 192                 if (obj->map_and_fenceable) { \
 193                         mappable_size += obj->gtt_space->size; \
 194                         ++mappable_count; \
 195                 } \
 196         } \
 197 } while (0)
 198
 199 static int i915_gem_object_info(struct seq_file *m, void* data)
 200 {
 201         struct drm_info_node *node = (struct drm_info_node *) m->private;
 202         struct drm_device *dev = node->minor->dev;
 203         struct drm_i915_private *dev_priv = dev->dev_private;
 204         u32 count, mappable_count, purgeable_count;
 205         size_t size, mappable_size, purgeable_size;
 206         struct drm_i915_gem_object *obj;
 207         int ret;
 208
 209         ret = mutex_lock_interruptible(&dev->struct_mutex);
 210         if (ret)
 211                 return ret;
 212
 213         seq_printf(m, "%u objects, %zu bytes\n",
 214                    dev_priv->mm.object_count,
 215                    dev_priv->mm.object_memory);
 216
 217         size = count = mappable_size = mappable_count = 0;
 218         count_objects(&dev_priv->mm.bound_list, gtt_list);
 219         seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
 220                    count, mappable_count, size, mappable_size);
 221
 222         size = count = mappable_size = mappable_count = 0;
 223         count_objects(&dev_priv->mm.active_list, mm_list);
 224         seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
 225                    count, mappable_count, size, mappable_size);
 226
 227         size = count = mappable_size = mappable_count = 0;
 228         count_objects(&dev_priv->mm.inactive_list, mm_list);
 229         seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
 230                    count, mappable_count, size, mappable_size);
 231
 232         size = count = purgeable_size = purgeable_count = 0;
 233         list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) {
 234                 size += obj->base.size, ++count;
 235                 if (obj->madv == I915_MADV_DONTNEED)
 236                         purgeable_size += obj->base.size, ++purgeable_count;
 237         }
 238         seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
 239
 240         size = count = mappable_size = mappable_count = 0;
 241         list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
 242                 if (obj->fault_mappable) {
 243                         size += obj->gtt_space->size;
 244                         ++count;
 245                 }
 246                 if (obj->pin_mappable) {
 247                         mappable_size += obj->gtt_space->size;
 248                         ++mappable_count;
 249                 }
 250                 if (obj->madv == I915_MADV_DONTNEED) {
 251                         purgeable_size += obj->base.size;
 252                         ++purgeable_count;
 253                 }
 254         }
 255         seq_printf(m, "%u purgeable objects, %zu bytes\n",
 256                    purgeable_count, purgeable_size);
 257         seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
 258                    mappable_count, mappable_size);
 259         seq_printf(m, "%u fault mappable objects, %zu bytes\n",
 260                    count, size);
 261
 262         seq_printf(m, "%zu [%lu] gtt total\n",
 263                    dev_priv->gtt.total,
 264                    dev_priv->gtt.mappable_end - dev_priv->gtt.start);
 265
 266         mutex_unlock(&dev->struct_mutex);
 267
 268         return 0;
 269 }
 270
 271 static int i915_gem_gtt_info(struct seq_file *m, void* data)
 272 {
 273         struct drm_info_node *node = (struct drm_info_node *) m->private;
 274         struct drm_device *dev = node->minor->dev;
 275         uintptr_t list = (uintptr_t) node->info_ent->data;
 276         struct drm_i915_private *dev_priv = dev->dev_private;
 277         struct drm_i915_gem_object *obj;
 278         size_t total_obj_size, total_gtt_size;
 279         int count, ret;
 280
 281         ret = mutex_lock_interruptible(&dev->struct_mutex);
 282         if (ret)
 283                 return ret;
 284
 285         total_obj_size = total_gtt_size = count = 0;
 286         list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
 287                 if (list == PINNED_LIST && obj->pin_count == 0)
 288                         continue;
 289
 290                 seq_printf(m, "   ");
 291                 describe_obj(m, obj);
 292                 seq_printf(m, "\n");
 293                 total_obj_size += obj->base.size;
 294                 total_gtt_size += obj->gtt_space->size;
 295                 count++;
 296         }
 297
 298         mutex_unlock(&dev->struct_mutex);
 299
 300         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 301                    count, total_obj_size, total_gtt_size);
 302
 303         return 0;
 304 }
 305
 306 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
 307 {
 308         struct drm_info_node *node = (struct drm_info_node *) m->private;
 309         struct drm_device *dev = node->minor->dev;
 310         unsigned long flags;
 311         struct intel_crtc *crtc;
 312
 313         list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
 314                 const char pipe = pipe_name(crtc->pipe);
 315                 const char plane = plane_name(crtc->plane);
 316                 struct intel_unpin_work *work;
 317
 318                 spin_lock_irqsave(&dev->event_lock, flags);
 319                 work = crtc->unpin_work;
 320                 if (work == NULL) {
 321                         seq_printf(m, "No flip due on pipe %c (plane %c)\n",
 322                                    pipe, plane);
 323                 } else {
 324                         if (atomic_read(&work->pending) < INTEL_FLIP_COMPLETE) {
 325                                 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
 326                                            pipe, plane);
 327                         } else {
 328                                 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
 329                                            pipe, plane);
 330                         }
 331                         if (work->enable_stall_check)
 332                                 seq_printf(m, "Stall check enabled, ");
 333                         else
 334                                 seq_printf(m, "Stall check waiting for page flip ioctl, ");
 335                         seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
 336
 337                         if (work->old_fb_obj) {
 338                                 struct drm_i915_gem_object *obj = work->old_fb_obj;
 339                                 if (obj)
 340                                         seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 341                         }
 342                         if (work->pending_flip_obj) {
 343                                 struct drm_i915_gem_object *obj = work->pending_flip_obj;
 344                                 if (obj)
 345                                         seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 346                         }
 347                 }
 348                 spin_unlock_irqrestore(&dev->event_lock, flags);
 349         }
 350
 351         return 0;
 352 }
 353
 354 static int i915_gem_request_info(struct seq_file *m, void *data)
 355 {
 356         struct drm_info_node *node = (struct drm_info_node *) m->private;
 357         struct drm_device *dev = node->minor->dev;
 358         drm_i915_private_t *dev_priv = dev->dev_private;
 359         struct intel_ring_buffer *ring;
 360         struct drm_i915_gem_request *gem_request;
 361         int ret, count, i;
 362
 363         ret = mutex_lock_interruptible(&dev->struct_mutex);
 364         if (ret)
 365                 return ret;
 366
 367         count = 0;
 368         for_each_ring(ring, dev_priv, i) {
 369                 if (list_empty(&ring->request_list))
 370                         continue;
 371
 372                 seq_printf(m, "%s requests:\n", ring->name);
 373                 list_for_each_entry(gem_request,
 374                                     &ring->request_list,
 375                                     list) {
 376                         seq_printf(m, "    %d @ %d\n",
 377                                    gem_request->seqno,
 378                                    (int) (jiffies - gem_request->emitted_jiffies));
 379                 }
 380                 count++;
 381         }
 382         mutex_unlock(&dev->struct_mutex);
 383
 384         if (count == 0)
 385                 seq_printf(m, "No requests\n");
 386
 387         return 0;
 388 }
 389
 390 static void i915_ring_seqno_info(struct seq_file *m,
 391                                  struct intel_ring_buffer *ring)
 392 {
 393         if (ring->get_seqno) {
 394                 seq_printf(m, "Current sequence (%s): %u\n",
 395                            ring->name, ring->get_seqno(ring, false));
 396         }
 397 }
 398
 399 static int i915_gem_seqno_info(struct seq_file *m, void *data)
 400 {
 401         struct drm_info_node *node = (struct drm_info_node *) m->private;
 402         struct drm_device *dev = node->minor->dev;
 403         drm_i915_private_t *dev_priv = dev->dev_private;
 404         struct intel_ring_buffer *ring;
 405         int ret, i;
 406
 407         ret = mutex_lock_interruptible(&dev->struct_mutex);
 408         if (ret)
 409                 return ret;
 410
 411         for_each_ring(ring, dev_priv, i)
 412                 i915_ring_seqno_info(m, ring);
 413
 414         mutex_unlock(&dev->struct_mutex);
 415
 416         return 0;
 417 }
 418
 419
 420 static int i915_interrupt_info(struct seq_file *m, void *data)
 421 {
 422         struct drm_info_node *node = (struct drm_info_node *) m->private;
 423         struct drm_device *dev = node->minor->dev;
 424         drm_i915_private_t *dev_priv = dev->dev_private;
 425         struct intel_ring_buffer *ring;
 426         int ret, i, pipe;
 427
 428         ret = mutex_lock_interruptible(&dev->struct_mutex);
 429         if (ret)
 430                 return ret;
 431
 432         if (IS_VALLEYVIEW(dev)) {
 433                 seq_printf(m, "Display IER:\t%08x\n",
 434                            I915_READ(VLV_IER));
 435                 seq_printf(m, "Display IIR:\t%08x\n",
 436                            I915_READ(VLV_IIR));
 437                 seq_printf(m, "Display IIR_RW:\t%08x\n",
 438                            I915_READ(VLV_IIR_RW));
 439                 seq_printf(m, "Display IMR:\t%08x\n",
 440                            I915_READ(VLV_IMR));
 441                 for_each_pipe(pipe)
 442                         seq_printf(m, "Pipe %c stat:\t%08x\n",
 443                                    pipe_name(pipe),
 444                                    I915_READ(PIPESTAT(pipe)));
 445
 446                 seq_printf(m, "Master IER:\t%08x\n",
 447                            I915_READ(VLV_MASTER_IER));
 448
 449                 seq_printf(m, "Render IER:\t%08x\n",
 450                            I915_READ(GTIER));
 451                 seq_printf(m, "Render IIR:\t%08x\n",
 452                            I915_READ(GTIIR));
 453                 seq_printf(m, "Render IMR:\t%08x\n",
 454                            I915_READ(GTIMR));
 455
 456                 seq_printf(m, "PM IER:\t\t%08x\n",
 457                            I915_READ(GEN6_PMIER));
 458                 seq_printf(m, "PM IIR:\t\t%08x\n",
 459                            I915_READ(GEN6_PMIIR));
 460                 seq_printf(m, "PM IMR:\t\t%08x\n",
 461                            I915_READ(GEN6_PMIMR));
 462
 463                 seq_printf(m, "Port hotplug:\t%08x\n",
 464                            I915_READ(PORT_HOTPLUG_EN));
 465                 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
 466                            I915_READ(VLV_DPFLIPSTAT));
 467                 seq_printf(m, "DPINVGTT:\t%08x\n",
 468                            I915_READ(DPINVGTT));
 469
 470         } else if (!HAS_PCH_SPLIT(dev)) {
 471                 seq_printf(m, "Interrupt enable:    %08x\n",
 472                            I915_READ(IER));
 473                 seq_printf(m, "Interrupt identity:  %08x\n",
 474                            I915_READ(IIR));
 475                 seq_printf(m, "Interrupt mask:      %08x\n",
 476                            I915_READ(IMR));
 477                 for_each_pipe(pipe)
 478                         seq_printf(m, "Pipe %c stat:         %08x\n",
 479                                    pipe_name(pipe),
 480                                    I915_READ(PIPESTAT(pipe)));
 481         } else {
 482                 seq_printf(m, "North Display Interrupt enable:          %08x\n",
 483                            I915_READ(DEIER));
 484                 seq_printf(m, "North Display Interrupt identity:        %08x\n",
 485                            I915_READ(DEIIR));
 486                 seq_printf(m, "North Display Interrupt mask:            %08x\n",
 487                            I915_READ(DEIMR));
 488                 seq_printf(m, "South Display Interrupt enable:          %08x\n",
 489                            I915_READ(SDEIER));
 490                 seq_printf(m, "South Display Interrupt identity:        %08x\n",
 491                            I915_READ(SDEIIR));
 492                 seq_printf(m, "South Display Interrupt mask:            %08x\n",
 493                            I915_READ(SDEIMR));
 494                 seq_printf(m, "Graphics Interrupt enable:               %08x\n",
 495                            I915_READ(GTIER));
 496                 seq_printf(m, "Graphics Interrupt identity:             %08x\n",
 497                            I915_READ(GTIIR));
 498                 seq_printf(m, "Graphics Interrupt mask:         %08x\n",
 499                            I915_READ(GTIMR));
 500         }
 501         seq_printf(m, "Interrupts received: %d\n",
 502                    atomic_read(&dev_priv->irq_received));
 503         for_each_ring(ring, dev_priv, i) {
 504                 if (IS_GEN6(dev) || IS_GEN7(dev)) {
 505                         seq_printf(m,
 506                                    "Graphics Interrupt mask (%s):       %08x\n",
 507                                    ring->name, I915_READ_IMR(ring));
 508                 }
 509                 i915_ring_seqno_info(m, ring);
 510         }
 511         mutex_unlock(&dev->struct_mutex);
 512
 513         return 0;
 514 }
 515
 516 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
 517 {
 518         struct drm_info_node *node = (struct drm_info_node *) m->private;
 519         struct drm_device *dev = node->minor->dev;
 520         drm_i915_private_t *dev_priv = dev->dev_private;
 521         int i, ret;
 522
 523         ret = mutex_lock_interruptible(&dev->struct_mutex);
 524         if (ret)
 525                 return ret;
 526
 527         seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
 528         seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
 529         for (i = 0; i < dev_priv->num_fence_regs; i++) {
 530                 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
 531
 532                 seq_printf(m, "Fence %d, pin count = %d, object = ",
 533                            i, dev_priv->fence_regs[i].pin_count);
 534                 if (obj == NULL)
 535                         seq_printf(m, "unused");
 536                 else
 537                         describe_obj(m, obj);
 538                 seq_printf(m, "\n");
 539         }
 540
 541         mutex_unlock(&dev->struct_mutex);
 542         return 0;
 543 }
 544
 545 static int i915_hws_info(struct seq_file *m, void *data)
 546 {
 547         struct drm_info_node *node = (struct drm_info_node *) m->private;
 548         struct drm_device *dev = node->minor->dev;
 549         drm_i915_private_t *dev_priv = dev->dev_private;
 550         struct intel_ring_buffer *ring;
 551         const u32 *hws;
 552         int i;
 553
 554         ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
 555         hws = ring->status_page.page_addr;
 556         if (hws == NULL)
 557                 return 0;
 558
 559         for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
 560                 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
 561                            i * 4,
 562                            hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
 563         }
 564         return 0;
 565 }
 566
 567 static const char *ring_str(int ring)
 568 {
 569         switch (ring) {
 570         case RCS: return "render";
 571         case VCS: return "bsd";
 572         case BCS: return "blt";
 573         default: return "";
 574         }
 575 }
 576
 577 static const char *pin_flag(int pinned)
 578 {
 579         if (pinned > 0)
 580                 return " P";
 581         else if (pinned < 0)
 582                 return " p";
 583         else
 584                 return "";
 585 }
 586
 587 static const char *tiling_flag(int tiling)
 588 {
 589         switch (tiling) {
 590         default:
 591         case I915_TILING_NONE: return "";
 592         case I915_TILING_X: return " X";
 593         case I915_TILING_Y: return " Y";
 594         }
 595 }
 596
 597 static const char *dirty_flag(int dirty)
 598 {
 599         return dirty ? " dirty" : "";
 600 }
 601
 602 static const char *purgeable_flag(int purgeable)
 603 {
 604         return purgeable ? " purgeable" : "";
 605 }
 606
 607 static void print_error_buffers(struct seq_file *m,
 608                                 const char *name,
 609                                 struct drm_i915_error_buffer *err,
 610                                 int count)
 611 {
 612         seq_printf(m, "%s [%d]:\n", name, count);
 613
 614         while (count--) {
 615                 seq_printf(m, "  %08x %8u %02x %02x %x %x%s%s%s%s%s%s%s",
 616                            err->gtt_offset,
 617                            err->size,
 618                            err->read_domains,
 619                            err->write_domain,
 620                            err->rseqno, err->wseqno,
 621                            pin_flag(err->pinned),
 622                            tiling_flag(err->tiling),
 623                            dirty_flag(err->dirty),
 624                            purgeable_flag(err->purgeable),
 625                            err->ring != -1 ? " " : "",
 626                            ring_str(err->ring),
 627                            cache_level_str(err->cache_level));
 628
 629                 if (err->name)
 630                         seq_printf(m, " (name: %d)", err->name);
 631                 if (err->fence_reg != I915_FENCE_REG_NONE)
 632                         seq_printf(m, " (fence: %d)", err->fence_reg);
 633
 634                 seq_printf(m, "\n");
 635                 err++;
 636         }
 637 }
 638
 639 static void i915_ring_error_state(struct seq_file *m,
 640                                   struct drm_device *dev,
 641                                   struct drm_i915_error_state *error,
 642                                   unsigned ring)
 643 {
 644         BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
 645         seq_printf(m, "%s command stream:\n", ring_str(ring));
 646         seq_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
 647         seq_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
 648         seq_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);
 649         seq_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
 650         seq_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
 651         seq_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
 652         seq_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
 653         if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
 654                 seq_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
 655
 656         if (INTEL_INFO(dev)->gen >= 4)
 657                 seq_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
 658         seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
 659         seq_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
 660         if (INTEL_INFO(dev)->gen >= 6) {
 661                 seq_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
 662                 seq_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
 663                 seq_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
 664                            error->semaphore_mboxes[ring][0],
 665                            error->semaphore_seqno[ring][0]);
 666                 seq_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
 667                            error->semaphore_mboxes[ring][1],
 668                            error->semaphore_seqno[ring][1]);
 669         }
 670         seq_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
 671         seq_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
 672         seq_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
 673         seq_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
 674 }
 675
 676 struct i915_error_state_file_priv {
 677         struct drm_device *dev;
 678         struct drm_i915_error_state *error;
 679 };
 680
 681 static int i915_error_state(struct seq_file *m, void *unused)
 682 {
 683         struct i915_error_state_file_priv *error_priv = m->private;
 684         struct drm_device *dev = error_priv->dev;
 685         drm_i915_private_t *dev_priv = dev->dev_private;
 686         struct drm_i915_error_state *error = error_priv->error;
 687         struct intel_ring_buffer *ring;
 688         int i, j, page, offset, elt;
 689
 690         if (!error) {
 691                 seq_printf(m, "no error state collected\n");
 692                 return 0;
 693         }
 694
 695         seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
 696                    error->time.tv_usec);
 697         seq_printf(m, "Kernel: " UTS_RELEASE "\n");
 698         seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
 699         seq_printf(m, "EIR: 0x%08x\n", error->eir);
 700         seq_printf(m, "IER: 0x%08x\n", error->ier);
 701         seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
 702         seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
 703         seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
 704         seq_printf(m, "CCID: 0x%08x\n", error->ccid);
 705
 706         for (i = 0; i < dev_priv->num_fence_regs; i++)
 707                 seq_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
 708
 709         for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
 710                 seq_printf(m, "  INSTDONE_%d: 0x%08x\n", i, error->extra_instdone[i]);
 711
 712         if (INTEL_INFO(dev)->gen >= 6) {
 713                 seq_printf(m, "ERROR: 0x%08x\n", error->error);
 714                 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
 715         }
 716
 717         if (INTEL_INFO(dev)->gen == 7)
 718                 seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
 719
 720         for_each_ring(ring, dev_priv, i)
 721                 i915_ring_error_state(m, dev, error, i);
 722
 723         if (error->active_bo)
 724                 print_error_buffers(m, "Active",
 725                                     error->active_bo,
 726                                     error->active_bo_count);
 727
 728         if (error->pinned_bo)
 729                 print_error_buffers(m, "Pinned",
 730                                     error->pinned_bo,
 731                                     error->pinned_bo_count);
 732
 733         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 734                 struct drm_i915_error_object *obj;
 735
 736                 if ((obj = error->ring[i].batchbuffer)) {
 737                         seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
 738                                    dev_priv->ring[i].name,
 739                                    obj->gtt_offset);
 740                         offset = 0;
 741                         for (page = 0; page < obj->page_count; page++) {
 742                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 743                                         seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);
 744                                         offset += 4;
 745                                 }
 746                         }
 747                 }
 748
 749                 if (error->ring[i].num_requests) {
 750                         seq_printf(m, "%s --- %d requests\n",
 751                                    dev_priv->ring[i].name,
 752                                    error->ring[i].num_requests);
 753                         for (j = 0; j < error->ring[i].num_requests; j++) {
 754                                 seq_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
 755                                            error->ring[i].requests[j].seqno,
 756                                            error->ring[i].requests[j].jiffies,
 757                                            error->ring[i].requests[j].tail);
 758                         }
 759                 }
 760
 761                 if ((obj = error->ring[i].ringbuffer)) {
 762                         seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
 763                                    dev_priv->ring[i].name,
 764                                    obj->gtt_offset);
 765                         offset = 0;
 766                         for (page = 0; page < obj->page_count; page++) {
 767                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 768                                         seq_printf(m, "%08x :  %08x\n",
 769                                                    offset,
 770                                                    obj->pages[page][elt]);
 771                                         offset += 4;
 772                                 }
 773                         }
 774                 }
 775
 776                 obj = error->ring[i].ctx;
 777                 if (obj) {
 778                         seq_printf(m, "%s --- HW Context = 0x%08x\n",
 779                                    dev_priv->ring[i].name,
 780                                    obj->gtt_offset);
 781                         offset = 0;
 782                         for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
 783                                 seq_printf(m, "[%04x] %08x %08x %08x %08x\n",
 784                                            offset,
 785                                            obj->pages[0][elt],
 786                                            obj->pages[0][elt+1],
 787                                            obj->pages[0][elt+2],
 788                                            obj->pages[0][elt+3]);
 789                                         offset += 16;
 790                         }
 791                 }
 792         }
 793
 794         if (error->overlay)
 795                 intel_overlay_print_error_state(m, error->overlay);
 796
 797         if (error->display)
 798                 intel_display_print_error_state(m, dev, error->display);
 799
 800         return 0;
 801 }
 802
 803 static ssize_t
 804 i915_error_state_write(struct file *filp,
 805                        const char __user *ubuf,
 806                        size_t cnt,
 807                        loff_t *ppos)
 808 {
 809         struct seq_file *m = filp->private_data;
 810         struct i915_error_state_file_priv *error_priv = m->private;
 811         struct drm_device *dev = error_priv->dev;
 812         int ret;
 813
 814         DRM_DEBUG_DRIVER("Resetting error state\n");
 815
 816         ret = mutex_lock_interruptible(&dev->struct_mutex);
 817         if (ret)
 818                 return ret;
 819
 820         i915_destroy_error_state(dev);
 821         mutex_unlock(&dev->struct_mutex);
 822
 823         return cnt;
 824 }
 825
 826 static int i915_error_state_open(struct inode *inode, struct file *file)
 827 {
 828         struct drm_device *dev = inode->i_private;
 829         drm_i915_private_t *dev_priv = dev->dev_private;
 830         struct i915_error_state_file_priv *error_priv;
 831         unsigned long flags;
 832
 833         error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
 834         if (!error_priv)
 835                 return -ENOMEM;
 836
 837         error_priv->dev = dev;
 838
 839         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
 840         error_priv->error = dev_priv->gpu_error.first_error;
 841         if (error_priv->error)
 842                 kref_get(&error_priv->error->ref);
 843         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
 844
 845         return single_open(file, i915_error_state, error_priv);
 846 }
 847
 848 static int i915_error_state_release(struct inode *inode, struct file *file)
 849 {
 850         struct seq_file *m = file->private_data;
 851         struct i915_error_state_file_priv *error_priv = m->private;
 852
 853         if (error_priv->error)
 854                 kref_put(&error_priv->error->ref, i915_error_state_free);
 855         kfree(error_priv);
 856
 857         return single_release(inode, file);
 858 }
 859
 860 static const struct file_operations i915_error_state_fops = {
 861         .owner = THIS_MODULE,
 862         .open = i915_error_state_open,
 863         .read = seq_read,
 864         .write = i915_error_state_write,
 865         .llseek = default_llseek,
 866         .release = i915_error_state_release,
 867 };
 868
 869 static int
 870 i915_next_seqno_get(void *data, u64 *val)
 871 {
 872         struct drm_device *dev = data;
 873         drm_i915_private_t *dev_priv = dev->dev_private;
 874         int ret;
 875
 876         ret = mutex_lock_interruptible(&dev->struct_mutex);
 877         if (ret)
 878                 return ret;
 879
 880         *val = dev_priv->next_seqno;
 881         mutex_unlock(&dev->struct_mutex);
 882
 883         return 0;
 884 }
 885
 886 static int
 887 i915_next_seqno_set(void *data, u64 val)
 888 {
 889         struct drm_device *dev = data;
 890         int ret;
 891
 892         ret = mutex_lock_interruptible(&dev->struct_mutex);
 893         if (ret)
 894                 return ret;
 895
 896         ret = i915_gem_set_seqno(dev, val);
 897         mutex_unlock(&dev->struct_mutex);
 898
 899         return ret;
 900 }
 901
 902 DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops,
 903                         i915_next_seqno_get, i915_next_seqno_set,
 904                         "0x%llx\n");
 905
 906 static int i915_rstdby_delays(struct seq_file *m, void *unused)
 907 {
 908         struct drm_info_node *node = (struct drm_info_node *) m->private;
 909         struct drm_device *dev = node->minor->dev;
 910         drm_i915_private_t *dev_priv = dev->dev_private;
 911         u16 crstanddelay;
 912         int ret;
 913
 914         ret = mutex_lock_interruptible(&dev->struct_mutex);
 915         if (ret)
 916                 return ret;
 917
 918         crstanddelay = I915_READ16(CRSTANDVID);
 919
 920         mutex_unlock(&dev->struct_mutex);
 921
 922         seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
 923
 924         return 0;
 925 }
 926
 927 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
 928 {
 929         struct drm_info_node *node = (struct drm_info_node *) m->private;
 930         struct drm_device *dev = node->minor->dev;
 931         drm_i915_private_t *dev_priv = dev->dev_private;
 932         int ret;
 933
 934         if (IS_GEN5(dev)) {
 935                 u16 rgvswctl = I915_READ16(MEMSWCTL);
 936                 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
 937
 938                 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
 939                 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
 940                 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
 941                            MEMSTAT_VID_SHIFT);
 942                 seq_printf(m, "Current P-state: %d\n",
 943                            (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
 944         } else if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
 945                 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
 946                 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
 947                 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
 948                 u32 rpstat, cagf;
 949                 u32 rpupei, rpcurup, rpprevup;
 950                 u32 rpdownei, rpcurdown, rpprevdown;
 951                 int max_freq;
 952
 953                 /* RPSTAT1 is in the GT power well */
 954                 ret = mutex_lock_interruptible(&dev->struct_mutex);
 955                 if (ret)
 956                         return ret;
 957
 958                 gen6_gt_force_wake_get(dev_priv);
 959
 960                 rpstat = I915_READ(GEN6_RPSTAT1);
 961                 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
 962                 rpcurup = I915_READ(GEN6_RP_CUR_UP);
 963                 rpprevup = I915_READ(GEN6_RP_PREV_UP);
 964                 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
 965                 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
 966                 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
 967                 if (IS_HASWELL(dev))
 968                         cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
 969                 else
 970                         cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
 971                 cagf *= GT_FREQUENCY_MULTIPLIER;
 972
 973                 gen6_gt_force_wake_put(dev_priv);
 974                 mutex_unlock(&dev->struct_mutex);
 975
 976                 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
 977                 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
 978                 seq_printf(m, "Render p-state ratio: %d\n",
 979                            (gt_perf_status & 0xff00) >> 8);
 980                 seq_printf(m, "Render p-state VID: %d\n",
 981                            gt_perf_status & 0xff);
 982                 seq_printf(m, "Render p-state limit: %d\n",
 983                            rp_state_limits & 0xff);
 984                 seq_printf(m, "CAGF: %dMHz\n", cagf);
 985                 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
 986                            GEN6_CURICONT_MASK);
 987                 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
 988                            GEN6_CURBSYTAVG_MASK);
 989                 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
 990                            GEN6_CURBSYTAVG_MASK);
 991                 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
 992                            GEN6_CURIAVG_MASK);
 993                 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
 994                            GEN6_CURBSYTAVG_MASK);
 995                 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
 996                            GEN6_CURBSYTAVG_MASK);
 997
 998                 max_freq = (rp_state_cap & 0xff0000) >> 16;
 999                 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
1000                            max_freq * GT_FREQUENCY_MULTIPLIER);
1001
1002                 max_freq = (rp_state_cap & 0xff00) >> 8;
1003                 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
1004                            max_freq * GT_FREQUENCY_MULTIPLIER);
1005
1006                 max_freq = rp_state_cap & 0xff;
1007                 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
1008                            max_freq * GT_FREQUENCY_MULTIPLIER);
1009
1010                 seq_printf(m, "Max overclocked frequency: %dMHz\n",
1011                            dev_priv->rps.hw_max * GT_FREQUENCY_MULTIPLIER);
1012         } else if (IS_VALLEYVIEW(dev)) {
1013                 u32 freq_sts, val;
1014
1015                 mutex_lock(&dev_priv->rps.hw_lock);
1016                 valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS,
1017                                       &freq_sts);
1018                 seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
1019                 seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq);
1020
1021                 valleyview_punit_read(dev_priv, PUNIT_FUSE_BUS1, &val);
1022                 seq_printf(m, "max GPU freq: %d MHz\n",
1023                            vlv_gpu_freq(dev_priv->mem_freq, val));
1024
1025                 valleyview_punit_read(dev_priv, PUNIT_REG_GPU_LFM, &val);
1026                 seq_printf(m, "min GPU freq: %d MHz\n",
1027                            vlv_gpu_freq(dev_priv->mem_freq, val));
1028
1029                 seq_printf(m, "current GPU freq: %d MHz\n",
1030                            vlv_gpu_freq(dev_priv->mem_freq,
1031                                         (freq_sts >> 8) & 0xff));
1032                 mutex_unlock(&dev_priv->rps.hw_lock);
1033         } else {
1034                 seq_printf(m, "no P-state info available\n");
1035         }
1036
1037         return 0;
1038 }
1039
1040 static int i915_delayfreq_table(struct seq_file *m, void *unused)
1041 {
1042         struct drm_info_node *node = (struct drm_info_node *) m->private;
1043         struct drm_device *dev = node->minor->dev;
1044         drm_i915_private_t *dev_priv = dev->dev_private;
1045         u32 delayfreq;
1046         int ret, i;
1047
1048         ret = mutex_lock_interruptible(&dev->struct_mutex);
1049         if (ret)
1050                 return ret;
1051
1052         for (i = 0; i < 16; i++) {
1053                 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
1054                 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
1055                            (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
1056         }
1057
1058         mutex_unlock(&dev->struct_mutex);
1059
1060         return 0;
1061 }
1062
1063 static inline int MAP_TO_MV(int map)
1064 {
1065         return 1250 - (map * 25);
1066 }
1067
1068 static int i915_inttoext_table(struct seq_file *m, void *unused)
1069 {
1070         struct drm_info_node *node = (struct drm_info_node *) m->private;
1071         struct drm_device *dev = node->minor->dev;
1072         drm_i915_private_t *dev_priv = dev->dev_private;
1073         u32 inttoext;
1074         int ret, i;
1075
1076         ret = mutex_lock_interruptible(&dev->struct_mutex);
1077         if (ret)
1078                 return ret;
1079
1080         for (i = 1; i <= 32; i++) {
1081                 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1082                 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1083         }
1084
1085         mutex_unlock(&dev->struct_mutex);
1086
1087         return 0;
1088 }
1089
1090 static int ironlake_drpc_info(struct seq_file *m)
1091 {
1092         struct drm_info_node *node = (struct drm_info_node *) m->private;
1093         struct drm_device *dev = node->minor->dev;
1094         drm_i915_private_t *dev_priv = dev->dev_private;
1095         u32 rgvmodectl, rstdbyctl;
1096         u16 crstandvid;
1097         int ret;
1098
1099         ret = mutex_lock_interruptible(&dev->struct_mutex);
1100         if (ret)
1101                 return ret;
1102
1103         rgvmodectl = I915_READ(MEMMODECTL);
1104         rstdbyctl = I915_READ(RSTDBYCTL);
1105         crstandvid = I915_READ16(CRSTANDVID);
1106
1107         mutex_unlock(&dev->struct_mutex);
1108
1109         seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1110                    "yes" : "no");
1111         seq_printf(m, "Boost freq: %d\n",
1112                    (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1113                    MEMMODE_BOOST_FREQ_SHIFT);
1114         seq_printf(m, "HW control enabled: %s\n",
1115                    rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1116         seq_printf(m, "SW control enabled: %s\n",
1117                    rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1118         seq_printf(m, "Gated voltage change: %s\n",
1119                    rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1120         seq_printf(m, "Starting frequency: P%d\n",
1121                    (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1122         seq_printf(m, "Max P-state: P%d\n",
1123                    (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1124         seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1125         seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1126         seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1127         seq_printf(m, "Render standby enabled: %s\n",
1128                    (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1129         seq_printf(m, "Current RS state: ");
1130         switch (rstdbyctl & RSX_STATUS_MASK) {
1131         case RSX_STATUS_ON:
1132                 seq_printf(m, "on\n");
1133                 break;
1134         case RSX_STATUS_RC1:
1135                 seq_printf(m, "RC1\n");
1136                 break;
1137         case RSX_STATUS_RC1E:
1138                 seq_printf(m, "RC1E\n");
1139                 break;
1140         case RSX_STATUS_RS1:
1141                 seq_printf(m, "RS1\n");
1142                 break;
1143         case RSX_STATUS_RS2:
1144                 seq_printf(m, "RS2 (RC6)\n");
1145                 break;
1146         case RSX_STATUS_RS3:
1147                 seq_printf(m, "RC3 (RC6+)\n");
1148                 break;
1149         default:
1150                 seq_printf(m, "unknown\n");
1151                 break;
1152         }
1153
1154         return 0;
1155 }
1156
1157 static int gen6_drpc_info(struct seq_file *m)
1158 {
1159
1160         struct drm_info_node *node = (struct drm_info_node *) m->private;
1161         struct drm_device *dev = node->minor->dev;
1162         struct drm_i915_private *dev_priv = dev->dev_private;
1163         u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
1164         unsigned forcewake_count;
1165         int count=0, ret;
1166
1167
1168         ret = mutex_lock_interruptible(&dev->struct_mutex);
1169         if (ret)
1170                 return ret;
1171
1172         spin_lock_irq(&dev_priv->gt_lock);
1173         forcewake_count = dev_priv->forcewake_count;
1174         spin_unlock_irq(&dev_priv->gt_lock);
1175
1176         if (forcewake_count) {
1177                 seq_printf(m, "RC information inaccurate because somebody "
1178                               "holds a forcewake reference \n");
1179         } else {
1180                 /* NB: we cannot use forcewake, else we read the wrong values */
1181                 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1182                         udelay(10);
1183                 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1184         }
1185
1186         gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1187         trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1188
1189         rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1190         rcctl1 = I915_READ(GEN6_RC_CONTROL);
1191         mutex_unlock(&dev->struct_mutex);
1192         mutex_lock(&dev_priv->rps.hw_lock);
1193         sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
1194         mutex_unlock(&dev_priv->rps.hw_lock);
1195
1196         seq_printf(m, "Video Turbo Mode: %s\n",
1197                    yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1198         seq_printf(m, "HW control enabled: %s\n",
1199                    yesno(rpmodectl1 & GEN6_RP_ENABLE));
1200         seq_printf(m, "SW control enabled: %s\n",
1201                    yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1202                           GEN6_RP_MEDIA_SW_MODE));
1203         seq_printf(m, "RC1e Enabled: %s\n",
1204                    yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1205         seq_printf(m, "RC6 Enabled: %s\n",
1206                    yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1207         seq_printf(m, "Deep RC6 Enabled: %s\n",
1208                    yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1209         seq_printf(m, "Deepest RC6 Enabled: %s\n",
1210                    yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1211         seq_printf(m, "Current RC state: ");
1212         switch (gt_core_status & GEN6_RCn_MASK) {
1213         case GEN6_RC0:
1214                 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1215                         seq_printf(m, "Core Power Down\n");
1216                 else
1217                         seq_printf(m, "on\n");
1218                 break;
1219         case GEN6_RC3:
1220                 seq_printf(m, "RC3\n");
1221                 break;
1222         case GEN6_RC6:
1223                 seq_printf(m, "RC6\n");
1224                 break;
1225         case GEN6_RC7:
1226                 seq_printf(m, "RC7\n");
1227                 break;
1228         default:
1229                 seq_printf(m, "Unknown\n");
1230                 break;
1231         }
1232
1233         seq_printf(m, "Core Power Down: %s\n",
1234                    yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1235
1236         /* Not exactly sure what this is */
1237         seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1238                    I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1239         seq_printf(m, "RC6 residency since boot: %u\n",
1240                    I915_READ(GEN6_GT_GFX_RC6));
1241         seq_printf(m, "RC6+ residency since boot: %u\n",
1242                    I915_READ(GEN6_GT_GFX_RC6p));
1243         seq_printf(m, "RC6++ residency since boot: %u\n",
1244                    I915_READ(GEN6_GT_GFX_RC6pp));
1245
1246         seq_printf(m, "RC6   voltage: %dmV\n",
1247                    GEN6_DECODE_RC6_VID(((rc6vids >> 0) & 0xff)));
1248         seq_printf(m, "RC6+  voltage: %dmV\n",
1249                    GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff)));
1250         seq_printf(m, "RC6++ voltage: %dmV\n",
1251                    GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));
1252         return 0;
1253 }
1254
1255 static int i915_drpc_info(struct seq_file *m, void *unused)
1256 {
1257         struct drm_info_node *node = (struct drm_info_node *) m->private;
1258         struct drm_device *dev = node->minor->dev;
1259
1260         if (IS_GEN6(dev) || IS_GEN7(dev))
1261                 return gen6_drpc_info(m);
1262         else
1263                 return ironlake_drpc_info(m);
1264 }
1265
1266 static int i915_fbc_status(struct seq_file *m, void *unused)
1267 {
1268         struct drm_info_node *node = (struct drm_info_node *) m->private;
1269         struct drm_device *dev = node->minor->dev;
1270         drm_i915_private_t *dev_priv = dev->dev_private;
1271
1272         if (!I915_HAS_FBC(dev)) {
1273                 seq_printf(m, "FBC unsupported on this chipset\n");
1274                 return 0;
1275         }
1276
1277         if (intel_fbc_enabled(dev)) {
1278                 seq_printf(m, "FBC enabled\n");
1279         } else {
1280                 seq_printf(m, "FBC disabled: ");
1281                 switch (dev_priv->no_fbc_reason) {
1282                 case FBC_NO_OUTPUT:
1283                         seq_printf(m, "no outputs");
1284                         break;
1285                 case FBC_STOLEN_TOO_SMALL:
1286                         seq_printf(m, "not enough stolen memory");
1287                         break;
1288                 case FBC_UNSUPPORTED_MODE:
1289                         seq_printf(m, "mode not supported");
1290                         break;
1291                 case FBC_MODE_TOO_LARGE:
1292                         seq_printf(m, "mode too large");
1293                         break;
1294                 case FBC_BAD_PLANE:
1295                         seq_printf(m, "FBC unsupported on plane");
1296                         break;
1297                 case FBC_NOT_TILED:
1298                         seq_printf(m, "scanout buffer not tiled");
1299                         break;
1300                 case FBC_MULTIPLE_PIPES:
1301                         seq_printf(m, "multiple pipes are enabled");
1302                         break;
1303                 case FBC_MODULE_PARAM:
1304                         seq_printf(m, "disabled per module param (default off)");
1305                         break;
1306                 default:
1307                         seq_printf(m, "unknown reason");
1308                 }
1309                 seq_printf(m, "\n");
1310         }
1311         return 0;
1312 }
1313
1314 static int i915_sr_status(struct seq_file *m, void *unused)
1315 {
1316         struct drm_info_node *node = (struct drm_info_node *) m->private;
1317         struct drm_device *dev = node->minor->dev;
1318         drm_i915_private_t *dev_priv = dev->dev_private;
1319         bool sr_enabled = false;
1320
1321         if (HAS_PCH_SPLIT(dev))
1322                 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1323         else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1324                 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1325         else if (IS_I915GM(dev))
1326                 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1327         else if (IS_PINEVIEW(dev))
1328                 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1329
1330         seq_printf(m, "self-refresh: %s\n",
1331                    sr_enabled ? "enabled" : "disabled");
1332
1333         return 0;
1334 }
1335
1336 static int i915_emon_status(struct seq_file *m, void *unused)
1337 {
1338         struct drm_info_node *node = (struct drm_info_node *) m->private;
1339         struct drm_device *dev = node->minor->dev;
1340         drm_i915_private_t *dev_priv = dev->dev_private;
1341         unsigned long temp, chipset, gfx;
1342         int ret;
1343
1344         if (!IS_GEN5(dev))
1345                 return -ENODEV;
1346
1347         ret = mutex_lock_interruptible(&dev->struct_mutex);
1348         if (ret)
1349                 return ret;
1350
1351         temp = i915_mch_val(dev_priv);
1352         chipset = i915_chipset_val(dev_priv);
1353         gfx = i915_gfx_val(dev_priv);
1354         mutex_unlock(&dev->struct_mutex);
1355
1356         seq_printf(m, "GMCH temp: %ld\n", temp);
1357         seq_printf(m, "Chipset power: %ld\n", chipset);
1358         seq_printf(m, "GFX power: %ld\n", gfx);
1359         seq_printf(m, "Total power: %ld\n", chipset + gfx);
1360
1361         return 0;
1362 }
1363
1364 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1365 {
1366         struct drm_info_node *node = (struct drm_info_node *) m->private;
1367         struct drm_device *dev = node->minor->dev;
1368         drm_i915_private_t *dev_priv = dev->dev_private;
1369         int ret;
1370         int gpu_freq, ia_freq;
1371
1372         if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1373                 seq_printf(m, "unsupported on this chipset\n");
1374                 return 0;
1375         }
1376
1377         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1378         if (ret)
1379                 return ret;
1380
1381         seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");
1382
1383         for (gpu_freq = dev_priv->rps.min_delay;
1384              gpu_freq <= dev_priv->rps.max_delay;
1385              gpu_freq++) {
1386                 ia_freq = gpu_freq;
1387                 sandybridge_pcode_read(dev_priv,
1388                                        GEN6_PCODE_READ_MIN_FREQ_TABLE,
1389                                        &ia_freq);
1390                 seq_printf(m, "%d\t\t%d\t\t\t\t%d\n",
1391                            gpu_freq * GT_FREQUENCY_MULTIPLIER,
1392                            ((ia_freq >> 0) & 0xff) * 100,
1393                            ((ia_freq >> 8) & 0xff) * 100);
1394         }
1395
1396         mutex_unlock(&dev_priv->rps.hw_lock);
1397
1398         return 0;
1399 }
1400
1401 static int i915_gfxec(struct seq_file *m, void *unused)
1402 {
1403         struct drm_info_node *node = (struct drm_info_node *) m->private;
1404         struct drm_device *dev = node->minor->dev;
1405         drm_i915_private_t *dev_priv = dev->dev_private;
1406         int ret;
1407
1408         ret = mutex_lock_interruptible(&dev->struct_mutex);
1409         if (ret)
1410                 return ret;
1411
1412         seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1413
1414         mutex_unlock(&dev->struct_mutex);
1415
1416         return 0;
1417 }
1418
1419 static int i915_opregion(struct seq_file *m, void *unused)
1420 {
1421         struct drm_info_node *node = (struct drm_info_node *) m->private;
1422         struct drm_device *dev = node->minor->dev;
1423         drm_i915_private_t *dev_priv = dev->dev_private;
1424         struct intel_opregion *opregion = &dev_priv->opregion;
1425         void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1426         int ret;
1427
1428         if (data == NULL)
1429                 return -ENOMEM;
1430
1431         ret = mutex_lock_interruptible(&dev->struct_mutex);
1432         if (ret)
1433                 goto out;
1434
1435         if (opregion->header) {
1436                 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1437                 seq_write(m, data, OPREGION_SIZE);
1438         }
1439
1440         mutex_unlock(&dev->struct_mutex);
1441
1442 out:
1443         kfree(data);
1444         return 0;
1445 }
1446
1447 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1448 {
1449         struct drm_info_node *node = (struct drm_info_node *) m->private;
1450         struct drm_device *dev = node->minor->dev;
1451         drm_i915_private_t *dev_priv = dev->dev_private;
1452         struct intel_fbdev *ifbdev;
1453         struct intel_framebuffer *fb;
1454         int ret;
1455
1456         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1457         if (ret)
1458                 return ret;
1459
1460         ifbdev = dev_priv->fbdev;
1461         fb = to_intel_framebuffer(ifbdev->helper.fb);
1462
1463         seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1464                    fb->base.width,
1465                    fb->base.height,
1466                    fb->base.depth,
1467                    fb->base.bits_per_pixel,
1468                    atomic_read(&fb->base.refcount.refcount));
1469         describe_obj(m, fb->obj);
1470         seq_printf(m, "\n");
1471         mutex_unlock(&dev->mode_config.mutex);
1472
1473         mutex_lock(&dev->mode_config.fb_lock);
1474         list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1475                 if (&fb->base == ifbdev->helper.fb)
1476                         continue;
1477
1478                 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1479                            fb->base.width,
1480                            fb->base.height,
1481                            fb->base.depth,
1482                            fb->base.bits_per_pixel,
1483                            atomic_read(&fb->base.refcount.refcount));
1484                 describe_obj(m, fb->obj);
1485                 seq_printf(m, "\n");
1486         }
1487         mutex_unlock(&dev->mode_config.fb_lock);
1488
1489         return 0;
1490 }
1491
1492 static int i915_context_status(struct seq_file *m, void *unused)
1493 {
1494         struct drm_info_node *node = (struct drm_info_node *) m->private;
1495         struct drm_device *dev = node->minor->dev;
1496         drm_i915_private_t *dev_priv = dev->dev_private;
1497         struct intel_ring_buffer *ring;
1498         int ret, i;
1499
1500         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1501         if (ret)
1502                 return ret;
1503
1504         if (dev_priv->ips.pwrctx) {
1505                 seq_printf(m, "power context ");
1506                 describe_obj(m, dev_priv->ips.pwrctx);
1507                 seq_printf(m, "\n");
1508         }
1509
1510         if (dev_priv->ips.renderctx) {
1511                 seq_printf(m, "render context ");
1512                 describe_obj(m, dev_priv->ips.renderctx);
1513                 seq_printf(m, "\n");
1514         }
1515
1516         for_each_ring(ring, dev_priv, i) {
1517                 if (ring->default_context) {
1518                         seq_printf(m, "HW default context %s ring ", ring->name);
1519                         describe_obj(m, ring->default_context->obj);
1520                         seq_printf(m, "\n");
1521                 }
1522         }
1523
1524         mutex_unlock(&dev->mode_config.mutex);
1525
1526         return 0;
1527 }
1528
1529 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1530 {
1531         struct drm_info_node *node = (struct drm_info_node *) m->private;
1532         struct drm_device *dev = node->minor->dev;
1533         struct drm_i915_private *dev_priv = dev->dev_private;
1534         unsigned forcewake_count;
1535
1536         spin_lock_irq(&dev_priv->gt_lock);
1537         forcewake_count = dev_priv->forcewake_count;
1538         spin_unlock_irq(&dev_priv->gt_lock);
1539
1540         seq_printf(m, "forcewake count = %u\n", forcewake_count);
1541
1542         return 0;
1543 }
1544
1545 static const char *swizzle_string(unsigned swizzle)
1546 {
1547         switch(swizzle) {
1548         case I915_BIT_6_SWIZZLE_NONE:
1549                 return "none";
1550         case I915_BIT_6_SWIZZLE_9:
1551                 return "bit9";
1552         case I915_BIT_6_SWIZZLE_9_10:
1553                 return "bit9/bit10";
1554         case I915_BIT_6_SWIZZLE_9_11:
1555                 return "bit9/bit11";
1556         case I915_BIT_6_SWIZZLE_9_10_11:
1557                 return "bit9/bit10/bit11";
1558         case I915_BIT_6_SWIZZLE_9_17:
1559                 return "bit9/bit17";
1560         case I915_BIT_6_SWIZZLE_9_10_17:
1561                 return "bit9/bit10/bit17";
1562         case I915_BIT_6_SWIZZLE_UNKNOWN:
1563                 return "unknown";
1564         }
1565
1566         return "bug";
1567 }
1568
1569 static int i915_swizzle_info(struct seq_file *m, void *data)
1570 {
1571         struct drm_info_node *node = (struct drm_info_node *) m->private;
1572         struct drm_device *dev = node->minor->dev;
1573         struct drm_i915_private *dev_priv = dev->dev_private;
1574         int ret;
1575
1576         ret = mutex_lock_interruptible(&dev->struct_mutex);
1577         if (ret)
1578                 return ret;
1579
1580         seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1581                    swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1582         seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1583                    swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1584
1585         if (IS_GEN3(dev) || IS_GEN4(dev)) {
1586                 seq_printf(m, "DDC = 0x%08x\n",
1587                            I915_READ(DCC));
1588                 seq_printf(m, "C0DRB3 = 0x%04x\n",
1589                            I915_READ16(C0DRB3));
1590                 seq_printf(m, "C1DRB3 = 0x%04x\n",
1591                            I915_READ16(C1DRB3));
1592         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1593                 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1594                            I915_READ(MAD_DIMM_C0));
1595                 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1596                            I915_READ(MAD_DIMM_C1));
1597                 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1598                            I915_READ(MAD_DIMM_C2));
1599                 seq_printf(m, "TILECTL = 0x%08x\n",
1600                            I915_READ(TILECTL));
1601                 seq_printf(m, "ARB_MODE = 0x%08x\n",
1602                            I915_READ(ARB_MODE));
1603                 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1604                            I915_READ(DISP_ARB_CTL));
1605         }
1606         mutex_unlock(&dev->struct_mutex);
1607
1608         return 0;
1609 }
1610
1611 static int i915_ppgtt_info(struct seq_file *m, void *data)
1612 {
1613         struct drm_info_node *node = (struct drm_info_node *) m->private;
1614         struct drm_device *dev = node->minor->dev;
1615         struct drm_i915_private *dev_priv = dev->dev_private;
1616         struct intel_ring_buffer *ring;
1617         int i, ret;
1618
1619
1620         ret = mutex_lock_interruptible(&dev->struct_mutex);
1621         if (ret)
1622                 return ret;
1623         if (INTEL_INFO(dev)->gen == 6)
1624                 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1625
1626         for_each_ring(ring, dev_priv, i) {
1627                 seq_printf(m, "%s\n", ring->name);
1628                 if (INTEL_INFO(dev)->gen == 7)
1629                         seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1630                 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1631                 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1632                 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1633         }
1634         if (dev_priv->mm.aliasing_ppgtt) {
1635                 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1636
1637                 seq_printf(m, "aliasing PPGTT:\n");
1638                 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1639         }
1640         seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1641         mutex_unlock(&dev->struct_mutex);
1642
1643         return 0;
1644 }
1645
1646 static int i915_dpio_info(struct seq_file *m, void *data)
1647 {
1648         struct drm_info_node *node = (struct drm_info_node *) m->private;
1649         struct drm_device *dev = node->minor->dev;
1650         struct drm_i915_private *dev_priv = dev->dev_private;
1651         int ret;
1652
1653
1654         if (!IS_VALLEYVIEW(dev)) {
1655                 seq_printf(m, "unsupported\n");
1656                 return 0;
1657         }
1658
1659         ret = mutex_lock_interruptible(&dev_priv->dpio_lock);
1660         if (ret)
1661                 return ret;
1662
1663         seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1664
1665         seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1666                    intel_dpio_read(dev_priv, _DPIO_DIV_A));
1667         seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1668                    intel_dpio_read(dev_priv, _DPIO_DIV_B));
1669
1670         seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1671                    intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1672         seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1673                    intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1674
1675         seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1676                    intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1677         seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1678                    intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1679
1680         seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1681                    intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1682         seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1683                    intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1684
1685         seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1686                    intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1687
1688         mutex_unlock(&dev_priv->dpio_lock);
1689
1690         return 0;
1691 }
1692
1693 static int
1694 i915_wedged_get(void *data, u64 *val)
1695 {
1696         struct drm_device *dev = data;
1697         drm_i915_private_t *dev_priv = dev->dev_private;
1698
1699         *val = atomic_read(&dev_priv->gpu_error.reset_counter);
1700
1701         return 0;
1702 }
1703
1704 static int
1705 i915_wedged_set(void *data, u64 val)
1706 {
1707         struct drm_device *dev = data;
1708
1709         DRM_INFO("Manually setting wedged to %llu\n", val);
1710         i915_handle_error(dev, val);
1711
1712         return 0;
1713 }
1714
1715 DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
1716                         i915_wedged_get, i915_wedged_set,
1717                         "%llu\n");
1718
1719 static int
1720 i915_ring_stop_get(void *data, u64 *val)
1721 {
1722         struct drm_device *dev = data;
1723         drm_i915_private_t *dev_priv = dev->dev_private;
1724
1725         *val = dev_priv->gpu_error.stop_rings;
1726
1727         return 0;
1728 }
1729
1730 static int
1731 i915_ring_stop_set(void *data, u64 val)
1732 {
1733         struct drm_device *dev = data;
1734         struct drm_i915_private *dev_priv = dev->dev_private;
1735         int ret;
1736
1737         DRM_DEBUG_DRIVER("Stopping rings 0x%08llx\n", val);
1738
1739         ret = mutex_lock_interruptible(&dev->struct_mutex);
1740         if (ret)
1741                 return ret;
1742
1743         dev_priv->gpu_error.stop_rings = val;
1744         mutex_unlock(&dev->struct_mutex);
1745
1746         return 0;
1747 }
1748
1749 DEFINE_SIMPLE_ATTRIBUTE(i915_ring_stop_fops,
1750                         i915_ring_stop_get, i915_ring_stop_set,
1751                         "0x%08llx\n");
1752
1753 #define DROP_UNBOUND 0x1
1754 #define DROP_BOUND 0x2
1755 #define DROP_RETIRE 0x4
1756 #define DROP_ACTIVE 0x8
1757 #define DROP_ALL (DROP_UNBOUND | \
1758                   DROP_BOUND | \
1759                   DROP_RETIRE | \
1760                   DROP_ACTIVE)
1761 static int
1762 i915_drop_caches_get(void *data, u64 *val)
1763 {
1764         *val = DROP_ALL;
1765
1766         return 0;
1767 }
1768
1769 static int
1770 i915_drop_caches_set(void *data, u64 val)
1771 {
1772         struct drm_device *dev = data;
1773         struct drm_i915_private *dev_priv = dev->dev_private;
1774         struct drm_i915_gem_object *obj, *next;
1775         int ret;
1776
1777         DRM_DEBUG_DRIVER("Dropping caches: 0x%08llx\n", val);
1778
1779         /* No need to check and wait for gpu resets, only libdrm auto-restarts
1780          * on ioctls on -EAGAIN. */
1781         ret = mutex_lock_interruptible(&dev->struct_mutex);
1782         if (ret)
1783                 return ret;
1784
1785         if (val & DROP_ACTIVE) {
1786                 ret = i915_gpu_idle(dev);
1787                 if (ret)
1788                         goto unlock;
1789         }
1790
1791         if (val & (DROP_RETIRE | DROP_ACTIVE))
1792                 i915_gem_retire_requests(dev);
1793
1794         if (val & DROP_BOUND) {
1795                 list_for_each_entry_safe(obj, next, &dev_priv->mm.inactive_list, mm_list)
1796                         if (obj->pin_count == 0) {
1797                                 ret = i915_gem_object_unbind(obj);
1798                                 if (ret)
1799                                         goto unlock;
1800                         }
1801         }
1802
1803         if (val & DROP_UNBOUND) {
1804                 list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list, gtt_list)
1805                         if (obj->pages_pin_count == 0) {
1806                                 ret = i915_gem_object_put_pages(obj);
1807                                 if (ret)
1808                                         goto unlock;
1809                         }
1810         }
1811
1812 unlock:
1813         mutex_unlock(&dev->struct_mutex);
1814
1815         return ret;
1816 }
1817
1818 DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops,
1819                         i915_drop_caches_get, i915_drop_caches_set,
1820                         "0x%08llx\n");
1821
1822 static int
1823 i915_max_freq_get(void *data, u64 *val)
1824 {
1825         struct drm_device *dev = data;
1826         drm_i915_private_t *dev_priv = dev->dev_private;
1827         int ret;
1828
1829         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1830                 return -ENODEV;
1831
1832         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1833         if (ret)
1834                 return ret;
1835
1836         if (IS_VALLEYVIEW(dev))
1837                 *val = vlv_gpu_freq(dev_priv->mem_freq,
1838                                     dev_priv->rps.max_delay);
1839         else
1840                 *val = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
1841         mutex_unlock(&dev_priv->rps.hw_lock);
1842
1843         return 0;
1844 }
1845
1846 static int
1847 i915_max_freq_set(void *data, u64 val)
1848 {
1849         struct drm_device *dev = data;
1850         struct drm_i915_private *dev_priv = dev->dev_private;
1851         int ret;
1852
1853         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1854                 return -ENODEV;
1855
1856         DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);
1857
1858         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1859         if (ret)
1860                 return ret;
1861
1862         /*
1863          * Turbo will still be enabled, but won't go above the set value.
1864          */
1865         if (IS_VALLEYVIEW(dev)) {
1866                 val = vlv_freq_opcode(dev_priv->mem_freq, val);
1867                 dev_priv->rps.max_delay = val;
1868                 gen6_set_rps(dev, val);
1869         } else {
1870                 do_div(val, GT_FREQUENCY_MULTIPLIER);
1871                 dev_priv->rps.max_delay = val;
1872                 gen6_set_rps(dev, val);
1873         }
1874
1875         mutex_unlock(&dev_priv->rps.hw_lock);
1876
1877         return 0;
1878 }
1879
1880 DEFINE_SIMPLE_ATTRIBUTE(i915_max_freq_fops,
1881                         i915_max_freq_get, i915_max_freq_set,
1882                         "%llu\n");
1883
1884 static int
1885 i915_min_freq_get(void *data, u64 *val)
1886 {
1887         struct drm_device *dev = data;
1888         drm_i915_private_t *dev_priv = dev->dev_private;
1889         int ret;
1890
1891         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1892                 return -ENODEV;
1893
1894         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1895         if (ret)
1896                 return ret;
1897
1898         if (IS_VALLEYVIEW(dev))
1899                 *val = vlv_gpu_freq(dev_priv->mem_freq,
1900                                     dev_priv->rps.min_delay);
1901         else
1902                 *val = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
1903         mutex_unlock(&dev_priv->rps.hw_lock);
1904
1905         return 0;
1906 }
1907
1908 static int
1909 i915_min_freq_set(void *data, u64 val)
1910 {
1911         struct drm_device *dev = data;
1912         struct drm_i915_private *dev_priv = dev->dev_private;
1913         int ret;
1914
1915         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1916                 return -ENODEV;
1917
1918         DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val);
1919
1920         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1921         if (ret)
1922                 return ret;
1923
1924         /*
1925          * Turbo will still be enabled, but won't go below the set value.
1926          */
1927         if (IS_VALLEYVIEW(dev)) {
1928                 val = vlv_freq_opcode(dev_priv->mem_freq, val);
1929                 dev_priv->rps.min_delay = val;
1930                 valleyview_set_rps(dev, val);
1931         } else {
1932                 do_div(val, GT_FREQUENCY_MULTIPLIER);
1933                 dev_priv->rps.min_delay = val;
1934                 gen6_set_rps(dev, val);
1935         }
1936         mutex_unlock(&dev_priv->rps.hw_lock);
1937
1938         return 0;
1939 }
1940
1941 DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops,
1942                         i915_min_freq_get, i915_min_freq_set,
1943                         "%llu\n");
1944
1945 static int
1946 i915_cache_sharing_get(void *data, u64 *val)
1947 {
1948         struct drm_device *dev = data;
1949         drm_i915_private_t *dev_priv = dev->dev_private;
1950         u32 snpcr;
1951         int ret;
1952
1953         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1954                 return -ENODEV;
1955
1956         ret = mutex_lock_interruptible(&dev->struct_mutex);
1957         if (ret)
1958                 return ret;
1959
1960         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1961         mutex_unlock(&dev_priv->dev->struct_mutex);
1962
1963         *val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT;
1964
1965         return 0;
1966 }
1967
1968 static int
1969 i915_cache_sharing_set(void *data, u64 val)
1970 {
1971         struct drm_device *dev = data;
1972         struct drm_i915_private *dev_priv = dev->dev_private;
1973         u32 snpcr;
1974
1975         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1976                 return -ENODEV;
1977
1978         if (val > 3)
1979                 return -EINVAL;
1980
1981         DRM_DEBUG_DRIVER("Manually setting uncore sharing to %llu\n", val);
1982
1983         /* Update the cache sharing policy here as well */
1984         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1985         snpcr &= ~GEN6_MBC_SNPCR_MASK;
1986         snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1987         I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1988
1989         return 0;
1990 }
1991
1992 DEFINE_SIMPLE_ATTRIBUTE(i915_cache_sharing_fops,
1993                         i915_cache_sharing_get, i915_cache_sharing_set,
1994                         "%llu\n");
1995
1996 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1997  * allocated we need to hook into the minor for release. */
1998 static int
1999 drm_add_fake_info_node(struct drm_minor *minor,
2000                        struct dentry *ent,
2001                        const void *key)
2002 {
2003         struct drm_info_node *node;
2004
2005         node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
2006         if (node == NULL) {
2007                 debugfs_remove(ent);
2008                 return -ENOMEM;
2009         }
2010
2011         node->minor = minor;
2012         node->dent = ent;
2013         node->info_ent = (void *) key;
2014
2015         mutex_lock(&minor->debugfs_lock);
2016         list_add(&node->list, &minor->debugfs_list);
2017         mutex_unlock(&minor->debugfs_lock);
2018
2019         return 0;
2020 }
2021
2022 static int i915_forcewake_open(struct inode *inode, struct file *file)
2023 {
2024         struct drm_device *dev = inode->i_private;
2025         struct drm_i915_private *dev_priv = dev->dev_private;
2026
2027         if (INTEL_INFO(dev)->gen < 6)
2028                 return 0;
2029
2030         gen6_gt_force_wake_get(dev_priv);
2031
2032         return 0;
2033 }
2034
2035 static int i915_forcewake_release(struct inode *inode, struct file *file)
2036 {
2037         struct drm_device *dev = inode->i_private;
2038         struct drm_i915_private *dev_priv = dev->dev_private;
2039
2040         if (INTEL_INFO(dev)->gen < 6)
2041                 return 0;
2042
2043         gen6_gt_force_wake_put(dev_priv);
2044
2045         return 0;
2046 }
2047
2048 static const struct file_operations i915_forcewake_fops = {
2049         .owner = THIS_MODULE,
2050         .open = i915_forcewake_open,
2051         .release = i915_forcewake_release,
2052 };
2053
2054 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
2055 {
2056         struct drm_device *dev = minor->dev;
2057         struct dentry *ent;
2058
2059         ent = debugfs_create_file("i915_forcewake_user",
2060                                   S_IRUSR,
2061                                   root, dev,
2062                                   &i915_forcewake_fops);
2063         if (IS_ERR(ent))
2064                 return PTR_ERR(ent);
2065
2066         return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
2067 }
2068
2069 static int i915_debugfs_create(struct dentry *root,
2070                                struct drm_minor *minor,
2071                                const char *name,
2072                                const struct file_operations *fops)
2073 {
2074         struct drm_device *dev = minor->dev;
2075         struct dentry *ent;
2076
2077         ent = debugfs_create_file(name,
2078                                   S_IRUGO | S_IWUSR,
2079                                   root, dev,
2080                                   fops);
2081         if (IS_ERR(ent))
2082                 return PTR_ERR(ent);
2083
2084         return drm_add_fake_info_node(minor, ent, fops);
2085 }
2086
2087 static struct drm_info_list i915_debugfs_list[] = {
2088         {"i915_capabilities", i915_capabilities, 0},
2089         {"i915_gem_objects", i915_gem_object_info, 0},
2090         {"i915_gem_gtt", i915_gem_gtt_info, 0},
2091         {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2092         {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2093         {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2094         {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2095         {"i915_gem_request", i915_gem_request_info, 0},
2096         {"i915_gem_seqno", i915_gem_seqno_info, 0},
2097         {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2098         {"i915_gem_interrupt", i915_interrupt_info, 0},
2099         {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2100         {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2101         {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2102         {"i915_rstdby_delays", i915_rstdby_delays, 0},
2103         {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2104         {"i915_delayfreq_table", i915_delayfreq_table, 0},
2105         {"i915_inttoext_table", i915_inttoext_table, 0},
2106         {"i915_drpc_info", i915_drpc_info, 0},
2107         {"i915_emon_status", i915_emon_status, 0},
2108         {"i915_ring_freq_table", i915_ring_freq_table, 0},
2109         {"i915_gfxec", i915_gfxec, 0},
2110         {"i915_fbc_status", i915_fbc_status, 0},
2111         {"i915_sr_status", i915_sr_status, 0},
2112         {"i915_opregion", i915_opregion, 0},
2113         {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2114         {"i915_context_status", i915_context_status, 0},
2115         {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2116         {"i915_swizzle_info", i915_swizzle_info, 0},
2117         {"i915_ppgtt_info", i915_ppgtt_info, 0},
2118         {"i915_dpio", i915_dpio_info, 0},
2119 };
2120 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2121
2122 int i915_debugfs_init(struct drm_minor *minor)
2123 {
2124         int ret;
2125
2126         ret = i915_debugfs_create(minor->debugfs_root, minor,
2127                                   "i915_wedged",
2128                                   &i915_wedged_fops);
2129         if (ret)
2130                 return ret;
2131
2132         ret = i915_forcewake_create(minor->debugfs_root, minor);
2133         if (ret)
2134                 return ret;
2135
2136         ret = i915_debugfs_create(minor->debugfs_root, minor,
2137                                   "i915_max_freq",
2138                                   &i915_max_freq_fops);
2139         if (ret)
2140                 return ret;
2141
2142         ret = i915_debugfs_create(minor->debugfs_root, minor,
2143                                   "i915_min_freq",
2144                                   &i915_min_freq_fops);
2145         if (ret)
2146                 return ret;
2147
2148         ret = i915_debugfs_create(minor->debugfs_root, minor,
2149                                   "i915_cache_sharing",
2150                                   &i915_cache_sharing_fops);
2151         if (ret)
2152                 return ret;
2153
2154         ret = i915_debugfs_create(minor->debugfs_root, minor,
2155                                   "i915_ring_stop",
2156                                   &i915_ring_stop_fops);
2157         if (ret)
2158                 return ret;
2159
2160         ret = i915_debugfs_create(minor->debugfs_root, minor,
2161                                   "i915_gem_drop_caches",
2162                                   &i915_drop_caches_fops);
2163         if (ret)
2164                 return ret;
2165
2166         ret = i915_debugfs_create(minor->debugfs_root, minor,
2167                                   "i915_error_state",
2168                                   &i915_error_state_fops);
2169         if (ret)
2170                 return ret;
2171
2172         ret = i915_debugfs_create(minor->debugfs_root, minor,
2173                                  "i915_next_seqno",
2174                                  &i915_next_seqno_fops);
2175         if (ret)
2176                 return ret;
2177
2178         return drm_debugfs_create_files(i915_debugfs_list,
2179                                         I915_DEBUGFS_ENTRIES,
2180                                         minor->debugfs_root, minor);
2181 }
2182
2183 void i915_debugfs_cleanup(struct drm_minor *minor)
2184 {
2185         drm_debugfs_remove_files(i915_debugfs_list,
2186                                  I915_DEBUGFS_ENTRIES, minor);
2187         drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2188                                  1, minor);
2189         drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2190                                  1, minor);
2191         drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2192                                  1, minor);
2193         drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2194                                  1, minor);
2195         drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2196                                  1, minor);
2197         drm_debugfs_remove_files((struct drm_info_list *) &i915_drop_caches_fops,
2198                                  1, minor);
2199         drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2200                                  1, minor);
2201         drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2202                                  1, minor);
2203         drm_debugfs_remove_files((struct drm_info_list *) &i915_next_seqno_fops,
2204                                  1, minor);
2205 }
2206
2207 #endif /* CONFIG_DEBUG_FS */