drivers/gpu/drm/i915/i915_gem_execbuffer.c

   1 /*
   2  * Copyright © 2008,2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Chris Wilson <chris@chris-wilson.co.uk>
  26  *
  27  */
  28
  29 #include <drm/drmP.h>
  30 #include <drm/i915_drm.h>
  31 #include "i915_drv.h"
  32 #include "i915_trace.h"
  33 #include "intel_drv.h"
  34 #include <linux/dma_remapping.h>
  35
  36 #define  __EXEC_OBJECT_HAS_PIN (1<<31)
  37 #define  __EXEC_OBJECT_HAS_FENCE (1<<30)
  38
  39 struct eb_vmas {
  40         struct list_head vmas;
  41         int and;
  42         union {
  43                 struct i915_vma *lut[0];
  44                 struct hlist_head buckets[0];
  45         };
  46 };
  47
  48 static struct eb_vmas *
  49 eb_create(struct drm_i915_gem_execbuffer2 *args)
  50 {
  51         struct eb_vmas *eb = NULL;
  52
  53         if (args->flags & I915_EXEC_HANDLE_LUT) {
  54                 unsigned size = args->buffer_count;
  55                 size *= sizeof(struct i915_vma *);
  56                 size += sizeof(struct eb_vmas);
  57                 eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
  58         }
  59
  60         if (eb == NULL) {
  61                 unsigned size = args->buffer_count;
  62                 unsigned count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
  63                 BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
  64                 while (count > 2*size)
  65                         count >>= 1;
  66                 eb = kzalloc(count*sizeof(struct hlist_head) +
  67                              sizeof(struct eb_vmas),
  68                              GFP_TEMPORARY);
  69                 if (eb == NULL)
  70                         return eb;
  71
  72                 eb->and = count - 1;
  73         } else
  74                 eb->and = -args->buffer_count;
  75
  76         INIT_LIST_HEAD(&eb->vmas);
  77         return eb;
  78 }
  79
  80 static void
  81 eb_reset(struct eb_vmas *eb)
  82 {
  83         if (eb->and >= 0)
  84                 memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
  85 }
  86
  87 static int
  88 eb_lookup_vmas(struct eb_vmas *eb,
  89                struct drm_i915_gem_exec_object2 *exec,
  90                const struct drm_i915_gem_execbuffer2 *args,
  91                struct i915_address_space *vm,
  92                struct drm_file *file)
  93 {
  94         struct drm_i915_private *dev_priv = vm->dev->dev_private;
  95         struct drm_i915_gem_object *obj;
  96         struct list_head objects;
  97         int i, ret;
  98
  99         INIT_LIST_HEAD(&objects);
 100         spin_lock(&file->table_lock);
 101         /* Grab a reference to the object and release the lock so we can lookup
 102          * or create the VMA without using GFP_ATOMIC */
 103         for (i = 0; i < args->buffer_count; i++) {
 104                 obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
 105                 if (obj == NULL) {
 106                         spin_unlock(&file->table_lock);
 107                         DRM_DEBUG("Invalid object handle %d at index %d\n",
 108                                    exec[i].handle, i);
 109                         ret = -ENOENT;
 110                         goto err;
 111                 }
 112
 113                 if (!list_empty(&obj->obj_exec_link)) {
 114                         spin_unlock(&file->table_lock);
 115                         DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
 116                                    obj, exec[i].handle, i);
 117                         ret = -EINVAL;
 118                         goto err;
 119                 }
 120
 121                 drm_gem_object_reference(&obj->base);
 122                 list_add_tail(&obj->obj_exec_link, &objects);
 123         }
 124         spin_unlock(&file->table_lock);
 125
 126         i = 0;
 127         while (!list_empty(&objects)) {
 128                 struct i915_vma *vma;
 129                 struct i915_address_space *bind_vm = vm;
 130
 131                 if (exec[i].flags & EXEC_OBJECT_NEEDS_GTT &&
 132                     USES_FULL_PPGTT(vm->dev)) {
 133                         ret = -EINVAL;
 134                         goto out;
 135                 }
 136
 137                 /* If we have secure dispatch, or the userspace assures us that
 138                  * they know what they're doing, use the GGTT VM.
 139                  */
 140                 if (((args->flags & I915_EXEC_SECURE) &&
 141                     (i == (args->buffer_count - 1))))
 142                         bind_vm = &dev_priv->gtt.base;
 143
 144                 obj = list_first_entry(&objects,
 145                                        struct drm_i915_gem_object,
 146                                        obj_exec_link);
 147
 148                 /*
 149                  * NOTE: We can leak any vmas created here when something fails
 150                  * later on. But that's no issue since vma_unbind can deal with
 151                  * vmas which are not actually bound. And since only
 152                  * lookup_or_create exists as an interface to get at the vma
 153                  * from the (obj, vm) we don't run the risk of creating
 154                  * duplicated vmas for the same vm.
 155                  */
 156                 vma = i915_gem_obj_lookup_or_create_vma(obj, bind_vm);
 157                 if (IS_ERR(vma)) {
 158                         DRM_DEBUG("Failed to lookup VMA\n");
 159                         ret = PTR_ERR(vma);
 160                         goto err;
 161                 }
 162
 163                 /* Transfer ownership from the objects list to the vmas list. */
 164                 list_add_tail(&vma->exec_list, &eb->vmas);
 165                 list_del_init(&obj->obj_exec_link);
 166
 167                 vma->exec_entry = &exec[i];
 168                 if (eb->and < 0) {
 169                         eb->lut[i] = vma;
 170                 } else {
 171                         uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
 172                         vma->exec_handle = handle;
 173                         hlist_add_head(&vma->exec_node,
 174                                        &eb->buckets[handle & eb->and]);
 175                 }
 176                 ++i;
 177         }
 178
 179         return 0;
 180
 181
 182 err:
 183         while (!list_empty(&objects)) {
 184                 obj = list_first_entry(&objects,
 185                                        struct drm_i915_gem_object,
 186                                        obj_exec_link);
 187                 list_del_init(&obj->obj_exec_link);
 188                 drm_gem_object_unreference(&obj->base);
 189         }
 190         /*
 191          * Objects already transfered to the vmas list will be unreferenced by
 192          * eb_destroy.
 193          */
 194
 195         return ret;
 196 }
 197
 198 static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
 199 {
 200         if (eb->and < 0) {
 201                 if (handle >= -eb->and)
 202                         return NULL;
 203                 return eb->lut[handle];
 204         } else {
 205                 struct hlist_head *head;
 206                 struct hlist_node *node;
 207
 208                 head = &eb->buckets[handle & eb->and];
 209                 hlist_for_each(node, head) {
 210                         struct i915_vma *vma;
 211
 212                         vma = hlist_entry(node, struct i915_vma, exec_node);
 213                         if (vma->exec_handle == handle)
 214                                 return vma;
 215                 }
 216                 return NULL;
 217         }
 218 }
 219
 220 static void
 221 i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
 222 {
 223         struct drm_i915_gem_exec_object2 *entry;
 224         struct drm_i915_gem_object *obj = vma->obj;
 225
 226         if (!drm_mm_node_allocated(&vma->node))
 227                 return;
 228
 229         entry = vma->exec_entry;
 230
 231         if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
 232                 i915_gem_object_unpin_fence(obj);
 233
 234         if (entry->flags & __EXEC_OBJECT_HAS_PIN)
 235                 vma->pin_count--;
 236
 237         entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
 238 }
 239
 240 static void eb_destroy(struct eb_vmas *eb)
 241 {
 242         while (!list_empty(&eb->vmas)) {
 243                 struct i915_vma *vma;
 244
 245                 vma = list_first_entry(&eb->vmas,
 246                                        struct i915_vma,
 247                                        exec_list);
 248                 list_del_init(&vma->exec_list);
 249                 i915_gem_execbuffer_unreserve_vma(vma);
 250                 drm_gem_object_unreference(&vma->obj->base);
 251         }
 252         kfree(eb);
 253 }
 254
 255 static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
 256 {
 257         return (HAS_LLC(obj->base.dev) ||
 258                 obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
 259                 !obj->map_and_fenceable ||
 260                 obj->cache_level != I915_CACHE_NONE);
 261 }
 262
 263 static int
 264 relocate_entry_cpu(struct drm_i915_gem_object *obj,
 265                    struct drm_i915_gem_relocation_entry *reloc)
 266 {
 267         struct drm_device *dev = obj->base.dev;
 268         uint32_t page_offset = offset_in_page(reloc->offset);
 269         char *vaddr;
 270         int ret;
 271
 272         ret = i915_gem_object_set_to_cpu_domain(obj, true);
 273         if (ret)
 274                 return ret;
 275
 276         vaddr = kmap_atomic(i915_gem_object_get_page(obj,
 277                                 reloc->offset >> PAGE_SHIFT));
 278         *(uint32_t *)(vaddr + page_offset) = reloc->delta;
 279
 280         if (INTEL_INFO(dev)->gen >= 8) {
 281                 page_offset = offset_in_page(page_offset + sizeof(uint32_t));
 282
 283                 if (page_offset == 0) {
 284                         kunmap_atomic(vaddr);
 285                         vaddr = kmap_atomic(i915_gem_object_get_page(obj,
 286                             (reloc->offset + sizeof(uint32_t)) >> PAGE_SHIFT));
 287                 }
 288
 289                 *(uint32_t *)(vaddr + page_offset) = 0;
 290         }
 291
 292         kunmap_atomic(vaddr);
 293
 294         return 0;
 295 }
 296
 297 static int
 298 relocate_entry_gtt(struct drm_i915_gem_object *obj,
 299                    struct drm_i915_gem_relocation_entry *reloc)
 300 {
 301         struct drm_device *dev = obj->base.dev;
 302         struct drm_i915_private *dev_priv = dev->dev_private;
 303         uint32_t __iomem *reloc_entry;
 304         void __iomem *reloc_page;
 305         int ret;
 306
 307         ret = i915_gem_object_set_to_gtt_domain(obj, true);
 308         if (ret)
 309                 return ret;
 310
 311         ret = i915_gem_object_put_fence(obj);
 312         if (ret)
 313                 return ret;
 314
 315         /* Map the page containing the relocation we're going to perform.  */
 316         reloc->offset += i915_gem_obj_ggtt_offset(obj);
 317         reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
 318                         reloc->offset & PAGE_MASK);
 319         reloc_entry = (uint32_t __iomem *)
 320                 (reloc_page + offset_in_page(reloc->offset));
 321         iowrite32(reloc->delta, reloc_entry);
 322
 323         if (INTEL_INFO(dev)->gen >= 8) {
 324                 reloc_entry += 1;
 325
 326                 if (offset_in_page(reloc->offset + sizeof(uint32_t)) == 0) {
 327                         io_mapping_unmap_atomic(reloc_page);
 328                         reloc_page = io_mapping_map_atomic_wc(
 329                                         dev_priv->gtt.mappable,
 330                                         reloc->offset + sizeof(uint32_t));
 331                         reloc_entry = reloc_page;
 332                 }
 333
 334                 iowrite32(0, reloc_entry);
 335         }
 336
 337         io_mapping_unmap_atomic(reloc_page);
 338
 339         return 0;
 340 }
 341
 342 static int
 343 i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
 344                                    struct eb_vmas *eb,
 345                                    struct drm_i915_gem_relocation_entry *reloc)
 346 {
 347         struct drm_device *dev = obj->base.dev;
 348         struct drm_gem_object *target_obj;
 349         struct drm_i915_gem_object *target_i915_obj;
 350         struct i915_vma *target_vma;
 351         uint32_t target_offset;
 352         int ret;
 353
 354         /* we've already hold a reference to all valid objects */
 355         target_vma = eb_get_vma(eb, reloc->target_handle);
 356         if (unlikely(target_vma == NULL))
 357                 return -ENOENT;
 358         target_i915_obj = target_vma->obj;
 359         target_obj = &target_vma->obj->base;
 360
 361         target_offset = target_vma->node.start;
 362
 363         /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
 364          * pipe_control writes because the gpu doesn't properly redirect them
 365          * through the ppgtt for non_secure batchbuffers. */
 366         if (unlikely(IS_GEN6(dev) &&
 367             reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
 368             !target_i915_obj->has_global_gtt_mapping)) {
 369                 struct i915_vma *vma =
 370                         list_first_entry(&target_i915_obj->vma_list,
 371                                          typeof(*vma), vma_link);
 372                 vma->bind_vma(vma, target_i915_obj->cache_level, GLOBAL_BIND);
 373         }
 374
 375         /* Validate that the target is in a valid r/w GPU domain */
 376         if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
 377                 DRM_DEBUG("reloc with multiple write domains: "
 378                           "obj %p target %d offset %d "
 379                           "read %08x write %08x",
 380                           obj, reloc->target_handle,
 381                           (int) reloc->offset,
 382                           reloc->read_domains,
 383                           reloc->write_domain);
 384                 return -EINVAL;
 385         }
 386         if (unlikely((reloc->write_domain | reloc->read_domains)
 387                      & ~I915_GEM_GPU_DOMAINS)) {
 388                 DRM_DEBUG("reloc with read/write non-GPU domains: "
 389                           "obj %p target %d offset %d "
 390                           "read %08x write %08x",
 391                           obj, reloc->target_handle,
 392                           (int) reloc->offset,
 393                           reloc->read_domains,
 394                           reloc->write_domain);
 395                 return -EINVAL;
 396         }
 397
 398         target_obj->pending_read_domains |= reloc->read_domains;
 399         target_obj->pending_write_domain |= reloc->write_domain;
 400
 401         /* If the relocation already has the right value in it, no
 402          * more work needs to be done.
 403          */
 404         if (target_offset == reloc->presumed_offset)
 405                 return 0;
 406
 407         /* Check that the relocation address is valid... */
 408         if (unlikely(reloc->offset >
 409                 obj->base.size - (INTEL_INFO(dev)->gen >= 8 ? 8 : 4))) {
 410                 DRM_DEBUG("Relocation beyond object bounds: "
 411                           "obj %p target %d offset %d size %d.\n",
 412                           obj, reloc->target_handle,
 413                           (int) reloc->offset,
 414                           (int) obj->base.size);
 415                 return -EINVAL;
 416         }
 417         if (unlikely(reloc->offset & 3)) {
 418                 DRM_DEBUG("Relocation not 4-byte aligned: "
 419                           "obj %p target %d offset %d.\n",
 420                           obj, reloc->target_handle,
 421                           (int) reloc->offset);
 422                 return -EINVAL;
 423         }
 424
 425         /* We can't wait for rendering with pagefaults disabled */
 426         if (obj->active && in_atomic())
 427                 return -EFAULT;
 428
 429         reloc->delta += target_offset;
 430         if (use_cpu_reloc(obj))
 431                 ret = relocate_entry_cpu(obj, reloc);
 432         else
 433                 ret = relocate_entry_gtt(obj, reloc);
 434
 435         if (ret)
 436                 return ret;
 437
 438         /* and update the user's relocation entry */
 439         reloc->presumed_offset = target_offset;
 440
 441         return 0;
 442 }
 443
 444 static int
 445 i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
 446                                  struct eb_vmas *eb)
 447 {
 448 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
 449         struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
 450         struct drm_i915_gem_relocation_entry __user *user_relocs;
 451         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 452         int remain, ret;
 453
 454         user_relocs = to_user_ptr(entry->relocs_ptr);
 455
 456         remain = entry->relocation_count;
 457         while (remain) {
 458                 struct drm_i915_gem_relocation_entry *r = stack_reloc;
 459                 int count = remain;
 460                 if (count > ARRAY_SIZE(stack_reloc))
 461                         count = ARRAY_SIZE(stack_reloc);
 462                 remain -= count;
 463
 464                 if (__copy_from_user_inatomic(r, user_relocs, count*sizeof(r[0])))
 465                         return -EFAULT;
 466
 467                 do {
 468                         u64 offset = r->presumed_offset;
 469
 470                         ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, r);
 471                         if (ret)
 472                                 return ret;
 473
 474                         if (r->presumed_offset != offset &&
 475                             __copy_to_user_inatomic(&user_relocs->presumed_offset,
 476                                                     &r->presumed_offset,
 477                                                     sizeof(r->presumed_offset))) {
 478                                 return -EFAULT;
 479                         }
 480
 481                         user_relocs++;
 482                         r++;
 483                 } while (--count);
 484         }
 485
 486         return 0;
 487 #undef N_RELOC
 488 }
 489
 490 static int
 491 i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma,
 492                                       struct eb_vmas *eb,
 493                                       struct drm_i915_gem_relocation_entry *relocs)
 494 {
 495         const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 496         int i, ret;
 497
 498         for (i = 0; i < entry->relocation_count; i++) {
 499                 ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i]);
 500                 if (ret)
 501                         return ret;
 502         }
 503
 504         return 0;
 505 }
 506
 507 static int
 508 i915_gem_execbuffer_relocate(struct eb_vmas *eb)
 509 {
 510         struct i915_vma *vma;
 511         int ret = 0;
 512
 513         /* This is the fast path and we cannot handle a pagefault whilst
 514          * holding the struct mutex lest the user pass in the relocations
 515          * contained within a mmaped bo. For in such a case we, the page
 516          * fault handler would call i915_gem_fault() and we would try to
 517          * acquire the struct mutex again. Obviously this is bad and so
 518          * lockdep complains vehemently.
 519          */
 520         pagefault_disable();
 521         list_for_each_entry(vma, &eb->vmas, exec_list) {
 522                 ret = i915_gem_execbuffer_relocate_vma(vma, eb);
 523                 if (ret)
 524                         break;
 525         }
 526         pagefault_enable();
 527
 528         return ret;
 529 }
 530
 531 static int
 532 need_reloc_mappable(struct i915_vma *vma)
 533 {
 534         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 535         return entry->relocation_count && !use_cpu_reloc(vma->obj) &&
 536                 i915_is_ggtt(vma->vm);
 537 }
 538
 539 static int
 540 i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
 541                                 struct intel_ring_buffer *ring,
 542                                 bool *need_reloc)
 543 {
 544         struct drm_i915_gem_object *obj = vma->obj;
 545         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 546         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 547         bool need_fence, need_mappable;
 548         u32 flags = (entry->flags & EXEC_OBJECT_NEEDS_GTT) &&
 549                 !vma->obj->has_global_gtt_mapping ? GLOBAL_BIND : 0;
 550         int ret;
 551
 552         need_fence =
 553                 has_fenced_gpu_access &&
 554                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 555                 obj->tiling_mode != I915_TILING_NONE;
 556         need_mappable = need_fence || need_reloc_mappable(vma);
 557
 558         ret = i915_gem_object_pin(obj, vma->vm, entry->alignment, need_mappable,
 559                                   false);
 560         if (ret)
 561                 return ret;
 562
 563         entry->flags |= __EXEC_OBJECT_HAS_PIN;
 564
 565         if (has_fenced_gpu_access) {
 566                 if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
 567                         ret = i915_gem_object_get_fence(obj);
 568                         if (ret)
 569                                 return ret;
 570
 571                         if (i915_gem_object_pin_fence(obj))
 572                                 entry->flags |= __EXEC_OBJECT_HAS_FENCE;
 573
 574                         obj->pending_fenced_gpu_access = true;
 575                 }
 576         }
 577
 578         if (entry->offset != vma->node.start) {
 579                 entry->offset = vma->node.start;
 580                 *need_reloc = true;
 581         }
 582
 583         if (entry->flags & EXEC_OBJECT_WRITE) {
 584                 obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
 585                 obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
 586         }
 587
 588         vma->bind_vma(vma, obj->cache_level, flags);
 589
 590         return 0;
 591 }
 592
 593 static int
 594 i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 595                             struct list_head *vmas,
 596                             bool *need_relocs)
 597 {
 598         struct drm_i915_gem_object *obj;
 599         struct i915_vma *vma;
 600         struct i915_address_space *vm;
 601         struct list_head ordered_vmas;
 602         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 603         int retry;
 604
 605         if (list_empty(vmas))
 606                 return 0;
 607
 608         vm = list_first_entry(vmas, struct i915_vma, exec_list)->vm;
 609
 610         INIT_LIST_HEAD(&ordered_vmas);
 611         while (!list_empty(vmas)) {
 612                 struct drm_i915_gem_exec_object2 *entry;
 613                 bool need_fence, need_mappable;
 614
 615                 vma = list_first_entry(vmas, struct i915_vma, exec_list);
 616                 obj = vma->obj;
 617                 entry = vma->exec_entry;
 618
 619                 need_fence =
 620                         has_fenced_gpu_access &&
 621                         entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 622                         obj->tiling_mode != I915_TILING_NONE;
 623                 need_mappable = need_fence || need_reloc_mappable(vma);
 624
 625                 if (need_mappable)
 626                         list_move(&vma->exec_list, &ordered_vmas);
 627                 else
 628                         list_move_tail(&vma->exec_list, &ordered_vmas);
 629
 630                 obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
 631                 obj->base.pending_write_domain = 0;
 632                 obj->pending_fenced_gpu_access = false;
 633         }
 634         list_splice(&ordered_vmas, vmas);
 635
 636         /* Attempt to pin all of the buffers into the GTT.
 637          * This is done in 3 phases:
 638          *
 639          * 1a. Unbind all objects that do not match the GTT constraints for
 640          *     the execbuffer (fenceable, mappable, alignment etc).
 641          * 1b. Increment pin count for already bound objects.
 642          * 2.  Bind new objects.
 643          * 3.  Decrement pin count.
 644          *
 645          * This avoid unnecessary unbinding of later objects in order to make
 646          * room for the earlier objects *unless* we need to defragment.
 647          */
 648         retry = 0;
 649         do {
 650                 int ret = 0;
 651
 652                 /* Unbind any ill-fitting objects or pin. */
 653                 list_for_each_entry(vma, vmas, exec_list) {
 654                         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 655                         bool need_fence, need_mappable;
 656
 657                         obj = vma->obj;
 658
 659                         if (!drm_mm_node_allocated(&vma->node))
 660                                 continue;
 661
 662                         need_fence =
 663                                 has_fenced_gpu_access &&
 664                                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 665                                 obj->tiling_mode != I915_TILING_NONE;
 666                         need_mappable = need_fence || need_reloc_mappable(vma);
 667
 668                         WARN_ON((need_mappable || need_fence) &&
 669                                !i915_is_ggtt(vma->vm));
 670
 671                         if ((entry->alignment &&
 672                              vma->node.start & (entry->alignment - 1)) ||
 673                             (need_mappable && !obj->map_and_fenceable))
 674                                 ret = i915_vma_unbind(vma);
 675                         else
 676                                 ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
 677                         if (ret)
 678                                 goto err;
 679                 }
 680
 681                 /* Bind fresh objects */
 682                 list_for_each_entry(vma, vmas, exec_list) {
 683                         if (drm_mm_node_allocated(&vma->node))
 684                                 continue;
 685
 686                         ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
 687                         if (ret)
 688                                 goto err;
 689                 }
 690
 691 err:
 692                 if (ret != -ENOSPC || retry++)
 693                         return ret;
 694
 695                 /* Decrement pin count for bound objects */
 696                 list_for_each_entry(vma, vmas, exec_list)
 697                         i915_gem_execbuffer_unreserve_vma(vma);
 698
 699                 ret = i915_gem_evict_vm(vm, true);
 700                 if (ret)
 701                         return ret;
 702         } while (1);
 703 }
 704
 705 static int
 706 i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
 707                                   struct drm_i915_gem_execbuffer2 *args,
 708                                   struct drm_file *file,
 709                                   struct intel_ring_buffer *ring,
 710                                   struct eb_vmas *eb,
 711                                   struct drm_i915_gem_exec_object2 *exec)
 712 {
 713         struct drm_i915_gem_relocation_entry *reloc;
 714         struct i915_address_space *vm;
 715         struct i915_vma *vma;
 716         bool need_relocs;
 717         int *reloc_offset;
 718         int i, total, ret;
 719         unsigned count = args->buffer_count;
 720
 721         if (WARN_ON(list_empty(&eb->vmas)))
 722                 return 0;
 723
 724         vm = list_first_entry(&eb->vmas, struct i915_vma, exec_list)->vm;
 725
 726         /* We may process another execbuffer during the unlock... */
 727         while (!list_empty(&eb->vmas)) {
 728                 vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
 729                 list_del_init(&vma->exec_list);
 730                 i915_gem_execbuffer_unreserve_vma(vma);
 731                 drm_gem_object_unreference(&vma->obj->base);
 732         }
 733
 734         mutex_unlock(&dev->struct_mutex);
 735
 736         total = 0;
 737         for (i = 0; i < count; i++)
 738                 total += exec[i].relocation_count;
 739
 740         reloc_offset = drm_malloc_ab(count, sizeof(*reloc_offset));
 741         reloc = drm_malloc_ab(total, sizeof(*reloc));
 742         if (reloc == NULL || reloc_offset == NULL) {
 743                 drm_free_large(reloc);
 744                 drm_free_large(reloc_offset);
 745                 mutex_lock(&dev->struct_mutex);
 746                 return -ENOMEM;
 747         }
 748
 749         total = 0;
 750         for (i = 0; i < count; i++) {
 751                 struct drm_i915_gem_relocation_entry __user *user_relocs;
 752                 u64 invalid_offset = (u64)-1;
 753                 int j;
 754
 755                 user_relocs = to_user_ptr(exec[i].relocs_ptr);
 756
 757                 if (copy_from_user(reloc+total, user_relocs,
 758                                    exec[i].relocation_count * sizeof(*reloc))) {
 759                         ret = -EFAULT;
 760                         mutex_lock(&dev->struct_mutex);
 761                         goto err;
 762                 }
 763
 764                 /* As we do not update the known relocation offsets after
 765                  * relocating (due to the complexities in lock handling),
 766                  * we need to mark them as invalid now so that we force the
 767                  * relocation processing next time. Just in case the target
 768                  * object is evicted and then rebound into its old
 769                  * presumed_offset before the next execbuffer - if that
 770                  * happened we would make the mistake of assuming that the
 771                  * relocations were valid.
 772                  */
 773                 for (j = 0; j < exec[i].relocation_count; j++) {
 774                         if (copy_to_user(&user_relocs[j].presumed_offset,
 775                                          &invalid_offset,
 776                                          sizeof(invalid_offset))) {
 777                                 ret = -EFAULT;
 778                                 mutex_lock(&dev->struct_mutex);
 779                                 goto err;
 780                         }
 781                 }
 782
 783                 reloc_offset[i] = total;
 784                 total += exec[i].relocation_count;
 785         }
 786
 787         ret = i915_mutex_lock_interruptible(dev);
 788         if (ret) {
 789                 mutex_lock(&dev->struct_mutex);
 790                 goto err;
 791         }
 792
 793         /* reacquire the objects */
 794         eb_reset(eb);
 795         ret = eb_lookup_vmas(eb, exec, args, vm, file);
 796         if (ret)
 797                 goto err;
 798
 799         need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
 800         ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
 801         if (ret)
 802                 goto err;
 803
 804         list_for_each_entry(vma, &eb->vmas, exec_list) {
 805                 int offset = vma->exec_entry - exec;
 806                 ret = i915_gem_execbuffer_relocate_vma_slow(vma, eb,
 807                                                             reloc + reloc_offset[offset]);
 808                 if (ret)
 809                         goto err;
 810         }
 811
 812         /* Leave the user relocations as are, this is the painfully slow path,
 813          * and we want to avoid the complication of dropping the lock whilst
 814          * having buffers reserved in the aperture and so causing spurious
 815          * ENOSPC for random operations.
 816          */
 817
 818 err:
 819         drm_free_large(reloc);
 820         drm_free_large(reloc_offset);
 821         return ret;
 822 }
 823
 824 static int
 825 i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
 826                                 struct list_head *vmas)
 827 {
 828         struct i915_vma *vma;
 829         uint32_t flush_domains = 0;
 830         bool flush_chipset = false;
 831         int ret;
 832
 833         list_for_each_entry(vma, vmas, exec_list) {
 834                 struct drm_i915_gem_object *obj = vma->obj;
 835                 ret = i915_gem_object_sync(obj, ring);
 836                 if (ret)
 837                         return ret;
 838
 839                 if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
 840                         flush_chipset |= i915_gem_clflush_object(obj, false);
 841
 842                 flush_domains |= obj->base.write_domain;
 843         }
 844
 845         if (flush_chipset)
 846                 i915_gem_chipset_flush(ring->dev);
 847
 848         if (flush_domains & I915_GEM_DOMAIN_GTT)
 849                 wmb();
 850
 851         /* Unconditionally invalidate gpu caches and ensure that we do flush
 852          * any residual writes from the previous batch.
 853          */
 854         return intel_ring_invalidate_all_caches(ring);
 855 }
 856
 857 static bool
 858 i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
 859 {
 860         if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
 861                 return false;
 862
 863         return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
 864 }
 865
 866 static int
 867 validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
 868                    int count)
 869 {
 870         int i;
 871         unsigned relocs_total = 0;
 872         unsigned relocs_max = UINT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
 873
 874         for (i = 0; i < count; i++) {
 875                 char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
 876                 int length; /* limited by fault_in_pages_readable() */
 877
 878                 if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
 879                         return -EINVAL;
 880
 881                 /* First check for malicious input causing overflow in
 882                  * the worst case where we need to allocate the entire
 883                  * relocation tree as a single array.
 884                  */
 885                 if (exec[i].relocation_count > relocs_max - relocs_total)
 886                         return -EINVAL;
 887                 relocs_total += exec[i].relocation_count;
 888
 889                 length = exec[i].relocation_count *
 890                         sizeof(struct drm_i915_gem_relocation_entry);
 891                 /*
 892                  * We must check that the entire relocation array is safe
 893                  * to read, but since we may need to update the presumed
 894                  * offsets during execution, check for full write access.
 895                  */
 896                 if (!access_ok(VERIFY_WRITE, ptr, length))
 897                         return -EFAULT;
 898
 899                 if (likely(!i915_prefault_disable)) {
 900                         if (fault_in_multipages_readable(ptr, length))
 901                                 return -EFAULT;
 902                 }
 903         }
 904
 905         return 0;
 906 }
 907
 908 static struct i915_hw_context *
 909 i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
 910                           struct intel_ring_buffer *ring, const u32 ctx_id)
 911 {
 912         struct i915_hw_context *ctx = NULL;
 913         struct i915_ctx_hang_stats *hs;
 914
 915         if (ring->id != RCS && ctx_id != DEFAULT_CONTEXT_ID)
 916                 return ERR_PTR(-EINVAL);
 917
 918         ctx = i915_gem_context_get(file->driver_priv, ctx_id);
 919         if (IS_ERR(ctx))
 920                 return ctx;
 921
 922         hs = &ctx->hang_stats;
 923         if (hs->banned) {
 924                 DRM_DEBUG("Context %u tried to submit while banned\n", ctx_id);
 925                 return ERR_PTR(-EIO);
 926         }
 927
 928         return ctx;
 929 }
 930
 931 static void
 932 i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 933                                    struct intel_ring_buffer *ring)
 934 {
 935         struct i915_vma *vma;
 936
 937         list_for_each_entry(vma, vmas, exec_list) {
 938                 struct drm_i915_gem_object *obj = vma->obj;
 939                 u32 old_read = obj->base.read_domains;
 940                 u32 old_write = obj->base.write_domain;
 941
 942                 obj->base.write_domain = obj->base.pending_write_domain;
 943                 if (obj->base.write_domain == 0)
 944                         obj->base.pending_read_domains |= obj->base.read_domains;
 945                 obj->base.read_domains = obj->base.pending_read_domains;
 946                 obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
 947
 948                 i915_vma_move_to_active(vma, ring);
 949                 if (obj->base.write_domain) {
 950                         obj->dirty = 1;
 951                         obj->last_write_seqno = intel_ring_get_seqno(ring);
 952                         /* check for potential scanout */
 953                         if (i915_gem_obj_ggtt_bound(obj) &&
 954                             i915_gem_obj_to_ggtt(obj)->pin_count)
 955                                 intel_mark_fb_busy(obj, ring);
 956                 }
 957
 958                 trace_i915_gem_object_change_domain(obj, old_read, old_write);
 959         }
 960 }
 961
 962 static void
 963 i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 964                                     struct drm_file *file,
 965                                     struct intel_ring_buffer *ring,
 966                                     struct drm_i915_gem_object *obj)
 967 {
 968         /* Unconditionally force add_request to emit a full flush. */
 969         ring->gpu_caches_dirty = true;
 970
 971         /* Add a breadcrumb for the completion of the batch buffer */
 972         (void)__i915_add_request(ring, file, obj, NULL);
 973 }
 974
 975 static int
 976 i915_reset_gen7_sol_offsets(struct drm_device *dev,
 977                             struct intel_ring_buffer *ring)
 978 {
 979         drm_i915_private_t *dev_priv = dev->dev_private;
 980         int ret, i;
 981
 982         if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
 983                 return 0;
 984
 985         ret = intel_ring_begin(ring, 4 * 3);
 986         if (ret)
 987                 return ret;
 988
 989         for (i = 0; i < 4; i++) {
 990                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
 991                 intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
 992                 intel_ring_emit(ring, 0);
 993         }
 994
 995         intel_ring_advance(ring);
 996
 997         return 0;
 998 }
 999
1000 static int
1001 i915_gem_do_execbuffer(struct drm_device *dev, void *data,
1002                        struct drm_file *file,
1003                        struct drm_i915_gem_execbuffer2 *args,
1004                        struct drm_i915_gem_exec_object2 *exec)
1005 {
1006         drm_i915_private_t *dev_priv = dev->dev_private;
1007         struct eb_vmas *eb;
1008         struct drm_i915_gem_object *batch_obj;
1009         struct drm_clip_rect *cliprects = NULL;
1010         struct intel_ring_buffer *ring;
1011         struct i915_hw_context *ctx;
1012         struct i915_address_space *vm;
1013         const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
1014         u32 exec_start = args->batch_start_offset, exec_len;
1015         u32 mask, flags;
1016         int ret, mode, i;
1017         bool need_relocs;
1018
1019         if (!i915_gem_check_execbuffer(args))
1020                 return -EINVAL;
1021
1022         ret = validate_exec_list(exec, args->buffer_count);
1023         if (ret)
1024                 return ret;
1025
1026         flags = 0;
1027         if (args->flags & I915_EXEC_SECURE) {
1028                 if (!file->is_master || !capable(CAP_SYS_ADMIN))
1029                     return -EPERM;
1030
1031                 flags |= I915_DISPATCH_SECURE;
1032         }
1033         if (args->flags & I915_EXEC_IS_PINNED)
1034                 flags |= I915_DISPATCH_PINNED;
1035
1036         if ((args->flags & I915_EXEC_RING_MASK) > I915_NUM_RINGS) {
1037                 DRM_DEBUG("execbuf with unknown ring: %d\n",
1038                           (int)(args->flags & I915_EXEC_RING_MASK));
1039                 return -EINVAL;
1040         }
1041
1042         if ((args->flags & I915_EXEC_RING_MASK) == I915_EXEC_DEFAULT)
1043                 ring = &dev_priv->ring[RCS];
1044         else
1045                 ring = &dev_priv->ring[(args->flags & I915_EXEC_RING_MASK) - 1];
1046
1047         if (!intel_ring_initialized(ring)) {
1048                 DRM_DEBUG("execbuf with invalid ring: %d\n",
1049                           (int)(args->flags & I915_EXEC_RING_MASK));
1050                 return -EINVAL;
1051         }
1052
1053         mode = args->flags & I915_EXEC_CONSTANTS_MASK;
1054         mask = I915_EXEC_CONSTANTS_MASK;
1055         switch (mode) {
1056         case I915_EXEC_CONSTANTS_REL_GENERAL:
1057         case I915_EXEC_CONSTANTS_ABSOLUTE:
1058         case I915_EXEC_CONSTANTS_REL_SURFACE:
1059                 if (ring == &dev_priv->ring[RCS] &&
1060                     mode != dev_priv->relative_constants_mode) {
1061                         if (INTEL_INFO(dev)->gen < 4)
1062                                 return -EINVAL;
1063
1064                         if (INTEL_INFO(dev)->gen > 5 &&
1065                             mode == I915_EXEC_CONSTANTS_REL_SURFACE)
1066                                 return -EINVAL;
1067
1068                         /* The HW changed the meaning on this bit on gen6 */
1069                         if (INTEL_INFO(dev)->gen >= 6)
1070                                 mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
1071                 }
1072                 break;
1073         default:
1074                 DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
1075                 return -EINVAL;
1076         }
1077
1078         if (args->buffer_count < 1) {
1079                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1080                 return -EINVAL;
1081         }
1082
1083         if (args->num_cliprects != 0) {
1084                 if (ring != &dev_priv->ring[RCS]) {
1085                         DRM_DEBUG("clip rectangles are only valid with the render ring\n");
1086                         return -EINVAL;
1087                 }
1088
1089                 if (INTEL_INFO(dev)->gen >= 5) {
1090                         DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
1091                         return -EINVAL;
1092                 }
1093
1094                 if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
1095                         DRM_DEBUG("execbuf with %u cliprects\n",
1096                                   args->num_cliprects);
1097                         return -EINVAL;
1098                 }
1099
1100                 cliprects = kcalloc(args->num_cliprects,
1101                                     sizeof(*cliprects),
1102                                     GFP_KERNEL);
1103                 if (cliprects == NULL) {
1104                         ret = -ENOMEM;
1105                         goto pre_mutex_err;
1106                 }
1107
1108                 if (copy_from_user(cliprects,
1109                                    to_user_ptr(args->cliprects_ptr),
1110                                    sizeof(*cliprects)*args->num_cliprects)) {
1111                         ret = -EFAULT;
1112                         goto pre_mutex_err;
1113                 }
1114         }
1115
1116         intel_runtime_pm_get(dev_priv);
1117
1118         ret = i915_mutex_lock_interruptible(dev);
1119         if (ret)
1120                 goto pre_mutex_err;
1121
1122         if (dev_priv->ums.mm_suspended) {
1123                 mutex_unlock(&dev->struct_mutex);
1124                 ret = -EBUSY;
1125                 goto pre_mutex_err;
1126         }
1127
1128         ctx = i915_gem_validate_context(dev, file, ring, ctx_id);
1129         if (IS_ERR(ctx)) {
1130                 mutex_unlock(&dev->struct_mutex);
1131                 ret = PTR_ERR(ctx);
1132                 goto pre_mutex_err;
1133         }
1134
1135         i915_gem_context_reference(ctx);
1136
1137         vm = ctx->vm;
1138         if (!USES_FULL_PPGTT(dev))
1139                 vm = &dev_priv->gtt.base;
1140
1141         eb = eb_create(args);
1142         if (eb == NULL) {
1143                 mutex_unlock(&dev->struct_mutex);
1144                 ret = -ENOMEM;
1145                 goto pre_mutex_err;
1146         }
1147
1148         /* Look up object handles */
1149         ret = eb_lookup_vmas(eb, exec, args, vm, file);
1150         if (ret)
1151                 goto err;
1152
1153         /* take note of the batch buffer before we might reorder the lists */
1154         batch_obj = list_entry(eb->vmas.prev, struct i915_vma, exec_list)->obj;
1155
1156         /* Move the objects en-masse into the GTT, evicting if necessary. */
1157         need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
1158         ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
1159         if (ret)
1160                 goto err;
1161
1162         /* The objects are in their final locations, apply the relocations. */
1163         if (need_relocs)
1164                 ret = i915_gem_execbuffer_relocate(eb);
1165         if (ret) {
1166                 if (ret == -EFAULT) {
1167                         ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
1168                                                                 eb, exec);
1169                         BUG_ON(!mutex_is_locked(&dev->struct_mutex));
1170                 }
1171                 if (ret)
1172                         goto err;
1173         }
1174
1175         /* Set the pending read domains for the batch buffer to COMMAND */
1176         if (batch_obj->base.pending_write_domain) {
1177                 DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
1178                 ret = -EINVAL;
1179                 goto err;
1180         }
1181         batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
1182
1183         /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
1184          * batch" bit. Hence we need to pin secure batches into the global gtt.
1185          * hsw should have this fixed, but bdw mucks it up again. */
1186         if (flags & I915_DISPATCH_SECURE &&
1187             !batch_obj->has_global_gtt_mapping) {
1188                 /* When we have multiple VMs, we'll need to make sure that we
1189                  * allocate space first */
1190                 struct i915_vma *vma = i915_gem_obj_to_ggtt(batch_obj);
1191                 BUG_ON(!vma);
1192                 vma->bind_vma(vma, batch_obj->cache_level, GLOBAL_BIND);
1193         }
1194
1195         if (flags & I915_DISPATCH_SECURE)
1196                 exec_start += i915_gem_obj_ggtt_offset(batch_obj);
1197         else
1198                 exec_start += i915_gem_obj_offset(batch_obj, vm);
1199
1200         ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas);
1201         if (ret)
1202                 goto err;
1203
1204         ret = i915_switch_context(ring, file, ctx);
1205         if (ret)
1206                 goto err;
1207
1208         if (ring == &dev_priv->ring[RCS] &&
1209             mode != dev_priv->relative_constants_mode) {
1210                 ret = intel_ring_begin(ring, 4);
1211                 if (ret)
1212                                 goto err;
1213
1214                 intel_ring_emit(ring, MI_NOOP);
1215                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
1216                 intel_ring_emit(ring, INSTPM);
1217                 intel_ring_emit(ring, mask << 16 | mode);
1218                 intel_ring_advance(ring);
1219
1220                 dev_priv->relative_constants_mode = mode;
1221         }
1222
1223         if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
1224                 ret = i915_reset_gen7_sol_offsets(dev, ring);
1225                 if (ret)
1226                         goto err;
1227         }
1228
1229
1230         exec_len = args->batch_len;
1231         if (cliprects) {
1232                 for (i = 0; i < args->num_cliprects; i++) {
1233                         ret = i915_emit_box(dev, &cliprects[i],
1234                                             args->DR1, args->DR4);
1235                         if (ret)
1236                                 goto err;
1237
1238                         ret = ring->dispatch_execbuffer(ring,
1239                                                         exec_start, exec_len,
1240                                                         flags);
1241                         if (ret)
1242                                 goto err;
1243                 }
1244         } else {
1245                 ret = ring->dispatch_execbuffer(ring,
1246                                                 exec_start, exec_len,
1247                                                 flags);
1248                 if (ret)
1249                         goto err;
1250         }
1251
1252         trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
1253
1254         i915_gem_execbuffer_move_to_active(&eb->vmas, ring);
1255         i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
1256
1257 err:
1258         /* the request owns the ref now */
1259         i915_gem_context_unreference(ctx);
1260         eb_destroy(eb);
1261
1262         mutex_unlock(&dev->struct_mutex);
1263
1264 pre_mutex_err:
1265         kfree(cliprects);
1266
1267         /* intel_gpu_busy should also get a ref, so it will free when the device
1268          * is really idle. */
1269         intel_runtime_pm_put(dev_priv);
1270         return ret;
1271 }
1272
1273 /*
1274  * Legacy execbuffer just creates an exec2 list from the original exec object
1275  * list array and passes it to the real function.
1276  */
1277 int
1278 i915_gem_execbuffer(struct drm_device *dev, void *data,
1279                     struct drm_file *file)
1280 {
1281         struct drm_i915_gem_execbuffer *args = data;
1282         struct drm_i915_gem_execbuffer2 exec2;
1283         struct drm_i915_gem_exec_object *exec_list = NULL;
1284         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1285         int ret, i;
1286
1287         if (args->buffer_count < 1) {
1288                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1289                 return -EINVAL;
1290         }
1291
1292         /* Copy in the exec list from userland */
1293         exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
1294         exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
1295         if (exec_list == NULL || exec2_list == NULL) {
1296                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1297                           args->buffer_count);
1298                 drm_free_large(exec_list);
1299                 drm_free_large(exec2_list);
1300                 return -ENOMEM;
1301         }
1302         ret = copy_from_user(exec_list,
1303                              to_user_ptr(args->buffers_ptr),
1304                              sizeof(*exec_list) * args->buffer_count);
1305         if (ret != 0) {
1306                 DRM_DEBUG("copy %d exec entries failed %d\n",
1307                           args->buffer_count, ret);
1308                 drm_free_large(exec_list);
1309                 drm_free_large(exec2_list);
1310                 return -EFAULT;
1311         }
1312
1313         for (i = 0; i < args->buffer_count; i++) {
1314                 exec2_list[i].handle = exec_list[i].handle;
1315                 exec2_list[i].relocation_count = exec_list[i].relocation_count;
1316                 exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
1317                 exec2_list[i].alignment = exec_list[i].alignment;
1318                 exec2_list[i].offset = exec_list[i].offset;
1319                 if (INTEL_INFO(dev)->gen < 4)
1320                         exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
1321                 else
1322                         exec2_list[i].flags = 0;
1323         }
1324
1325         exec2.buffers_ptr = args->buffers_ptr;
1326         exec2.buffer_count = args->buffer_count;
1327         exec2.batch_start_offset = args->batch_start_offset;
1328         exec2.batch_len = args->batch_len;
1329         exec2.DR1 = args->DR1;
1330         exec2.DR4 = args->DR4;
1331         exec2.num_cliprects = args->num_cliprects;
1332         exec2.cliprects_ptr = args->cliprects_ptr;
1333         exec2.flags = I915_EXEC_RENDER;
1334         i915_execbuffer2_set_context_id(exec2, 0);
1335
1336         ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list);
1337         if (!ret) {
1338                 /* Copy the new buffer offsets back to the user's exec list. */
1339                 for (i = 0; i < args->buffer_count; i++)
1340                         exec_list[i].offset = exec2_list[i].offset;
1341                 /* ... and back out to userspace */
1342                 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1343                                    exec_list,
1344                                    sizeof(*exec_list) * args->buffer_count);
1345                 if (ret) {
1346                         ret = -EFAULT;
1347                         DRM_DEBUG("failed to copy %d exec entries "
1348                                   "back to user (%d)\n",
1349                                   args->buffer_count, ret);
1350                 }
1351         }
1352
1353         drm_free_large(exec_list);
1354         drm_free_large(exec2_list);
1355         return ret;
1356 }
1357
1358 int
1359 i915_gem_execbuffer2(struct drm_device *dev, void *data,
1360                      struct drm_file *file)
1361 {
1362         struct drm_i915_gem_execbuffer2 *args = data;
1363         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1364         int ret;
1365
1366         if (args->buffer_count < 1 ||
1367             args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
1368                 DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
1369                 return -EINVAL;
1370         }
1371
1372         exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
1373                              GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
1374         if (exec2_list == NULL)
1375                 exec2_list = drm_malloc_ab(sizeof(*exec2_list),
1376                                            args->buffer_count);
1377         if (exec2_list == NULL) {
1378                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1379                           args->buffer_count);
1380                 return -ENOMEM;
1381         }
1382         ret = copy_from_user(exec2_list,
1383                              to_user_ptr(args->buffers_ptr),
1384                              sizeof(*exec2_list) * args->buffer_count);
1385         if (ret != 0) {
1386                 DRM_DEBUG("copy %d exec entries failed %d\n",
1387                           args->buffer_count, ret);
1388                 drm_free_large(exec2_list);
1389                 return -EFAULT;
1390         }
1391
1392         ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list);
1393         if (!ret) {
1394                 /* Copy the new buffer offsets back to the user's exec list. */
1395                 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1396                                    exec2_list,
1397                                    sizeof(*exec2_list) * args->buffer_count);
1398                 if (ret) {
1399                         ret = -EFAULT;
1400                         DRM_DEBUG("failed to copy %d exec entries "
1401                                   "back to user (%d)\n",
1402                                   args->buffer_count, ret);
1403                 }
1404         }
1405
1406         drm_free_large(exec2_list);
1407         return ret;
1408 }