2 * Copyright(c) 2011-2015 Intel Corporation. All rights reserved.
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11 * The above copyright notice and this permission notice (including the next
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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24 #include "intel_drv.h"
25 #include "i915_vgpu.h"
28 * DOC: Intel GVT-g guest support
30 * Intel GVT-g is a graphics virtualization technology which shares the
31 * GPU among multiple virtual machines on a time-sharing basis. Each
32 * virtual machine is presented a virtual GPU (vGPU), which has equivalent
33 * features as the underlying physical GPU (pGPU), so i915 driver can run
34 * seamlessly in a virtual machine. This file provides vGPU specific
35 * optimizations when running in a virtual machine, to reduce the complexity
36 * of vGPU emulation and to improve the overall performance.
38 * A primary function introduced here is so-called "address space ballooning"
39 * technique. Intel GVT-g partitions global graphics memory among multiple VMs,
40 * so each VM can directly access a portion of the memory without hypervisor's
41 * intervention, e.g. filling textures or queuing commands. However with the
42 * partitioning an unmodified i915 driver would assume a smaller graphics
43 * memory starting from address ZERO, then requires vGPU emulation module to
44 * translate the graphics address between 'guest view' and 'host view', for
45 * all registers and command opcodes which contain a graphics memory address.
46 * To reduce the complexity, Intel GVT-g introduces "address space ballooning",
47 * by telling the exact partitioning knowledge to each guest i915 driver, which
48 * then reserves and prevents non-allocated portions from allocation. Thus vGPU
49 * emulation module only needs to scan and validate graphics addresses without
50 * complexity of address translation.
55 * i915_check_vgpu - detect virtual GPU
58 * This function is called at the initialization stage, to detect whether
61 void i915_check_vgpu(struct drm_i915_private *dev_priv)
66 BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
68 if (!IS_HASWELL(dev_priv))
71 magic = __raw_i915_read64(dev_priv, vgtif_reg(magic));
72 if (magic != VGT_MAGIC)
75 version = INTEL_VGT_IF_VERSION_ENCODE(
76 __raw_i915_read16(dev_priv, vgtif_reg(version_major)),
77 __raw_i915_read16(dev_priv, vgtif_reg(version_minor)));
78 if (version != INTEL_VGT_IF_VERSION) {
79 DRM_INFO("VGT interface version mismatch!\n");
83 dev_priv->vgpu.active = true;
84 DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
87 struct _balloon_info_ {
89 * There are up to 2 regions per mappable/unmappable graphic
90 * memory that might be ballooned. Here, index 0/1 is for mappable
91 * graphic memory, 2/3 for unmappable graphic memory.
93 struct drm_mm_node space[4];
96 static struct _balloon_info_ bl_info;
99 * intel_vgt_deballoon - deballoon reserved graphics address trunks
101 * This function is called to deallocate the ballooned-out graphic memory, when
102 * driver is unloaded or when ballooning fails.
104 void intel_vgt_deballoon(void)
108 DRM_DEBUG("VGT deballoon.\n");
110 for (i = 0; i < 4; i++) {
111 if (bl_info.space[i].allocated)
112 drm_mm_remove_node(&bl_info.space[i]);
115 memset(&bl_info, 0, sizeof(bl_info));
118 static int vgt_balloon_space(struct drm_mm *mm,
119 struct drm_mm_node *node,
120 unsigned long start, unsigned long end)
122 unsigned long size = end - start;
127 DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
128 start, end, size / 1024);
133 return drm_mm_reserve_node(mm, node);
137 * intel_vgt_balloon - balloon out reserved graphics address trunks
138 * @dev_priv: i915 device
140 * This function is called at the initialization stage, to balloon out the
141 * graphic address space allocated to other vGPUs, by marking these spaces as
142 * reserved. The ballooning related knowledge(starting address and size of
143 * the mappable/unmappable graphic memory) is described in the vgt_if structure
144 * in a reserved mmio range.
146 * To give an example, the drawing below depicts one typical scenario after
147 * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned
148 * out each for the mappable and the non-mappable part. From the vGPU1 point of
149 * view, the total size is the same as the physical one, with the start address
150 * of its graphic space being zero. Yet there are some portions ballooned out(
151 * the shadow part, which are marked as reserved by drm allocator). From the
152 * host point of view, the graphic address space is partitioned by multiple
153 * vGPUs in different VMs.
155 * vGPU1 view Host view
156 * 0 ------> +-----------+ +-----------+
157 * ^ |///////////| | vGPU3 |
158 * | |///////////| +-----------+
159 * | |///////////| | vGPU2 |
160 * | +-----------+ +-----------+
161 * mappable GM | available | ==> | vGPU1 |
162 * | +-----------+ +-----------+
163 * | |///////////| | |
164 * v |///////////| | Host |
165 * +=======+===========+ +===========+
166 * ^ |///////////| | vGPU3 |
167 * | |///////////| +-----------+
168 * | |///////////| | vGPU2 |
169 * | +-----------+ +-----------+
170 * unmappable GM | available | ==> | vGPU1 |
171 * | +-----------+ +-----------+
172 * | |///////////| | |
173 * | |///////////| | Host |
174 * v |///////////| | |
175 * total GM size ------> +-----------+ +-----------+
178 * zero on success, non-zero if configuration invalid or ballooning failed
180 int intel_vgt_balloon(struct drm_device *dev)
182 struct drm_i915_private *dev_priv = to_i915(dev);
183 struct i915_ggtt *ggtt = &dev_priv->ggtt;
184 unsigned long ggtt_end = ggtt->base.start + ggtt->base.total;
186 unsigned long mappable_base, mappable_size, mappable_end;
187 unsigned long unmappable_base, unmappable_size, unmappable_end;
190 mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
191 mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size));
192 unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
193 unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size));
195 mappable_end = mappable_base + mappable_size;
196 unmappable_end = unmappable_base + unmappable_size;
198 DRM_INFO("VGT ballooning configuration:\n");
199 DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n",
200 mappable_base, mappable_size / 1024);
201 DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n",
202 unmappable_base, unmappable_size / 1024);
204 if (mappable_base < ggtt->base.start ||
205 mappable_end > ggtt->mappable_end ||
206 unmappable_base < ggtt->mappable_end ||
207 unmappable_end > ggtt_end) {
208 DRM_ERROR("Invalid ballooning configuration!\n");
212 /* Unmappable graphic memory ballooning */
213 if (unmappable_base > ggtt->mappable_end) {
214 ret = vgt_balloon_space(&ggtt->base.mm,
224 * No need to partition out the last physical page,
225 * because it is reserved to the guard page.
227 if (unmappable_end < ggtt_end - PAGE_SIZE) {
228 ret = vgt_balloon_space(&ggtt->base.mm,
231 ggtt_end - PAGE_SIZE);
236 /* Mappable graphic memory ballooning */
237 if (mappable_base > ggtt->base.start) {
238 ret = vgt_balloon_space(&ggtt->base.mm,
240 ggtt->base.start, mappable_base);
246 if (mappable_end < ggtt->mappable_end) {
247 ret = vgt_balloon_space(&ggtt->base.mm,
256 DRM_INFO("VGT balloon successfully\n");
260 DRM_ERROR("VGT balloon fail\n");
261 intel_vgt_deballoon();