drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include <drm/drmP.h>
  35 #include <drm/drm_crtc.h>
  36 #include <drm/drm_edid.h>
  37 #include "intel_drv.h"
  38 #include <drm/i915_drm.h>
  39 #include "i915_drv.h"
  40 #include <linux/acpi.h>
  41
  42 /* Private structure for the integrated LVDS support */
  43 struct intel_lvds_connector {
  44         struct intel_connector base;
  45
  46         struct notifier_block lid_notifier;
  47 };
  48
  49 struct intel_lvds_encoder {
  50         struct intel_encoder base;
  51
  52         bool is_dual_link;
  53         u32 reg;
  54         u32 a3_power;
  55
  56         struct intel_lvds_connector *attached_connector;
  57 };
  58
  59 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  60 {
  61         return container_of(encoder, struct intel_lvds_encoder, base.base);
  62 }
  63
  64 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  65 {
  66         return container_of(connector, struct intel_lvds_connector, base.base);
  67 }
  68
  69 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  70                                     enum pipe *pipe)
  71 {
  72         struct drm_device *dev = encoder->base.dev;
  73         struct drm_i915_private *dev_priv = dev->dev_private;
  74         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  75         enum intel_display_power_domain power_domain;
  76         u32 tmp;
  77
  78         power_domain = intel_display_port_power_domain(encoder);
  79         if (!intel_display_power_enabled(dev_priv, power_domain))
  80                 return false;
  81
  82         tmp = I915_READ(lvds_encoder->reg);
  83
  84         if (!(tmp & LVDS_PORT_EN))
  85                 return false;
  86
  87         if (HAS_PCH_CPT(dev))
  88                 *pipe = PORT_TO_PIPE_CPT(tmp);
  89         else
  90                 *pipe = PORT_TO_PIPE(tmp);
  91
  92         return true;
  93 }
  94
  95 static void intel_lvds_get_config(struct intel_encoder *encoder,
  96                                   struct intel_crtc_config *pipe_config)
  97 {
  98         struct drm_device *dev = encoder->base.dev;
  99         struct drm_i915_private *dev_priv = dev->dev_private;
 100         u32 lvds_reg, tmp, flags = 0;
 101         int dotclock;
 102
 103         if (HAS_PCH_SPLIT(dev))
 104                 lvds_reg = PCH_LVDS;
 105         else
 106                 lvds_reg = LVDS;
 107
 108         tmp = I915_READ(lvds_reg);
 109         if (tmp & LVDS_HSYNC_POLARITY)
 110                 flags |= DRM_MODE_FLAG_NHSYNC;
 111         else
 112                 flags |= DRM_MODE_FLAG_PHSYNC;
 113         if (tmp & LVDS_VSYNC_POLARITY)
 114                 flags |= DRM_MODE_FLAG_NVSYNC;
 115         else
 116                 flags |= DRM_MODE_FLAG_PVSYNC;
 117
 118         pipe_config->adjusted_mode.flags |= flags;
 119
 120         /* gen2/3 store dither state in pfit control, needs to match */
 121         if (INTEL_INFO(dev)->gen < 4) {
 122                 tmp = I915_READ(PFIT_CONTROL);
 123
 124                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
 125         }
 126
 127         dotclock = pipe_config->port_clock;
 128
 129         if (HAS_PCH_SPLIT(dev_priv->dev))
 130                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 131
 132         pipe_config->adjusted_mode.crtc_clock = dotclock;
 133 }
 134
 135 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
 136 {
 137         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 138         struct drm_device *dev = encoder->base.dev;
 139         struct drm_i915_private *dev_priv = dev->dev_private;
 140         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 141         const struct drm_display_mode *adjusted_mode =
 142                 &crtc->config.adjusted_mode;
 143         int pipe = crtc->pipe;
 144         u32 temp;
 145
 146         if (HAS_PCH_SPLIT(dev)) {
 147                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
 148                 assert_shared_dpll_disabled(dev_priv,
 149                                             intel_crtc_to_shared_dpll(crtc));
 150         } else {
 151                 assert_pll_disabled(dev_priv, pipe);
 152         }
 153
 154         temp = I915_READ(lvds_encoder->reg);
 155         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 156
 157         if (HAS_PCH_CPT(dev)) {
 158                 temp &= ~PORT_TRANS_SEL_MASK;
 159                 temp |= PORT_TRANS_SEL_CPT(pipe);
 160         } else {
 161                 if (pipe == 1) {
 162                         temp |= LVDS_PIPEB_SELECT;
 163                 } else {
 164                         temp &= ~LVDS_PIPEB_SELECT;
 165                 }
 166         }
 167
 168         /* set the corresponsding LVDS_BORDER bit */
 169         temp &= ~LVDS_BORDER_ENABLE;
 170         temp |= crtc->config.gmch_pfit.lvds_border_bits;
 171         /* Set the B0-B3 data pairs corresponding to whether we're going to
 172          * set the DPLLs for dual-channel mode or not.
 173          */
 174         if (lvds_encoder->is_dual_link)
 175                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 176         else
 177                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 178
 179         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 180          * appropriately here, but we need to look more thoroughly into how
 181          * panels behave in the two modes. For now, let's just maintain the
 182          * value we got from the BIOS.
 183          */
 184          temp &= ~LVDS_A3_POWER_MASK;
 185          temp |= lvds_encoder->a3_power;
 186
 187         /* Set the dithering flag on LVDS as needed, note that there is no
 188          * special lvds dither control bit on pch-split platforms, dithering is
 189          * only controlled through the PIPECONF reg. */
 190         if (INTEL_INFO(dev)->gen == 4) {
 191                 /* Bspec wording suggests that LVDS port dithering only exists
 192                  * for 18bpp panels. */
 193                 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
 194                         temp |= LVDS_ENABLE_DITHER;
 195                 else
 196                         temp &= ~LVDS_ENABLE_DITHER;
 197         }
 198         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 199         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 200                 temp |= LVDS_HSYNC_POLARITY;
 201         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 202                 temp |= LVDS_VSYNC_POLARITY;
 203
 204         I915_WRITE(lvds_encoder->reg, temp);
 205 }
 206
 207 /**
 208  * Sets the power state for the panel.
 209  */
 210 static void intel_enable_lvds(struct intel_encoder *encoder)
 211 {
 212         struct drm_device *dev = encoder->base.dev;
 213         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 214         struct intel_connector *intel_connector =
 215                 &lvds_encoder->attached_connector->base;
 216         struct drm_i915_private *dev_priv = dev->dev_private;
 217         u32 ctl_reg, stat_reg;
 218
 219         if (HAS_PCH_SPLIT(dev)) {
 220                 ctl_reg = PCH_PP_CONTROL;
 221                 stat_reg = PCH_PP_STATUS;
 222         } else {
 223                 ctl_reg = PP_CONTROL;
 224                 stat_reg = PP_STATUS;
 225         }
 226
 227         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 228
 229         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 230         POSTING_READ(lvds_encoder->reg);
 231         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 232                 DRM_ERROR("timed out waiting for panel to power on\n");
 233
 234         intel_panel_enable_backlight(intel_connector);
 235 }
 236
 237 static void intel_disable_lvds(struct intel_encoder *encoder)
 238 {
 239         struct drm_device *dev = encoder->base.dev;
 240         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 241         struct intel_connector *intel_connector =
 242                 &lvds_encoder->attached_connector->base;
 243         struct drm_i915_private *dev_priv = dev->dev_private;
 244         u32 ctl_reg, stat_reg;
 245
 246         if (HAS_PCH_SPLIT(dev)) {
 247                 ctl_reg = PCH_PP_CONTROL;
 248                 stat_reg = PCH_PP_STATUS;
 249         } else {
 250                 ctl_reg = PP_CONTROL;
 251                 stat_reg = PP_STATUS;
 252         }
 253
 254         intel_panel_disable_backlight(intel_connector);
 255
 256         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 257         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 258                 DRM_ERROR("timed out waiting for panel to power off\n");
 259
 260         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 261         POSTING_READ(lvds_encoder->reg);
 262 }
 263
 264 static enum drm_mode_status
 265 intel_lvds_mode_valid(struct drm_connector *connector,
 266                       struct drm_display_mode *mode)
 267 {
 268         struct intel_connector *intel_connector = to_intel_connector(connector);
 269         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 270
 271         if (mode->hdisplay > fixed_mode->hdisplay)
 272                 return MODE_PANEL;
 273         if (mode->vdisplay > fixed_mode->vdisplay)
 274                 return MODE_PANEL;
 275
 276         return MODE_OK;
 277 }
 278
 279 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 280                                       struct intel_crtc_config *pipe_config)
 281 {
 282         struct drm_device *dev = intel_encoder->base.dev;
 283         struct intel_lvds_encoder *lvds_encoder =
 284                 to_lvds_encoder(&intel_encoder->base);
 285         struct intel_connector *intel_connector =
 286                 &lvds_encoder->attached_connector->base;
 287         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
 288         struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
 289         unsigned int lvds_bpp;
 290
 291         /* Should never happen!! */
 292         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 293                 DRM_ERROR("Can't support LVDS on pipe A\n");
 294                 return false;
 295         }
 296
 297         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
 298                 lvds_bpp = 8*3;
 299         else
 300                 lvds_bpp = 6*3;
 301
 302         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 303                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 304                               pipe_config->pipe_bpp, lvds_bpp);
 305                 pipe_config->pipe_bpp = lvds_bpp;
 306         }
 307
 308         /*
 309          * We have timings from the BIOS for the panel, put them in
 310          * to the adjusted mode.  The CRTC will be set up for this mode,
 311          * with the panel scaling set up to source from the H/VDisplay
 312          * of the original mode.
 313          */
 314         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 315                                adjusted_mode);
 316
 317         if (HAS_PCH_SPLIT(dev)) {
 318                 pipe_config->has_pch_encoder = true;
 319
 320                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 321                                         intel_connector->panel.fitting_mode);
 322         } else {
 323                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 324                                          intel_connector->panel.fitting_mode);
 325
 326         }
 327
 328         /*
 329          * XXX: It would be nice to support lower refresh rates on the
 330          * panels to reduce power consumption, and perhaps match the
 331          * user's requested refresh rate.
 332          */
 333
 334         return true;
 335 }
 336
 337 /**
 338  * Detect the LVDS connection.
 339  *
 340  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 341  * connected and closed means disconnected.  We also send hotplug events as
 342  * needed, using lid status notification from the input layer.
 343  */
 344 static enum drm_connector_status
 345 intel_lvds_detect(struct drm_connector *connector, bool force)
 346 {
 347         struct drm_device *dev = connector->dev;
 348         enum drm_connector_status status;
 349
 350         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 351                       connector->base.id, connector->name);
 352
 353         status = intel_panel_detect(dev);
 354         if (status != connector_status_unknown)
 355                 return status;
 356
 357         return connector_status_connected;
 358 }
 359
 360 /**
 361  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 362  */
 363 static int intel_lvds_get_modes(struct drm_connector *connector)
 364 {
 365         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 366         struct drm_device *dev = connector->dev;
 367         struct drm_display_mode *mode;
 368
 369         /* use cached edid if we have one */
 370         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 371                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 372
 373         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 374         if (mode == NULL)
 375                 return 0;
 376
 377         drm_mode_probed_add(connector, mode);
 378         return 1;
 379 }
 380
 381 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 382 {
 383         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 384         return 1;
 385 }
 386
 387 /* The GPU hangs up on these systems if modeset is performed on LID open */
 388 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 389         {
 390                 .callback = intel_no_modeset_on_lid_dmi_callback,
 391                 .ident = "Toshiba Tecra A11",
 392                 .matches = {
 393                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 394                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 395                 },
 396         },
 397
 398         { }     /* terminating entry */
 399 };
 400
 401 /*
 402  * Lid events. Note the use of 'modeset':
 403  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 404  *    and set it to MODESET_DONE on open
 405  *  - we use it as a "only once" bit (ie we ignore
 406  *    duplicate events where it was already properly set)
 407  *  - the suspend/resume paths will set it to
 408  *    MODESET_SUSPENDED and ignore the lid open event,
 409  *    because they restore the mode ("lid open").
 410  */
 411 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 412                             void *unused)
 413 {
 414         struct intel_lvds_connector *lvds_connector =
 415                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 416         struct drm_connector *connector = &lvds_connector->base.base;
 417         struct drm_device *dev = connector->dev;
 418         struct drm_i915_private *dev_priv = dev->dev_private;
 419
 420         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 421                 return NOTIFY_OK;
 422
 423         mutex_lock(&dev_priv->modeset_restore_lock);
 424         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 425                 goto exit;
 426         /*
 427          * check and update the status of LVDS connector after receiving
 428          * the LID nofication event.
 429          */
 430         connector->status = connector->funcs->detect(connector, false);
 431
 432         /* Don't force modeset on machines where it causes a GPU lockup */
 433         if (dmi_check_system(intel_no_modeset_on_lid))
 434                 goto exit;
 435         if (!acpi_lid_open()) {
 436                 /* do modeset on next lid open event */
 437                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 438                 goto exit;
 439         }
 440
 441         if (dev_priv->modeset_restore == MODESET_DONE)
 442                 goto exit;
 443
 444         /*
 445          * Some old platform's BIOS love to wreak havoc while the lid is closed.
 446          * We try to detect this here and undo any damage. The split for PCH
 447          * platforms is rather conservative and a bit arbitrary expect that on
 448          * those platforms VGA disabling requires actual legacy VGA I/O access,
 449          * and as part of the cleanup in the hw state restore we also redisable
 450          * the vga plane.
 451          */
 452         if (!HAS_PCH_SPLIT(dev)) {
 453                 drm_modeset_lock_all(dev);
 454                 intel_modeset_setup_hw_state(dev, true);
 455                 drm_modeset_unlock_all(dev);
 456         }
 457
 458         dev_priv->modeset_restore = MODESET_DONE;
 459
 460 exit:
 461         mutex_unlock(&dev_priv->modeset_restore_lock);
 462         return NOTIFY_OK;
 463 }
 464
 465 /**
 466  * intel_lvds_destroy - unregister and free LVDS structures
 467  * @connector: connector to free
 468  *
 469  * Unregister the DDC bus for this connector then free the driver private
 470  * structure.
 471  */
 472 static void intel_lvds_destroy(struct drm_connector *connector)
 473 {
 474         struct intel_lvds_connector *lvds_connector =
 475                 to_lvds_connector(connector);
 476
 477         if (lvds_connector->lid_notifier.notifier_call)
 478                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 479
 480         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 481                 kfree(lvds_connector->base.edid);
 482
 483         intel_panel_fini(&lvds_connector->base.panel);
 484
 485         drm_connector_cleanup(connector);
 486         kfree(connector);
 487 }
 488
 489 static int intel_lvds_set_property(struct drm_connector *connector,
 490                                    struct drm_property *property,
 491                                    uint64_t value)
 492 {
 493         struct intel_connector *intel_connector = to_intel_connector(connector);
 494         struct drm_device *dev = connector->dev;
 495
 496         if (property == dev->mode_config.scaling_mode_property) {
 497                 struct drm_crtc *crtc;
 498
 499                 if (value == DRM_MODE_SCALE_NONE) {
 500                         DRM_DEBUG_KMS("no scaling not supported\n");
 501                         return -EINVAL;
 502                 }
 503
 504                 if (intel_connector->panel.fitting_mode == value) {
 505                         /* the LVDS scaling property is not changed */
 506                         return 0;
 507                 }
 508                 intel_connector->panel.fitting_mode = value;
 509
 510                 crtc = intel_attached_encoder(connector)->base.crtc;
 511                 if (crtc && crtc->enabled) {
 512                         /*
 513                          * If the CRTC is enabled, the display will be changed
 514                          * according to the new panel fitting mode.
 515                          */
 516                         intel_crtc_restore_mode(crtc);
 517                 }
 518         }
 519
 520         return 0;
 521 }
 522
 523 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 524         .get_modes = intel_lvds_get_modes,
 525         .mode_valid = intel_lvds_mode_valid,
 526         .best_encoder = intel_best_encoder,
 527 };
 528
 529 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 530         .dpms = intel_connector_dpms,
 531         .detect = intel_lvds_detect,
 532         .fill_modes = drm_helper_probe_single_connector_modes,
 533         .set_property = intel_lvds_set_property,
 534         .destroy = intel_lvds_destroy,
 535 };
 536
 537 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 538         .destroy = intel_encoder_destroy,
 539 };
 540
 541 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 542 {
 543         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 544         return 1;
 545 }
 546
 547 /* These systems claim to have LVDS, but really don't */
 548 static const struct dmi_system_id intel_no_lvds[] = {
 549         {
 550                 .callback = intel_no_lvds_dmi_callback,
 551                 .ident = "Apple Mac Mini (Core series)",
 552                 .matches = {
 553                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 554                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 555                 },
 556         },
 557         {
 558                 .callback = intel_no_lvds_dmi_callback,
 559                 .ident = "Apple Mac Mini (Core 2 series)",
 560                 .matches = {
 561                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 562                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 563                 },
 564         },
 565         {
 566                 .callback = intel_no_lvds_dmi_callback,
 567                 .ident = "MSI IM-945GSE-A",
 568                 .matches = {
 569                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 570                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 571                 },
 572         },
 573         {
 574                 .callback = intel_no_lvds_dmi_callback,
 575                 .ident = "Dell Studio Hybrid",
 576                 .matches = {
 577                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 578                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 579                 },
 580         },
 581         {
 582                 .callback = intel_no_lvds_dmi_callback,
 583                 .ident = "Dell OptiPlex FX170",
 584                 .matches = {
 585                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 586                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 587                 },
 588         },
 589         {
 590                 .callback = intel_no_lvds_dmi_callback,
 591                 .ident = "AOpen Mini PC",
 592                 .matches = {
 593                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 594                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 595                 },
 596         },
 597         {
 598                 .callback = intel_no_lvds_dmi_callback,
 599                 .ident = "AOpen Mini PC MP915",
 600                 .matches = {
 601                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 602                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 603                 },
 604         },
 605         {
 606                 .callback = intel_no_lvds_dmi_callback,
 607                 .ident = "AOpen i915GMm-HFS",
 608                 .matches = {
 609                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 610                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 611                 },
 612         },
 613         {
 614                 .callback = intel_no_lvds_dmi_callback,
 615                 .ident = "AOpen i45GMx-I",
 616                 .matches = {
 617                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 618                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 619                 },
 620         },
 621         {
 622                 .callback = intel_no_lvds_dmi_callback,
 623                 .ident = "Aopen i945GTt-VFA",
 624                 .matches = {
 625                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 626                 },
 627         },
 628         {
 629                 .callback = intel_no_lvds_dmi_callback,
 630                 .ident = "Clientron U800",
 631                 .matches = {
 632                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 633                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 634                 },
 635         },
 636         {
 637                 .callback = intel_no_lvds_dmi_callback,
 638                 .ident = "Clientron E830",
 639                 .matches = {
 640                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 641                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 642                 },
 643         },
 644         {
 645                 .callback = intel_no_lvds_dmi_callback,
 646                 .ident = "Asus EeeBox PC EB1007",
 647                 .matches = {
 648                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 649                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 650                 },
 651         },
 652         {
 653                 .callback = intel_no_lvds_dmi_callback,
 654                 .ident = "Asus AT5NM10T-I",
 655                 .matches = {
 656                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 657                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 658                 },
 659         },
 660         {
 661                 .callback = intel_no_lvds_dmi_callback,
 662                 .ident = "Hewlett-Packard HP t5740",
 663                 .matches = {
 664                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 665                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 666                 },
 667         },
 668         {
 669                 .callback = intel_no_lvds_dmi_callback,
 670                 .ident = "Hewlett-Packard t5745",
 671                 .matches = {
 672                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 673                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 674                 },
 675         },
 676         {
 677                 .callback = intel_no_lvds_dmi_callback,
 678                 .ident = "Hewlett-Packard st5747",
 679                 .matches = {
 680                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 681                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 682                 },
 683         },
 684         {
 685                 .callback = intel_no_lvds_dmi_callback,
 686                 .ident = "MSI Wind Box DC500",
 687                 .matches = {
 688                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 689                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 690                 },
 691         },
 692         {
 693                 .callback = intel_no_lvds_dmi_callback,
 694                 .ident = "Gigabyte GA-D525TUD",
 695                 .matches = {
 696                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 697                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 698                 },
 699         },
 700         {
 701                 .callback = intel_no_lvds_dmi_callback,
 702                 .ident = "Supermicro X7SPA-H",
 703                 .matches = {
 704                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 705                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 706                 },
 707         },
 708         {
 709                 .callback = intel_no_lvds_dmi_callback,
 710                 .ident = "Fujitsu Esprimo Q900",
 711                 .matches = {
 712                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 713                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 714                 },
 715         },
 716         {
 717                 .callback = intel_no_lvds_dmi_callback,
 718                 .ident = "Intel D410PT",
 719                 .matches = {
 720                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 721                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
 722                 },
 723         },
 724         {
 725                 .callback = intel_no_lvds_dmi_callback,
 726                 .ident = "Intel D425KT",
 727                 .matches = {
 728                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 729                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
 730                 },
 731         },
 732         {
 733                 .callback = intel_no_lvds_dmi_callback,
 734                 .ident = "Intel D510MO",
 735                 .matches = {
 736                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 737                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 738                 },
 739         },
 740         {
 741                 .callback = intel_no_lvds_dmi_callback,
 742                 .ident = "Intel D525MW",
 743                 .matches = {
 744                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 745                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 746                 },
 747         },
 748
 749         { }     /* terminating entry */
 750 };
 751
 752 /*
 753  * Enumerate the child dev array parsed from VBT to check whether
 754  * the LVDS is present.
 755  * If it is present, return 1.
 756  * If it is not present, return false.
 757  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 758  */
 759 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 760                                    u8 *i2c_pin)
 761 {
 762         struct drm_i915_private *dev_priv = dev->dev_private;
 763         int i;
 764
 765         if (!dev_priv->vbt.child_dev_num)
 766                 return true;
 767
 768         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
 769                 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
 770                 struct old_child_dev_config *child = &uchild->old;
 771
 772                 /* If the device type is not LFP, continue.
 773                  * We have to check both the new identifiers as well as the
 774                  * old for compatibility with some BIOSes.
 775                  */
 776                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 777                     child->device_type != DEVICE_TYPE_LFP)
 778                         continue;
 779
 780                 if (intel_gmbus_is_port_valid(child->i2c_pin))
 781                         *i2c_pin = child->i2c_pin;
 782
 783                 /* However, we cannot trust the BIOS writers to populate
 784                  * the VBT correctly.  Since LVDS requires additional
 785                  * information from AIM blocks, a non-zero addin offset is
 786                  * a good indicator that the LVDS is actually present.
 787                  */
 788                 if (child->addin_offset)
 789                         return true;
 790
 791                 /* But even then some BIOS writers perform some black magic
 792                  * and instantiate the device without reference to any
 793                  * additional data.  Trust that if the VBT was written into
 794                  * the OpRegion then they have validated the LVDS's existence.
 795                  */
 796                 if (dev_priv->opregion.vbt)
 797                         return true;
 798         }
 799
 800         return false;
 801 }
 802
 803 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 804 {
 805         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 806         return 1;
 807 }
 808
 809 static const struct dmi_system_id intel_dual_link_lvds[] = {
 810         {
 811                 .callback = intel_dual_link_lvds_callback,
 812                 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
 813                 .matches = {
 814                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 815                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 816                 },
 817         },
 818         { }     /* terminating entry */
 819 };
 820
 821 bool intel_is_dual_link_lvds(struct drm_device *dev)
 822 {
 823         struct intel_encoder *encoder;
 824         struct intel_lvds_encoder *lvds_encoder;
 825
 826         for_each_intel_encoder(dev, encoder) {
 827                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 828                         lvds_encoder = to_lvds_encoder(&encoder->base);
 829
 830                         return lvds_encoder->is_dual_link;
 831                 }
 832         }
 833
 834         return false;
 835 }
 836
 837 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 838 {
 839         struct drm_device *dev = lvds_encoder->base.base.dev;
 840         unsigned int val;
 841         struct drm_i915_private *dev_priv = dev->dev_private;
 842
 843         /* use the module option value if specified */
 844         if (i915.lvds_channel_mode > 0)
 845                 return i915.lvds_channel_mode == 2;
 846
 847         if (dmi_check_system(intel_dual_link_lvds))
 848                 return true;
 849
 850         /* BIOS should set the proper LVDS register value at boot, but
 851          * in reality, it doesn't set the value when the lid is closed;
 852          * we need to check "the value to be set" in VBT when LVDS
 853          * register is uninitialized.
 854          */
 855         val = I915_READ(lvds_encoder->reg);
 856         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 857                 val = dev_priv->vbt.bios_lvds_val;
 858
 859         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 860 }
 861
 862 static bool intel_lvds_supported(struct drm_device *dev)
 863 {
 864         /* With the introduction of the PCH we gained a dedicated
 865          * LVDS presence pin, use it. */
 866         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
 867                 return true;
 868
 869         /* Otherwise LVDS was only attached to mobile products,
 870          * except for the inglorious 830gm */
 871         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
 872                 return true;
 873
 874         return false;
 875 }
 876
 877 /**
 878  * intel_lvds_init - setup LVDS connectors on this device
 879  * @dev: drm device
 880  *
 881  * Create the connector, register the LVDS DDC bus, and try to figure out what
 882  * modes we can display on the LVDS panel (if present).
 883  */
 884 void intel_lvds_init(struct drm_device *dev)
 885 {
 886         struct drm_i915_private *dev_priv = dev->dev_private;
 887         struct intel_lvds_encoder *lvds_encoder;
 888         struct intel_encoder *intel_encoder;
 889         struct intel_lvds_connector *lvds_connector;
 890         struct intel_connector *intel_connector;
 891         struct drm_connector *connector;
 892         struct drm_encoder *encoder;
 893         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 894         struct drm_display_mode *fixed_mode = NULL;
 895         struct drm_display_mode *downclock_mode = NULL;
 896         struct edid *edid;
 897         struct drm_crtc *crtc;
 898         u32 lvds;
 899         int pipe;
 900         u8 pin;
 901
 902         /*
 903          * Unlock registers and just leave them unlocked. Do this before
 904          * checking quirk lists to avoid bogus WARNINGs.
 905          */
 906         if (HAS_PCH_SPLIT(dev)) {
 907                 I915_WRITE(PCH_PP_CONTROL,
 908                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
 909         } else {
 910                 I915_WRITE(PP_CONTROL,
 911                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
 912         }
 913         if (!intel_lvds_supported(dev))
 914                 return;
 915
 916         /* Skip init on machines we know falsely report LVDS */
 917         if (dmi_check_system(intel_no_lvds))
 918                 return;
 919
 920         pin = GMBUS_PORT_PANEL;
 921         if (!lvds_is_present_in_vbt(dev, &pin)) {
 922                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 923                 return;
 924         }
 925
 926         if (HAS_PCH_SPLIT(dev)) {
 927                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 928                         return;
 929                 if (dev_priv->vbt.edp_support) {
 930                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 931                         return;
 932                 }
 933         }
 934
 935         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
 936         if (!lvds_encoder)
 937                 return;
 938
 939         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
 940         if (!lvds_connector) {
 941                 kfree(lvds_encoder);
 942                 return;
 943         }
 944
 945         lvds_encoder->attached_connector = lvds_connector;
 946
 947         intel_encoder = &lvds_encoder->base;
 948         encoder = &intel_encoder->base;
 949         intel_connector = &lvds_connector->base;
 950         connector = &intel_connector->base;
 951         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 952                            DRM_MODE_CONNECTOR_LVDS);
 953
 954         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 955                          DRM_MODE_ENCODER_LVDS);
 956
 957         intel_encoder->enable = intel_enable_lvds;
 958         intel_encoder->pre_enable = intel_pre_enable_lvds;
 959         intel_encoder->compute_config = intel_lvds_compute_config;
 960         intel_encoder->disable = intel_disable_lvds;
 961         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
 962         intel_encoder->get_config = intel_lvds_get_config;
 963         intel_connector->get_hw_state = intel_connector_get_hw_state;
 964         intel_connector->unregister = intel_connector_unregister;
 965
 966         intel_connector_attach_encoder(intel_connector, intel_encoder);
 967         intel_encoder->type = INTEL_OUTPUT_LVDS;
 968
 969         intel_encoder->cloneable = 0;
 970         if (HAS_PCH_SPLIT(dev))
 971                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 972         else if (IS_GEN4(dev))
 973                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 974         else
 975                 intel_encoder->crtc_mask = (1 << 1);
 976
 977         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 978         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 979         connector->interlace_allowed = false;
 980         connector->doublescan_allowed = false;
 981
 982         if (HAS_PCH_SPLIT(dev)) {
 983                 lvds_encoder->reg = PCH_LVDS;
 984         } else {
 985                 lvds_encoder->reg = LVDS;
 986         }
 987
 988         /* create the scaling mode property */
 989         drm_mode_create_scaling_mode_property(dev);
 990         drm_object_attach_property(&connector->base,
 991                                       dev->mode_config.scaling_mode_property,
 992                                       DRM_MODE_SCALE_ASPECT);
 993         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
 994         /*
 995          * LVDS discovery:
 996          * 1) check for EDID on DDC
 997          * 2) check for VBT data
 998          * 3) check to see if LVDS is already on
 999          *    if none of the above, no panel
1000          * 4) make sure lid is open
1001          *    if closed, act like it's not there for now
1002          */
1003
1004         /*
1005          * Attempt to get the fixed panel mode from DDC.  Assume that the
1006          * preferred mode is the right one.
1007          */
1008         mutex_lock(&dev->mode_config.mutex);
1009         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1010         if (edid) {
1011                 if (drm_add_edid_modes(connector, edid)) {
1012                         drm_mode_connector_update_edid_property(connector,
1013                                                                 edid);
1014                 } else {
1015                         kfree(edid);
1016                         edid = ERR_PTR(-EINVAL);
1017                 }
1018         } else {
1019                 edid = ERR_PTR(-ENOENT);
1020         }
1021         lvds_connector->base.edid = edid;
1022
1023         if (IS_ERR_OR_NULL(edid)) {
1024                 /* Didn't get an EDID, so
1025                  * Set wide sync ranges so we get all modes
1026                  * handed to valid_mode for checking
1027                  */
1028                 connector->display_info.min_vfreq = 0;
1029                 connector->display_info.max_vfreq = 200;
1030                 connector->display_info.min_hfreq = 0;
1031                 connector->display_info.max_hfreq = 200;
1032         }
1033
1034         list_for_each_entry(scan, &connector->probed_modes, head) {
1035                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1036                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1037                         drm_mode_debug_printmodeline(scan);
1038
1039                         fixed_mode = drm_mode_duplicate(dev, scan);
1040                         if (fixed_mode) {
1041                                 downclock_mode =
1042                                         intel_find_panel_downclock(dev,
1043                                         fixed_mode, connector);
1044                                 if (downclock_mode != NULL &&
1045                                         i915.lvds_downclock) {
1046                                         /* We found the downclock for LVDS. */
1047                                         dev_priv->lvds_downclock_avail = true;
1048                                         dev_priv->lvds_downclock =
1049                                                 downclock_mode->clock;
1050                                         DRM_DEBUG_KMS("LVDS downclock is found"
1051                                         " in EDID. Normal clock %dKhz, "
1052                                         "downclock %dKhz\n",
1053                                         fixed_mode->clock,
1054                                         dev_priv->lvds_downclock);
1055                                 }
1056                                 goto out;
1057                         }
1058                 }
1059         }
1060
1061         /* Failed to get EDID, what about VBT? */
1062         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1063                 DRM_DEBUG_KMS("using mode from VBT: ");
1064                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1065
1066                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1067                 if (fixed_mode) {
1068                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1069                         goto out;
1070                 }
1071         }
1072
1073         /*
1074          * If we didn't get EDID, try checking if the panel is already turned
1075          * on.  If so, assume that whatever is currently programmed is the
1076          * correct mode.
1077          */
1078
1079         /* Ironlake: FIXME if still fail, not try pipe mode now */
1080         if (HAS_PCH_SPLIT(dev))
1081                 goto failed;
1082
1083         lvds = I915_READ(LVDS);
1084         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1085         crtc = intel_get_crtc_for_pipe(dev, pipe);
1086
1087         if (crtc && (lvds & LVDS_PORT_EN)) {
1088                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1089                 if (fixed_mode) {
1090                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1091                         drm_mode_debug_printmodeline(fixed_mode);
1092                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1093                         goto out;
1094                 }
1095         }
1096
1097         /* If we still don't have a mode after all that, give up. */
1098         if (!fixed_mode)
1099                 goto failed;
1100
1101 out:
1102         mutex_unlock(&dev->mode_config.mutex);
1103
1104         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1105         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1106                       lvds_encoder->is_dual_link ? "dual" : "single");
1107
1108         lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) &
1109                                  LVDS_A3_POWER_MASK;
1110
1111         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1112         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1113                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1114                 lvds_connector->lid_notifier.notifier_call = NULL;
1115         }
1116         drm_connector_register(connector);
1117
1118         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1119         intel_panel_setup_backlight(connector);
1120
1121         return;
1122
1123 failed:
1124         mutex_unlock(&dev->mode_config.mutex);
1125
1126         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1127         drm_connector_cleanup(connector);
1128         drm_encoder_cleanup(encoder);
1129         kfree(lvds_encoder);
1130         kfree(lvds_connector);
1131         return;
1132 }