IB/hfi1: Rework debugfs to use SRCU
[cascardo/linux.git] / drivers / gpu / drm / imx / ipuv3-crtc.c
1 /*
2  * i.MX IPUv3 Graphics driver
3  *
4  * Copyright (C) 2011 Sascha Hauer, Pengutronix
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 #include <linux/component.h>
16 #include <linux/module.h>
17 #include <linux/export.h>
18 #include <linux/device.h>
19 #include <linux/platform_device.h>
20 #include <drm/drmP.h>
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <linux/fb.h>
25 #include <linux/clk.h>
26 #include <linux/errno.h>
27 #include <drm/drm_gem_cma_helper.h>
28 #include <drm/drm_fb_cma_helper.h>
29
30 #include <video/imx-ipu-v3.h>
31 #include "imx-drm.h"
32 #include "ipuv3-plane.h"
33
34 #define DRIVER_DESC             "i.MX IPUv3 Graphics"
35
36 struct ipu_crtc {
37         struct device           *dev;
38         struct drm_crtc         base;
39         struct imx_drm_crtc     *imx_crtc;
40
41         /* plane[0] is the full plane, plane[1] is the partial plane */
42         struct ipu_plane        *plane[2];
43
44         struct ipu_dc           *dc;
45         struct ipu_di           *di;
46         int                     irq;
47 };
48
49 static inline struct ipu_crtc *to_ipu_crtc(struct drm_crtc *crtc)
50 {
51         return container_of(crtc, struct ipu_crtc, base);
52 }
53
54 static void ipu_crtc_enable(struct drm_crtc *crtc)
55 {
56         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
57         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
58
59         ipu_dc_enable(ipu);
60         ipu_dc_enable_channel(ipu_crtc->dc);
61         ipu_di_enable(ipu_crtc->di);
62 }
63
64 static void ipu_crtc_disable(struct drm_crtc *crtc)
65 {
66         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
67         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
68
69         ipu_dc_disable_channel(ipu_crtc->dc);
70         ipu_di_disable(ipu_crtc->di);
71         ipu_dc_disable(ipu);
72
73         spin_lock_irq(&crtc->dev->event_lock);
74         if (crtc->state->event) {
75                 drm_crtc_send_vblank_event(crtc, crtc->state->event);
76                 crtc->state->event = NULL;
77         }
78         spin_unlock_irq(&crtc->dev->event_lock);
79 }
80
81 static void imx_drm_crtc_reset(struct drm_crtc *crtc)
82 {
83         struct imx_crtc_state *state;
84
85         if (crtc->state) {
86                 if (crtc->state->mode_blob)
87                         drm_property_unreference_blob(crtc->state->mode_blob);
88
89                 state = to_imx_crtc_state(crtc->state);
90                 memset(state, 0, sizeof(*state));
91         } else {
92                 state = kzalloc(sizeof(*state), GFP_KERNEL);
93                 if (!state)
94                         return;
95                 crtc->state = &state->base;
96         }
97
98         state->base.crtc = crtc;
99 }
100
101 static struct drm_crtc_state *imx_drm_crtc_duplicate_state(struct drm_crtc *crtc)
102 {
103         struct imx_crtc_state *state;
104
105         state = kzalloc(sizeof(*state), GFP_KERNEL);
106         if (!state)
107                 return NULL;
108
109         __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
110
111         WARN_ON(state->base.crtc != crtc);
112         state->base.crtc = crtc;
113
114         return &state->base;
115 }
116
117 static void imx_drm_crtc_destroy_state(struct drm_crtc *crtc,
118                                        struct drm_crtc_state *state)
119 {
120         __drm_atomic_helper_crtc_destroy_state(state);
121         kfree(to_imx_crtc_state(state));
122 }
123
124 static const struct drm_crtc_funcs ipu_crtc_funcs = {
125         .set_config = drm_atomic_helper_set_config,
126         .destroy = drm_crtc_cleanup,
127         .page_flip = drm_atomic_helper_page_flip,
128         .reset = imx_drm_crtc_reset,
129         .atomic_duplicate_state = imx_drm_crtc_duplicate_state,
130         .atomic_destroy_state = imx_drm_crtc_destroy_state,
131 };
132
133 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
134 {
135         struct ipu_crtc *ipu_crtc = dev_id;
136
137         imx_drm_handle_vblank(ipu_crtc->imx_crtc);
138
139         return IRQ_HANDLED;
140 }
141
142 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
143                                   const struct drm_display_mode *mode,
144                                   struct drm_display_mode *adjusted_mode)
145 {
146         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
147         struct videomode vm;
148         int ret;
149
150         drm_display_mode_to_videomode(adjusted_mode, &vm);
151
152         ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
153         if (ret)
154                 return false;
155
156         if ((vm.vsync_len == 0) || (vm.hsync_len == 0))
157                 return false;
158
159         drm_display_mode_from_videomode(&vm, adjusted_mode);
160
161         return true;
162 }
163
164 static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
165                                  struct drm_crtc_state *state)
166 {
167         u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary);
168
169         if (state->active && (primary_plane_mask & state->plane_mask) == 0)
170                 return -EINVAL;
171
172         return 0;
173 }
174
175 static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
176                                   struct drm_crtc_state *old_crtc_state)
177 {
178         spin_lock_irq(&crtc->dev->event_lock);
179         if (crtc->state->event) {
180                 WARN_ON(drm_crtc_vblank_get(crtc));
181                 drm_crtc_arm_vblank_event(crtc, crtc->state->event);
182                 crtc->state->event = NULL;
183         }
184         spin_unlock_irq(&crtc->dev->event_lock);
185 }
186
187 static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
188 {
189         struct drm_device *dev = crtc->dev;
190         struct drm_encoder *encoder;
191         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
192         struct drm_display_mode *mode = &crtc->state->adjusted_mode;
193         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc->state);
194         struct ipu_di_signal_cfg sig_cfg = {};
195         unsigned long encoder_types = 0;
196
197         dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
198                         mode->hdisplay);
199         dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
200                         mode->vdisplay);
201
202         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
203                 if (encoder->crtc == crtc)
204                         encoder_types |= BIT(encoder->encoder_type);
205         }
206
207         dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
208                 __func__, encoder_types);
209
210         /*
211          * If we have DAC or LDB, then we need the IPU DI clock to be
212          * the same as the LDB DI clock. For TVDAC, derive the IPU DI
213          * clock from 27 MHz TVE_DI clock, but allow to divide it.
214          */
215         if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
216                              BIT(DRM_MODE_ENCODER_LVDS)))
217                 sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
218         else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
219                 sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
220         else
221                 sig_cfg.clkflags = 0;
222
223         sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW);
224         /* Default to driving pixel data on negative clock edges */
225         sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags &
226                              DRM_BUS_FLAG_PIXDATA_POSEDGE);
227         sig_cfg.bus_format = imx_crtc_state->bus_format;
228         sig_cfg.v_to_h_sync = 0;
229         sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
230         sig_cfg.vsync_pin = imx_crtc_state->di_vsync_pin;
231
232         drm_display_mode_to_videomode(mode, &sig_cfg.mode);
233
234         ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
235                          mode->flags & DRM_MODE_FLAG_INTERLACE,
236                          imx_crtc_state->bus_format, mode->hdisplay);
237         ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
238 }
239
240 static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
241         .mode_fixup = ipu_crtc_mode_fixup,
242         .mode_set_nofb = ipu_crtc_mode_set_nofb,
243         .atomic_check = ipu_crtc_atomic_check,
244         .atomic_begin = ipu_crtc_atomic_begin,
245         .disable = ipu_crtc_disable,
246         .enable = ipu_crtc_enable,
247 };
248
249 static int ipu_enable_vblank(struct drm_crtc *crtc)
250 {
251         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
252
253         enable_irq(ipu_crtc->irq);
254
255         return 0;
256 }
257
258 static void ipu_disable_vblank(struct drm_crtc *crtc)
259 {
260         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
261
262         disable_irq_nosync(ipu_crtc->irq);
263 }
264
265 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
266         .enable_vblank = ipu_enable_vblank,
267         .disable_vblank = ipu_disable_vblank,
268         .crtc_funcs = &ipu_crtc_funcs,
269         .crtc_helper_funcs = &ipu_helper_funcs,
270 };
271
272 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
273 {
274         if (!IS_ERR_OR_NULL(ipu_crtc->dc))
275                 ipu_dc_put(ipu_crtc->dc);
276         if (!IS_ERR_OR_NULL(ipu_crtc->di))
277                 ipu_di_put(ipu_crtc->di);
278 }
279
280 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
281                 struct ipu_client_platformdata *pdata)
282 {
283         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
284         int ret;
285
286         ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
287         if (IS_ERR(ipu_crtc->dc)) {
288                 ret = PTR_ERR(ipu_crtc->dc);
289                 goto err_out;
290         }
291
292         ipu_crtc->di = ipu_di_get(ipu, pdata->di);
293         if (IS_ERR(ipu_crtc->di)) {
294                 ret = PTR_ERR(ipu_crtc->di);
295                 goto err_out;
296         }
297
298         return 0;
299 err_out:
300         ipu_put_resources(ipu_crtc);
301
302         return ret;
303 }
304
305 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
306         struct ipu_client_platformdata *pdata, struct drm_device *drm)
307 {
308         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
309         int dp = -EINVAL;
310         int ret;
311
312         ret = ipu_get_resources(ipu_crtc, pdata);
313         if (ret) {
314                 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
315                                 ret);
316                 return ret;
317         }
318
319         if (pdata->dp >= 0)
320                 dp = IPU_DP_FLOW_SYNC_BG;
321         ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
322                                             DRM_PLANE_TYPE_PRIMARY);
323         if (IS_ERR(ipu_crtc->plane[0])) {
324                 ret = PTR_ERR(ipu_crtc->plane[0]);
325                 goto err_put_resources;
326         }
327
328         ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
329                         &ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs,
330                         pdata->of_node);
331         if (ret) {
332                 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
333                 goto err_put_resources;
334         }
335
336         ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
337         if (ret) {
338                 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
339                         ret);
340                 goto err_remove_crtc;
341         }
342
343         /* If this crtc is using the DP, add an overlay plane */
344         if (pdata->dp >= 0 && pdata->dma[1] > 0) {
345                 ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
346                                                 IPU_DP_FLOW_SYNC_FG,
347                                                 drm_crtc_mask(&ipu_crtc->base),
348                                                 DRM_PLANE_TYPE_OVERLAY);
349                 if (IS_ERR(ipu_crtc->plane[1])) {
350                         ipu_crtc->plane[1] = NULL;
351                 } else {
352                         ret = ipu_plane_get_resources(ipu_crtc->plane[1]);
353                         if (ret) {
354                                 dev_err(ipu_crtc->dev, "getting plane 1 "
355                                         "resources failed with %d.\n", ret);
356                                 goto err_put_plane0_res;
357                         }
358                 }
359         }
360
361         ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
362         ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
363                         "imx_drm", ipu_crtc);
364         if (ret < 0) {
365                 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
366                 goto err_put_plane1_res;
367         }
368         /* Only enable IRQ when we actually need it to trigger work. */
369         disable_irq(ipu_crtc->irq);
370
371         return 0;
372
373 err_put_plane1_res:
374         if (ipu_crtc->plane[1])
375                 ipu_plane_put_resources(ipu_crtc->plane[1]);
376 err_put_plane0_res:
377         ipu_plane_put_resources(ipu_crtc->plane[0]);
378 err_remove_crtc:
379         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
380 err_put_resources:
381         ipu_put_resources(ipu_crtc);
382
383         return ret;
384 }
385
386 static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
387 {
388         struct ipu_client_platformdata *pdata = dev->platform_data;
389         struct drm_device *drm = data;
390         struct ipu_crtc *ipu_crtc;
391         int ret;
392
393         ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
394         if (!ipu_crtc)
395                 return -ENOMEM;
396
397         ipu_crtc->dev = dev;
398
399         ret = ipu_crtc_init(ipu_crtc, pdata, drm);
400         if (ret)
401                 return ret;
402
403         dev_set_drvdata(dev, ipu_crtc);
404
405         return 0;
406 }
407
408 static void ipu_drm_unbind(struct device *dev, struct device *master,
409         void *data)
410 {
411         struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
412
413         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
414
415         ipu_put_resources(ipu_crtc);
416         if (ipu_crtc->plane[1])
417                 ipu_plane_put_resources(ipu_crtc->plane[1]);
418         ipu_plane_put_resources(ipu_crtc->plane[0]);
419 }
420
421 static const struct component_ops ipu_crtc_ops = {
422         .bind = ipu_drm_bind,
423         .unbind = ipu_drm_unbind,
424 };
425
426 static int ipu_drm_probe(struct platform_device *pdev)
427 {
428         struct device *dev = &pdev->dev;
429         int ret;
430
431         if (!dev->platform_data)
432                 return -EINVAL;
433
434         ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
435         if (ret)
436                 return ret;
437
438         return component_add(dev, &ipu_crtc_ops);
439 }
440
441 static int ipu_drm_remove(struct platform_device *pdev)
442 {
443         component_del(&pdev->dev, &ipu_crtc_ops);
444         return 0;
445 }
446
447 static struct platform_driver ipu_drm_driver = {
448         .driver = {
449                 .name = "imx-ipuv3-crtc",
450         },
451         .probe = ipu_drm_probe,
452         .remove = ipu_drm_remove,
453 };
454 module_platform_driver(ipu_drm_driver);
455
456 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
457 MODULE_DESCRIPTION(DRIVER_DESC);
458 MODULE_LICENSE("GPL");
459 MODULE_ALIAS("platform:imx-ipuv3-crtc");