drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "mdp4_kms.h"
  19
  20 #define DOWN_SCALE_MAX  8
  21 #define UP_SCALE_MAX    8
  22
  23 struct mdp4_plane {
  24         struct drm_plane base;
  25         const char *name;
  26
  27         enum mdp4_pipe pipe;
  28
  29         uint32_t caps;
  30         uint32_t nformats;
  31         uint32_t formats[32];
  32
  33         bool enabled;
  34 };
  35 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
  36
  37 /* MDP format helper functions */
  38 static inline
  39 enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
  40 {
  41         bool is_tile = false;
  42
  43         if (fb->modifier[1] == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
  44                 is_tile = true;
  45
  46         if (fb->pixel_format == DRM_FORMAT_NV12 && is_tile)
  47                 return FRAME_TILE_YCBCR_420;
  48
  49         return FRAME_LINEAR;
  50 }
  51
  52 static void mdp4_plane_set_scanout(struct drm_plane *plane,
  53                 struct drm_framebuffer *fb);
  54 static int mdp4_plane_mode_set(struct drm_plane *plane,
  55                 struct drm_crtc *crtc, struct drm_framebuffer *fb,
  56                 int crtc_x, int crtc_y,
  57                 unsigned int crtc_w, unsigned int crtc_h,
  58                 uint32_t src_x, uint32_t src_y,
  59                 uint32_t src_w, uint32_t src_h);
  60
  61 static struct mdp4_kms *get_kms(struct drm_plane *plane)
  62 {
  63         struct msm_drm_private *priv = plane->dev->dev_private;
  64         return to_mdp4_kms(to_mdp_kms(priv->kms));
  65 }
  66
  67 static void mdp4_plane_destroy(struct drm_plane *plane)
  68 {
  69         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
  70
  71         drm_plane_helper_disable(plane);
  72         drm_plane_cleanup(plane);
  73
  74         kfree(mdp4_plane);
  75 }
  76
  77 /* helper to install properties which are common to planes and crtcs */
  78 static void mdp4_plane_install_properties(struct drm_plane *plane,
  79                 struct drm_mode_object *obj)
  80 {
  81         // XXX
  82 }
  83
  84 int mdp4_plane_set_property(struct drm_plane *plane,
  85                 struct drm_property *property, uint64_t val)
  86 {
  87         // XXX
  88         return -EINVAL;
  89 }
  90
  91 static const struct drm_plane_funcs mdp4_plane_funcs = {
  92                 .update_plane = drm_atomic_helper_update_plane,
  93                 .disable_plane = drm_atomic_helper_disable_plane,
  94                 .destroy = mdp4_plane_destroy,
  95                 .set_property = mdp4_plane_set_property,
  96                 .reset = drm_atomic_helper_plane_reset,
  97                 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
  98                 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
  99 };
 100
 101 static int mdp4_plane_prepare_fb(struct drm_plane *plane,
 102                 struct drm_framebuffer *fb,
 103                 const struct drm_plane_state *new_state)
 104 {
 105         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 106         struct mdp4_kms *mdp4_kms = get_kms(plane);
 107
 108         DBG("%s: prepare: FB[%u]", mdp4_plane->name, fb->base.id);
 109         return msm_framebuffer_prepare(fb, mdp4_kms->id);
 110 }
 111
 112 static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
 113                 struct drm_framebuffer *fb,
 114                 const struct drm_plane_state *old_state)
 115 {
 116         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 117         struct mdp4_kms *mdp4_kms = get_kms(plane);
 118
 119         DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
 120         msm_framebuffer_cleanup(fb, mdp4_kms->id);
 121 }
 122
 123
 124 static int mdp4_plane_atomic_check(struct drm_plane *plane,
 125                 struct drm_plane_state *state)
 126 {
 127         return 0;
 128 }
 129
 130 static void mdp4_plane_atomic_update(struct drm_plane *plane,
 131                                      struct drm_plane_state *old_state)
 132 {
 133         struct drm_plane_state *state = plane->state;
 134         int ret;
 135
 136         ret = mdp4_plane_mode_set(plane,
 137                         state->crtc, state->fb,
 138                         state->crtc_x, state->crtc_y,
 139                         state->crtc_w, state->crtc_h,
 140                         state->src_x,  state->src_y,
 141                         state->src_w, state->src_h);
 142         /* atomic_check should have ensured that this doesn't fail */
 143         WARN_ON(ret < 0);
 144 }
 145
 146 static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = {
 147                 .prepare_fb = mdp4_plane_prepare_fb,
 148                 .cleanup_fb = mdp4_plane_cleanup_fb,
 149                 .atomic_check = mdp4_plane_atomic_check,
 150                 .atomic_update = mdp4_plane_atomic_update,
 151 };
 152
 153 static void mdp4_plane_set_scanout(struct drm_plane *plane,
 154                 struct drm_framebuffer *fb)
 155 {
 156         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 157         struct mdp4_kms *mdp4_kms = get_kms(plane);
 158         enum mdp4_pipe pipe = mdp4_plane->pipe;
 159
 160         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
 161                         MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
 162                         MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
 163
 164         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
 165                         MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
 166                         MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
 167
 168         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),
 169                         msm_framebuffer_iova(fb, mdp4_kms->id, 0));
 170         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),
 171                         msm_framebuffer_iova(fb, mdp4_kms->id, 1));
 172         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),
 173                         msm_framebuffer_iova(fb, mdp4_kms->id, 2));
 174         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),
 175                         msm_framebuffer_iova(fb, mdp4_kms->id, 3));
 176
 177         plane->fb = fb;
 178 }
 179
 180 static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms,
 181                 enum mdp4_pipe pipe, struct csc_cfg *csc)
 182 {
 183         int i;
 184
 185         for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) {
 186                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i),
 187                                 csc->matrix[i]);
 188         }
 189
 190         for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) {
 191                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i),
 192                                 csc->pre_bias[i]);
 193
 194                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i),
 195                                 csc->post_bias[i]);
 196         }
 197
 198         for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {
 199                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i),
 200                                 csc->pre_clamp[i]);
 201
 202                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i),
 203                                 csc->post_clamp[i]);
 204         }
 205 }
 206
 207 #define MDP4_VG_PHASE_STEP_DEFAULT      0x20000000
 208
 209 static int mdp4_plane_mode_set(struct drm_plane *plane,
 210                 struct drm_crtc *crtc, struct drm_framebuffer *fb,
 211                 int crtc_x, int crtc_y,
 212                 unsigned int crtc_w, unsigned int crtc_h,
 213                 uint32_t src_x, uint32_t src_y,
 214                 uint32_t src_w, uint32_t src_h)
 215 {
 216         struct drm_device *dev = plane->dev;
 217         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 218         struct mdp4_kms *mdp4_kms = get_kms(plane);
 219         enum mdp4_pipe pipe = mdp4_plane->pipe;
 220         const struct mdp_format *format;
 221         uint32_t op_mode = 0;
 222         uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
 223         uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
 224         enum mdp4_frame_format frame_type;
 225
 226         if (!(crtc && fb)) {
 227                 DBG("%s: disabled!", mdp4_plane->name);
 228                 return 0;
 229         }
 230
 231         frame_type = mdp4_get_frame_format(fb);
 232
 233         /* src values are in Q16 fixed point, convert to integer: */
 234         src_x = src_x >> 16;
 235         src_y = src_y >> 16;
 236         src_w = src_w >> 16;
 237         src_h = src_h >> 16;
 238
 239         DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name,
 240                         fb->base.id, src_x, src_y, src_w, src_h,
 241                         crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);
 242
 243         format = to_mdp_format(msm_framebuffer_format(fb));
 244
 245         if (src_w > (crtc_w * DOWN_SCALE_MAX)) {
 246                 dev_err(dev->dev, "Width down scaling exceeds limits!\n");
 247                 return -ERANGE;
 248         }
 249
 250         if (src_h > (crtc_h * DOWN_SCALE_MAX)) {
 251                 dev_err(dev->dev, "Height down scaling exceeds limits!\n");
 252                 return -ERANGE;
 253         }
 254
 255         if (crtc_w > (src_w * UP_SCALE_MAX)) {
 256                 dev_err(dev->dev, "Width up scaling exceeds limits!\n");
 257                 return -ERANGE;
 258         }
 259
 260         if (crtc_h > (src_h * UP_SCALE_MAX)) {
 261                 dev_err(dev->dev, "Height up scaling exceeds limits!\n");
 262                 return -ERANGE;
 263         }
 264
 265         if (src_w != crtc_w) {
 266                 uint32_t sel_unit = SCALE_FIR;
 267                 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
 268
 269                 if (MDP_FORMAT_IS_YUV(format)) {
 270                         if (crtc_w > src_w)
 271                                 sel_unit = SCALE_PIXEL_RPT;
 272                         else if (crtc_w <= (src_w / 4))
 273                                 sel_unit = SCALE_MN_PHASE;
 274
 275                         op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit);
 276                         phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
 277                                         src_w, crtc_w);
 278                 }
 279         }
 280
 281         if (src_h != crtc_h) {
 282                 uint32_t sel_unit = SCALE_FIR;
 283                 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
 284
 285                 if (MDP_FORMAT_IS_YUV(format)) {
 286
 287                         if (crtc_h > src_h)
 288                                 sel_unit = SCALE_PIXEL_RPT;
 289                         else if (crtc_h <= (src_h / 4))
 290                                 sel_unit = SCALE_MN_PHASE;
 291
 292                         op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit);
 293                         phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
 294                                         src_h, crtc_h);
 295                 }
 296         }
 297
 298         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
 299                         MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
 300                         MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
 301
 302         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
 303                         MDP4_PIPE_SRC_XY_X(src_x) |
 304                         MDP4_PIPE_SRC_XY_Y(src_y));
 305
 306         mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
 307                         MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
 308                         MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
 309
 310         mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
 311                         MDP4_PIPE_DST_XY_X(crtc_x) |
 312                         MDP4_PIPE_DST_XY_Y(crtc_y));
 313
 314         mdp4_plane_set_scanout(plane, fb);
 315
 316         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
 317                         MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
 318                         MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
 319                         MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
 320                         MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
 321                         COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
 322                         MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
 323                         MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
 324                         MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) |
 325                         MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) |
 326                         MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) |
 327                         COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
 328
 329         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
 330                         MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
 331                         MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
 332                         MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
 333                         MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
 334
 335         if (MDP_FORMAT_IS_YUV(format)) {
 336                 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB);
 337
 338                 op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR;
 339                 op_mode |= MDP4_PIPE_OP_MODE_CSC_EN;
 340                 mdp4_write_csc_config(mdp4_kms, pipe, csc);
 341         }
 342
 343         mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
 344         mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
 345         mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
 346
 347         if (frame_type != FRAME_LINEAR)
 348                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),
 349                                 MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) |
 350                                 MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h));
 351
 352         return 0;
 353 }
 354
 355 static const char *pipe_names[] = {
 356                 "VG1", "VG2",
 357                 "RGB1", "RGB2", "RGB3",
 358                 "VG3", "VG4",
 359 };
 360
 361 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
 362 {
 363         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 364         return mdp4_plane->pipe;
 365 }
 366
 367 /* initialize plane */
 368 struct drm_plane *mdp4_plane_init(struct drm_device *dev,
 369                 enum mdp4_pipe pipe_id, bool private_plane)
 370 {
 371         struct drm_plane *plane = NULL;
 372         struct mdp4_plane *mdp4_plane;
 373         int ret;
 374         enum drm_plane_type type;
 375
 376         mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
 377         if (!mdp4_plane) {
 378                 ret = -ENOMEM;
 379                 goto fail;
 380         }
 381
 382         plane = &mdp4_plane->base;
 383
 384         mdp4_plane->pipe = pipe_id;
 385         mdp4_plane->name = pipe_names[pipe_id];
 386         mdp4_plane->caps = mdp4_pipe_caps(pipe_id);
 387
 388         mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats,
 389                         ARRAY_SIZE(mdp4_plane->formats),
 390                         !pipe_supports_yuv(mdp4_plane->caps));
 391
 392         type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
 393         ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
 394                                  mdp4_plane->formats, mdp4_plane->nformats, type);
 395         if (ret)
 396                 goto fail;
 397
 398         drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);
 399
 400         mdp4_plane_install_properties(plane, &plane->base);
 401
 402         return plane;
 403
 404 fail:
 405         if (plane)
 406                 mdp4_plane_destroy(plane);
 407
 408         return ERR_PTR(ret);
 409 }