drivers/gpu/drm/msm/msm_drv.c

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "msm_drv.h"
  19 #include "msm_gpu.h"
  20 #include "msm_kms.h"
  21
  22 static void msm_fb_output_poll_changed(struct drm_device *dev)
  23 {
  24         struct msm_drm_private *priv = dev->dev_private;
  25         if (priv->fbdev)
  26                 drm_fb_helper_hotplug_event(priv->fbdev);
  27 }
  28
  29 static const struct drm_mode_config_funcs mode_config_funcs = {
  30         .fb_create = msm_framebuffer_create,
  31         .output_poll_changed = msm_fb_output_poll_changed,
  32         .atomic_check = msm_atomic_check,
  33         .atomic_commit = msm_atomic_commit,
  34 };
  35
  36 int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu)
  37 {
  38         struct msm_drm_private *priv = dev->dev_private;
  39         int idx = priv->num_mmus++;
  40
  41         if (WARN_ON(idx >= ARRAY_SIZE(priv->mmus)))
  42                 return -EINVAL;
  43
  44         priv->mmus[idx] = mmu;
  45
  46         return idx;
  47 }
  48
  49 #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
  50 static bool reglog = false;
  51 MODULE_PARM_DESC(reglog, "Enable register read/write logging");
  52 module_param(reglog, bool, 0600);
  53 #else
  54 #define reglog 0
  55 #endif
  56
  57 #ifdef CONFIG_DRM_FBDEV_EMULATION
  58 static bool fbdev = true;
  59 MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
  60 module_param(fbdev, bool, 0600);
  61 #endif
  62
  63 static char *vram = "16m";
  64 MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
  65 module_param(vram, charp, 0);
  66
  67 /*
  68  * Util/helpers:
  69  */
  70
  71 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  72                 const char *dbgname)
  73 {
  74         struct resource *res;
  75         unsigned long size;
  76         void __iomem *ptr;
  77
  78         if (name)
  79                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  80         else
  81                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  82
  83         if (!res) {
  84                 dev_err(&pdev->dev, "failed to get memory resource: %s\n", name);
  85                 return ERR_PTR(-EINVAL);
  86         }
  87
  88         size = resource_size(res);
  89
  90         ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
  91         if (!ptr) {
  92                 dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
  93                 return ERR_PTR(-ENOMEM);
  94         }
  95
  96         if (reglog)
  97                 printk(KERN_DEBUG "IO:region %s %p %08lx\n", dbgname, ptr, size);
  98
  99         return ptr;
 100 }
 101
 102 void msm_writel(u32 data, void __iomem *addr)
 103 {
 104         if (reglog)
 105                 printk(KERN_DEBUG "IO:W %p %08x\n", addr, data);
 106         writel(data, addr);
 107 }
 108
 109 u32 msm_readl(const void __iomem *addr)
 110 {
 111         u32 val = readl(addr);
 112         if (reglog)
 113                 printk(KERN_ERR "IO:R %p %08x\n", addr, val);
 114         return val;
 115 }
 116
 117 struct vblank_event {
 118         struct list_head node;
 119         int crtc_id;
 120         bool enable;
 121 };
 122
 123 static void vblank_ctrl_worker(struct work_struct *work)
 124 {
 125         struct msm_vblank_ctrl *vbl_ctrl = container_of(work,
 126                                                 struct msm_vblank_ctrl, work);
 127         struct msm_drm_private *priv = container_of(vbl_ctrl,
 128                                         struct msm_drm_private, vblank_ctrl);
 129         struct msm_kms *kms = priv->kms;
 130         struct vblank_event *vbl_ev, *tmp;
 131         unsigned long flags;
 132
 133         spin_lock_irqsave(&vbl_ctrl->lock, flags);
 134         list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) {
 135                 list_del(&vbl_ev->node);
 136                 spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
 137
 138                 if (vbl_ev->enable)
 139                         kms->funcs->enable_vblank(kms,
 140                                                 priv->crtcs[vbl_ev->crtc_id]);
 141                 else
 142                         kms->funcs->disable_vblank(kms,
 143                                                 priv->crtcs[vbl_ev->crtc_id]);
 144
 145                 kfree(vbl_ev);
 146
 147                 spin_lock_irqsave(&vbl_ctrl->lock, flags);
 148         }
 149
 150         spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
 151 }
 152
 153 static int vblank_ctrl_queue_work(struct msm_drm_private *priv,
 154                                         int crtc_id, bool enable)
 155 {
 156         struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
 157         struct vblank_event *vbl_ev;
 158         unsigned long flags;
 159
 160         vbl_ev = kzalloc(sizeof(*vbl_ev), GFP_ATOMIC);
 161         if (!vbl_ev)
 162                 return -ENOMEM;
 163
 164         vbl_ev->crtc_id = crtc_id;
 165         vbl_ev->enable = enable;
 166
 167         spin_lock_irqsave(&vbl_ctrl->lock, flags);
 168         list_add_tail(&vbl_ev->node, &vbl_ctrl->event_list);
 169         spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
 170
 171         queue_work(priv->wq, &vbl_ctrl->work);
 172
 173         return 0;
 174 }
 175
 176 /*
 177  * DRM operations:
 178  */
 179
 180 static int msm_unload(struct drm_device *dev)
 181 {
 182         struct msm_drm_private *priv = dev->dev_private;
 183         struct msm_kms *kms = priv->kms;
 184         struct msm_gpu *gpu = priv->gpu;
 185         struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
 186         struct vblank_event *vbl_ev, *tmp;
 187
 188         /* We must cancel and cleanup any pending vblank enable/disable
 189          * work before drm_irq_uninstall() to avoid work re-enabling an
 190          * irq after uninstall has disabled it.
 191          */
 192         cancel_work_sync(&vbl_ctrl->work);
 193         list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) {
 194                 list_del(&vbl_ev->node);
 195                 kfree(vbl_ev);
 196         }
 197
 198         drm_kms_helper_poll_fini(dev);
 199
 200 #ifdef CONFIG_DRM_FBDEV_EMULATION
 201         if (fbdev && priv->fbdev)
 202                 msm_fbdev_free(dev);
 203 #endif
 204         drm_mode_config_cleanup(dev);
 205         drm_vblank_cleanup(dev);
 206
 207         pm_runtime_get_sync(dev->dev);
 208         drm_irq_uninstall(dev);
 209         pm_runtime_put_sync(dev->dev);
 210
 211         flush_workqueue(priv->wq);
 212         destroy_workqueue(priv->wq);
 213
 214         if (kms) {
 215                 pm_runtime_disable(dev->dev);
 216                 kms->funcs->destroy(kms);
 217         }
 218
 219         if (gpu) {
 220                 mutex_lock(&dev->struct_mutex);
 221                 gpu->funcs->pm_suspend(gpu);
 222                 mutex_unlock(&dev->struct_mutex);
 223                 gpu->funcs->destroy(gpu);
 224         }
 225
 226         if (priv->vram.paddr) {
 227                 DEFINE_DMA_ATTRS(attrs);
 228                 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
 229                 drm_mm_takedown(&priv->vram.mm);
 230                 dma_free_attrs(dev->dev, priv->vram.size, NULL,
 231                                 priv->vram.paddr, &attrs);
 232         }
 233
 234         component_unbind_all(dev->dev, dev);
 235
 236         dev->dev_private = NULL;
 237
 238         kfree(priv);
 239
 240         return 0;
 241 }
 242
 243 static int get_mdp_ver(struct platform_device *pdev)
 244 {
 245         struct device *dev = &pdev->dev;
 246
 247         return (int) (unsigned long) of_device_get_match_data(dev);
 248 }
 249
 250 #include <linux/of_address.h>
 251
 252 static int msm_init_vram(struct drm_device *dev)
 253 {
 254         struct msm_drm_private *priv = dev->dev_private;
 255         struct device_node *node;
 256         unsigned long size = 0;
 257         int ret = 0;
 258
 259         /* In the device-tree world, we could have a 'memory-region'
 260          * phandle, which gives us a link to our "vram".  Allocating
 261          * is all nicely abstracted behind the dma api, but we need
 262          * to know the entire size to allocate it all in one go. There
 263          * are two cases:
 264          *  1) device with no IOMMU, in which case we need exclusive
 265          *     access to a VRAM carveout big enough for all gpu
 266          *     buffers
 267          *  2) device with IOMMU, but where the bootloader puts up
 268          *     a splash screen.  In this case, the VRAM carveout
 269          *     need only be large enough for fbdev fb.  But we need
 270          *     exclusive access to the buffer to avoid the kernel
 271          *     using those pages for other purposes (which appears
 272          *     as corruption on screen before we have a chance to
 273          *     load and do initial modeset)
 274          */
 275
 276         node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
 277         if (node) {
 278                 struct resource r;
 279                 ret = of_address_to_resource(node, 0, &r);
 280                 if (ret)
 281                         return ret;
 282                 size = r.end - r.start;
 283                 DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
 284
 285                 /* if we have no IOMMU, then we need to use carveout allocator.
 286                  * Grab the entire CMA chunk carved out in early startup in
 287                  * mach-msm:
 288                  */
 289         } else if (!iommu_present(&platform_bus_type)) {
 290                 DRM_INFO("using %s VRAM carveout\n", vram);
 291                 size = memparse(vram, NULL);
 292         }
 293
 294         if (size) {
 295                 DEFINE_DMA_ATTRS(attrs);
 296                 void *p;
 297
 298                 priv->vram.size = size;
 299
 300                 drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
 301
 302                 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
 303                 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
 304
 305                 /* note that for no-kernel-mapping, the vaddr returned
 306                  * is bogus, but non-null if allocation succeeded:
 307                  */
 308                 p = dma_alloc_attrs(dev->dev, size,
 309                                 &priv->vram.paddr, GFP_KERNEL, &attrs);
 310                 if (!p) {
 311                         dev_err(dev->dev, "failed to allocate VRAM\n");
 312                         priv->vram.paddr = 0;
 313                         return -ENOMEM;
 314                 }
 315
 316                 dev_info(dev->dev, "VRAM: %08x->%08x\n",
 317                                 (uint32_t)priv->vram.paddr,
 318                                 (uint32_t)(priv->vram.paddr + size));
 319         }
 320
 321         return ret;
 322 }
 323
 324 static int msm_load(struct drm_device *dev, unsigned long flags)
 325 {
 326         struct platform_device *pdev = dev->platformdev;
 327         struct msm_drm_private *priv;
 328         struct msm_kms *kms;
 329         int ret;
 330
 331         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 332         if (!priv) {
 333                 dev_err(dev->dev, "failed to allocate private data\n");
 334                 return -ENOMEM;
 335         }
 336
 337         dev->dev_private = priv;
 338
 339         priv->wq = alloc_ordered_workqueue("msm", 0);
 340         init_waitqueue_head(&priv->fence_event);
 341         init_waitqueue_head(&priv->pending_crtcs_event);
 342
 343         INIT_LIST_HEAD(&priv->inactive_list);
 344         INIT_LIST_HEAD(&priv->fence_cbs);
 345         INIT_LIST_HEAD(&priv->vblank_ctrl.event_list);
 346         INIT_WORK(&priv->vblank_ctrl.work, vblank_ctrl_worker);
 347         spin_lock_init(&priv->vblank_ctrl.lock);
 348
 349         drm_mode_config_init(dev);
 350
 351         platform_set_drvdata(pdev, dev);
 352
 353         /* Bind all our sub-components: */
 354         ret = component_bind_all(dev->dev, dev);
 355         if (ret)
 356                 return ret;
 357
 358         ret = msm_init_vram(dev);
 359         if (ret)
 360                 goto fail;
 361
 362         switch (get_mdp_ver(pdev)) {
 363         case 4:
 364                 kms = mdp4_kms_init(dev);
 365                 break;
 366         case 5:
 367                 kms = mdp5_kms_init(dev);
 368                 break;
 369         default:
 370                 kms = ERR_PTR(-ENODEV);
 371                 break;
 372         }
 373
 374         if (IS_ERR(kms)) {
 375                 /*
 376                  * NOTE: once we have GPU support, having no kms should not
 377                  * be considered fatal.. ideally we would still support gpu
 378                  * and (for example) use dmabuf/prime to share buffers with
 379                  * imx drm driver on iMX5
 380                  */
 381                 dev_err(dev->dev, "failed to load kms\n");
 382                 ret = PTR_ERR(kms);
 383                 goto fail;
 384         }
 385
 386         priv->kms = kms;
 387
 388         if (kms) {
 389                 pm_runtime_enable(dev->dev);
 390                 ret = kms->funcs->hw_init(kms);
 391                 if (ret) {
 392                         dev_err(dev->dev, "kms hw init failed: %d\n", ret);
 393                         goto fail;
 394                 }
 395         }
 396
 397         dev->mode_config.funcs = &mode_config_funcs;
 398
 399         ret = drm_vblank_init(dev, priv->num_crtcs);
 400         if (ret < 0) {
 401                 dev_err(dev->dev, "failed to initialize vblank\n");
 402                 goto fail;
 403         }
 404
 405         pm_runtime_get_sync(dev->dev);
 406         ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
 407         pm_runtime_put_sync(dev->dev);
 408         if (ret < 0) {
 409                 dev_err(dev->dev, "failed to install IRQ handler\n");
 410                 goto fail;
 411         }
 412
 413         drm_mode_config_reset(dev);
 414
 415 #ifdef CONFIG_DRM_FBDEV_EMULATION
 416         if (fbdev)
 417                 priv->fbdev = msm_fbdev_init(dev);
 418 #endif
 419
 420         ret = msm_debugfs_late_init(dev);
 421         if (ret)
 422                 goto fail;
 423
 424         drm_kms_helper_poll_init(dev);
 425
 426         return 0;
 427
 428 fail:
 429         msm_unload(dev);
 430         return ret;
 431 }
 432
 433 static void load_gpu(struct drm_device *dev)
 434 {
 435         static DEFINE_MUTEX(init_lock);
 436         struct msm_drm_private *priv = dev->dev_private;
 437
 438         mutex_lock(&init_lock);
 439
 440         if (!priv->gpu)
 441                 priv->gpu = adreno_load_gpu(dev);
 442
 443         mutex_unlock(&init_lock);
 444 }
 445
 446 static int msm_open(struct drm_device *dev, struct drm_file *file)
 447 {
 448         struct msm_file_private *ctx;
 449
 450         /* For now, load gpu on open.. to avoid the requirement of having
 451          * firmware in the initrd.
 452          */
 453         load_gpu(dev);
 454
 455         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 456         if (!ctx)
 457                 return -ENOMEM;
 458
 459         file->driver_priv = ctx;
 460
 461         return 0;
 462 }
 463
 464 static void msm_preclose(struct drm_device *dev, struct drm_file *file)
 465 {
 466         struct msm_drm_private *priv = dev->dev_private;
 467         struct msm_file_private *ctx = file->driver_priv;
 468         struct msm_kms *kms = priv->kms;
 469
 470         if (kms)
 471                 kms->funcs->preclose(kms, file);
 472
 473         mutex_lock(&dev->struct_mutex);
 474         if (ctx == priv->lastctx)
 475                 priv->lastctx = NULL;
 476         mutex_unlock(&dev->struct_mutex);
 477
 478         kfree(ctx);
 479 }
 480
 481 static void msm_lastclose(struct drm_device *dev)
 482 {
 483         struct msm_drm_private *priv = dev->dev_private;
 484         if (priv->fbdev)
 485                 drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
 486 }
 487
 488 static irqreturn_t msm_irq(int irq, void *arg)
 489 {
 490         struct drm_device *dev = arg;
 491         struct msm_drm_private *priv = dev->dev_private;
 492         struct msm_kms *kms = priv->kms;
 493         BUG_ON(!kms);
 494         return kms->funcs->irq(kms);
 495 }
 496
 497 static void msm_irq_preinstall(struct drm_device *dev)
 498 {
 499         struct msm_drm_private *priv = dev->dev_private;
 500         struct msm_kms *kms = priv->kms;
 501         BUG_ON(!kms);
 502         kms->funcs->irq_preinstall(kms);
 503 }
 504
 505 static int msm_irq_postinstall(struct drm_device *dev)
 506 {
 507         struct msm_drm_private *priv = dev->dev_private;
 508         struct msm_kms *kms = priv->kms;
 509         BUG_ON(!kms);
 510         return kms->funcs->irq_postinstall(kms);
 511 }
 512
 513 static void msm_irq_uninstall(struct drm_device *dev)
 514 {
 515         struct msm_drm_private *priv = dev->dev_private;
 516         struct msm_kms *kms = priv->kms;
 517         BUG_ON(!kms);
 518         kms->funcs->irq_uninstall(kms);
 519 }
 520
 521 static int msm_enable_vblank(struct drm_device *dev, unsigned int pipe)
 522 {
 523         struct msm_drm_private *priv = dev->dev_private;
 524         struct msm_kms *kms = priv->kms;
 525         if (!kms)
 526                 return -ENXIO;
 527         DBG("dev=%p, crtc=%u", dev, pipe);
 528         return vblank_ctrl_queue_work(priv, pipe, true);
 529 }
 530
 531 static void msm_disable_vblank(struct drm_device *dev, unsigned int pipe)
 532 {
 533         struct msm_drm_private *priv = dev->dev_private;
 534         struct msm_kms *kms = priv->kms;
 535         if (!kms)
 536                 return;
 537         DBG("dev=%p, crtc=%u", dev, pipe);
 538         vblank_ctrl_queue_work(priv, pipe, false);
 539 }
 540
 541 /*
 542  * DRM debugfs:
 543  */
 544
 545 #ifdef CONFIG_DEBUG_FS
 546 static int msm_gpu_show(struct drm_device *dev, struct seq_file *m)
 547 {
 548         struct msm_drm_private *priv = dev->dev_private;
 549         struct msm_gpu *gpu = priv->gpu;
 550
 551         if (gpu) {
 552                 seq_printf(m, "%s Status:\n", gpu->name);
 553                 gpu->funcs->show(gpu, m);
 554         }
 555
 556         return 0;
 557 }
 558
 559 static int msm_gem_show(struct drm_device *dev, struct seq_file *m)
 560 {
 561         struct msm_drm_private *priv = dev->dev_private;
 562         struct msm_gpu *gpu = priv->gpu;
 563
 564         if (gpu) {
 565                 seq_printf(m, "Active Objects (%s):\n", gpu->name);
 566                 msm_gem_describe_objects(&gpu->active_list, m);
 567         }
 568
 569         seq_printf(m, "Inactive Objects:\n");
 570         msm_gem_describe_objects(&priv->inactive_list, m);
 571
 572         return 0;
 573 }
 574
 575 static int msm_mm_show(struct drm_device *dev, struct seq_file *m)
 576 {
 577         return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
 578 }
 579
 580 static int msm_fb_show(struct drm_device *dev, struct seq_file *m)
 581 {
 582         struct msm_drm_private *priv = dev->dev_private;
 583         struct drm_framebuffer *fb, *fbdev_fb = NULL;
 584
 585         if (priv->fbdev) {
 586                 seq_printf(m, "fbcon ");
 587                 fbdev_fb = priv->fbdev->fb;
 588                 msm_framebuffer_describe(fbdev_fb, m);
 589         }
 590
 591         mutex_lock(&dev->mode_config.fb_lock);
 592         list_for_each_entry(fb, &dev->mode_config.fb_list, head) {
 593                 if (fb == fbdev_fb)
 594                         continue;
 595
 596                 seq_printf(m, "user ");
 597                 msm_framebuffer_describe(fb, m);
 598         }
 599         mutex_unlock(&dev->mode_config.fb_lock);
 600
 601         return 0;
 602 }
 603
 604 static int show_locked(struct seq_file *m, void *arg)
 605 {
 606         struct drm_info_node *node = (struct drm_info_node *) m->private;
 607         struct drm_device *dev = node->minor->dev;
 608         int (*show)(struct drm_device *dev, struct seq_file *m) =
 609                         node->info_ent->data;
 610         int ret;
 611
 612         ret = mutex_lock_interruptible(&dev->struct_mutex);
 613         if (ret)
 614                 return ret;
 615
 616         ret = show(dev, m);
 617
 618         mutex_unlock(&dev->struct_mutex);
 619
 620         return ret;
 621 }
 622
 623 static struct drm_info_list msm_debugfs_list[] = {
 624                 {"gpu", show_locked, 0, msm_gpu_show},
 625                 {"gem", show_locked, 0, msm_gem_show},
 626                 { "mm", show_locked, 0, msm_mm_show },
 627                 { "fb", show_locked, 0, msm_fb_show },
 628 };
 629
 630 static int late_init_minor(struct drm_minor *minor)
 631 {
 632         int ret;
 633
 634         if (!minor)
 635                 return 0;
 636
 637         ret = msm_rd_debugfs_init(minor);
 638         if (ret) {
 639                 dev_err(minor->dev->dev, "could not install rd debugfs\n");
 640                 return ret;
 641         }
 642
 643         ret = msm_perf_debugfs_init(minor);
 644         if (ret) {
 645                 dev_err(minor->dev->dev, "could not install perf debugfs\n");
 646                 return ret;
 647         }
 648
 649         return 0;
 650 }
 651
 652 int msm_debugfs_late_init(struct drm_device *dev)
 653 {
 654         int ret;
 655         ret = late_init_minor(dev->primary);
 656         if (ret)
 657                 return ret;
 658         ret = late_init_minor(dev->render);
 659         if (ret)
 660                 return ret;
 661         ret = late_init_minor(dev->control);
 662         return ret;
 663 }
 664
 665 static int msm_debugfs_init(struct drm_minor *minor)
 666 {
 667         struct drm_device *dev = minor->dev;
 668         int ret;
 669
 670         ret = drm_debugfs_create_files(msm_debugfs_list,
 671                         ARRAY_SIZE(msm_debugfs_list),
 672                         minor->debugfs_root, minor);
 673
 674         if (ret) {
 675                 dev_err(dev->dev, "could not install msm_debugfs_list\n");
 676                 return ret;
 677         }
 678
 679         return 0;
 680 }
 681
 682 static void msm_debugfs_cleanup(struct drm_minor *minor)
 683 {
 684         drm_debugfs_remove_files(msm_debugfs_list,
 685                         ARRAY_SIZE(msm_debugfs_list), minor);
 686         if (!minor->dev->dev_private)
 687                 return;
 688         msm_rd_debugfs_cleanup(minor);
 689         msm_perf_debugfs_cleanup(minor);
 690 }
 691 #endif
 692
 693 /*
 694  * Fences:
 695  */
 696
 697 int msm_wait_fence(struct drm_device *dev, uint32_t fence,
 698                 ktime_t *timeout , bool interruptible)
 699 {
 700         struct msm_drm_private *priv = dev->dev_private;
 701         int ret;
 702
 703         if (!priv->gpu)
 704                 return 0;
 705
 706         if (fence > priv->gpu->submitted_fence) {
 707                 DRM_ERROR("waiting on invalid fence: %u (of %u)\n",
 708                                 fence, priv->gpu->submitted_fence);
 709                 return -EINVAL;
 710         }
 711
 712         if (!timeout) {
 713                 /* no-wait: */
 714                 ret = fence_completed(dev, fence) ? 0 : -EBUSY;
 715         } else {
 716                 ktime_t now = ktime_get();
 717                 unsigned long remaining_jiffies;
 718
 719                 if (ktime_compare(*timeout, now) < 0) {
 720                         remaining_jiffies = 0;
 721                 } else {
 722                         ktime_t rem = ktime_sub(*timeout, now);
 723                         struct timespec ts = ktime_to_timespec(rem);
 724                         remaining_jiffies = timespec_to_jiffies(&ts);
 725                 }
 726
 727                 if (interruptible)
 728                         ret = wait_event_interruptible_timeout(priv->fence_event,
 729                                 fence_completed(dev, fence),
 730                                 remaining_jiffies);
 731                 else
 732                         ret = wait_event_timeout(priv->fence_event,
 733                                 fence_completed(dev, fence),
 734                                 remaining_jiffies);
 735
 736                 if (ret == 0) {
 737                         DBG("timeout waiting for fence: %u (completed: %u)",
 738                                         fence, priv->completed_fence);
 739                         ret = -ETIMEDOUT;
 740                 } else if (ret != -ERESTARTSYS) {
 741                         ret = 0;
 742                 }
 743         }
 744
 745         return ret;
 746 }
 747
 748 int msm_queue_fence_cb(struct drm_device *dev,
 749                 struct msm_fence_cb *cb, uint32_t fence)
 750 {
 751         struct msm_drm_private *priv = dev->dev_private;
 752         int ret = 0;
 753
 754         mutex_lock(&dev->struct_mutex);
 755         if (!list_empty(&cb->work.entry)) {
 756                 ret = -EINVAL;
 757         } else if (fence > priv->completed_fence) {
 758                 cb->fence = fence;
 759                 list_add_tail(&cb->work.entry, &priv->fence_cbs);
 760         } else {
 761                 queue_work(priv->wq, &cb->work);
 762         }
 763         mutex_unlock(&dev->struct_mutex);
 764
 765         return ret;
 766 }
 767
 768 /* called from workqueue */
 769 void msm_update_fence(struct drm_device *dev, uint32_t fence)
 770 {
 771         struct msm_drm_private *priv = dev->dev_private;
 772
 773         mutex_lock(&dev->struct_mutex);
 774         priv->completed_fence = max(fence, priv->completed_fence);
 775
 776         while (!list_empty(&priv->fence_cbs)) {
 777                 struct msm_fence_cb *cb;
 778
 779                 cb = list_first_entry(&priv->fence_cbs,
 780                                 struct msm_fence_cb, work.entry);
 781
 782                 if (cb->fence > priv->completed_fence)
 783                         break;
 784
 785                 list_del_init(&cb->work.entry);
 786                 queue_work(priv->wq, &cb->work);
 787         }
 788
 789         mutex_unlock(&dev->struct_mutex);
 790
 791         wake_up_all(&priv->fence_event);
 792 }
 793
 794 void __msm_fence_worker(struct work_struct *work)
 795 {
 796         struct msm_fence_cb *cb = container_of(work, struct msm_fence_cb, work);
 797         cb->func(cb);
 798 }
 799
 800 /*
 801  * DRM ioctls:
 802  */
 803
 804 static int msm_ioctl_get_param(struct drm_device *dev, void *data,
 805                 struct drm_file *file)
 806 {
 807         struct msm_drm_private *priv = dev->dev_private;
 808         struct drm_msm_param *args = data;
 809         struct msm_gpu *gpu;
 810
 811         /* for now, we just have 3d pipe.. eventually this would need to
 812          * be more clever to dispatch to appropriate gpu module:
 813          */
 814         if (args->pipe != MSM_PIPE_3D0)
 815                 return -EINVAL;
 816
 817         gpu = priv->gpu;
 818
 819         if (!gpu)
 820                 return -ENXIO;
 821
 822         return gpu->funcs->get_param(gpu, args->param, &args->value);
 823 }
 824
 825 static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
 826                 struct drm_file *file)
 827 {
 828         struct drm_msm_gem_new *args = data;
 829
 830         if (args->flags & ~MSM_BO_FLAGS) {
 831                 DRM_ERROR("invalid flags: %08x\n", args->flags);
 832                 return -EINVAL;
 833         }
 834
 835         return msm_gem_new_handle(dev, file, args->size,
 836                         args->flags, &args->handle);
 837 }
 838
 839 static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
 840 {
 841         return ktime_set(timeout.tv_sec, timeout.tv_nsec);
 842 }
 843
 844 static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 845                 struct drm_file *file)
 846 {
 847         struct drm_msm_gem_cpu_prep *args = data;
 848         struct drm_gem_object *obj;
 849         ktime_t timeout = to_ktime(args->timeout);
 850         int ret;
 851
 852         if (args->op & ~MSM_PREP_FLAGS) {
 853                 DRM_ERROR("invalid op: %08x\n", args->op);
 854                 return -EINVAL;
 855         }
 856
 857         obj = drm_gem_object_lookup(dev, file, args->handle);
 858         if (!obj)
 859                 return -ENOENT;
 860
 861         ret = msm_gem_cpu_prep(obj, args->op, &timeout);
 862
 863         drm_gem_object_unreference_unlocked(obj);
 864
 865         return ret;
 866 }
 867
 868 static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 869                 struct drm_file *file)
 870 {
 871         struct drm_msm_gem_cpu_fini *args = data;
 872         struct drm_gem_object *obj;
 873         int ret;
 874
 875         obj = drm_gem_object_lookup(dev, file, args->handle);
 876         if (!obj)
 877                 return -ENOENT;
 878
 879         ret = msm_gem_cpu_fini(obj);
 880
 881         drm_gem_object_unreference_unlocked(obj);
 882
 883         return ret;
 884 }
 885
 886 static int msm_ioctl_gem_info(struct drm_device *dev, void *data,
 887                 struct drm_file *file)
 888 {
 889         struct drm_msm_gem_info *args = data;
 890         struct drm_gem_object *obj;
 891         int ret = 0;
 892
 893         if (args->pad)
 894                 return -EINVAL;
 895
 896         obj = drm_gem_object_lookup(dev, file, args->handle);
 897         if (!obj)
 898                 return -ENOENT;
 899
 900         args->offset = msm_gem_mmap_offset(obj);
 901
 902         drm_gem_object_unreference_unlocked(obj);
 903
 904         return ret;
 905 }
 906
 907 static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
 908                 struct drm_file *file)
 909 {
 910         struct drm_msm_wait_fence *args = data;
 911         ktime_t timeout = to_ktime(args->timeout);
 912
 913         if (args->pad) {
 914                 DRM_ERROR("invalid pad: %08x\n", args->pad);
 915                 return -EINVAL;
 916         }
 917
 918         return msm_wait_fence(dev, args->fence, &timeout, true);
 919 }
 920
 921 static const struct drm_ioctl_desc msm_ioctls[] = {
 922         DRM_IOCTL_DEF_DRV(MSM_GET_PARAM,    msm_ioctl_get_param,    DRM_AUTH|DRM_RENDER_ALLOW),
 923         DRM_IOCTL_DEF_DRV(MSM_GEM_NEW,      msm_ioctl_gem_new,      DRM_AUTH|DRM_RENDER_ALLOW),
 924         DRM_IOCTL_DEF_DRV(MSM_GEM_INFO,     msm_ioctl_gem_info,     DRM_AUTH|DRM_RENDER_ALLOW),
 925         DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
 926         DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
 927         DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT,   msm_ioctl_gem_submit,   DRM_AUTH|DRM_RENDER_ALLOW),
 928         DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE,   msm_ioctl_wait_fence,   DRM_AUTH|DRM_RENDER_ALLOW),
 929 };
 930
 931 static const struct vm_operations_struct vm_ops = {
 932         .fault = msm_gem_fault,
 933         .open = drm_gem_vm_open,
 934         .close = drm_gem_vm_close,
 935 };
 936
 937 static const struct file_operations fops = {
 938         .owner              = THIS_MODULE,
 939         .open               = drm_open,
 940         .release            = drm_release,
 941         .unlocked_ioctl     = drm_ioctl,
 942 #ifdef CONFIG_COMPAT
 943         .compat_ioctl       = drm_compat_ioctl,
 944 #endif
 945         .poll               = drm_poll,
 946         .read               = drm_read,
 947         .llseek             = no_llseek,
 948         .mmap               = msm_gem_mmap,
 949 };
 950
 951 static struct drm_driver msm_driver = {
 952         .driver_features    = DRIVER_HAVE_IRQ |
 953                                 DRIVER_GEM |
 954                                 DRIVER_PRIME |
 955                                 DRIVER_RENDER |
 956                                 DRIVER_ATOMIC |
 957                                 DRIVER_MODESET,
 958         .load               = msm_load,
 959         .unload             = msm_unload,
 960         .open               = msm_open,
 961         .preclose           = msm_preclose,
 962         .lastclose          = msm_lastclose,
 963         .set_busid          = drm_platform_set_busid,
 964         .irq_handler        = msm_irq,
 965         .irq_preinstall     = msm_irq_preinstall,
 966         .irq_postinstall    = msm_irq_postinstall,
 967         .irq_uninstall      = msm_irq_uninstall,
 968         .get_vblank_counter = drm_vblank_no_hw_counter,
 969         .enable_vblank      = msm_enable_vblank,
 970         .disable_vblank     = msm_disable_vblank,
 971         .gem_free_object    = msm_gem_free_object,
 972         .gem_vm_ops         = &vm_ops,
 973         .dumb_create        = msm_gem_dumb_create,
 974         .dumb_map_offset    = msm_gem_dumb_map_offset,
 975         .dumb_destroy       = drm_gem_dumb_destroy,
 976         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 977         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 978         .gem_prime_export   = drm_gem_prime_export,
 979         .gem_prime_import   = drm_gem_prime_import,
 980         .gem_prime_pin      = msm_gem_prime_pin,
 981         .gem_prime_unpin    = msm_gem_prime_unpin,
 982         .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
 983         .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
 984         .gem_prime_vmap     = msm_gem_prime_vmap,
 985         .gem_prime_vunmap   = msm_gem_prime_vunmap,
 986         .gem_prime_mmap     = msm_gem_prime_mmap,
 987 #ifdef CONFIG_DEBUG_FS
 988         .debugfs_init       = msm_debugfs_init,
 989         .debugfs_cleanup    = msm_debugfs_cleanup,
 990 #endif
 991         .ioctls             = msm_ioctls,
 992         .num_ioctls         = DRM_MSM_NUM_IOCTLS,
 993         .fops               = &fops,
 994         .name               = "msm",
 995         .desc               = "MSM Snapdragon DRM",
 996         .date               = "20130625",
 997         .major              = 1,
 998         .minor              = 0,
 999 };
1000
1001 #ifdef CONFIG_PM_SLEEP
1002 static int msm_pm_suspend(struct device *dev)
1003 {
1004         struct drm_device *ddev = dev_get_drvdata(dev);
1005
1006         drm_kms_helper_poll_disable(ddev);
1007
1008         return 0;
1009 }
1010
1011 static int msm_pm_resume(struct device *dev)
1012 {
1013         struct drm_device *ddev = dev_get_drvdata(dev);
1014
1015         drm_kms_helper_poll_enable(ddev);
1016
1017         return 0;
1018 }
1019 #endif
1020
1021 static const struct dev_pm_ops msm_pm_ops = {
1022         SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
1023 };
1024
1025 /*
1026  * Componentized driver support:
1027  */
1028
1029 /*
1030  * NOTE: duplication of the same code as exynos or imx (or probably any other).
1031  * so probably some room for some helpers
1032  */
1033 static int compare_of(struct device *dev, void *data)
1034 {
1035         return dev->of_node == data;
1036 }
1037
1038 static int add_components(struct device *dev, struct component_match **matchptr,
1039                 const char *name)
1040 {
1041         struct device_node *np = dev->of_node;
1042         unsigned i;
1043
1044         for (i = 0; ; i++) {
1045                 struct device_node *node;
1046
1047                 node = of_parse_phandle(np, name, i);
1048                 if (!node)
1049                         break;
1050
1051                 component_match_add(dev, matchptr, compare_of, node);
1052         }
1053
1054         return 0;
1055 }
1056
1057 static int msm_drm_bind(struct device *dev)
1058 {
1059         return drm_platform_init(&msm_driver, to_platform_device(dev));
1060 }
1061
1062 static void msm_drm_unbind(struct device *dev)
1063 {
1064         drm_put_dev(platform_get_drvdata(to_platform_device(dev)));
1065 }
1066
1067 static const struct component_master_ops msm_drm_ops = {
1068         .bind = msm_drm_bind,
1069         .unbind = msm_drm_unbind,
1070 };
1071
1072 /*
1073  * Platform driver:
1074  */
1075
1076 static int msm_pdev_probe(struct platform_device *pdev)
1077 {
1078         struct component_match *match = NULL;
1079
1080         add_components(&pdev->dev, &match, "connectors");
1081         add_components(&pdev->dev, &match, "gpus");
1082
1083         pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
1084         return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
1085 }
1086
1087 static int msm_pdev_remove(struct platform_device *pdev)
1088 {
1089         component_master_del(&pdev->dev, &msm_drm_ops);
1090
1091         return 0;
1092 }
1093
1094 static const struct platform_device_id msm_id[] = {
1095         { "mdp", 0 },
1096         { }
1097 };
1098
1099 static const struct of_device_id dt_match[] = {
1100         { .compatible = "qcom,mdp4", .data = (void *) 4 },      /* mdp4 */
1101         { .compatible = "qcom,mdp5", .data = (void *) 5 },      /* mdp5 */
1102         /* to support downstream DT files */
1103         { .compatible = "qcom,mdss_mdp", .data = (void *) 5 },  /* mdp5 */
1104         {}
1105 };
1106 MODULE_DEVICE_TABLE(of, dt_match);
1107
1108 static struct platform_driver msm_platform_driver = {
1109         .probe      = msm_pdev_probe,
1110         .remove     = msm_pdev_remove,
1111         .driver     = {
1112                 .name   = "msm",
1113                 .of_match_table = dt_match,
1114                 .pm     = &msm_pm_ops,
1115         },
1116         .id_table   = msm_id,
1117 };
1118
1119 static int __init msm_drm_register(void)
1120 {
1121         DBG("init");
1122         msm_dsi_register();
1123         msm_edp_register();
1124         msm_hdmi_register();
1125         adreno_register();
1126         return platform_driver_register(&msm_platform_driver);
1127 }
1128
1129 static void __exit msm_drm_unregister(void)
1130 {
1131         DBG("fini");
1132         platform_driver_unregister(&msm_platform_driver);
1133         msm_hdmi_unregister();
1134         adreno_unregister();
1135         msm_edp_unregister();
1136         msm_dsi_unregister();
1137 }
1138
1139 module_init(msm_drm_register);
1140 module_exit(msm_drm_unregister);
1141
1142 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
1143 MODULE_DESCRIPTION("MSM DRM Driver");
1144 MODULE_LICENSE("GPL");