Merge tag 'drm-for-v4.9' of git://people.freedesktop.org/~airlied/linux
[cascardo/linux.git] / drivers / gpu / drm / sun4i / sun4i_tv.c
1 /*
2  * Copyright (C) 2015 Free Electrons
3  * Copyright (C) 2015 NextThing Co
4  *
5  * Maxime Ripard <maxime.ripard@free-electrons.com>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  */
12
13 #include <linux/clk.h>
14 #include <linux/component.h>
15 #include <linux/of_address.h>
16 #include <linux/regmap.h>
17 #include <linux/reset.h>
18
19 #include <drm/drmP.h>
20 #include <drm/drm_atomic_helper.h>
21 #include <drm/drm_crtc_helper.h>
22 #include <drm/drm_panel.h>
23
24 #include "sun4i_backend.h"
25 #include "sun4i_drv.h"
26 #include "sun4i_tcon.h"
27
28 #define SUN4I_TVE_EN_REG                0x000
29 #define SUN4I_TVE_EN_DAC_MAP_MASK               GENMASK(19, 4)
30 #define SUN4I_TVE_EN_DAC_MAP(dac, out)          (((out) & 0xf) << (dac + 1) * 4)
31 #define SUN4I_TVE_EN_ENABLE                     BIT(0)
32
33 #define SUN4I_TVE_CFG0_REG              0x004
34 #define SUN4I_TVE_CFG0_DAC_CONTROL_54M          BIT(26)
35 #define SUN4I_TVE_CFG0_CORE_DATAPATH_54M        BIT(25)
36 #define SUN4I_TVE_CFG0_CORE_CONTROL_54M         BIT(24)
37 #define SUN4I_TVE_CFG0_YC_EN                    BIT(17)
38 #define SUN4I_TVE_CFG0_COMP_EN                  BIT(16)
39 #define SUN4I_TVE_CFG0_RES(x)                   ((x) & 0xf)
40 #define SUN4I_TVE_CFG0_RES_480i                 SUN4I_TVE_CFG0_RES(0)
41 #define SUN4I_TVE_CFG0_RES_576i                 SUN4I_TVE_CFG0_RES(1)
42
43 #define SUN4I_TVE_DAC0_REG              0x008
44 #define SUN4I_TVE_DAC0_CLOCK_INVERT             BIT(24)
45 #define SUN4I_TVE_DAC0_LUMA(x)                  (((x) & 3) << 20)
46 #define SUN4I_TVE_DAC0_LUMA_0_4                 SUN4I_TVE_DAC0_LUMA(3)
47 #define SUN4I_TVE_DAC0_CHROMA(x)                (((x) & 3) << 18)
48 #define SUN4I_TVE_DAC0_CHROMA_0_75              SUN4I_TVE_DAC0_CHROMA(3)
49 #define SUN4I_TVE_DAC0_INTERNAL_DAC(x)          (((x) & 3) << 16)
50 #define SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS   SUN4I_TVE_DAC0_INTERNAL_DAC(3)
51 #define SUN4I_TVE_DAC0_DAC_EN(dac)              BIT(dac)
52
53 #define SUN4I_TVE_NOTCH_REG             0x00c
54 #define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x) ((4 - (x)) << (dac * 3))
55
56 #define SUN4I_TVE_CHROMA_FREQ_REG       0x010
57
58 #define SUN4I_TVE_PORCH_REG             0x014
59 #define SUN4I_TVE_PORCH_BACK(x)                 ((x) << 16)
60 #define SUN4I_TVE_PORCH_FRONT(x)                (x)
61
62 #define SUN4I_TVE_LINE_REG              0x01c
63 #define SUN4I_TVE_LINE_FIRST(x)                 ((x) << 16)
64 #define SUN4I_TVE_LINE_NUMBER(x)                (x)
65
66 #define SUN4I_TVE_LEVEL_REG             0x020
67 #define SUN4I_TVE_LEVEL_BLANK(x)                ((x) << 16)
68 #define SUN4I_TVE_LEVEL_BLACK(x)                (x)
69
70 #define SUN4I_TVE_DAC1_REG              0x024
71 #define SUN4I_TVE_DAC1_AMPLITUDE(dac, x)        ((x) << (dac * 8))
72
73 #define SUN4I_TVE_DETECT_STA_REG        0x038
74 #define SUN4I_TVE_DETECT_STA_DAC(dac)           BIT((dac * 8))
75 #define SUN4I_TVE_DETECT_STA_UNCONNECTED                0
76 #define SUN4I_TVE_DETECT_STA_CONNECTED                  1
77 #define SUN4I_TVE_DETECT_STA_GROUND                     2
78
79 #define SUN4I_TVE_CB_CR_LVL_REG         0x10c
80 #define SUN4I_TVE_CB_CR_LVL_CR_BURST(x)         ((x) << 8)
81 #define SUN4I_TVE_CB_CR_LVL_CB_BURST(x)         (x)
82
83 #define SUN4I_TVE_TINT_BURST_PHASE_REG  0x110
84 #define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x)    (x)
85
86 #define SUN4I_TVE_BURST_WIDTH_REG       0x114
87 #define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x)      ((x) << 16)
88 #define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x)    ((x) << 8)
89 #define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x)    (x)
90
91 #define SUN4I_TVE_CB_CR_GAIN_REG        0x118
92 #define SUN4I_TVE_CB_CR_GAIN_CR(x)              ((x) << 8)
93 #define SUN4I_TVE_CB_CR_GAIN_CB(x)              (x)
94
95 #define SUN4I_TVE_SYNC_VBI_REG          0x11c
96 #define SUN4I_TVE_SYNC_VBI_SYNC(x)              ((x) << 16)
97 #define SUN4I_TVE_SYNC_VBI_VBLANK(x)            (x)
98
99 #define SUN4I_TVE_ACTIVE_LINE_REG       0x124
100 #define SUN4I_TVE_ACTIVE_LINE(x)                (x)
101
102 #define SUN4I_TVE_CHROMA_REG            0x128
103 #define SUN4I_TVE_CHROMA_COMP_GAIN(x)           ((x) & 3)
104 #define SUN4I_TVE_CHROMA_COMP_GAIN_50           SUN4I_TVE_CHROMA_COMP_GAIN(2)
105
106 #define SUN4I_TVE_12C_REG               0x12c
107 #define SUN4I_TVE_12C_NOTCH_WIDTH_WIDE          BIT(8)
108 #define SUN4I_TVE_12C_COMP_YUV_EN               BIT(0)
109
110 #define SUN4I_TVE_RESYNC_REG            0x130
111 #define SUN4I_TVE_RESYNC_FIELD                  BIT(31)
112 #define SUN4I_TVE_RESYNC_LINE(x)                ((x) << 16)
113 #define SUN4I_TVE_RESYNC_PIXEL(x)               (x)
114
115 #define SUN4I_TVE_SLAVE_REG             0x134
116
117 #define SUN4I_TVE_WSS_DATA2_REG         0x244
118
119 struct color_gains {
120         u16     cb;
121         u16     cr;
122 };
123
124 struct burst_levels {
125         u16     cb;
126         u16     cr;
127 };
128
129 struct video_levels {
130         u16     black;
131         u16     blank;
132 };
133
134 struct resync_parameters {
135         bool    field;
136         u16     line;
137         u16     pixel;
138 };
139
140 struct tv_mode {
141         char            *name;
142
143         u32             mode;
144         u32             chroma_freq;
145         u16             back_porch;
146         u16             front_porch;
147         u16             line_number;
148         u16             vblank_level;
149
150         u32             hdisplay;
151         u16             hfront_porch;
152         u16             hsync_len;
153         u16             hback_porch;
154
155         u32             vdisplay;
156         u16             vfront_porch;
157         u16             vsync_len;
158         u16             vback_porch;
159
160         bool            yc_en;
161         bool            dac3_en;
162         bool            dac_bit25_en;
163
164         const struct color_gains        *color_gains;
165         const struct burst_levels       *burst_levels;
166         const struct video_levels       *video_levels;
167         const struct resync_parameters  *resync_params;
168 };
169
170 struct sun4i_tv {
171         struct drm_connector    connector;
172         struct drm_encoder      encoder;
173
174         struct clk              *clk;
175         struct regmap           *regs;
176         struct reset_control    *reset;
177
178         struct sun4i_drv        *drv;
179 };
180
181 static const struct video_levels ntsc_video_levels = {
182         .black = 282,   .blank = 240,
183 };
184
185 static const struct video_levels pal_video_levels = {
186         .black = 252,   .blank = 252,
187 };
188
189 static const struct burst_levels ntsc_burst_levels = {
190         .cb = 79,       .cr = 0,
191 };
192
193 static const struct burst_levels pal_burst_levels = {
194         .cb = 40,       .cr = 40,
195 };
196
197 static const struct color_gains ntsc_color_gains = {
198         .cb = 160,      .cr = 160,
199 };
200
201 static const struct color_gains pal_color_gains = {
202         .cb = 224,      .cr = 224,
203 };
204
205 static const struct resync_parameters ntsc_resync_parameters = {
206         .field = false, .line = 14,     .pixel = 12,
207 };
208
209 static const struct resync_parameters pal_resync_parameters = {
210         .field = true,  .line = 13,     .pixel = 12,
211 };
212
213 static const struct tv_mode tv_modes[] = {
214         {
215                 .name           = "NTSC",
216                 .mode           = SUN4I_TVE_CFG0_RES_480i,
217                 .chroma_freq    = 0x21f07c1f,
218                 .yc_en          = true,
219                 .dac3_en        = true,
220                 .dac_bit25_en   = true,
221
222                 .back_porch     = 118,
223                 .front_porch    = 32,
224                 .line_number    = 525,
225
226                 .hdisplay       = 720,
227                 .hfront_porch   = 18,
228                 .hsync_len      = 2,
229                 .hback_porch    = 118,
230
231                 .vdisplay       = 480,
232                 .vfront_porch   = 26,
233                 .vsync_len      = 2,
234                 .vback_porch    = 17,
235
236                 .vblank_level   = 240,
237
238                 .color_gains    = &ntsc_color_gains,
239                 .burst_levels   = &ntsc_burst_levels,
240                 .video_levels   = &ntsc_video_levels,
241                 .resync_params  = &ntsc_resync_parameters,
242         },
243         {
244                 .name           = "PAL",
245                 .mode           = SUN4I_TVE_CFG0_RES_576i,
246                 .chroma_freq    = 0x2a098acb,
247
248                 .back_porch     = 138,
249                 .front_porch    = 24,
250                 .line_number    = 625,
251
252                 .hdisplay       = 720,
253                 .hfront_porch   = 3,
254                 .hsync_len      = 2,
255                 .hback_porch    = 139,
256
257                 .vdisplay       = 576,
258                 .vfront_porch   = 28,
259                 .vsync_len      = 2,
260                 .vback_porch    = 19,
261
262                 .vblank_level   = 252,
263
264                 .color_gains    = &pal_color_gains,
265                 .burst_levels   = &pal_burst_levels,
266                 .video_levels   = &pal_video_levels,
267                 .resync_params  = &pal_resync_parameters,
268         },
269 };
270
271 static inline struct sun4i_tv *
272 drm_encoder_to_sun4i_tv(struct drm_encoder *encoder)
273 {
274         return container_of(encoder, struct sun4i_tv,
275                             encoder);
276 }
277
278 static inline struct sun4i_tv *
279 drm_connector_to_sun4i_tv(struct drm_connector *connector)
280 {
281         return container_of(connector, struct sun4i_tv,
282                             connector);
283 }
284
285 /*
286  * FIXME: If only the drm_display_mode private field was usable, this
287  * could go away...
288  *
289  * So far, it doesn't seem to be preserved when the mode is passed by
290  * to mode_set for some reason.
291  */
292 static const struct tv_mode *sun4i_tv_find_tv_by_mode(const struct drm_display_mode *mode)
293 {
294         int i;
295
296         /* First try to identify the mode by name */
297         for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
298                 const struct tv_mode *tv_mode = &tv_modes[i];
299
300                 DRM_DEBUG_DRIVER("Comparing mode %s vs %s",
301                                  mode->name, tv_mode->name);
302
303                 if (!strcmp(mode->name, tv_mode->name))
304                         return tv_mode;
305         }
306
307         /* Then by number of lines */
308         for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
309                 const struct tv_mode *tv_mode = &tv_modes[i];
310
311                 DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)",
312                                  mode->name, tv_mode->name,
313                                  mode->vdisplay, tv_mode->vdisplay);
314
315                 if (mode->vdisplay == tv_mode->vdisplay)
316                         return tv_mode;
317         }
318
319         return NULL;
320 }
321
322 static void sun4i_tv_mode_to_drm_mode(const struct tv_mode *tv_mode,
323                                       struct drm_display_mode *mode)
324 {
325         DRM_DEBUG_DRIVER("Creating mode %s\n", mode->name);
326
327         mode->type = DRM_MODE_TYPE_DRIVER;
328         mode->clock = 13500;
329         mode->flags = DRM_MODE_FLAG_INTERLACE;
330
331         mode->hdisplay = tv_mode->hdisplay;
332         mode->hsync_start = mode->hdisplay + tv_mode->hfront_porch;
333         mode->hsync_end = mode->hsync_start + tv_mode->hsync_len;
334         mode->htotal = mode->hsync_end  + tv_mode->hback_porch;
335
336         mode->vdisplay = tv_mode->vdisplay;
337         mode->vsync_start = mode->vdisplay + tv_mode->vfront_porch;
338         mode->vsync_end = mode->vsync_start + tv_mode->vsync_len;
339         mode->vtotal = mode->vsync_end  + tv_mode->vback_porch;
340 }
341
342 static int sun4i_tv_atomic_check(struct drm_encoder *encoder,
343                                  struct drm_crtc_state *crtc_state,
344                                  struct drm_connector_state *conn_state)
345 {
346         return 0;
347 }
348
349 static void sun4i_tv_disable(struct drm_encoder *encoder)
350 {
351         struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
352         struct sun4i_drv *drv = tv->drv;
353         struct sun4i_tcon *tcon = drv->tcon;
354
355         DRM_DEBUG_DRIVER("Disabling the TV Output\n");
356
357         sun4i_tcon_channel_disable(tcon, 1);
358
359         regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
360                            SUN4I_TVE_EN_ENABLE,
361                            0);
362         sun4i_backend_disable_color_correction(drv->backend);
363 }
364
365 static void sun4i_tv_enable(struct drm_encoder *encoder)
366 {
367         struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
368         struct sun4i_drv *drv = tv->drv;
369         struct sun4i_tcon *tcon = drv->tcon;
370
371         DRM_DEBUG_DRIVER("Enabling the TV Output\n");
372
373         sun4i_backend_apply_color_correction(drv->backend);
374
375         regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
376                            SUN4I_TVE_EN_ENABLE,
377                            SUN4I_TVE_EN_ENABLE);
378
379         sun4i_tcon_channel_enable(tcon, 1);
380 }
381
382 static void sun4i_tv_mode_set(struct drm_encoder *encoder,
383                               struct drm_display_mode *mode,
384                               struct drm_display_mode *adjusted_mode)
385 {
386         struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
387         struct sun4i_drv *drv = tv->drv;
388         struct sun4i_tcon *tcon = drv->tcon;
389         const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode);
390
391         sun4i_tcon1_mode_set(tcon, mode);
392
393         /* Enable and map the DAC to the output */
394         regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
395                            SUN4I_TVE_EN_DAC_MAP_MASK,
396                            SUN4I_TVE_EN_DAC_MAP(0, 1) |
397                            SUN4I_TVE_EN_DAC_MAP(1, 2) |
398                            SUN4I_TVE_EN_DAC_MAP(2, 3) |
399                            SUN4I_TVE_EN_DAC_MAP(3, 4));
400
401         /* Set PAL settings */
402         regmap_write(tv->regs, SUN4I_TVE_CFG0_REG,
403                      tv_mode->mode |
404                      (tv_mode->yc_en ? SUN4I_TVE_CFG0_YC_EN : 0) |
405                      SUN4I_TVE_CFG0_COMP_EN |
406                      SUN4I_TVE_CFG0_DAC_CONTROL_54M |
407                      SUN4I_TVE_CFG0_CORE_DATAPATH_54M |
408                      SUN4I_TVE_CFG0_CORE_CONTROL_54M);
409
410         /* Configure the DAC for a composite output */
411         regmap_write(tv->regs, SUN4I_TVE_DAC0_REG,
412                      SUN4I_TVE_DAC0_DAC_EN(0) |
413                      (tv_mode->dac3_en ? SUN4I_TVE_DAC0_DAC_EN(3) : 0) |
414                      SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS |
415                      SUN4I_TVE_DAC0_CHROMA_0_75 |
416                      SUN4I_TVE_DAC0_LUMA_0_4 |
417                      SUN4I_TVE_DAC0_CLOCK_INVERT |
418                      (tv_mode->dac_bit25_en ? BIT(25) : 0) |
419                      BIT(30));
420
421         /* Configure the sample delay between DAC0 and the other DAC */
422         regmap_write(tv->regs, SUN4I_TVE_NOTCH_REG,
423                      SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(1, 0) |
424                      SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(2, 0));
425
426         regmap_write(tv->regs, SUN4I_TVE_CHROMA_FREQ_REG,
427                      tv_mode->chroma_freq);
428
429         /* Set the front and back porch */
430         regmap_write(tv->regs, SUN4I_TVE_PORCH_REG,
431                      SUN4I_TVE_PORCH_BACK(tv_mode->back_porch) |
432                      SUN4I_TVE_PORCH_FRONT(tv_mode->front_porch));
433
434         /* Set the lines setup */
435         regmap_write(tv->regs, SUN4I_TVE_LINE_REG,
436                      SUN4I_TVE_LINE_FIRST(22) |
437                      SUN4I_TVE_LINE_NUMBER(tv_mode->line_number));
438
439         regmap_write(tv->regs, SUN4I_TVE_LEVEL_REG,
440                      SUN4I_TVE_LEVEL_BLANK(tv_mode->video_levels->blank) |
441                      SUN4I_TVE_LEVEL_BLACK(tv_mode->video_levels->black));
442
443         regmap_write(tv->regs, SUN4I_TVE_DAC1_REG,
444                      SUN4I_TVE_DAC1_AMPLITUDE(0, 0x18) |
445                      SUN4I_TVE_DAC1_AMPLITUDE(1, 0x18) |
446                      SUN4I_TVE_DAC1_AMPLITUDE(2, 0x18) |
447                      SUN4I_TVE_DAC1_AMPLITUDE(3, 0x18));
448
449         regmap_write(tv->regs, SUN4I_TVE_CB_CR_LVL_REG,
450                      SUN4I_TVE_CB_CR_LVL_CB_BURST(tv_mode->burst_levels->cb) |
451                      SUN4I_TVE_CB_CR_LVL_CR_BURST(tv_mode->burst_levels->cr));
452
453         /* Set burst width for a composite output */
454         regmap_write(tv->regs, SUN4I_TVE_BURST_WIDTH_REG,
455                      SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(126) |
456                      SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(68) |
457                      SUN4I_TVE_BURST_WIDTH_BREEZEWAY(22));
458
459         regmap_write(tv->regs, SUN4I_TVE_CB_CR_GAIN_REG,
460                      SUN4I_TVE_CB_CR_GAIN_CB(tv_mode->color_gains->cb) |
461                      SUN4I_TVE_CB_CR_GAIN_CR(tv_mode->color_gains->cr));
462
463         regmap_write(tv->regs, SUN4I_TVE_SYNC_VBI_REG,
464                      SUN4I_TVE_SYNC_VBI_SYNC(0x10) |
465                      SUN4I_TVE_SYNC_VBI_VBLANK(tv_mode->vblank_level));
466
467         regmap_write(tv->regs, SUN4I_TVE_ACTIVE_LINE_REG,
468                      SUN4I_TVE_ACTIVE_LINE(1440));
469
470         /* Set composite chroma gain to 50 % */
471         regmap_write(tv->regs, SUN4I_TVE_CHROMA_REG,
472                      SUN4I_TVE_CHROMA_COMP_GAIN_50);
473
474         regmap_write(tv->regs, SUN4I_TVE_12C_REG,
475                      SUN4I_TVE_12C_COMP_YUV_EN |
476                      SUN4I_TVE_12C_NOTCH_WIDTH_WIDE);
477
478         regmap_write(tv->regs, SUN4I_TVE_RESYNC_REG,
479                      SUN4I_TVE_RESYNC_PIXEL(tv_mode->resync_params->pixel) |
480                      SUN4I_TVE_RESYNC_LINE(tv_mode->resync_params->line) |
481                      (tv_mode->resync_params->field ?
482                       SUN4I_TVE_RESYNC_FIELD : 0));
483
484         regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0);
485
486         clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000);
487 }
488
489 static struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = {
490         .atomic_check   = sun4i_tv_atomic_check,
491         .disable        = sun4i_tv_disable,
492         .enable         = sun4i_tv_enable,
493         .mode_set       = sun4i_tv_mode_set,
494 };
495
496 static void sun4i_tv_destroy(struct drm_encoder *encoder)
497 {
498         drm_encoder_cleanup(encoder);
499 }
500
501 static struct drm_encoder_funcs sun4i_tv_funcs = {
502         .destroy        = sun4i_tv_destroy,
503 };
504
505 static int sun4i_tv_comp_get_modes(struct drm_connector *connector)
506 {
507         int i;
508
509         for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
510                 struct drm_display_mode *mode;
511                 const struct tv_mode *tv_mode = &tv_modes[i];
512
513                 mode = drm_mode_create(connector->dev);
514                 if (!mode) {
515                         DRM_ERROR("Failed to create a new display mode\n");
516                         return 0;
517                 }
518
519                 strcpy(mode->name, tv_mode->name);
520
521                 sun4i_tv_mode_to_drm_mode(tv_mode, mode);
522                 drm_mode_probed_add(connector, mode);
523         }
524
525         return i;
526 }
527
528 static int sun4i_tv_comp_mode_valid(struct drm_connector *connector,
529                                     struct drm_display_mode *mode)
530 {
531         /* TODO */
532         return MODE_OK;
533 }
534
535 static struct drm_connector_helper_funcs sun4i_tv_comp_connector_helper_funcs = {
536         .get_modes      = sun4i_tv_comp_get_modes,
537         .mode_valid     = sun4i_tv_comp_mode_valid,
538 };
539
540 static enum drm_connector_status
541 sun4i_tv_comp_connector_detect(struct drm_connector *connector, bool force)
542 {
543         return connector_status_connected;
544 }
545
546 static void
547 sun4i_tv_comp_connector_destroy(struct drm_connector *connector)
548 {
549         drm_connector_cleanup(connector);
550 }
551
552 static struct drm_connector_funcs sun4i_tv_comp_connector_funcs = {
553         .dpms                   = drm_atomic_helper_connector_dpms,
554         .detect                 = sun4i_tv_comp_connector_detect,
555         .fill_modes             = drm_helper_probe_single_connector_modes,
556         .destroy                = sun4i_tv_comp_connector_destroy,
557         .reset                  = drm_atomic_helper_connector_reset,
558         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
559         .atomic_destroy_state   = drm_atomic_helper_connector_destroy_state,
560 };
561
562 static struct regmap_config sun4i_tv_regmap_config = {
563         .reg_bits       = 32,
564         .val_bits       = 32,
565         .reg_stride     = 4,
566         .max_register   = SUN4I_TVE_WSS_DATA2_REG,
567         .name           = "tv-encoder",
568 };
569
570 static int sun4i_tv_bind(struct device *dev, struct device *master,
571                          void *data)
572 {
573         struct platform_device *pdev = to_platform_device(dev);
574         struct drm_device *drm = data;
575         struct sun4i_drv *drv = drm->dev_private;
576         struct sun4i_tv *tv;
577         struct resource *res;
578         void __iomem *regs;
579         int ret;
580
581         tv = devm_kzalloc(dev, sizeof(*tv), GFP_KERNEL);
582         if (!tv)
583                 return -ENOMEM;
584         tv->drv = drv;
585         dev_set_drvdata(dev, tv);
586
587         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
588         regs = devm_ioremap_resource(dev, res);
589         if (IS_ERR(regs)) {
590                 dev_err(dev, "Couldn't map the TV encoder registers\n");
591                 return PTR_ERR(regs);
592         }
593
594         tv->regs = devm_regmap_init_mmio(dev, regs,
595                                          &sun4i_tv_regmap_config);
596         if (IS_ERR(tv->regs)) {
597                 dev_err(dev, "Couldn't create the TV encoder regmap\n");
598                 return PTR_ERR(tv->regs);
599         }
600
601         tv->reset = devm_reset_control_get(dev, NULL);
602         if (IS_ERR(tv->reset)) {
603                 dev_err(dev, "Couldn't get our reset line\n");
604                 return PTR_ERR(tv->reset);
605         }
606
607         ret = reset_control_deassert(tv->reset);
608         if (ret) {
609                 dev_err(dev, "Couldn't deassert our reset line\n");
610                 return ret;
611         }
612
613         tv->clk = devm_clk_get(dev, NULL);
614         if (IS_ERR(tv->clk)) {
615                 dev_err(dev, "Couldn't get the TV encoder clock\n");
616                 ret = PTR_ERR(tv->clk);
617                 goto err_assert_reset;
618         }
619         clk_prepare_enable(tv->clk);
620
621         drm_encoder_helper_add(&tv->encoder,
622                                &sun4i_tv_helper_funcs);
623         ret = drm_encoder_init(drm,
624                                &tv->encoder,
625                                &sun4i_tv_funcs,
626                                DRM_MODE_ENCODER_TVDAC,
627                                NULL);
628         if (ret) {
629                 dev_err(dev, "Couldn't initialise the TV encoder\n");
630                 goto err_disable_clk;
631         }
632
633         tv->encoder.possible_crtcs = BIT(0);
634
635         drm_connector_helper_add(&tv->connector,
636                                  &sun4i_tv_comp_connector_helper_funcs);
637         ret = drm_connector_init(drm, &tv->connector,
638                                  &sun4i_tv_comp_connector_funcs,
639                                  DRM_MODE_CONNECTOR_Composite);
640         if (ret) {
641                 dev_err(dev,
642                         "Couldn't initialise the Composite connector\n");
643                 goto err_cleanup_connector;
644         }
645         tv->connector.interlace_allowed = true;
646
647         drm_mode_connector_attach_encoder(&tv->connector, &tv->encoder);
648
649         return 0;
650
651 err_cleanup_connector:
652         drm_encoder_cleanup(&tv->encoder);
653 err_disable_clk:
654         clk_disable_unprepare(tv->clk);
655 err_assert_reset:
656         reset_control_assert(tv->reset);
657         return ret;
658 }
659
660 static void sun4i_tv_unbind(struct device *dev, struct device *master,
661                             void *data)
662 {
663         struct sun4i_tv *tv = dev_get_drvdata(dev);
664
665         drm_connector_cleanup(&tv->connector);
666         drm_encoder_cleanup(&tv->encoder);
667         clk_disable_unprepare(tv->clk);
668 }
669
670 static struct component_ops sun4i_tv_ops = {
671         .bind   = sun4i_tv_bind,
672         .unbind = sun4i_tv_unbind,
673 };
674
675 static int sun4i_tv_probe(struct platform_device *pdev)
676 {
677         return component_add(&pdev->dev, &sun4i_tv_ops);
678 }
679
680 static int sun4i_tv_remove(struct platform_device *pdev)
681 {
682         component_del(&pdev->dev, &sun4i_tv_ops);
683
684         return 0;
685 }
686
687 static const struct of_device_id sun4i_tv_of_table[] = {
688         { .compatible = "allwinner,sun4i-a10-tv-encoder" },
689         { }
690 };
691 MODULE_DEVICE_TABLE(of, sun4i_tv_of_table);
692
693 static struct platform_driver sun4i_tv_platform_driver = {
694         .probe          = sun4i_tv_probe,
695         .remove         = sun4i_tv_remove,
696         .driver         = {
697                 .name           = "sun4i-tve",
698                 .of_match_table = sun4i_tv_of_table,
699         },
700 };
701 module_platform_driver(sun4i_tv_platform_driver);
702
703 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
704 MODULE_DESCRIPTION("Allwinner A10 TV Encoder Driver");
705 MODULE_LICENSE("GPL");