drivers/i2c/busses/i2c-sh_mobile.c

   1 /*
   2  * SuperH Mobile I2C Controller
   3  *
   4  * Copyright (C) 2008 Magnus Damm
   5  *
   6  * Portions of the code based on out-of-tree driver i2c-sh7343.c
   7  * Copyright (c) 2006 Carlos Munoz <carlos@kenati.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/init.h>
  26 #include <linux/delay.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/i2c.h>
  30 #include <linux/err.h>
  31 #include <linux/pm_runtime.h>
  32 #include <linux/clk.h>
  33 #include <linux/io.h>
  34 #include <linux/slab.h>
  35 #include <linux/i2c/i2c-sh_mobile.h>
  36
  37 /* Transmit operation:                                                      */
  38 /*                                                                          */
  39 /* 0 byte transmit                                                          */
  40 /* BUS:     S     A8     ACK   P                                            */
  41 /* IRQ:       DTE   WAIT                                                    */
  42 /* ICIC:                                                                    */
  43 /* ICCR: 0x94 0x90                                                          */
  44 /* ICDR:      A8                                                            */
  45 /*                                                                          */
  46 /* 1 byte transmit                                                          */
  47 /* BUS:     S     A8     ACK   D8(1)   ACK   P                              */
  48 /* IRQ:       DTE   WAIT         WAIT                                       */
  49 /* ICIC:      -DTE                                                          */
  50 /* ICCR: 0x94       0x90                                                    */
  51 /* ICDR:      A8    D8(1)                                                   */
  52 /*                                                                          */
  53 /* 2 byte transmit                                                          */
  54 /* BUS:     S     A8     ACK   D8(1)   ACK   D8(2)   ACK   P                */
  55 /* IRQ:       DTE   WAIT         WAIT          WAIT                         */
  56 /* ICIC:      -DTE                                                          */
  57 /* ICCR: 0x94                    0x90                                       */
  58 /* ICDR:      A8    D8(1)        D8(2)                                      */
  59 /*                                                                          */
  60 /* 3 bytes or more, +---------+ gets repeated                               */
  61 /*                                                                          */
  62 /*                                                                          */
  63 /* Receive operation:                                                       */
  64 /*                                                                          */
  65 /* 0 byte receive - not supported since slave may hold SDA low              */
  66 /*                                                                          */
  67 /* 1 byte receive       [TX] | [RX]                                         */
  68 /* BUS:     S     A8     ACK | D8(1)   ACK   P                              */
  69 /* IRQ:       DTE   WAIT     |   WAIT     DTE                               */
  70 /* ICIC:      -DTE           |   +DTE                                       */
  71 /* ICCR: 0x94       0x81     |   0xc0                                       */
  72 /* ICDR:      A8             |            D8(1)                             */
  73 /*                                                                          */
  74 /* 2 byte receive        [TX]| [RX]                                         */
  75 /* BUS:     S     A8     ACK | D8(1)   ACK   D8(2)   ACK   P                */
  76 /* IRQ:       DTE   WAIT     |   WAIT          WAIT     DTE                 */
  77 /* ICIC:      -DTE           |                 +DTE                         */
  78 /* ICCR: 0x94       0x81     |                 0xc0                         */
  79 /* ICDR:      A8             |                 D8(1)    D8(2)               */
  80 /*                                                                          */
  81 /* 3 byte receive       [TX] | [RX]                                         */
  82 /* BUS:     S     A8     ACK | D8(1)   ACK   D8(2)   ACK   D8(3)   ACK    P */
  83 /* IRQ:       DTE   WAIT     |   WAIT          WAIT         WAIT      DTE   */
  84 /* ICIC:      -DTE           |                              +DTE            */
  85 /* ICCR: 0x94       0x81     |                              0xc0            */
  86 /* ICDR:      A8             |                 D8(1)        D8(2)     D8(3) */
  87 /*                                                                          */
  88 /* 4 bytes or more, this part is repeated    +---------+                    */
  89 /*                                                                          */
  90 /*                                                                          */
  91 /* Interrupt order and BUSY flag                                            */
  92 /*     ___                                                 _                */
  93 /* SDA ___\___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXAAAAAAAAA___/                 */
  94 /* SCL      \_/1\_/2\_/3\_/4\_/5\_/6\_/7\_/8\___/9\_____/                   */
  95 /*                                                                          */
  96 /*        S   D7  D6  D5  D4  D3  D2  D1  D0              P                 */
  97 /*                                           ___                            */
  98 /* WAIT IRQ ________________________________/   \___________                */
  99 /* TACK IRQ ____________________________________/   \_______                */
 100 /* DTE  IRQ __________________________________________/   \_                */
 101 /* AL   IRQ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX                */
 102 /*         _______________________________________________                  */
 103 /* BUSY __/                                               \_                */
 104 /*                                                                          */
 105
 106 enum sh_mobile_i2c_op {
 107         OP_START = 0,
 108         OP_TX_FIRST,
 109         OP_TX,
 110         OP_TX_STOP,
 111         OP_TX_TO_RX,
 112         OP_RX,
 113         OP_RX_STOP,
 114         OP_RX_STOP_DATA,
 115 };
 116
 117 struct sh_mobile_i2c_data {
 118         struct device *dev;
 119         void __iomem *reg;
 120         struct i2c_adapter adap;
 121         unsigned long bus_speed;
 122         struct clk *clk;
 123         u_int8_t icic;
 124         u_int8_t iccl;
 125         u_int8_t icch;
 126         u_int8_t flags;
 127
 128         spinlock_t lock;
 129         wait_queue_head_t wait;
 130         struct i2c_msg *msg;
 131         int pos;
 132         int sr;
 133 };
 134
 135 #define IIC_FLAG_HAS_ICIC67     (1 << 0)
 136
 137 #define NORMAL_SPEED            100000 /* FAST_SPEED 400000 */
 138
 139 /* Register offsets */
 140 #define ICDR                    0x00
 141 #define ICCR                    0x04
 142 #define ICSR                    0x08
 143 #define ICIC                    0x0c
 144 #define ICCL                    0x10
 145 #define ICCH                    0x14
 146
 147 /* Register bits */
 148 #define ICCR_ICE                0x80
 149 #define ICCR_RACK               0x40
 150 #define ICCR_TRS                0x10
 151 #define ICCR_BBSY               0x04
 152 #define ICCR_SCP                0x01
 153
 154 #define ICSR_SCLM               0x80
 155 #define ICSR_SDAM               0x40
 156 #define SW_DONE                 0x20
 157 #define ICSR_BUSY               0x10
 158 #define ICSR_AL                 0x08
 159 #define ICSR_TACK               0x04
 160 #define ICSR_WAIT               0x02
 161 #define ICSR_DTE                0x01
 162
 163 #define ICIC_ICCLB8             0x80
 164 #define ICIC_ICCHB8             0x40
 165 #define ICIC_ALE                0x08
 166 #define ICIC_TACKE              0x04
 167 #define ICIC_WAITE              0x02
 168 #define ICIC_DTEE               0x01
 169
 170 static void iic_wr(struct sh_mobile_i2c_data *pd, int offs, unsigned char data)
 171 {
 172         if (offs == ICIC)
 173                 data |= pd->icic;
 174
 175         iowrite8(data, pd->reg + offs);
 176 }
 177
 178 static unsigned char iic_rd(struct sh_mobile_i2c_data *pd, int offs)
 179 {
 180         return ioread8(pd->reg + offs);
 181 }
 182
 183 static void iic_set_clr(struct sh_mobile_i2c_data *pd, int offs,
 184                         unsigned char set, unsigned char clr)
 185 {
 186         iic_wr(pd, offs, (iic_rd(pd, offs) | set) & ~clr);
 187 }
 188
 189 static void activate_ch(struct sh_mobile_i2c_data *pd)
 190 {
 191         unsigned long i2c_clk;
 192         u_int32_t num;
 193         u_int32_t denom;
 194         u_int32_t tmp;
 195
 196         /* Wake up device and enable clock */
 197         pm_runtime_get_sync(pd->dev);
 198         clk_enable(pd->clk);
 199
 200         /* Get clock rate after clock is enabled */
 201         i2c_clk = clk_get_rate(pd->clk);
 202
 203         /* Calculate the value for iccl. From the data sheet:
 204          * iccl = (p clock / transfer rate) * (L / (L + H))
 205          * where L and H are the SCL low/high ratio (5/4 in this case).
 206          * We also round off the result.
 207          */
 208         num = i2c_clk * 5;
 209         denom = pd->bus_speed * 9;
 210         tmp = num * 10 / denom;
 211         if (tmp % 10 >= 5)
 212                 pd->iccl = (u_int8_t)((num/denom) + 1);
 213         else
 214                 pd->iccl = (u_int8_t)(num/denom);
 215
 216         /* one more bit of ICCL in ICIC */
 217         if (pd->flags & IIC_FLAG_HAS_ICIC67) {
 218                 if ((num/denom) > 0xff)
 219                         pd->icic |= ICIC_ICCLB8;
 220                 else
 221                         pd->icic &= ~ICIC_ICCLB8;
 222         }
 223
 224         /* Calculate the value for icch. From the data sheet:
 225            icch = (p clock / transfer rate) * (H / (L + H)) */
 226         num = i2c_clk * 4;
 227         tmp = num * 10 / denom;
 228         if (tmp % 10 >= 5)
 229                 pd->icch = (u_int8_t)((num/denom) + 1);
 230         else
 231                 pd->icch = (u_int8_t)(num/denom);
 232
 233         /* one more bit of ICCH in ICIC */
 234         if (pd->flags & IIC_FLAG_HAS_ICIC67) {
 235                 if ((num/denom) > 0xff)
 236                         pd->icic |= ICIC_ICCHB8;
 237                 else
 238                         pd->icic &= ~ICIC_ICCHB8;
 239         }
 240
 241         /* Enable channel and configure rx ack */
 242         iic_set_clr(pd, ICCR, ICCR_ICE, 0);
 243
 244         /* Mask all interrupts */
 245         iic_wr(pd, ICIC, 0);
 246
 247         /* Set the clock */
 248         iic_wr(pd, ICCL, pd->iccl);
 249         iic_wr(pd, ICCH, pd->icch);
 250 }
 251
 252 static void deactivate_ch(struct sh_mobile_i2c_data *pd)
 253 {
 254         /* Clear/disable interrupts */
 255         iic_wr(pd, ICSR, 0);
 256         iic_wr(pd, ICIC, 0);
 257
 258         /* Disable channel */
 259         iic_set_clr(pd, ICCR, 0, ICCR_ICE);
 260
 261         /* Disable clock and mark device as idle */
 262         clk_disable(pd->clk);
 263         pm_runtime_put_sync(pd->dev);
 264 }
 265
 266 static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
 267                             enum sh_mobile_i2c_op op, unsigned char data)
 268 {
 269         unsigned char ret = 0;
 270         unsigned long flags;
 271
 272         dev_dbg(pd->dev, "op %d, data in 0x%02x\n", op, data);
 273
 274         spin_lock_irqsave(&pd->lock, flags);
 275
 276         switch (op) {
 277         case OP_START: /* issue start and trigger DTE interrupt */
 278                 iic_wr(pd, ICCR, 0x94);
 279                 break;
 280         case OP_TX_FIRST: /* disable DTE interrupt and write data */
 281                 iic_wr(pd, ICIC, ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
 282                 iic_wr(pd, ICDR, data);
 283                 break;
 284         case OP_TX: /* write data */
 285                 iic_wr(pd, ICDR, data);
 286                 break;
 287         case OP_TX_STOP: /* write data and issue a stop afterwards */
 288                 iic_wr(pd, ICDR, data);
 289                 iic_wr(pd, ICCR, 0x90);
 290                 break;
 291         case OP_TX_TO_RX: /* select read mode */
 292                 iic_wr(pd, ICCR, 0x81);
 293                 break;
 294         case OP_RX: /* just read data */
 295                 ret = iic_rd(pd, ICDR);
 296                 break;
 297         case OP_RX_STOP: /* enable DTE interrupt, issue stop */
 298                 iic_wr(pd, ICIC,
 299                        ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
 300                 iic_wr(pd, ICCR, 0xc0);
 301                 break;
 302         case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */
 303                 iic_wr(pd, ICIC,
 304                        ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
 305                 ret = iic_rd(pd, ICDR);
 306                 iic_wr(pd, ICCR, 0xc0);
 307                 break;
 308         }
 309
 310         spin_unlock_irqrestore(&pd->lock, flags);
 311
 312         dev_dbg(pd->dev, "op %d, data out 0x%02x\n", op, ret);
 313         return ret;
 314 }
 315
 316 static int sh_mobile_i2c_is_first_byte(struct sh_mobile_i2c_data *pd)
 317 {
 318         if (pd->pos == -1)
 319                 return 1;
 320
 321         return 0;
 322 }
 323
 324 static int sh_mobile_i2c_is_last_byte(struct sh_mobile_i2c_data *pd)
 325 {
 326         if (pd->pos == (pd->msg->len - 1))
 327                 return 1;
 328
 329         return 0;
 330 }
 331
 332 static void sh_mobile_i2c_get_data(struct sh_mobile_i2c_data *pd,
 333                                    unsigned char *buf)
 334 {
 335         switch (pd->pos) {
 336         case -1:
 337                 *buf = (pd->msg->addr & 0x7f) << 1;
 338                 *buf |= (pd->msg->flags & I2C_M_RD) ? 1 : 0;
 339                 break;
 340         default:
 341                 *buf = pd->msg->buf[pd->pos];
 342         }
 343 }
 344
 345 static int sh_mobile_i2c_isr_tx(struct sh_mobile_i2c_data *pd)
 346 {
 347         unsigned char data;
 348
 349         if (pd->pos == pd->msg->len)
 350                 return 1;
 351
 352         sh_mobile_i2c_get_data(pd, &data);
 353
 354         if (sh_mobile_i2c_is_last_byte(pd))
 355                 i2c_op(pd, OP_TX_STOP, data);
 356         else if (sh_mobile_i2c_is_first_byte(pd))
 357                 i2c_op(pd, OP_TX_FIRST, data);
 358         else
 359                 i2c_op(pd, OP_TX, data);
 360
 361         pd->pos++;
 362         return 0;
 363 }
 364
 365 static int sh_mobile_i2c_isr_rx(struct sh_mobile_i2c_data *pd)
 366 {
 367         unsigned char data;
 368         int real_pos;
 369
 370         do {
 371                 if (pd->pos <= -1) {
 372                         sh_mobile_i2c_get_data(pd, &data);
 373
 374                         if (sh_mobile_i2c_is_first_byte(pd))
 375                                 i2c_op(pd, OP_TX_FIRST, data);
 376                         else
 377                                 i2c_op(pd, OP_TX, data);
 378                         break;
 379                 }
 380
 381                 if (pd->pos == 0) {
 382                         i2c_op(pd, OP_TX_TO_RX, 0);
 383                         break;
 384                 }
 385
 386                 real_pos = pd->pos - 2;
 387
 388                 if (pd->pos == pd->msg->len) {
 389                         if (real_pos < 0) {
 390                                 i2c_op(pd, OP_RX_STOP, 0);
 391                                 break;
 392                         }
 393                         data = i2c_op(pd, OP_RX_STOP_DATA, 0);
 394                 } else
 395                         data = i2c_op(pd, OP_RX, 0);
 396
 397                 if (real_pos >= 0)
 398                         pd->msg->buf[real_pos] = data;
 399         } while (0);
 400
 401         pd->pos++;
 402         return pd->pos == (pd->msg->len + 2);
 403 }
 404
 405 static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
 406 {
 407         struct platform_device *dev = dev_id;
 408         struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
 409         unsigned char sr;
 410         int wakeup;
 411
 412         sr = iic_rd(pd, ICSR);
 413         pd->sr |= sr; /* remember state */
 414
 415         dev_dbg(pd->dev, "i2c_isr 0x%02x 0x%02x %s %d %d!\n", sr, pd->sr,
 416                (pd->msg->flags & I2C_M_RD) ? "read" : "write",
 417                pd->pos, pd->msg->len);
 418
 419         if (sr & (ICSR_AL | ICSR_TACK)) {
 420                 /* don't interrupt transaction - continue to issue stop */
 421                 iic_wr(pd, ICSR, sr & ~(ICSR_AL | ICSR_TACK));
 422                 wakeup = 0;
 423         } else if (pd->msg->flags & I2C_M_RD)
 424                 wakeup = sh_mobile_i2c_isr_rx(pd);
 425         else
 426                 wakeup = sh_mobile_i2c_isr_tx(pd);
 427
 428         if (sr & ICSR_WAIT) /* TODO: add delay here to support slow acks */
 429                 iic_wr(pd, ICSR, sr & ~ICSR_WAIT);
 430
 431         if (wakeup) {
 432                 pd->sr |= SW_DONE;
 433                 wake_up(&pd->wait);
 434         }
 435
 436         return IRQ_HANDLED;
 437 }
 438
 439 static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
 440 {
 441         if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) {
 442                 dev_err(pd->dev, "Unsupported zero length i2c read\n");
 443                 return -EIO;
 444         }
 445
 446         /* Initialize channel registers */
 447         iic_set_clr(pd, ICCR, 0, ICCR_ICE);
 448
 449         /* Enable channel and configure rx ack */
 450         iic_set_clr(pd, ICCR, ICCR_ICE, 0);
 451
 452         /* Set the clock */
 453         iic_wr(pd, ICCL, pd->iccl);
 454         iic_wr(pd, ICCH, pd->icch);
 455
 456         pd->msg = usr_msg;
 457         pd->pos = -1;
 458         pd->sr = 0;
 459
 460         /* Enable all interrupts to begin with */
 461         iic_wr(pd, ICIC, ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
 462         return 0;
 463 }
 464
 465 static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
 466                               struct i2c_msg *msgs,
 467                               int num)
 468 {
 469         struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter);
 470         struct i2c_msg  *msg;
 471         int err = 0;
 472         u_int8_t val;
 473         int i, k, retry_count;
 474
 475         activate_ch(pd);
 476
 477         /* Process all messages */
 478         for (i = 0; i < num; i++) {
 479                 msg = &msgs[i];
 480
 481                 err = start_ch(pd, msg);
 482                 if (err)
 483                         break;
 484
 485                 i2c_op(pd, OP_START, 0);
 486
 487                 /* The interrupt handler takes care of the rest... */
 488                 k = wait_event_timeout(pd->wait,
 489                                        pd->sr & (ICSR_TACK | SW_DONE),
 490                                        5 * HZ);
 491                 if (!k)
 492                         dev_err(pd->dev, "Transfer request timed out\n");
 493
 494                 retry_count = 1000;
 495 again:
 496                 val = iic_rd(pd, ICSR);
 497
 498                 dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
 499
 500                 /* the interrupt handler may wake us up before the
 501                  * transfer is finished, so poll the hardware
 502                  * until we're done.
 503                  */
 504                 if (val & ICSR_BUSY) {
 505                         udelay(10);
 506                         if (retry_count--)
 507                                 goto again;
 508
 509                         err = -EIO;
 510                         dev_err(pd->dev, "Polling timed out\n");
 511                         break;
 512                 }
 513
 514                 /* handle missing acknowledge and arbitration lost */
 515                 if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) {
 516                         err = -EIO;
 517                         break;
 518                 }
 519         }
 520
 521         deactivate_ch(pd);
 522
 523         if (!err)
 524                 err = num;
 525         return err;
 526 }
 527
 528 static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter)
 529 {
 530         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 531 }
 532
 533 static struct i2c_algorithm sh_mobile_i2c_algorithm = {
 534         .functionality  = sh_mobile_i2c_func,
 535         .master_xfer    = sh_mobile_i2c_xfer,
 536 };
 537
 538 static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
 539 {
 540         struct resource *res;
 541         int ret = -ENXIO;
 542         int n, k = 0;
 543
 544         while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
 545                 for (n = res->start; hook && n <= res->end; n++) {
 546                         if (request_irq(n, sh_mobile_i2c_isr, IRQF_DISABLED,
 547                                         dev_name(&dev->dev), dev)) {
 548                                 for (n--; n >= res->start; n--)
 549                                         free_irq(n, dev);
 550
 551                                 goto rollback;
 552                         }
 553                 }
 554                 k++;
 555         }
 556
 557         if (hook)
 558                 return k > 0 ? 0 : -ENOENT;
 559
 560         ret = 0;
 561
 562  rollback:
 563         k--;
 564
 565         while (k >= 0) {
 566                 res = platform_get_resource(dev, IORESOURCE_IRQ, k);
 567                 for (n = res->start; n <= res->end; n++)
 568                         free_irq(n, dev);
 569
 570                 k--;
 571         }
 572
 573         return ret;
 574 }
 575
 576 static int sh_mobile_i2c_probe(struct platform_device *dev)
 577 {
 578         struct i2c_sh_mobile_platform_data *pdata = dev->dev.platform_data;
 579         struct sh_mobile_i2c_data *pd;
 580         struct i2c_adapter *adap;
 581         struct resource *res;
 582         int size;
 583         int ret;
 584
 585         pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
 586         if (pd == NULL) {
 587                 dev_err(&dev->dev, "cannot allocate private data\n");
 588                 return -ENOMEM;
 589         }
 590
 591         pd->clk = clk_get(&dev->dev, NULL);
 592         if (IS_ERR(pd->clk)) {
 593                 dev_err(&dev->dev, "cannot get clock\n");
 594                 ret = PTR_ERR(pd->clk);
 595                 goto err;
 596         }
 597
 598         ret = sh_mobile_i2c_hook_irqs(dev, 1);
 599         if (ret) {
 600                 dev_err(&dev->dev, "cannot request IRQ\n");
 601                 goto err_clk;
 602         }
 603
 604         pd->dev = &dev->dev;
 605         platform_set_drvdata(dev, pd);
 606
 607         res = platform_get_resource(dev, IORESOURCE_MEM, 0);
 608         if (res == NULL) {
 609                 dev_err(&dev->dev, "cannot find IO resource\n");
 610                 ret = -ENOENT;
 611                 goto err_irq;
 612         }
 613
 614         size = resource_size(res);
 615
 616         pd->reg = ioremap(res->start, size);
 617         if (pd->reg == NULL) {
 618                 dev_err(&dev->dev, "cannot map IO\n");
 619                 ret = -ENXIO;
 620                 goto err_irq;
 621         }
 622
 623         /* Use platformd data bus speed or NORMAL_SPEED */
 624         pd->bus_speed = NORMAL_SPEED;
 625         if (pdata && pdata->bus_speed)
 626                 pd->bus_speed = pdata->bus_speed;
 627
 628         /* The IIC blocks on SH-Mobile ARM processors
 629          * come with two new bits in ICIC.
 630          */
 631         if (size > 0x17)
 632                 pd->flags |= IIC_FLAG_HAS_ICIC67;
 633
 634         /* Enable Runtime PM for this device.
 635          *
 636          * Also tell the Runtime PM core to ignore children
 637          * for this device since it is valid for us to suspend
 638          * this I2C master driver even though the slave devices
 639          * on the I2C bus may not be suspended.
 640          *
 641          * The state of the I2C hardware bus is unaffected by
 642          * the Runtime PM state.
 643          */
 644         pm_suspend_ignore_children(&dev->dev, true);
 645         pm_runtime_enable(&dev->dev);
 646
 647         /* setup the private data */
 648         adap = &pd->adap;
 649         i2c_set_adapdata(adap, pd);
 650
 651         adap->owner = THIS_MODULE;
 652         adap->algo = &sh_mobile_i2c_algorithm;
 653         adap->dev.parent = &dev->dev;
 654         adap->retries = 5;
 655         adap->nr = dev->id;
 656
 657         strlcpy(adap->name, dev->name, sizeof(adap->name));
 658
 659         spin_lock_init(&pd->lock);
 660         init_waitqueue_head(&pd->wait);
 661
 662         ret = i2c_add_numbered_adapter(adap);
 663         if (ret < 0) {
 664                 dev_err(&dev->dev, "cannot add numbered adapter\n");
 665                 goto err_all;
 666         }
 667
 668         dev_info(&dev->dev, "I2C adapter %d with bus speed %lu Hz\n",
 669                  adap->nr, pd->bus_speed);
 670         return 0;
 671
 672  err_all:
 673         iounmap(pd->reg);
 674  err_irq:
 675         sh_mobile_i2c_hook_irqs(dev, 0);
 676  err_clk:
 677         clk_put(pd->clk);
 678  err:
 679         kfree(pd);
 680         return ret;
 681 }
 682
 683 static int sh_mobile_i2c_remove(struct platform_device *dev)
 684 {
 685         struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
 686
 687         i2c_del_adapter(&pd->adap);
 688         iounmap(pd->reg);
 689         sh_mobile_i2c_hook_irqs(dev, 0);
 690         clk_put(pd->clk);
 691         pm_runtime_disable(&dev->dev);
 692         kfree(pd);
 693         return 0;
 694 }
 695
 696 static int sh_mobile_i2c_runtime_nop(struct device *dev)
 697 {
 698         /* Runtime PM callback shared between ->runtime_suspend()
 699          * and ->runtime_resume(). Simply returns success.
 700          *
 701          * This driver re-initializes all registers after
 702          * pm_runtime_get_sync() anyway so there is no need
 703          * to save and restore registers here.
 704          */
 705         return 0;
 706 }
 707
 708 static const struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = {
 709         .runtime_suspend = sh_mobile_i2c_runtime_nop,
 710         .runtime_resume = sh_mobile_i2c_runtime_nop,
 711 };
 712
 713 static struct platform_driver sh_mobile_i2c_driver = {
 714         .driver         = {
 715                 .name           = "i2c-sh_mobile",
 716                 .owner          = THIS_MODULE,
 717                 .pm             = &sh_mobile_i2c_dev_pm_ops,
 718         },
 719         .probe          = sh_mobile_i2c_probe,
 720         .remove         = sh_mobile_i2c_remove,
 721 };
 722
 723 static int __init sh_mobile_i2c_adap_init(void)
 724 {
 725         return platform_driver_register(&sh_mobile_i2c_driver);
 726 }
 727
 728 static void __exit sh_mobile_i2c_adap_exit(void)
 729 {
 730         platform_driver_unregister(&sh_mobile_i2c_driver);
 731 }
 732
 733 subsys_initcall(sh_mobile_i2c_adap_init);
 734 module_exit(sh_mobile_i2c_adap_exit);
 735
 736 MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver");
 737 MODULE_AUTHOR("Magnus Damm");
 738 MODULE_LICENSE("GPL v2");
 739 MODULE_ALIAS("platform:i2c-sh_mobile");