drivers/iio/adc/ti-ads1015.c

   1 /*
   2  * ADS1015 - Texas Instruments Analog-to-Digital Converter
   3  *
   4  * Copyright (c) 2016, Intel Corporation.
   5  *
   6  * This file is subject to the terms and conditions of version 2 of
   7  * the GNU General Public License.  See the file COPYING in the main
   8  * directory of this archive for more details.
   9  *
  10  * IIO driver for ADS1015 ADC 7-bit I2C slave address:
  11  *      * 0x48 - ADDR connected to Ground
  12  *      * 0x49 - ADDR connected to Vdd
  13  *      * 0x4A - ADDR connected to SDA
  14  *      * 0x4B - ADDR connected to SCL
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/init.h>
  19 #include <linux/i2c.h>
  20 #include <linux/regmap.h>
  21 #include <linux/pm_runtime.h>
  22 #include <linux/mutex.h>
  23 #include <linux/delay.h>
  24
  25 #include <linux/i2c/ads1015.h>
  26
  27 #include <linux/iio/iio.h>
  28 #include <linux/iio/types.h>
  29 #include <linux/iio/sysfs.h>
  30 #include <linux/iio/buffer.h>
  31 #include <linux/iio/triggered_buffer.h>
  32 #include <linux/iio/trigger_consumer.h>
  33
  34 #define ADS1015_DRV_NAME "ads1015"
  35
  36 #define ADS1015_CONV_REG        0x00
  37 #define ADS1015_CFG_REG         0x01
  38
  39 #define ADS1015_CFG_DR_SHIFT    5
  40 #define ADS1015_CFG_MOD_SHIFT   8
  41 #define ADS1015_CFG_PGA_SHIFT   9
  42 #define ADS1015_CFG_MUX_SHIFT   12
  43
  44 #define ADS1015_CFG_DR_MASK     GENMASK(7, 5)
  45 #define ADS1015_CFG_MOD_MASK    BIT(8)
  46 #define ADS1015_CFG_PGA_MASK    GENMASK(11, 9)
  47 #define ADS1015_CFG_MUX_MASK    GENMASK(14, 12)
  48
  49 /* device operating modes */
  50 #define ADS1015_CONTINUOUS      0
  51 #define ADS1015_SINGLESHOT      1
  52
  53 #define ADS1015_SLEEP_DELAY_MS          2000
  54 #define ADS1015_DEFAULT_PGA             2
  55 #define ADS1015_DEFAULT_DATA_RATE       4
  56 #define ADS1015_DEFAULT_CHAN            0
  57
  58 enum {
  59         ADS1015,
  60         ADS1115,
  61 };
  62
  63 enum ads1015_channels {
  64         ADS1015_AIN0_AIN1 = 0,
  65         ADS1015_AIN0_AIN3,
  66         ADS1015_AIN1_AIN3,
  67         ADS1015_AIN2_AIN3,
  68         ADS1015_AIN0,
  69         ADS1015_AIN1,
  70         ADS1015_AIN2,
  71         ADS1015_AIN3,
  72         ADS1015_TIMESTAMP,
  73 };
  74
  75 static const unsigned int ads1015_data_rate[] = {
  76         128, 250, 490, 920, 1600, 2400, 3300, 3300
  77 };
  78
  79 static const unsigned int ads1115_data_rate[] = {
  80         8, 16, 32, 64, 128, 250, 475, 860
  81 };
  82
  83 static const struct {
  84         int scale;
  85         int uscale;
  86 } ads1015_scale[] = {
  87         {3, 0},
  88         {2, 0},
  89         {1, 0},
  90         {0, 500000},
  91         {0, 250000},
  92         {0, 125000},
  93         {0, 125000},
  94         {0, 125000},
  95 };
  96
  97 #define ADS1015_V_CHAN(_chan, _addr) {                          \
  98         .type = IIO_VOLTAGE,                                    \
  99         .indexed = 1,                                           \
 100         .address = _addr,                                       \
 101         .channel = _chan,                                       \
 102         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 103                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 104                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 105         .scan_index = _addr,                                    \
 106         .scan_type = {                                          \
 107                 .sign = 's',                                    \
 108                 .realbits = 12,                                 \
 109                 .storagebits = 16,                              \
 110                 .shift = 4,                                     \
 111                 .endianness = IIO_CPU,                          \
 112         },                                                      \
 113         .datasheet_name = "AIN"#_chan,                          \
 114 }
 115
 116 #define ADS1015_V_DIFF_CHAN(_chan, _chan2, _addr) {             \
 117         .type = IIO_VOLTAGE,                                    \
 118         .differential = 1,                                      \
 119         .indexed = 1,                                           \
 120         .address = _addr,                                       \
 121         .channel = _chan,                                       \
 122         .channel2 = _chan2,                                     \
 123         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 124                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 125                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 126         .scan_index = _addr,                                    \
 127         .scan_type = {                                          \
 128                 .sign = 's',                                    \
 129                 .realbits = 12,                                 \
 130                 .storagebits = 16,                              \
 131                 .shift = 4,                                     \
 132                 .endianness = IIO_CPU,                          \
 133         },                                                      \
 134         .datasheet_name = "AIN"#_chan"-AIN"#_chan2,             \
 135 }
 136
 137 #define ADS1115_V_CHAN(_chan, _addr) {                          \
 138         .type = IIO_VOLTAGE,                                    \
 139         .indexed = 1,                                           \
 140         .address = _addr,                                       \
 141         .channel = _chan,                                       \
 142         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 143                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 144                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 145         .scan_index = _addr,                                    \
 146         .scan_type = {                                          \
 147                 .sign = 's',                                    \
 148                 .realbits = 16,                                 \
 149                 .storagebits = 16,                              \
 150                 .endianness = IIO_CPU,                          \
 151         },                                                      \
 152         .datasheet_name = "AIN"#_chan,                          \
 153 }
 154
 155 #define ADS1115_V_DIFF_CHAN(_chan, _chan2, _addr) {             \
 156         .type = IIO_VOLTAGE,                                    \
 157         .differential = 1,                                      \
 158         .indexed = 1,                                           \
 159         .address = _addr,                                       \
 160         .channel = _chan,                                       \
 161         .channel2 = _chan2,                                     \
 162         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 163                                 BIT(IIO_CHAN_INFO_SCALE) |      \
 164                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
 165         .scan_index = _addr,                                    \
 166         .scan_type = {                                          \
 167                 .sign = 's',                                    \
 168                 .realbits = 16,                                 \
 169                 .storagebits = 16,                              \
 170                 .endianness = IIO_CPU,                          \
 171         },                                                      \
 172         .datasheet_name = "AIN"#_chan"-AIN"#_chan2,             \
 173 }
 174
 175 struct ads1015_data {
 176         struct regmap *regmap;
 177         /*
 178          * Protects ADC ops, e.g: concurrent sysfs/buffered
 179          * data reads, configuration updates
 180          */
 181         struct mutex lock;
 182         struct ads1015_channel_data channel_data[ADS1015_CHANNELS];
 183
 184         unsigned int *data_rate;
 185 };
 186
 187 static bool ads1015_is_writeable_reg(struct device *dev, unsigned int reg)
 188 {
 189         return (reg == ADS1015_CFG_REG);
 190 }
 191
 192 static const struct regmap_config ads1015_regmap_config = {
 193         .reg_bits = 8,
 194         .val_bits = 16,
 195         .max_register = ADS1015_CFG_REG,
 196         .writeable_reg = ads1015_is_writeable_reg,
 197 };
 198
 199 static const struct iio_chan_spec ads1015_channels[] = {
 200         ADS1015_V_DIFF_CHAN(0, 1, ADS1015_AIN0_AIN1),
 201         ADS1015_V_DIFF_CHAN(0, 3, ADS1015_AIN0_AIN3),
 202         ADS1015_V_DIFF_CHAN(1, 3, ADS1015_AIN1_AIN3),
 203         ADS1015_V_DIFF_CHAN(2, 3, ADS1015_AIN2_AIN3),
 204         ADS1015_V_CHAN(0, ADS1015_AIN0),
 205         ADS1015_V_CHAN(1, ADS1015_AIN1),
 206         ADS1015_V_CHAN(2, ADS1015_AIN2),
 207         ADS1015_V_CHAN(3, ADS1015_AIN3),
 208         IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
 209 };
 210
 211 static const struct iio_chan_spec ads1115_channels[] = {
 212         ADS1115_V_DIFF_CHAN(0, 1, ADS1015_AIN0_AIN1),
 213         ADS1115_V_DIFF_CHAN(0, 3, ADS1015_AIN0_AIN3),
 214         ADS1115_V_DIFF_CHAN(1, 3, ADS1015_AIN1_AIN3),
 215         ADS1115_V_DIFF_CHAN(2, 3, ADS1015_AIN2_AIN3),
 216         ADS1115_V_CHAN(0, ADS1015_AIN0),
 217         ADS1115_V_CHAN(1, ADS1015_AIN1),
 218         ADS1115_V_CHAN(2, ADS1015_AIN2),
 219         ADS1115_V_CHAN(3, ADS1015_AIN3),
 220         IIO_CHAN_SOFT_TIMESTAMP(ADS1015_TIMESTAMP),
 221 };
 222
 223 static int ads1015_set_power_state(struct ads1015_data *data, bool on)
 224 {
 225         int ret;
 226         struct device *dev = regmap_get_device(data->regmap);
 227
 228         if (on) {
 229                 ret = pm_runtime_get_sync(dev);
 230                 if (ret < 0)
 231                         pm_runtime_put_noidle(dev);
 232         } else {
 233                 pm_runtime_mark_last_busy(dev);
 234                 ret = pm_runtime_put_autosuspend(dev);
 235         }
 236
 237         return ret;
 238 }
 239
 240 static
 241 int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
 242 {
 243         int ret, pga, dr, conv_time;
 244         bool change;
 245
 246         if (chan < 0 || chan >= ADS1015_CHANNELS)
 247                 return -EINVAL;
 248
 249         pga = data->channel_data[chan].pga;
 250         dr = data->channel_data[chan].data_rate;
 251
 252         ret = regmap_update_bits_check(data->regmap, ADS1015_CFG_REG,
 253                                        ADS1015_CFG_MUX_MASK |
 254                                        ADS1015_CFG_PGA_MASK,
 255                                        chan << ADS1015_CFG_MUX_SHIFT |
 256                                        pga << ADS1015_CFG_PGA_SHIFT,
 257                                        &change);
 258         if (ret < 0)
 259                 return ret;
 260
 261         if (change) {
 262                 conv_time = DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr]);
 263                 usleep_range(conv_time, conv_time + 1);
 264         }
 265
 266         return regmap_read(data->regmap, ADS1015_CONV_REG, val);
 267 }
 268
 269 static irqreturn_t ads1015_trigger_handler(int irq, void *p)
 270 {
 271         struct iio_poll_func *pf = p;
 272         struct iio_dev *indio_dev = pf->indio_dev;
 273         struct ads1015_data *data = iio_priv(indio_dev);
 274         s16 buf[8]; /* 1x s16 ADC val + 3x s16 padding +  4x s16 timestamp */
 275         int chan, ret, res;
 276
 277         memset(buf, 0, sizeof(buf));
 278
 279         mutex_lock(&data->lock);
 280         chan = find_first_bit(indio_dev->active_scan_mask,
 281                               indio_dev->masklength);
 282         ret = ads1015_get_adc_result(data, chan, &res);
 283         if (ret < 0) {
 284                 mutex_unlock(&data->lock);
 285                 goto err;
 286         }
 287
 288         buf[0] = res;
 289         mutex_unlock(&data->lock);
 290
 291         iio_push_to_buffers_with_timestamp(indio_dev, buf,
 292                                            iio_get_time_ns(indio_dev));
 293
 294 err:
 295         iio_trigger_notify_done(indio_dev->trig);
 296
 297         return IRQ_HANDLED;
 298 }
 299
 300 static int ads1015_set_scale(struct ads1015_data *data, int chan,
 301                              int scale, int uscale)
 302 {
 303         int i, ret, rindex = -1;
 304
 305         for (i = 0; i < ARRAY_SIZE(ads1015_scale); i++)
 306                 if (ads1015_scale[i].scale == scale &&
 307                     ads1015_scale[i].uscale == uscale) {
 308                         rindex = i;
 309                         break;
 310                 }
 311         if (rindex < 0)
 312                 return -EINVAL;
 313
 314         ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 315                                  ADS1015_CFG_PGA_MASK,
 316                                  rindex << ADS1015_CFG_PGA_SHIFT);
 317         if (ret < 0)
 318                 return ret;
 319
 320         data->channel_data[chan].pga = rindex;
 321
 322         return 0;
 323 }
 324
 325 static int ads1015_set_data_rate(struct ads1015_data *data, int chan, int rate)
 326 {
 327         int i, ret, rindex = -1;
 328
 329         for (i = 0; i < ARRAY_SIZE(ads1015_data_rate); i++)
 330                 if (data->data_rate[i] == rate) {
 331                         rindex = i;
 332                         break;
 333                 }
 334         if (rindex < 0)
 335                 return -EINVAL;
 336
 337         ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 338                                  ADS1015_CFG_DR_MASK,
 339                                  rindex << ADS1015_CFG_DR_SHIFT);
 340         if (ret < 0)
 341                 return ret;
 342
 343         data->channel_data[chan].data_rate = rindex;
 344
 345         return 0;
 346 }
 347
 348 static int ads1015_read_raw(struct iio_dev *indio_dev,
 349                             struct iio_chan_spec const *chan, int *val,
 350                             int *val2, long mask)
 351 {
 352         int ret, idx;
 353         struct ads1015_data *data = iio_priv(indio_dev);
 354
 355         mutex_lock(&indio_dev->mlock);
 356         mutex_lock(&data->lock);
 357         switch (mask) {
 358         case IIO_CHAN_INFO_RAW: {
 359                 int shift = chan->scan_type.shift;
 360
 361                 if (iio_buffer_enabled(indio_dev)) {
 362                         ret = -EBUSY;
 363                         break;
 364                 }
 365
 366                 ret = ads1015_set_power_state(data, true);
 367                 if (ret < 0)
 368                         break;
 369
 370                 ret = ads1015_get_adc_result(data, chan->address, val);
 371                 if (ret < 0) {
 372                         ads1015_set_power_state(data, false);
 373                         break;
 374                 }
 375
 376                 *val = sign_extend32(*val >> shift, 15 - shift);
 377
 378                 ret = ads1015_set_power_state(data, false);
 379                 if (ret < 0)
 380                         break;
 381
 382                 ret = IIO_VAL_INT;
 383                 break;
 384         }
 385         case IIO_CHAN_INFO_SCALE:
 386                 idx = data->channel_data[chan->address].pga;
 387                 *val = ads1015_scale[idx].scale;
 388                 *val2 = ads1015_scale[idx].uscale;
 389                 ret = IIO_VAL_INT_PLUS_MICRO;
 390                 break;
 391         case IIO_CHAN_INFO_SAMP_FREQ:
 392                 idx = data->channel_data[chan->address].data_rate;
 393                 *val = data->data_rate[idx];
 394                 ret = IIO_VAL_INT;
 395                 break;
 396         default:
 397                 ret = -EINVAL;
 398                 break;
 399         }
 400         mutex_unlock(&data->lock);
 401         mutex_unlock(&indio_dev->mlock);
 402
 403         return ret;
 404 }
 405
 406 static int ads1015_write_raw(struct iio_dev *indio_dev,
 407                              struct iio_chan_spec const *chan, int val,
 408                              int val2, long mask)
 409 {
 410         struct ads1015_data *data = iio_priv(indio_dev);
 411         int ret;
 412
 413         mutex_lock(&data->lock);
 414         switch (mask) {
 415         case IIO_CHAN_INFO_SCALE:
 416                 ret = ads1015_set_scale(data, chan->address, val, val2);
 417                 break;
 418         case IIO_CHAN_INFO_SAMP_FREQ:
 419                 ret = ads1015_set_data_rate(data, chan->address, val);
 420                 break;
 421         default:
 422                 ret = -EINVAL;
 423                 break;
 424         }
 425         mutex_unlock(&data->lock);
 426
 427         return ret;
 428 }
 429
 430 static int ads1015_buffer_preenable(struct iio_dev *indio_dev)
 431 {
 432         return ads1015_set_power_state(iio_priv(indio_dev), true);
 433 }
 434
 435 static int ads1015_buffer_postdisable(struct iio_dev *indio_dev)
 436 {
 437         return ads1015_set_power_state(iio_priv(indio_dev), false);
 438 }
 439
 440 static const struct iio_buffer_setup_ops ads1015_buffer_setup_ops = {
 441         .preenable      = ads1015_buffer_preenable,
 442         .postenable     = iio_triggered_buffer_postenable,
 443         .predisable     = iio_triggered_buffer_predisable,
 444         .postdisable    = ads1015_buffer_postdisable,
 445         .validate_scan_mask = &iio_validate_scan_mask_onehot,
 446 };
 447
 448 static IIO_CONST_ATTR(scale_available, "3 2 1 0.5 0.25 0.125");
 449
 450 static IIO_CONST_ATTR_NAMED(ads1015_sampling_frequency_available,
 451         sampling_frequency_available, "128 250 490 920 1600 2400 3300");
 452 static IIO_CONST_ATTR_NAMED(ads1115_sampling_frequency_available,
 453         sampling_frequency_available, "8 16 32 64 128 250 475 860");
 454
 455 static struct attribute *ads1015_attributes[] = {
 456         &iio_const_attr_scale_available.dev_attr.attr,
 457         &iio_const_attr_ads1015_sampling_frequency_available.dev_attr.attr,
 458         NULL,
 459 };
 460
 461 static const struct attribute_group ads1015_attribute_group = {
 462         .attrs = ads1015_attributes,
 463 };
 464
 465 static struct attribute *ads1115_attributes[] = {
 466         &iio_const_attr_scale_available.dev_attr.attr,
 467         &iio_const_attr_ads1115_sampling_frequency_available.dev_attr.attr,
 468         NULL,
 469 };
 470
 471 static const struct attribute_group ads1115_attribute_group = {
 472         .attrs = ads1115_attributes,
 473 };
 474
 475 static struct iio_info ads1015_info = {
 476         .driver_module  = THIS_MODULE,
 477         .read_raw       = ads1015_read_raw,
 478         .write_raw      = ads1015_write_raw,
 479         .attrs          = &ads1015_attribute_group,
 480 };
 481
 482 static struct iio_info ads1115_info = {
 483         .driver_module  = THIS_MODULE,
 484         .read_raw       = ads1015_read_raw,
 485         .write_raw      = ads1015_write_raw,
 486         .attrs          = &ads1115_attribute_group,
 487 };
 488
 489 #ifdef CONFIG_OF
 490 static int ads1015_get_channels_config_of(struct i2c_client *client)
 491 {
 492         struct ads1015_data *data = i2c_get_clientdata(client);
 493         struct device_node *node;
 494
 495         if (!client->dev.of_node ||
 496             !of_get_next_child(client->dev.of_node, NULL))
 497                 return -EINVAL;
 498
 499         for_each_child_of_node(client->dev.of_node, node) {
 500                 u32 pval;
 501                 unsigned int channel;
 502                 unsigned int pga = ADS1015_DEFAULT_PGA;
 503                 unsigned int data_rate = ADS1015_DEFAULT_DATA_RATE;
 504
 505                 if (of_property_read_u32(node, "reg", &pval)) {
 506                         dev_err(&client->dev, "invalid reg on %s\n",
 507                                 node->full_name);
 508                         continue;
 509                 }
 510
 511                 channel = pval;
 512                 if (channel >= ADS1015_CHANNELS) {
 513                         dev_err(&client->dev,
 514                                 "invalid channel index %d on %s\n",
 515                                 channel, node->full_name);
 516                         continue;
 517                 }
 518
 519                 if (!of_property_read_u32(node, "ti,gain", &pval)) {
 520                         pga = pval;
 521                         if (pga > 6) {
 522                                 dev_err(&client->dev, "invalid gain on %s\n",
 523                                         node->full_name);
 524                                 return -EINVAL;
 525                         }
 526                 }
 527
 528                 if (!of_property_read_u32(node, "ti,datarate", &pval)) {
 529                         data_rate = pval;
 530                         if (data_rate > 7) {
 531                                 dev_err(&client->dev,
 532                                         "invalid data_rate on %s\n",
 533                                         node->full_name);
 534                                 return -EINVAL;
 535                         }
 536                 }
 537
 538                 data->channel_data[channel].pga = pga;
 539                 data->channel_data[channel].data_rate = data_rate;
 540         }
 541
 542         return 0;
 543 }
 544 #endif
 545
 546 static void ads1015_get_channels_config(struct i2c_client *client)
 547 {
 548         unsigned int k;
 549
 550         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 551         struct ads1015_data *data = iio_priv(indio_dev);
 552         struct ads1015_platform_data *pdata = dev_get_platdata(&client->dev);
 553
 554         /* prefer platform data */
 555         if (pdata) {
 556                 memcpy(data->channel_data, pdata->channel_data,
 557                        sizeof(data->channel_data));
 558                 return;
 559         }
 560
 561 #ifdef CONFIG_OF
 562         if (!ads1015_get_channels_config_of(client))
 563                 return;
 564 #endif
 565         /* fallback on default configuration */
 566         for (k = 0; k < ADS1015_CHANNELS; ++k) {
 567                 data->channel_data[k].pga = ADS1015_DEFAULT_PGA;
 568                 data->channel_data[k].data_rate = ADS1015_DEFAULT_DATA_RATE;
 569         }
 570 }
 571
 572 static int ads1015_probe(struct i2c_client *client,
 573                          const struct i2c_device_id *id)
 574 {
 575         struct iio_dev *indio_dev;
 576         struct ads1015_data *data;
 577         int ret;
 578
 579         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
 580         if (!indio_dev)
 581                 return -ENOMEM;
 582
 583         data = iio_priv(indio_dev);
 584         i2c_set_clientdata(client, indio_dev);
 585
 586         mutex_init(&data->lock);
 587
 588         indio_dev->dev.parent = &client->dev;
 589         indio_dev->dev.of_node = client->dev.of_node;
 590         indio_dev->name = ADS1015_DRV_NAME;
 591         indio_dev->modes = INDIO_DIRECT_MODE;
 592
 593         switch (id->driver_data) {
 594         case ADS1015:
 595                 indio_dev->channels = ads1015_channels;
 596                 indio_dev->num_channels = ARRAY_SIZE(ads1015_channels);
 597                 indio_dev->info = &ads1015_info;
 598                 data->data_rate = (unsigned int *) &ads1015_data_rate;
 599                 break;
 600         case ADS1115:
 601                 indio_dev->channels = ads1115_channels;
 602                 indio_dev->num_channels = ARRAY_SIZE(ads1115_channels);
 603                 indio_dev->info = &ads1115_info;
 604                 data->data_rate = (unsigned int *) &ads1115_data_rate;
 605                 break;
 606         }
 607
 608         /* we need to keep this ABI the same as used by hwmon ADS1015 driver */
 609         ads1015_get_channels_config(client);
 610
 611         data->regmap = devm_regmap_init_i2c(client, &ads1015_regmap_config);
 612         if (IS_ERR(data->regmap)) {
 613                 dev_err(&client->dev, "Failed to allocate register map\n");
 614                 return PTR_ERR(data->regmap);
 615         }
 616
 617         ret = iio_triggered_buffer_setup(indio_dev, NULL,
 618                                          ads1015_trigger_handler,
 619                                          &ads1015_buffer_setup_ops);
 620         if (ret < 0) {
 621                 dev_err(&client->dev, "iio triggered buffer setup failed\n");
 622                 return ret;
 623         }
 624         ret = pm_runtime_set_active(&client->dev);
 625         if (ret)
 626                 goto err_buffer_cleanup;
 627         pm_runtime_set_autosuspend_delay(&client->dev, ADS1015_SLEEP_DELAY_MS);
 628         pm_runtime_use_autosuspend(&client->dev);
 629         pm_runtime_enable(&client->dev);
 630
 631         ret = iio_device_register(indio_dev);
 632         if (ret < 0) {
 633                 dev_err(&client->dev, "Failed to register IIO device\n");
 634                 goto err_buffer_cleanup;
 635         }
 636
 637         return 0;
 638
 639 err_buffer_cleanup:
 640         iio_triggered_buffer_cleanup(indio_dev);
 641
 642         return ret;
 643 }
 644
 645 static int ads1015_remove(struct i2c_client *client)
 646 {
 647         struct iio_dev *indio_dev = i2c_get_clientdata(client);
 648         struct ads1015_data *data = iio_priv(indio_dev);
 649
 650         iio_device_unregister(indio_dev);
 651
 652         pm_runtime_disable(&client->dev);
 653         pm_runtime_set_suspended(&client->dev);
 654         pm_runtime_put_noidle(&client->dev);
 655
 656         iio_triggered_buffer_cleanup(indio_dev);
 657
 658         /* power down single shot mode */
 659         return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 660                                   ADS1015_CFG_MOD_MASK,
 661                                   ADS1015_SINGLESHOT << ADS1015_CFG_MOD_SHIFT);
 662 }
 663
 664 #ifdef CONFIG_PM
 665 static int ads1015_runtime_suspend(struct device *dev)
 666 {
 667         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
 668         struct ads1015_data *data = iio_priv(indio_dev);
 669
 670         return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 671                                   ADS1015_CFG_MOD_MASK,
 672                                   ADS1015_SINGLESHOT << ADS1015_CFG_MOD_SHIFT);
 673 }
 674
 675 static int ads1015_runtime_resume(struct device *dev)
 676 {
 677         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
 678         struct ads1015_data *data = iio_priv(indio_dev);
 679
 680         return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
 681                                   ADS1015_CFG_MOD_MASK,
 682                                   ADS1015_CONTINUOUS << ADS1015_CFG_MOD_SHIFT);
 683 }
 684 #endif
 685
 686 static const struct dev_pm_ops ads1015_pm_ops = {
 687         SET_RUNTIME_PM_OPS(ads1015_runtime_suspend,
 688                            ads1015_runtime_resume, NULL)
 689 };
 690
 691 static const struct i2c_device_id ads1015_id[] = {
 692         {"ads1015", ADS1015},
 693         {"ads1115", ADS1115},
 694         {}
 695 };
 696 MODULE_DEVICE_TABLE(i2c, ads1015_id);
 697
 698 static struct i2c_driver ads1015_driver = {
 699         .driver = {
 700                 .name = ADS1015_DRV_NAME,
 701                 .pm = &ads1015_pm_ops,
 702         },
 703         .probe          = ads1015_probe,
 704         .remove         = ads1015_remove,
 705         .id_table       = ads1015_id,
 706 };
 707
 708 module_i2c_driver(ads1015_driver);
 709
 710 MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
 711 MODULE_DESCRIPTION("Texas Instruments ADS1015 ADC driver");
 712 MODULE_LICENSE("GPL v2");