IB/hfi1: Suppress sparse warnings
[cascardo/linux.git] / drivers / infiniband / hw / hfi1 / trace.c
1 /*
2  * Copyright(c) 2015, 2016 Intel Corporation.
3  *
4  * This file is provided under a dual BSD/GPLv2 license.  When using or
5  * redistributing this file, you may do so under either license.
6  *
7  * GPL LICENSE SUMMARY
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of version 2 of the GNU General Public License as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16  * General Public License for more details.
17  *
18  * BSD LICENSE
19  *
20  * Redistribution and use in source and binary forms, with or without
21  * modification, are permitted provided that the following conditions
22  * are met:
23  *
24  *  - Redistributions of source code must retain the above copyright
25  *    notice, this list of conditions and the following disclaimer.
26  *  - Redistributions in binary form must reproduce the above copyright
27  *    notice, this list of conditions and the following disclaimer in
28  *    the documentation and/or other materials provided with the
29  *    distribution.
30  *  - Neither the name of Intel Corporation nor the names of its
31  *    contributors may be used to endorse or promote products derived
32  *    from this software without specific prior written permission.
33  *
34  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45  *
46  */
47 #define CREATE_TRACE_POINTS
48 #include "trace.h"
49
50 u8 ibhdr_exhdr_len(struct hfi1_ib_header *hdr)
51 {
52         struct hfi1_other_headers *ohdr;
53         u8 opcode;
54         u8 lnh = (u8)(be16_to_cpu(hdr->lrh[0]) & 3);
55
56         if (lnh == HFI1_LRH_BTH)
57                 ohdr = &hdr->u.oth;
58         else
59                 ohdr = &hdr->u.l.oth;
60         opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
61         return hdr_len_by_opcode[opcode] == 0 ?
62                0 : hdr_len_by_opcode[opcode] - (12 + 8);
63 }
64
65 #define IMM_PRN  "imm %d"
66 #define RETH_PRN "reth vaddr 0x%.16llx rkey 0x%.8x dlen 0x%.8x"
67 #define AETH_PRN "aeth syn 0x%.2x %s msn 0x%.8x"
68 #define DETH_PRN "deth qkey 0x%.8x sqpn 0x%.6x"
69 #define IETH_PRN "ieth rkey 0x%.8x"
70 #define ATOMICACKETH_PRN "origdata %lld"
71 #define ATOMICETH_PRN "vaddr 0x%llx rkey 0x%.8x sdata %lld cdata %lld"
72
73 #define OP(transport, op) IB_OPCODE_## transport ## _ ## op
74
75 static u64 ib_u64_get(__be32 *p)
76 {
77         return ((u64)be32_to_cpu(p[0]) << 32) | be32_to_cpu(p[1]);
78 }
79
80 static const char *parse_syndrome(u8 syndrome)
81 {
82         switch (syndrome >> 5) {
83         case 0:
84                 return "ACK";
85         case 1:
86                 return "RNRNAK";
87         case 3:
88                 return "NAK";
89         }
90         return "";
91 }
92
93 const char *parse_everbs_hdrs(
94         struct trace_seq *p,
95         u8 opcode,
96         void *ehdrs)
97 {
98         union ib_ehdrs *eh = ehdrs;
99         const char *ret = trace_seq_buffer_ptr(p);
100
101         switch (opcode) {
102         /* imm */
103         case OP(RC, SEND_LAST_WITH_IMMEDIATE):
104         case OP(UC, SEND_LAST_WITH_IMMEDIATE):
105         case OP(RC, SEND_ONLY_WITH_IMMEDIATE):
106         case OP(UC, SEND_ONLY_WITH_IMMEDIATE):
107         case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
108         case OP(UC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
109                 trace_seq_printf(p, IMM_PRN,
110                                  be32_to_cpu(eh->imm_data));
111                 break;
112         /* reth + imm */
113         case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
114         case OP(UC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
115                 trace_seq_printf(p, RETH_PRN " " IMM_PRN,
116                                  (unsigned long long)ib_u64_get(
117                                  (__be32 *)&eh->rc.reth.vaddr),
118                                  be32_to_cpu(eh->rc.reth.rkey),
119                                  be32_to_cpu(eh->rc.reth.length),
120                                  be32_to_cpu(eh->rc.imm_data));
121                 break;
122         /* reth */
123         case OP(RC, RDMA_READ_REQUEST):
124         case OP(RC, RDMA_WRITE_FIRST):
125         case OP(UC, RDMA_WRITE_FIRST):
126         case OP(RC, RDMA_WRITE_ONLY):
127         case OP(UC, RDMA_WRITE_ONLY):
128                 trace_seq_printf(p, RETH_PRN,
129                                  (unsigned long long)ib_u64_get(
130                                  (__be32 *)&eh->rc.reth.vaddr),
131                                  be32_to_cpu(eh->rc.reth.rkey),
132                                  be32_to_cpu(eh->rc.reth.length));
133                 break;
134         case OP(RC, RDMA_READ_RESPONSE_FIRST):
135         case OP(RC, RDMA_READ_RESPONSE_LAST):
136         case OP(RC, RDMA_READ_RESPONSE_ONLY):
137         case OP(RC, ACKNOWLEDGE):
138                 trace_seq_printf(p, AETH_PRN, be32_to_cpu(eh->aeth) >> 24,
139                                  parse_syndrome(be32_to_cpu(eh->aeth) >> 24),
140                                  be32_to_cpu(eh->aeth) & HFI1_MSN_MASK);
141                 break;
142         /* aeth + atomicacketh */
143         case OP(RC, ATOMIC_ACKNOWLEDGE):
144                 trace_seq_printf(p, AETH_PRN " " ATOMICACKETH_PRN,
145                                  be32_to_cpu(eh->at.aeth) >> 24,
146                                  parse_syndrome(be32_to_cpu(eh->at.aeth) >> 24),
147                                  be32_to_cpu(eh->at.aeth) & HFI1_MSN_MASK,
148                                  (unsigned long long)
149                                  ib_u64_get(eh->at.atomic_ack_eth));
150                 break;
151         /* atomiceth */
152         case OP(RC, COMPARE_SWAP):
153         case OP(RC, FETCH_ADD):
154                 trace_seq_printf(p, ATOMICETH_PRN,
155                                  (unsigned long long)ib_u64_get(
156                                  eh->atomic_eth.vaddr),
157                                  eh->atomic_eth.rkey,
158                                  (unsigned long long)ib_u64_get(
159                                  (__be32 *)&eh->atomic_eth.swap_data),
160                                  (unsigned long long)ib_u64_get(
161                                  (__be32 *)&eh->atomic_eth.compare_data));
162                 break;
163         /* deth */
164         case OP(UD, SEND_ONLY):
165         case OP(UD, SEND_ONLY_WITH_IMMEDIATE):
166                 trace_seq_printf(p, DETH_PRN,
167                                  be32_to_cpu(eh->ud.deth[0]),
168                                  be32_to_cpu(eh->ud.deth[1]) & RVT_QPN_MASK);
169                 break;
170         /* ieth */
171         case OP(RC, SEND_LAST_WITH_INVALIDATE):
172         case OP(RC, SEND_ONLY_WITH_INVALIDATE):
173                 trace_seq_printf(p, IETH_PRN,
174                                  be32_to_cpu(eh->ieth));
175                 break;
176         }
177         trace_seq_putc(p, 0);
178         return ret;
179 }
180
181 const char *parse_sdma_flags(
182         struct trace_seq *p,
183         u64 desc0, u64 desc1)
184 {
185         const char *ret = trace_seq_buffer_ptr(p);
186         char flags[5] = { 'x', 'x', 'x', 'x', 0 };
187
188         flags[0] = (desc1 & SDMA_DESC1_INT_REQ_FLAG) ? 'I' : '-';
189         flags[1] = (desc1 & SDMA_DESC1_HEAD_TO_HOST_FLAG) ?  'H' : '-';
190         flags[2] = (desc0 & SDMA_DESC0_FIRST_DESC_FLAG) ? 'F' : '-';
191         flags[3] = (desc0 & SDMA_DESC0_LAST_DESC_FLAG) ? 'L' : '-';
192         trace_seq_printf(p, "%s", flags);
193         if (desc0 & SDMA_DESC0_FIRST_DESC_FLAG)
194                 trace_seq_printf(p, " amode:%u aidx:%u alen:%u",
195                                  (u8)((desc1 >> SDMA_DESC1_HEADER_MODE_SHIFT) &
196                                       SDMA_DESC1_HEADER_MODE_MASK),
197                                  (u8)((desc1 >> SDMA_DESC1_HEADER_INDEX_SHIFT) &
198                                       SDMA_DESC1_HEADER_INDEX_MASK),
199                                  (u8)((desc1 >> SDMA_DESC1_HEADER_DWS_SHIFT) &
200                                       SDMA_DESC1_HEADER_DWS_MASK));
201         return ret;
202 }
203
204 const char *print_u32_array(
205         struct trace_seq *p,
206         u32 *arr, int len)
207 {
208         int i;
209         const char *ret = trace_seq_buffer_ptr(p);
210
211         for (i = 0; i < len ; i++)
212                 trace_seq_printf(p, "%s%#x", i == 0 ? "" : " ", arr[i]);
213         trace_seq_putc(p, 0);
214         return ret;
215 }
216
217 __hfi1_trace_fn(PKT);
218 __hfi1_trace_fn(PROC);
219 __hfi1_trace_fn(SDMA);
220 __hfi1_trace_fn(LINKVERB);
221 __hfi1_trace_fn(DEBUG);
222 __hfi1_trace_fn(SNOOP);
223 __hfi1_trace_fn(CNTR);
224 __hfi1_trace_fn(PIO);
225 __hfi1_trace_fn(DC8051);
226 __hfi1_trace_fn(FIRMWARE);
227 __hfi1_trace_fn(RCVCTRL);
228 __hfi1_trace_fn(TID);
229 __hfi1_trace_fn(MMU);
230 __hfi1_trace_fn(IOCTL);