2 * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <rdma/ib_mad.h>
34 #include <rdma/ib_smi.h>
35 #include <rdma/ib_sa.h>
36 #include <rdma/ib_cache.h>
38 #include <linux/random.h>
39 #include <linux/mlx4/cmd.h>
40 #include <linux/gfp.h>
41 #include <rdma/ib_pma.h>
43 #include <linux/mlx4/driver.h>
47 MLX4_IB_VENDOR_CLASS1 = 0x9,
48 MLX4_IB_VENDOR_CLASS2 = 0xa
51 #define MLX4_TUN_SEND_WRID_SHIFT 34
52 #define MLX4_TUN_QPN_SHIFT 32
53 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
54 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
56 #define MLX4_TUN_IS_RECV(a) (((a) >> MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
57 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
59 /* Port mgmt change event handling */
61 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
62 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
63 #define NUM_IDX_IN_PKEY_TBL_BLK 32
64 #define GUID_TBL_ENTRY_SIZE 8 /* size in bytes */
65 #define GUID_TBL_BLK_NUM_ENTRIES 8
66 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
68 struct mlx4_mad_rcv_buf {
73 struct mlx4_mad_snd_buf {
77 struct mlx4_tunnel_mad {
79 struct mlx4_ib_tunnel_header hdr;
83 struct mlx4_rcv_tunnel_mad {
84 struct mlx4_rcv_tunnel_hdr hdr;
89 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
90 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
91 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
92 int block, u32 change_bitmap);
94 __be64 mlx4_ib_gen_node_guid(void)
96 #define NODE_GUID_HI ((u64) (((u64)IB_OPENIB_OUI) << 40))
97 return cpu_to_be64(NODE_GUID_HI | prandom_u32());
100 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
102 return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
103 cpu_to_be64(0xff00000000000000LL);
106 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
107 int port, const struct ib_wc *in_wc,
108 const struct ib_grh *in_grh,
109 const void *in_mad, void *response_mad)
111 struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
114 u32 in_modifier = port;
117 inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
118 if (IS_ERR(inmailbox))
119 return PTR_ERR(inmailbox);
120 inbox = inmailbox->buf;
122 outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
123 if (IS_ERR(outmailbox)) {
124 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
125 return PTR_ERR(outmailbox);
128 memcpy(inbox, in_mad, 256);
131 * Key check traps can't be generated unless we have in_wc to
132 * tell us where to send the trap.
134 if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
136 if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
138 if (mlx4_is_mfunc(dev->dev) &&
139 (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
155 memset(inbox + 256, 0, 256);
156 ext_info = inbox + 256;
158 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
159 ext_info->rqpn = cpu_to_be32(in_wc->src_qp);
160 ext_info->sl = in_wc->sl << 4;
161 ext_info->g_path = in_wc->dlid_path_bits |
162 (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
163 ext_info->pkey = cpu_to_be16(in_wc->pkey_index);
166 memcpy(ext_info->grh, in_grh, 40);
170 in_modifier |= in_wc->slid << 16;
173 err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
174 mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
175 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
176 (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
179 memcpy(response_mad, outmailbox->buf, 256);
181 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
182 mlx4_free_cmd_mailbox(dev->dev, outmailbox);
187 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
189 struct ib_ah *new_ah;
190 struct ib_ah_attr ah_attr;
193 if (!dev->send_agent[port_num - 1][0])
196 memset(&ah_attr, 0, sizeof ah_attr);
199 ah_attr.port_num = port_num;
201 new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
206 spin_lock_irqsave(&dev->sm_lock, flags);
207 if (dev->sm_ah[port_num - 1])
208 ib_destroy_ah(dev->sm_ah[port_num - 1]);
209 dev->sm_ah[port_num - 1] = new_ah;
210 spin_unlock_irqrestore(&dev->sm_lock, flags);
214 * Snoop SM MADs for port info, GUID info, and P_Key table sets, so we can
215 * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
217 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
220 struct ib_port_info *pinfo;
223 u32 bn, pkey_change_bitmap;
227 struct mlx4_ib_dev *dev = to_mdev(ibdev);
228 if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
229 mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
230 mad->mad_hdr.method == IB_MGMT_METHOD_SET)
231 switch (mad->mad_hdr.attr_id) {
232 case IB_SMP_ATTR_PORT_INFO:
233 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
235 pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
236 lid = be16_to_cpu(pinfo->lid);
238 update_sm_ah(dev, port_num,
239 be16_to_cpu(pinfo->sm_lid),
240 pinfo->neighbormtu_mastersmsl & 0xf);
242 if (pinfo->clientrereg_resv_subnetto & 0x80)
243 handle_client_rereg_event(dev, port_num);
246 handle_lid_change_event(dev, port_num);
249 case IB_SMP_ATTR_PKEY_TABLE:
250 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
252 if (!mlx4_is_mfunc(dev->dev)) {
253 mlx4_ib_dispatch_event(dev, port_num,
254 IB_EVENT_PKEY_CHANGE);
258 /* at this point, we are running in the master.
259 * Slaves do not receive SMPs.
261 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
262 base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
263 pkey_change_bitmap = 0;
264 for (i = 0; i < 32; i++) {
265 pr_debug("PKEY[%d] = x%x\n",
266 i + bn*32, be16_to_cpu(base[i]));
267 if (be16_to_cpu(base[i]) !=
268 dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
269 pkey_change_bitmap |= (1 << i);
270 dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
271 be16_to_cpu(base[i]);
274 pr_debug("PKEY Change event: port=%d, "
275 "block=0x%x, change_bitmap=0x%x\n",
276 port_num, bn, pkey_change_bitmap);
278 if (pkey_change_bitmap) {
279 mlx4_ib_dispatch_event(dev, port_num,
280 IB_EVENT_PKEY_CHANGE);
281 if (!dev->sriov.is_going_down)
282 __propagate_pkey_ev(dev, port_num, bn,
287 case IB_SMP_ATTR_GUID_INFO:
288 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
290 /* paravirtualized master's guid is guid 0 -- does not change */
291 if (!mlx4_is_master(dev->dev))
292 mlx4_ib_dispatch_event(dev, port_num,
293 IB_EVENT_GID_CHANGE);
294 /*if master, notify relevant slaves*/
295 if (mlx4_is_master(dev->dev) &&
296 !dev->sriov.is_going_down) {
297 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
298 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
299 (u8 *)(&((struct ib_smp *)mad)->data));
300 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
301 (u8 *)(&((struct ib_smp *)mad)->data));
305 case IB_SMP_ATTR_SL_TO_VL_TABLE:
306 /* cache sl to vl mapping changes for use in
307 * filling QP1 LRH VL field when sending packets
309 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV &&
310 dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)
312 if (!mlx4_is_slave(dev->dev)) {
313 union sl2vl_tbl_to_u64 sl2vl64;
316 for (jj = 0; jj < 8; jj++) {
317 sl2vl64.sl8[jj] = ((struct ib_smp *)mad)->data[jj];
318 pr_debug("port %u, sl2vl[%d] = %02x\n",
319 port_num, jj, sl2vl64.sl8[jj]);
321 atomic64_set(&dev->sl2vl[port_num - 1], sl2vl64.sl64);
330 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
331 int block, u32 change_bitmap)
333 int i, ix, slave, err;
336 for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
337 if (slave == mlx4_master_func_num(dev->dev))
339 if (!mlx4_is_slave_active(dev->dev, slave))
343 for (i = 0; i < 32; i++) {
344 if (!(change_bitmap & (1 << i)))
347 ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
348 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
349 [ix] == i + 32 * block) {
350 err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
351 pr_debug("propagate_pkey_ev: slave %d,"
352 " port %d, ix %d (%d)\n",
353 slave, port_num, ix, err);
364 static void node_desc_override(struct ib_device *dev,
369 if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
370 mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
371 mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
372 mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
373 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
374 memcpy(((struct ib_smp *) mad)->data, dev->node_desc,
375 IB_DEVICE_NODE_DESC_MAX);
376 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
380 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
382 int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
383 struct ib_mad_send_buf *send_buf;
384 struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
389 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
390 IB_MGMT_MAD_DATA, GFP_ATOMIC,
391 IB_MGMT_BASE_VERSION);
392 if (IS_ERR(send_buf))
395 * We rely here on the fact that MLX QPs don't use the
396 * address handle after the send is posted (this is
397 * wrong following the IB spec strictly, but we know
398 * it's OK for our devices).
400 spin_lock_irqsave(&dev->sm_lock, flags);
401 memcpy(send_buf->mad, mad, sizeof *mad);
402 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
403 ret = ib_post_send_mad(send_buf, NULL);
406 spin_unlock_irqrestore(&dev->sm_lock, flags);
409 ib_free_send_mad(send_buf);
413 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
414 struct ib_sa_mad *sa_mad)
418 /* dispatch to different sa handlers */
419 switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
420 case IB_SA_ATTR_MC_MEMBER_REC:
421 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
429 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
431 struct mlx4_ib_dev *dev = to_mdev(ibdev);
434 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
435 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
442 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
443 u8 port, u16 pkey, u16 *ix)
446 u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
449 if (slave == mlx4_master_func_num(dev->dev))
450 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
452 unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
454 for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
455 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
458 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
460 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
463 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
464 if (slot_pkey & 0x8000) {
468 /* take first partial pkey index found */
469 if (partial_ix == 0xFF)
470 partial_ix = pkey_ix;
475 if (partial_ix < 0xFF) {
476 *ix = (u16) partial_ix;
483 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
484 enum ib_qp_type dest_qpt, struct ib_wc *wc,
485 struct ib_grh *grh, struct ib_mad *mad)
489 struct ib_send_wr *bad_wr;
490 struct mlx4_ib_demux_pv_ctx *tun_ctx;
491 struct mlx4_ib_demux_pv_qp *tun_qp;
492 struct mlx4_rcv_tunnel_mad *tun_mad;
493 struct ib_ah_attr attr;
495 struct ib_qp *src_qp = NULL;
496 unsigned tun_tx_ix = 0;
501 u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
503 if (dest_qpt > IB_QPT_GSI)
506 tun_ctx = dev->sriov.demux[port-1].tun[slave];
508 /* check if proxy qp created */
509 if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
513 tun_qp = &tun_ctx->qp[0];
515 tun_qp = &tun_ctx->qp[1];
517 /* compute P_Key index to put in tunnel header for slave */
520 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
524 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
527 tun_pkey_ix = pkey_ix;
529 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
531 dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
533 /* get tunnel tx data buf for slave */
536 /* create ah. Just need an empty one with the port num for the post send.
537 * The driver will set the force loopback bit in post_send */
538 memset(&attr, 0, sizeof attr);
539 attr.port_num = port;
541 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
542 attr.ah_flags = IB_AH_GRH;
544 ah = ib_create_ah(tun_ctx->pd, &attr);
548 /* allocate tunnel tx buf after pass failure returns */
549 spin_lock(&tun_qp->tx_lock);
550 if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
551 (MLX4_NUM_TUNNEL_BUFS - 1))
554 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
555 spin_unlock(&tun_qp->tx_lock);
559 tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
560 if (tun_qp->tx_ring[tun_tx_ix].ah)
561 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
562 tun_qp->tx_ring[tun_tx_ix].ah = ah;
563 ib_dma_sync_single_for_cpu(&dev->ib_dev,
564 tun_qp->tx_ring[tun_tx_ix].buf.map,
565 sizeof (struct mlx4_rcv_tunnel_mad),
568 /* copy over to tunnel buffer */
570 memcpy(&tun_mad->grh, grh, sizeof *grh);
571 memcpy(&tun_mad->mad, mad, sizeof *mad);
573 /* adjust tunnel data */
574 tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
575 tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
576 tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
580 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
583 if (vlan != wc->vlan_id)
584 /* Packet vlan is not the VST-assigned vlan.
589 /* Remove the vlan tag before forwarding
590 * the packet to the VF.
597 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
598 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
599 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
601 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
602 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
605 ib_dma_sync_single_for_device(&dev->ib_dev,
606 tun_qp->tx_ring[tun_tx_ix].buf.map,
607 sizeof (struct mlx4_rcv_tunnel_mad),
610 list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
611 list.length = sizeof (struct mlx4_rcv_tunnel_mad);
612 list.lkey = tun_ctx->pd->local_dma_lkey;
616 wr.remote_qkey = IB_QP_SET_QKEY;
617 wr.remote_qpn = dqpn;
619 wr.wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
620 wr.wr.sg_list = &list;
622 wr.wr.opcode = IB_WR_SEND;
623 wr.wr.send_flags = IB_SEND_SIGNALED;
625 ret = ib_post_send(src_qp, &wr.wr, &bad_wr);
629 spin_lock(&tun_qp->tx_lock);
630 tun_qp->tx_ix_tail++;
631 spin_unlock(&tun_qp->tx_lock);
632 tun_qp->tx_ring[tun_tx_ix].ah = NULL;
638 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
639 struct ib_wc *wc, struct ib_grh *grh,
642 struct mlx4_ib_dev *dev = to_mdev(ibdev);
648 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
654 if (!(wc->wc_flags & IB_WC_GRH)) {
655 mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
658 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
659 mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
662 err = mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave);
663 if (err && mlx4_is_mf_bonded(dev->dev)) {
664 other_port = (port == 1) ? 2 : 1;
665 err = mlx4_get_slave_from_roce_gid(dev->dev, other_port, grh->dgid.raw, &slave);
668 pr_debug("resolved slave %d from gid %pI6 wire port %d other %d\n",
669 slave, grh->dgid.raw, port, other_port);
673 mlx4_ib_warn(ibdev, "failed matching grh\n");
676 if (slave >= dev->dev->caps.sqp_demux) {
677 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
678 slave, dev->dev->caps.sqp_demux);
682 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
685 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
687 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
692 /* Initially assume that this mad is for us */
693 slave = mlx4_master_func_num(dev->dev);
695 /* See if the slave id is encoded in a response mad */
696 if (mad->mad_hdr.method & 0x80) {
697 slave_id = (u8 *) &mad->mad_hdr.tid;
699 if (slave != 255) /*255 indicates the dom0*/
700 *slave_id = 0; /* remap tid */
703 /* If a grh is present, we demux according to it */
704 if (wc->wc_flags & IB_WC_GRH) {
705 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
707 mlx4_ib_warn(ibdev, "failed matching grh\n");
711 /* Class-specific handling */
712 switch (mad->mad_hdr.mgmt_class) {
713 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
714 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
715 /* 255 indicates the dom0 */
716 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
717 if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
719 /* for a VF. drop unsolicited MADs */
720 if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
721 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
722 slave, mad->mad_hdr.mgmt_class,
723 mad->mad_hdr.method);
728 case IB_MGMT_CLASS_SUBN_ADM:
729 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
730 (struct ib_sa_mad *) mad))
733 case IB_MGMT_CLASS_CM:
734 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
737 case IB_MGMT_CLASS_DEVICE_MGMT:
738 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
742 /* Drop unsupported classes for slaves in tunnel mode */
743 if (slave != mlx4_master_func_num(dev->dev)) {
744 pr_debug("dropping unsupported ingress mad from class:%d "
745 "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
749 /*make sure that no slave==255 was not handled yet.*/
750 if (slave >= dev->dev->caps.sqp_demux) {
751 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
752 slave, dev->dev->caps.sqp_demux);
756 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
758 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
763 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
764 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
765 const struct ib_mad *in_mad, struct ib_mad *out_mad)
767 u16 slid, prev_lid = 0;
769 struct ib_port_attr pattr;
771 if (in_wc && in_wc->qp->qp_num) {
772 pr_debug("received MAD: slid:%d sqpn:%d "
773 "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
774 in_wc->slid, in_wc->src_qp,
775 in_wc->dlid_path_bits,
778 in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
779 be16_to_cpu(in_mad->mad_hdr.attr_id));
780 if (in_wc->wc_flags & IB_WC_GRH) {
781 pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
782 be64_to_cpu(in_grh->sgid.global.subnet_prefix),
783 be64_to_cpu(in_grh->sgid.global.interface_id));
784 pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
785 be64_to_cpu(in_grh->dgid.global.subnet_prefix),
786 be64_to_cpu(in_grh->dgid.global.interface_id));
790 slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
792 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
793 forward_trap(to_mdev(ibdev), port_num, in_mad);
794 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
797 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
798 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
799 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
800 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
801 in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
802 return IB_MAD_RESULT_SUCCESS;
805 * Don't process SMInfo queries -- the SMA can't handle them.
807 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
808 return IB_MAD_RESULT_SUCCESS;
809 } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
810 in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1 ||
811 in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2 ||
812 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
813 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
814 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
815 return IB_MAD_RESULT_SUCCESS;
817 return IB_MAD_RESULT_SUCCESS;
819 if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
820 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
821 in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
822 in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
823 !ib_query_port(ibdev, port_num, &pattr))
824 prev_lid = pattr.lid;
826 err = mlx4_MAD_IFC(to_mdev(ibdev),
827 (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
828 (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
829 MLX4_MAD_IFC_NET_VIEW,
830 port_num, in_wc, in_grh, in_mad, out_mad);
832 return IB_MAD_RESULT_FAILURE;
834 if (!out_mad->mad_hdr.status) {
835 smp_snoop(ibdev, port_num, in_mad, prev_lid);
836 /* slaves get node desc from FW */
837 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
838 node_desc_override(ibdev, out_mad);
841 /* set return bit in status of directed route responses */
842 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
843 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
845 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
846 /* no response for trap repress */
847 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
849 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
852 static void edit_counter(struct mlx4_counter *cnt, void *counters,
856 case IB_PMA_PORT_COUNTERS:
858 struct ib_pma_portcounters *pma_cnt =
859 (struct ib_pma_portcounters *)counters;
861 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
862 (be64_to_cpu(cnt->tx_bytes) >> 2));
863 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
864 (be64_to_cpu(cnt->rx_bytes) >> 2));
865 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
866 be64_to_cpu(cnt->tx_frames));
867 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
868 be64_to_cpu(cnt->rx_frames));
871 case IB_PMA_PORT_COUNTERS_EXT:
873 struct ib_pma_portcounters_ext *pma_cnt_ext =
874 (struct ib_pma_portcounters_ext *)counters;
876 pma_cnt_ext->port_xmit_data =
877 cpu_to_be64(be64_to_cpu(cnt->tx_bytes) >> 2);
878 pma_cnt_ext->port_rcv_data =
879 cpu_to_be64(be64_to_cpu(cnt->rx_bytes) >> 2);
880 pma_cnt_ext->port_xmit_packets = cnt->tx_frames;
881 pma_cnt_ext->port_rcv_packets = cnt->rx_frames;
887 static int iboe_process_mad_port_info(void *out_mad)
889 struct ib_class_port_info cpi = {};
891 cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
892 memcpy(out_mad, &cpi, sizeof(cpi));
893 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
896 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
897 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
898 const struct ib_mad *in_mad, struct ib_mad *out_mad)
900 struct mlx4_counter counter_stats;
901 struct mlx4_ib_dev *dev = to_mdev(ibdev);
902 struct counter_index *tmp_counter;
903 int err = IB_MAD_RESULT_FAILURE, stats_avail = 0;
905 if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
908 if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)
909 return iboe_process_mad_port_info((void *)(out_mad->data + 40));
911 memset(&counter_stats, 0, sizeof(counter_stats));
912 mutex_lock(&dev->counters_table[port_num - 1].mutex);
913 list_for_each_entry(tmp_counter,
914 &dev->counters_table[port_num - 1].counters_list,
916 err = mlx4_get_counter_stats(dev->dev,
920 err = IB_MAD_RESULT_FAILURE;
926 mutex_unlock(&dev->counters_table[port_num - 1].mutex);
928 memset(out_mad->data, 0, sizeof out_mad->data);
929 switch (counter_stats.counter_mode & 0xf) {
931 edit_counter(&counter_stats,
932 (void *)(out_mad->data + 40),
933 in_mad->mad_hdr.attr_id);
934 err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
937 err = IB_MAD_RESULT_FAILURE;
944 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
945 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
946 const struct ib_mad_hdr *in, size_t in_mad_size,
947 struct ib_mad_hdr *out, size_t *out_mad_size,
948 u16 *out_mad_pkey_index)
950 struct mlx4_ib_dev *dev = to_mdev(ibdev);
951 const struct ib_mad *in_mad = (const struct ib_mad *)in;
952 struct ib_mad *out_mad = (struct ib_mad *)out;
953 enum rdma_link_layer link = rdma_port_get_link_layer(ibdev, port_num);
955 if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
956 *out_mad_size != sizeof(*out_mad)))
957 return IB_MAD_RESULT_FAILURE;
959 /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
960 * queries, should be called only by VFs and for that specific purpose
962 if (link == IB_LINK_LAYER_INFINIBAND) {
963 if (mlx4_is_slave(dev->dev) &&
964 (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
965 (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS ||
966 in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT ||
967 in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)))
968 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
969 in_grh, in_mad, out_mad);
971 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
972 in_grh, in_mad, out_mad);
975 if (link == IB_LINK_LAYER_ETHERNET)
976 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
977 in_grh, in_mad, out_mad);
982 static void send_handler(struct ib_mad_agent *agent,
983 struct ib_mad_send_wc *mad_send_wc)
985 if (mad_send_wc->send_buf->context[0])
986 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
987 ib_free_send_mad(mad_send_wc->send_buf);
990 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
992 struct ib_mad_agent *agent;
995 enum rdma_link_layer ll;
997 for (p = 0; p < dev->num_ports; ++p) {
998 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
999 for (q = 0; q <= 1; ++q) {
1000 if (ll == IB_LINK_LAYER_INFINIBAND) {
1001 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
1002 q ? IB_QPT_GSI : IB_QPT_SMI,
1003 NULL, 0, send_handler,
1005 if (IS_ERR(agent)) {
1006 ret = PTR_ERR(agent);
1009 dev->send_agent[p][q] = agent;
1011 dev->send_agent[p][q] = NULL;
1018 for (p = 0; p < dev->num_ports; ++p)
1019 for (q = 0; q <= 1; ++q)
1020 if (dev->send_agent[p][q])
1021 ib_unregister_mad_agent(dev->send_agent[p][q]);
1026 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
1028 struct ib_mad_agent *agent;
1031 for (p = 0; p < dev->num_ports; ++p) {
1032 for (q = 0; q <= 1; ++q) {
1033 agent = dev->send_agent[p][q];
1035 dev->send_agent[p][q] = NULL;
1036 ib_unregister_mad_agent(agent);
1041 ib_destroy_ah(dev->sm_ah[p]);
1045 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
1047 mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
1049 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1050 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1051 MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
1054 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
1056 /* re-configure the alias-guid and mcg's */
1057 if (mlx4_is_master(dev->dev)) {
1058 mlx4_ib_invalidate_all_guid_record(dev, port_num);
1060 if (!dev->sriov.is_going_down) {
1061 mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
1062 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1063 MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
1067 /* Update the sl to vl table from inside client rereg
1068 * only if in secure-host mode (snooping is not possible)
1069 * and the sl-to-vl change event is not generated by FW.
1071 if (!mlx4_is_slave(dev->dev) &&
1072 dev->dev->flags & MLX4_FLAG_SECURE_HOST &&
1073 !(dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) {
1074 if (mlx4_is_master(dev->dev))
1075 /* already in work queue from mlx4_ib_event queueing
1076 * mlx4_handle_port_mgmt_change_event, which calls
1077 * this procedure. Therefore, call sl2vl_update directly.
1079 mlx4_ib_sl2vl_update(dev, port_num);
1081 mlx4_sched_ib_sl2vl_update_work(dev, port_num);
1083 mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
1086 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
1087 struct mlx4_eqe *eqe)
1089 __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
1090 GET_MASK_FROM_EQE(eqe));
1093 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
1094 u32 guid_tbl_blk_num, u32 change_bitmap)
1096 struct ib_smp *in_mad = NULL;
1097 struct ib_smp *out_mad = NULL;
1100 if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
1103 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
1104 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1105 if (!in_mad || !out_mad) {
1106 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
1110 guid_tbl_blk_num *= 4;
1112 for (i = 0; i < 4; i++) {
1113 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1115 memset(in_mad, 0, sizeof *in_mad);
1116 memset(out_mad, 0, sizeof *out_mad);
1118 in_mad->base_version = 1;
1119 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1120 in_mad->class_version = 1;
1121 in_mad->method = IB_MGMT_METHOD_GET;
1122 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
1123 in_mad->attr_mod = cpu_to_be32(guid_tbl_blk_num + i);
1125 if (mlx4_MAD_IFC(dev,
1126 MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1127 port_num, NULL, NULL, in_mad, out_mad)) {
1128 mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1132 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1134 (u8 *)(&((struct ib_smp *)out_mad)->data));
1135 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1137 (u8 *)(&((struct ib_smp *)out_mad)->data));
1146 void handle_port_mgmt_change_event(struct work_struct *work)
1148 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1149 struct mlx4_ib_dev *dev = ew->ib_dev;
1150 struct mlx4_eqe *eqe = &(ew->ib_eqe);
1151 u8 port = eqe->event.port_mgmt_change.port;
1156 switch (eqe->subtype) {
1157 case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1158 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1160 /* Update the SM ah - This should be done before handling
1161 the other changed attributes so that MADs can be sent to the SM */
1162 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1163 u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1164 u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1165 update_sm_ah(dev, port, lid, sl);
1168 /* Check if it is a lid change event */
1169 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1170 handle_lid_change_event(dev, port);
1172 /* Generate GUID changed event */
1173 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1174 mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1175 /*if master, notify all slaves*/
1176 if (mlx4_is_master(dev->dev))
1177 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1178 MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1181 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1182 handle_client_rereg_event(dev, port);
1185 case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1186 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1187 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1188 propagate_pkey_ev(dev, port, eqe);
1190 case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1191 /* paravirtualized master's guid is guid 0 -- does not change */
1192 if (!mlx4_is_master(dev->dev))
1193 mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1194 /*if master, notify relevant slaves*/
1195 else if (!dev->sriov.is_going_down) {
1196 tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1197 change_bitmap = GET_MASK_FROM_EQE(eqe);
1198 handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1202 case MLX4_DEV_PMC_SUBTYPE_SL_TO_VL_MAP:
1203 /* cache sl to vl mapping changes for use in
1204 * filling QP1 LRH VL field when sending packets
1206 if (!mlx4_is_slave(dev->dev)) {
1207 union sl2vl_tbl_to_u64 sl2vl64;
1210 for (jj = 0; jj < 8; jj++) {
1212 eqe->event.port_mgmt_change.params.sl2vl_tbl_change_info.sl2vl_table[jj];
1213 pr_debug("port %u, sl2vl[%d] = %02x\n",
1214 port, jj, sl2vl64.sl8[jj]);
1216 atomic64_set(&dev->sl2vl[port - 1], sl2vl64.sl64);
1220 pr_warn("Unsupported subtype 0x%x for "
1221 "Port Management Change event\n", eqe->subtype);
1227 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1228 enum ib_event_type type)
1230 struct ib_event event;
1232 event.device = &dev->ib_dev;
1233 event.element.port_num = port_num;
1236 ib_dispatch_event(&event);
1239 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1241 unsigned long flags;
1242 struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1243 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1244 spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1245 if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1246 queue_work(ctx->wq, &ctx->work);
1247 spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1250 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1251 struct mlx4_ib_demux_pv_qp *tun_qp,
1254 struct ib_sge sg_list;
1255 struct ib_recv_wr recv_wr, *bad_recv_wr;
1258 size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1259 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1261 sg_list.addr = tun_qp->ring[index].map;
1262 sg_list.length = size;
1263 sg_list.lkey = ctx->pd->local_dma_lkey;
1265 recv_wr.next = NULL;
1266 recv_wr.sg_list = &sg_list;
1267 recv_wr.num_sge = 1;
1268 recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1269 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1270 ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1271 size, DMA_FROM_DEVICE);
1272 return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1275 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1276 int slave, struct ib_sa_mad *sa_mad)
1280 /* dispatch to different sa handlers */
1281 switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1282 case IB_SA_ATTR_MC_MEMBER_REC:
1283 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1291 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1293 int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1295 return (qpn >= proxy_start && qpn <= proxy_start + 1);
1299 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1300 enum ib_qp_type dest_qpt, u16 pkey_index,
1301 u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1302 u8 *s_mac, u16 vlan_id, struct ib_mad *mad)
1306 struct ib_send_wr *bad_wr;
1307 struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1308 struct mlx4_ib_demux_pv_qp *sqp;
1309 struct mlx4_mad_snd_buf *sqp_mad;
1311 struct ib_qp *send_qp = NULL;
1312 unsigned wire_tx_ix = 0;
1319 sqp_ctx = dev->sriov.sqps[port-1];
1321 /* check if proxy qp created */
1322 if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1325 if (dest_qpt == IB_QPT_SMI) {
1327 sqp = &sqp_ctx->qp[0];
1328 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1331 sqp = &sqp_ctx->qp[1];
1332 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1338 sgid_index = attr->grh.sgid_index;
1339 attr->grh.sgid_index = 0;
1340 ah = ib_create_ah(sqp_ctx->pd, attr);
1343 attr->grh.sgid_index = sgid_index;
1344 to_mah(ah)->av.ib.gid_index = sgid_index;
1345 /* get rid of force-loopback bit */
1346 to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1347 spin_lock(&sqp->tx_lock);
1348 if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1349 (MLX4_NUM_TUNNEL_BUFS - 1))
1352 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1353 spin_unlock(&sqp->tx_lock);
1357 sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1358 if (sqp->tx_ring[wire_tx_ix].ah)
1359 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1360 sqp->tx_ring[wire_tx_ix].ah = ah;
1361 ib_dma_sync_single_for_cpu(&dev->ib_dev,
1362 sqp->tx_ring[wire_tx_ix].buf.map,
1363 sizeof (struct mlx4_mad_snd_buf),
1366 memcpy(&sqp_mad->payload, mad, sizeof *mad);
1368 ib_dma_sync_single_for_device(&dev->ib_dev,
1369 sqp->tx_ring[wire_tx_ix].buf.map,
1370 sizeof (struct mlx4_mad_snd_buf),
1373 list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1374 list.length = sizeof (struct mlx4_mad_snd_buf);
1375 list.lkey = sqp_ctx->pd->local_dma_lkey;
1379 wr.pkey_index = wire_pkey_ix;
1380 wr.remote_qkey = qkey;
1381 wr.remote_qpn = remote_qpn;
1383 wr.wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1384 wr.wr.sg_list = &list;
1386 wr.wr.opcode = IB_WR_SEND;
1387 wr.wr.send_flags = IB_SEND_SIGNALED;
1389 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1390 if (vlan_id < 0x1000)
1391 vlan_id |= (attr->sl & 7) << 13;
1392 to_mah(ah)->av.eth.vlan = cpu_to_be16(vlan_id);
1395 ret = ib_post_send(send_qp, &wr.wr, &bad_wr);
1399 spin_lock(&sqp->tx_lock);
1401 spin_unlock(&sqp->tx_lock);
1402 sqp->tx_ring[wire_tx_ix].ah = NULL;
1408 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1410 if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1412 return mlx4_get_base_gid_ix(dev->dev, slave, port);
1415 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1416 struct ib_ah_attr *ah_attr)
1418 if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1419 ah_attr->grh.sgid_index = slave;
1421 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1424 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1426 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1427 struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1428 int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1429 struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1430 struct mlx4_ib_ah ah;
1431 struct ib_ah_attr ah_attr;
1437 /* Get slave that sent this packet */
1438 if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1439 wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1440 (wc->src_qp & 0x1) != ctx->port - 1 ||
1442 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1445 slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1446 if (slave != ctx->slave) {
1447 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1448 "belongs to another slave\n", wc->src_qp);
1452 /* Map transaction ID */
1453 ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1454 sizeof (struct mlx4_tunnel_mad),
1456 switch (tunnel->mad.mad_hdr.method) {
1457 case IB_MGMT_METHOD_SET:
1458 case IB_MGMT_METHOD_GET:
1459 case IB_MGMT_METHOD_REPORT:
1460 case IB_SA_METHOD_GET_TABLE:
1461 case IB_SA_METHOD_DELETE:
1462 case IB_SA_METHOD_GET_MULTI:
1463 case IB_SA_METHOD_GET_TRACE_TBL:
1464 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1466 mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1467 "class:%d slave:%d\n", *slave_id,
1468 tunnel->mad.mad_hdr.mgmt_class, slave);
1476 /* Class-specific handling */
1477 switch (tunnel->mad.mad_hdr.mgmt_class) {
1478 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1479 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1480 if (slave != mlx4_master_func_num(dev->dev) &&
1481 !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1484 case IB_MGMT_CLASS_SUBN_ADM:
1485 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1486 (struct ib_sa_mad *) &tunnel->mad))
1489 case IB_MGMT_CLASS_CM:
1490 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1491 (struct ib_mad *) &tunnel->mad))
1494 case IB_MGMT_CLASS_DEVICE_MGMT:
1495 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1496 tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1500 /* Drop unsupported classes for slaves in tunnel mode */
1501 if (slave != mlx4_master_func_num(dev->dev)) {
1502 mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1503 "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1508 /* We are using standard ib_core services to send the mad, so generate a
1509 * stadard address handle by decoding the tunnelled mlx4_ah fields */
1510 memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1511 ah.ibah.device = ctx->ib_dev;
1513 port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1514 port = mlx4_slave_convert_port(dev->dev, slave, port);
1517 ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1519 mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1520 if (ah_attr.ah_flags & IB_AH_GRH)
1521 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1523 memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1524 vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1525 /* if slave have default vlan use it */
1526 mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1527 &vlan_id, &ah_attr.sl);
1529 mlx4_ib_send_to_wire(dev, slave, ctx->port,
1530 is_proxy_qp0(dev, wc->src_qp, slave) ?
1531 IB_QPT_SMI : IB_QPT_GSI,
1532 be16_to_cpu(tunnel->hdr.pkey_index),
1533 be32_to_cpu(tunnel->hdr.remote_qpn),
1534 be32_to_cpu(tunnel->hdr.qkey),
1535 &ah_attr, wc->smac, vlan_id, &tunnel->mad);
1538 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1539 enum ib_qp_type qp_type, int is_tun)
1542 struct mlx4_ib_demux_pv_qp *tun_qp;
1543 int rx_buf_size, tx_buf_size;
1545 if (qp_type > IB_QPT_GSI)
1548 tun_qp = &ctx->qp[qp_type];
1550 tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1555 tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1556 sizeof (struct mlx4_ib_tun_tx_buf),
1558 if (!tun_qp->tx_ring) {
1559 kfree(tun_qp->ring);
1560 tun_qp->ring = NULL;
1565 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1566 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1568 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1569 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1572 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1573 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1574 if (!tun_qp->ring[i].addr)
1576 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1577 tun_qp->ring[i].addr,
1580 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1581 kfree(tun_qp->ring[i].addr);
1586 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1587 tun_qp->tx_ring[i].buf.addr =
1588 kmalloc(tx_buf_size, GFP_KERNEL);
1589 if (!tun_qp->tx_ring[i].buf.addr)
1591 tun_qp->tx_ring[i].buf.map =
1592 ib_dma_map_single(ctx->ib_dev,
1593 tun_qp->tx_ring[i].buf.addr,
1596 if (ib_dma_mapping_error(ctx->ib_dev,
1597 tun_qp->tx_ring[i].buf.map)) {
1598 kfree(tun_qp->tx_ring[i].buf.addr);
1601 tun_qp->tx_ring[i].ah = NULL;
1603 spin_lock_init(&tun_qp->tx_lock);
1604 tun_qp->tx_ix_head = 0;
1605 tun_qp->tx_ix_tail = 0;
1606 tun_qp->proxy_qpt = qp_type;
1613 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1614 tx_buf_size, DMA_TO_DEVICE);
1615 kfree(tun_qp->tx_ring[i].buf.addr);
1617 kfree(tun_qp->tx_ring);
1618 tun_qp->tx_ring = NULL;
1619 i = MLX4_NUM_TUNNEL_BUFS;
1623 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1624 rx_buf_size, DMA_FROM_DEVICE);
1625 kfree(tun_qp->ring[i].addr);
1627 kfree(tun_qp->ring);
1628 tun_qp->ring = NULL;
1632 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1633 enum ib_qp_type qp_type, int is_tun)
1636 struct mlx4_ib_demux_pv_qp *tun_qp;
1637 int rx_buf_size, tx_buf_size;
1639 if (qp_type > IB_QPT_GSI)
1642 tun_qp = &ctx->qp[qp_type];
1644 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1645 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1647 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1648 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1652 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1653 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1654 rx_buf_size, DMA_FROM_DEVICE);
1655 kfree(tun_qp->ring[i].addr);
1658 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1659 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1660 tx_buf_size, DMA_TO_DEVICE);
1661 kfree(tun_qp->tx_ring[i].buf.addr);
1662 if (tun_qp->tx_ring[i].ah)
1663 ib_destroy_ah(tun_qp->tx_ring[i].ah);
1665 kfree(tun_qp->tx_ring);
1666 kfree(tun_qp->ring);
1669 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1671 struct mlx4_ib_demux_pv_ctx *ctx;
1672 struct mlx4_ib_demux_pv_qp *tun_qp;
1675 ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1676 ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1678 while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1679 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1680 if (wc.status == IB_WC_SUCCESS) {
1681 switch (wc.opcode) {
1683 mlx4_ib_multiplex_mad(ctx, &wc);
1684 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1686 (MLX4_NUM_TUNNEL_BUFS - 1));
1688 pr_err("Failed reposting tunnel "
1689 "buf:%lld\n", wc.wr_id);
1692 pr_debug("received tunnel send completion:"
1693 "wrid=0x%llx, status=0x%x\n",
1694 wc.wr_id, wc.status);
1695 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1696 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1697 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1699 spin_lock(&tun_qp->tx_lock);
1700 tun_qp->tx_ix_tail++;
1701 spin_unlock(&tun_qp->tx_lock);
1708 pr_debug("mlx4_ib: completion error in tunnel: %d."
1709 " status = %d, wrid = 0x%llx\n",
1710 ctx->slave, wc.status, wc.wr_id);
1711 if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1712 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1713 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1714 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1716 spin_lock(&tun_qp->tx_lock);
1717 tun_qp->tx_ix_tail++;
1718 spin_unlock(&tun_qp->tx_lock);
1724 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1726 struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1728 /* It's worse than that! He's dead, Jim! */
1729 pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1730 event->event, sqp->port);
1733 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1734 enum ib_qp_type qp_type, int create_tun)
1737 struct mlx4_ib_demux_pv_qp *tun_qp;
1738 struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1739 struct ib_qp_attr attr;
1740 int qp_attr_mask_INIT;
1742 if (qp_type > IB_QPT_GSI)
1745 tun_qp = &ctx->qp[qp_type];
1747 memset(&qp_init_attr, 0, sizeof qp_init_attr);
1748 qp_init_attr.init_attr.send_cq = ctx->cq;
1749 qp_init_attr.init_attr.recv_cq = ctx->cq;
1750 qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1751 qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1752 qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1753 qp_init_attr.init_attr.cap.max_send_sge = 1;
1754 qp_init_attr.init_attr.cap.max_recv_sge = 1;
1756 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1757 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1758 qp_init_attr.port = ctx->port;
1759 qp_init_attr.slave = ctx->slave;
1760 qp_init_attr.proxy_qp_type = qp_type;
1761 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1762 IB_QP_QKEY | IB_QP_PORT;
1764 qp_init_attr.init_attr.qp_type = qp_type;
1765 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1766 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1768 qp_init_attr.init_attr.port_num = ctx->port;
1769 qp_init_attr.init_attr.qp_context = ctx;
1770 qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1771 tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1772 if (IS_ERR(tun_qp->qp)) {
1773 ret = PTR_ERR(tun_qp->qp);
1775 pr_err("Couldn't create %s QP (%d)\n",
1776 create_tun ? "tunnel" : "special", ret);
1780 memset(&attr, 0, sizeof attr);
1781 attr.qp_state = IB_QPS_INIT;
1784 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1785 ctx->port, IB_DEFAULT_PKEY_FULL,
1787 if (ret || !create_tun)
1789 to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1790 attr.qkey = IB_QP1_QKEY;
1791 attr.port_num = ctx->port;
1792 ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1794 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1795 create_tun ? "tunnel" : "special", ret);
1798 attr.qp_state = IB_QPS_RTR;
1799 ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1801 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1802 create_tun ? "tunnel" : "special", ret);
1805 attr.qp_state = IB_QPS_RTS;
1807 ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1809 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1810 create_tun ? "tunnel" : "special", ret);
1814 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1815 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1817 pr_err(" mlx4_ib_post_pv_buf error"
1818 " (err = %d, i = %d)\n", ret, i);
1825 ib_destroy_qp(tun_qp->qp);
1831 * IB MAD completion callback for real SQPs
1833 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1835 struct mlx4_ib_demux_pv_ctx *ctx;
1836 struct mlx4_ib_demux_pv_qp *sqp;
1841 ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1842 ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1844 while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1845 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1846 if (wc.status == IB_WC_SUCCESS) {
1847 switch (wc.opcode) {
1849 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1850 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1851 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1853 spin_lock(&sqp->tx_lock);
1855 spin_unlock(&sqp->tx_lock);
1858 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1859 (sqp->ring[wc.wr_id &
1860 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1861 grh = &(((struct mlx4_mad_rcv_buf *)
1862 (sqp->ring[wc.wr_id &
1863 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1864 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1865 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1866 (MLX4_NUM_TUNNEL_BUFS - 1)))
1867 pr_err("Failed reposting SQP "
1868 "buf:%lld\n", wc.wr_id);
1875 pr_debug("mlx4_ib: completion error in tunnel: %d."
1876 " status = %d, wrid = 0x%llx\n",
1877 ctx->slave, wc.status, wc.wr_id);
1878 if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1879 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1880 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1881 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1883 spin_lock(&sqp->tx_lock);
1885 spin_unlock(&sqp->tx_lock);
1891 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1892 struct mlx4_ib_demux_pv_ctx **ret_ctx)
1894 struct mlx4_ib_demux_pv_ctx *ctx;
1897 ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1899 pr_err("failed allocating pv resource context "
1900 "for port %d, slave %d\n", port, slave);
1904 ctx->ib_dev = &dev->ib_dev;
1911 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1913 if (dev->sriov.demux[port - 1].tun[slave]) {
1914 kfree(dev->sriov.demux[port - 1].tun[slave]);
1915 dev->sriov.demux[port - 1].tun[slave] = NULL;
1919 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1920 int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1923 struct ib_cq_init_attr cq_attr = {};
1925 if (ctx->state != DEMUX_PV_STATE_DOWN)
1928 ctx->state = DEMUX_PV_STATE_STARTING;
1929 /* have QP0 only if link layer is IB */
1930 if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1931 IB_LINK_LAYER_INFINIBAND)
1935 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1937 pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1942 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1944 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1948 cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1952 cq_attr.cqe = cq_size;
1953 ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1954 NULL, ctx, &cq_attr);
1955 if (IS_ERR(ctx->cq)) {
1956 ret = PTR_ERR(ctx->cq);
1957 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1961 ctx->pd = ib_alloc_pd(ctx->ib_dev, 0);
1962 if (IS_ERR(ctx->pd)) {
1963 ret = PTR_ERR(ctx->pd);
1964 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1969 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1971 pr_err("Couldn't create %s QP0 (%d)\n",
1972 create_tun ? "tunnel for" : "", ret);
1977 ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1979 pr_err("Couldn't create %s QP1 (%d)\n",
1980 create_tun ? "tunnel for" : "", ret);
1985 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1987 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1989 ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1991 ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1993 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1996 ctx->state = DEMUX_PV_STATE_ACTIVE;
2001 ib_destroy_qp(ctx->qp[1].qp);
2002 ctx->qp[1].qp = NULL;
2007 ib_destroy_qp(ctx->qp[0].qp);
2008 ctx->qp[0].qp = NULL;
2011 ib_dealloc_pd(ctx->pd);
2015 ib_destroy_cq(ctx->cq);
2019 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
2023 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
2025 ctx->state = DEMUX_PV_STATE_DOWN;
2029 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
2030 struct mlx4_ib_demux_pv_ctx *ctx, int flush)
2034 if (ctx->state > DEMUX_PV_STATE_DOWN) {
2035 ctx->state = DEMUX_PV_STATE_DOWNING;
2037 flush_workqueue(ctx->wq);
2039 ib_destroy_qp(ctx->qp[0].qp);
2040 ctx->qp[0].qp = NULL;
2041 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
2043 ib_destroy_qp(ctx->qp[1].qp);
2044 ctx->qp[1].qp = NULL;
2045 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
2046 ib_dealloc_pd(ctx->pd);
2048 ib_destroy_cq(ctx->cq);
2050 ctx->state = DEMUX_PV_STATE_DOWN;
2054 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
2055 int port, int do_init)
2060 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
2061 /* for master, destroy real sqp resources */
2062 if (slave == mlx4_master_func_num(dev->dev))
2063 destroy_pv_resources(dev, slave, port,
2064 dev->sriov.sqps[port - 1], 1);
2065 /* destroy the tunnel qp resources */
2066 destroy_pv_resources(dev, slave, port,
2067 dev->sriov.demux[port - 1].tun[slave], 1);
2071 /* create the tunnel qp resources */
2072 ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
2073 dev->sriov.demux[port - 1].tun[slave]);
2075 /* for master, create the real sqp resources */
2076 if (!ret && slave == mlx4_master_func_num(dev->dev))
2077 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
2078 dev->sriov.sqps[port - 1]);
2082 void mlx4_ib_tunnels_update_work(struct work_struct *work)
2084 struct mlx4_ib_demux_work *dmxw;
2086 dmxw = container_of(work, struct mlx4_ib_demux_work, work);
2087 mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
2093 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
2094 struct mlx4_ib_demux_ctx *ctx,
2101 ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
2102 sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
2108 ctx->ib_dev = &dev->ib_dev;
2111 i < min(dev->dev->caps.sqp_demux,
2112 (u16)(dev->dev->persist->num_vfs + 1));
2114 struct mlx4_active_ports actv_ports =
2115 mlx4_get_active_ports(dev->dev, i);
2117 if (!test_bit(port - 1, actv_ports.ports))
2120 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
2127 ret = mlx4_ib_mcg_port_init(ctx);
2129 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2133 snprintf(name, sizeof name, "mlx4_ibt%d", port);
2134 ctx->wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2136 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2141 snprintf(name, sizeof name, "mlx4_ibud%d", port);
2142 ctx->ud_wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2144 pr_err("Failed to create up/down WQ for port %d\n", port);
2152 destroy_workqueue(ctx->wq);
2156 mlx4_ib_mcg_port_cleanup(ctx, 1);
2158 for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2159 free_pv_object(dev, i, port);
2165 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2167 if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2168 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2169 flush_workqueue(sqp_ctx->wq);
2170 if (sqp_ctx->has_smi) {
2171 ib_destroy_qp(sqp_ctx->qp[0].qp);
2172 sqp_ctx->qp[0].qp = NULL;
2173 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2175 ib_destroy_qp(sqp_ctx->qp[1].qp);
2176 sqp_ctx->qp[1].qp = NULL;
2177 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2178 ib_dealloc_pd(sqp_ctx->pd);
2180 ib_destroy_cq(sqp_ctx->cq);
2182 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2186 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2190 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2191 mlx4_ib_mcg_port_cleanup(ctx, 1);
2192 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2195 if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2196 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2198 flush_workqueue(ctx->wq);
2199 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2200 destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2201 free_pv_object(dev, i, ctx->port);
2204 destroy_workqueue(ctx->ud_wq);
2205 destroy_workqueue(ctx->wq);
2209 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2213 if (!mlx4_is_master(dev->dev))
2215 /* initialize or tear down tunnel QPs for the master */
2216 for (i = 0; i < dev->dev->caps.num_ports; i++)
2217 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2221 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2226 if (!mlx4_is_mfunc(dev->dev))
2229 dev->sriov.is_going_down = 0;
2230 spin_lock_init(&dev->sriov.going_down_lock);
2231 mlx4_ib_cm_paravirt_init(dev);
2233 mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2235 if (mlx4_is_slave(dev->dev)) {
2236 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2240 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2241 if (i == mlx4_master_func_num(dev->dev))
2242 mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2244 mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2247 err = mlx4_ib_init_alias_guid_service(dev);
2249 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2252 err = mlx4_ib_device_register_sysfs(dev);
2254 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2258 mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2259 dev->dev->caps.sqp_demux);
2260 for (i = 0; i < dev->num_ports; i++) {
2262 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2265 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2266 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2267 &dev->sriov.sqps[i]);
2270 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2274 mlx4_ib_master_tunnels(dev, 1);
2278 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2281 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2282 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2284 mlx4_ib_device_unregister_sysfs(dev);
2287 mlx4_ib_destroy_alias_guid_service(dev);
2290 mlx4_ib_cm_paravirt_clean(dev, -1);
2295 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2298 unsigned long flags;
2300 if (!mlx4_is_mfunc(dev->dev))
2303 spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2304 dev->sriov.is_going_down = 1;
2305 spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2306 if (mlx4_is_master(dev->dev)) {
2307 for (i = 0; i < dev->num_ports; i++) {
2308 flush_workqueue(dev->sriov.demux[i].ud_wq);
2309 mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2310 kfree(dev->sriov.sqps[i]);
2311 dev->sriov.sqps[i] = NULL;
2312 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2315 mlx4_ib_cm_paravirt_clean(dev, -1);
2316 mlx4_ib_destroy_alias_guid_service(dev);
2317 mlx4_ib_device_unregister_sysfs(dev);