1 /* QLogic qedr NIC Driver
2 * Copyright (c) 2015-2016 QLogic Corporation
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <rdma/ib_addr.h>
37 #include <linux/qed/qed_if.h>
38 #include <linux/qed/qed_chain.h>
39 #include <linux/qed/qed_roce_if.h>
40 #include <linux/qed/qede_roce.h>
43 #define QEDR_MODULE_VERSION "8.10.10.0"
44 #define QEDR_NODE_DESC "QLogic 579xx RoCE HCA"
45 #define DP_NAME(dev) ((dev)->ibdev.name)
47 #define DP_DEBUG(dev, module, fmt, ...) \
48 pr_debug("(%s) " module ": " fmt, \
49 DP_NAME(dev) ? DP_NAME(dev) : "", ## __VA_ARGS__)
51 #define QEDR_MSG_INIT "INIT"
52 #define QEDR_MSG_MISC "MISC"
53 #define QEDR_MSG_CQ " CQ"
54 #define QEDR_MSG_MR " MR"
56 #define QEDR_CQ_MAGIC_NUMBER (0x11223344)
63 struct qed_sb_info *sb;
70 #define QEDR_MAX_SGID 128
72 struct qedr_device_attr {
84 u8 max_qp_resp_rd_atomic_resc;
85 u8 max_qp_req_rd_atomic_resc;
86 u64 max_dev_resp_rd_atomic_resc;
94 u32 max_mr_mw_fmr_pbl;
95 u64 max_mr_mw_fmr_size;
108 u32 bad_pkey_counter;
109 struct qed_rdma_events events;
113 struct ib_device ibdev;
114 struct qed_dev *cdev;
115 struct pci_dev *pdev;
116 struct net_device *ndev;
118 enum ib_atomic_cap atomic_cap;
121 struct qedr_device_attr attr;
123 const struct qed_rdma_ops *ops;
124 struct qed_int_info int_info;
126 struct qed_sb_info *sb_array;
127 struct qedr_cnq *cnq_array;
131 void __iomem *db_addr;
136 union ib_gid *sgid_tbl;
138 /* Lock for sgid table */
139 spinlock_t sgid_lock;
148 #define QEDR_MAX_SQ_PBL (0x8000)
149 #define QEDR_MAX_SQ_PBL_ENTRIES (0x10000 / sizeof(void *))
150 #define QEDR_SQE_ELEMENT_SIZE (sizeof(struct rdma_sq_sge))
151 #define QEDR_MAX_SQE_ELEMENTS_PER_SQE (ROCE_REQ_MAX_SINGLE_SQ_WQE_SIZE / \
152 QEDR_SQE_ELEMENT_SIZE)
153 #define QEDR_MAX_SQE_ELEMENTS_PER_PAGE ((RDMA_RING_PAGE_SIZE) / \
154 QEDR_SQE_ELEMENT_SIZE)
155 #define QEDR_MAX_SQE ((QEDR_MAX_SQ_PBL_ENTRIES) *\
156 (RDMA_RING_PAGE_SIZE) / \
157 (QEDR_SQE_ELEMENT_SIZE) /\
158 (QEDR_MAX_SQE_ELEMENTS_PER_SQE))
160 #define QEDR_MAX_RQ_PBL (0x2000)
161 #define QEDR_MAX_RQ_PBL_ENTRIES (0x10000 / sizeof(void *))
162 #define QEDR_RQE_ELEMENT_SIZE (sizeof(struct rdma_rq_sge))
163 #define QEDR_MAX_RQE_ELEMENTS_PER_RQE (RDMA_MAX_SGE_PER_RQ_WQE)
164 #define QEDR_MAX_RQE_ELEMENTS_PER_PAGE ((RDMA_RING_PAGE_SIZE) / \
165 QEDR_RQE_ELEMENT_SIZE)
166 #define QEDR_MAX_RQE ((QEDR_MAX_RQ_PBL_ENTRIES) *\
167 (RDMA_RING_PAGE_SIZE) / \
168 (QEDR_RQE_ELEMENT_SIZE) /\
169 (QEDR_MAX_RQE_ELEMENTS_PER_RQE))
171 #define QEDR_CQE_SIZE (sizeof(union rdma_cqe))
172 #define QEDR_MAX_CQE_PBL_SIZE (512 * 1024)
173 #define QEDR_MAX_CQE_PBL_ENTRIES (((QEDR_MAX_CQE_PBL_SIZE) / \
175 #define QEDR_MAX_CQES ((u32)((QEDR_MAX_CQE_PBL_ENTRIES) * \
176 (QED_CHAIN_PAGE_SIZE) / QEDR_CQE_SIZE))
178 #define QEDR_ROCE_MAX_CNQ_SIZE (0x4000)
180 #define QEDR_MAX_PORT (1)
182 #define QEDR_UVERBS(CMD_NAME) (1ull << IB_USER_VERBS_CMD_##CMD_NAME)
184 #define QEDR_ROCE_PKEY_MAX 1
185 #define QEDR_ROCE_PKEY_TABLE_LEN 1
186 #define QEDR_ROCE_PKEY_DEFAULT 0xffff
189 struct list_head list_entry;
194 struct qedr_ucontext {
195 struct ib_ucontext ibucontext;
196 struct qedr_dev *dev;
203 struct list_head mm_head;
205 /* Lock to protect mm list */
206 struct mutex mm_list_lock;
210 struct rdma_pwm_val32_data data;
220 struct qedr_pbl_info {
229 struct ib_umem *umem;
230 struct qedr_pbl_info pbl_info;
231 struct qedr_pbl *pbl_tbl;
239 enum qedr_cq_type cq_type;
244 /* Lock to protect multiplem CQ's */
247 struct qed_chain pbl;
249 void __iomem *db_addr;
253 union rdma_cqe *latest_cqe;
254 union rdma_cqe *toggle_cqe;
264 struct qedr_ucontext *uctx;
272 struct list_head entry;
276 struct qedr_ucontext *get_qedr_ucontext(struct ib_ucontext *ibucontext)
278 return container_of(ibucontext, struct qedr_ucontext, ibucontext);
281 static inline struct qedr_dev *get_qedr_dev(struct ib_device *ibdev)
283 return container_of(ibdev, struct qedr_dev, ibdev);
286 static inline struct qedr_pd *get_qedr_pd(struct ib_pd *ibpd)
288 return container_of(ibpd, struct qedr_pd, ibpd);
291 static inline struct qedr_cq *get_qedr_cq(struct ib_cq *ibcq)
293 return container_of(ibcq, struct qedr_cq, ibcq);