8 select IRQ_DOMAIN_HIERARCHY
9 select MULTI_IRQ_HANDLER
19 default 2 if ARCH_REALVIEW
34 select MULTI_IRQ_HANDLER
35 select IRQ_DOMAIN_HIERARCHY
36 select PARTITION_PERCPU
46 select IRQ_DOMAIN_HIERARCHY
47 select GENERIC_IRQ_CHIP
52 select MULTI_IRQ_HANDLER
56 default 4 if ARCH_S5PV210
60 The maximum number of VICs available in the system, for
63 config ARMADA_370_XP_IRQ
65 select GENERIC_IRQ_CHIP
72 select GENERIC_IRQ_CHIP
76 select GENERIC_IRQ_CHIP
78 select MULTI_IRQ_HANDLER
83 select GENERIC_IRQ_CHIP
85 select MULTI_IRQ_HANDLER
94 select GENERIC_IRQ_CHIP
99 select GENERIC_IRQ_CHIP
102 config BCM7120_L2_IRQ
104 select GENERIC_IRQ_CHIP
107 config BRCMSTB_L2_IRQ
109 select GENERIC_IRQ_CHIP
114 select GENERIC_IRQ_CHIP
117 config HISILICON_IRQ_MBIGEN
120 select ARM_GIC_V3_ITS
124 select GENERIC_IRQ_CHIP
129 select GENERIC_IRQ_CHIP
132 config CLPS711X_IRQCHIP
134 depends on ARCH_CLPS711X
136 select MULTI_IRQ_HANDLER
146 select GENERIC_IRQ_CHIP
152 select MULTI_IRQ_HANDLER
156 select GENERIC_IRQ_CHIP
160 bool "J-Core integrated AIC"
161 depends on OF && (SUPERH || COMPILE_TEST)
164 Support for the J-Core integrated AIC.
166 config RENESAS_INTC_IRQPIN
172 select GENERIC_IRQ_CHIP
180 Enables SysCfg Controlled IRQs on STi based platforms.
185 select GENERIC_IRQ_CHIP
190 select GENERIC_IRQ_CHIP
193 tristate "TS-4800 IRQ controller"
196 depends on SOC_IMX51 || COMPILE_TEST
198 Support for the TS-4800 FPGA IRQ controller
200 config VERSATILE_FPGA_IRQ
204 config VERSATILE_FPGA_IRQ_NR
207 depends on VERSATILE_FPGA_IRQ
216 Support for a CROSSBAR ip that precedes the main interrupt controller.
217 The primary irqchip invokes the crossbar's callback which inturn allocates
218 a free irq and configures the IP. Thus the peripheral interrupts are
219 routed to one of the free irqchip interrupt lines.
222 tristate "Keystone 2 IRQ controller IP"
223 depends on ARCH_KEYSTONE
225 Support for Texas Instruments Keystone 2 IRQ controller IP which
226 is part of the Keystone 2 IPC mechanism
230 select GENERIC_IRQ_IPI
231 select IRQ_DOMAIN_HIERARCHY
236 depends on MACH_INGENIC
239 config RENESAS_H8300H_INTC
243 config RENESAS_H8S_INTC
251 Enables the wakeup IRQs for IMX platforms with GPCv2 block
254 def_bool y if MACH_ASM9260 || ARCH_MXS
262 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
263 depends on PCI && PCI_MSI
265 config PARTITION_PERCPU
269 bool "NPS400 Global Interrupt Manager (GIM)"
270 depends on ARC || (COMPILE_TEST && !64BIT)
273 Support the EZchip NPS400 global interrupt controller