2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/delay.h>
22 #include <media/cx25840.h>
23 #include <linux/firmware.h>
24 #include <misc/altera.h>
27 #include "tuner-xc2028.h"
28 #include "netup-eeprom.h"
29 #include "netup-init.h"
30 #include "altera-ci.h"
33 #include "cx23888-ir.h"
35 static unsigned int netup_card_rev = 4;
36 module_param(netup_card_rev, int, 0644);
37 MODULE_PARM_DESC(netup_card_rev,
38 "NetUP Dual DVB-T/C CI card revision");
39 static unsigned int enable_885_ir;
40 module_param(enable_885_ir, int, 0644);
41 MODULE_PARM_DESC(enable_885_ir,
42 "Enable integrated IR controller for supported\n"
43 "\t\t CX2388[57] boards that are wired for it:\n"
44 "\t\t\tHVR-1250 (reported safe)\n"
45 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
46 "\t\t\tTeVii S470 (reported unsafe)\n"
47 "\t\t This can cause an interrupt storm with some cards.\n"
48 "\t\t Default: 0 [Disabled]");
50 /* ------------------------------------------------------------------ */
51 /* board config info */
53 struct cx23885_board cx23885_boards[] = {
54 [CX23885_BOARD_UNKNOWN] = {
55 .name = "UNKNOWN/GENERIC",
56 /* Ensure safe default for unknown boards */
59 .type = CX23885_VMUX_COMPOSITE1,
62 .type = CX23885_VMUX_COMPOSITE2,
65 .type = CX23885_VMUX_COMPOSITE3,
68 .type = CX23885_VMUX_COMPOSITE4,
72 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
73 .name = "Hauppauge WinTV-HVR1800lp",
74 .portc = CX23885_MPEG_DVB,
76 .type = CX23885_VMUX_TELEVISION,
80 .type = CX23885_VMUX_DEBUG,
84 .type = CX23885_VMUX_COMPOSITE1,
88 .type = CX23885_VMUX_SVIDEO,
93 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
94 .name = "Hauppauge WinTV-HVR1800",
95 .porta = CX23885_ANALOG_VIDEO,
96 .portb = CX23885_MPEG_ENCODER,
97 .portc = CX23885_MPEG_DVB,
98 .tuner_type = TUNER_PHILIPS_TDA8290,
99 .tuner_addr = 0x42, /* 0x84 >> 1 */
102 .type = CX23885_VMUX_TELEVISION,
103 .vmux = CX25840_VIN7_CH3 |
106 .amux = CX25840_AUDIO8,
109 .type = CX23885_VMUX_COMPOSITE1,
110 .vmux = CX25840_VIN7_CH3 |
113 .amux = CX25840_AUDIO7,
116 .type = CX23885_VMUX_SVIDEO,
117 .vmux = CX25840_VIN7_CH3 |
121 .amux = CX25840_AUDIO7,
125 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
126 .name = "Hauppauge WinTV-HVR1250",
127 .porta = CX23885_ANALOG_VIDEO,
128 .portc = CX23885_MPEG_DVB,
129 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
130 .tuner_type = TUNER_PHILIPS_TDA8290,
131 .tuner_addr = 0x42, /* 0x84 >> 1 */
136 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
137 .type = CX23885_VMUX_TELEVISION,
138 .vmux = CX25840_VIN7_CH3 |
141 .amux = CX25840_AUDIO8,
145 .type = CX23885_VMUX_COMPOSITE1,
146 .vmux = CX25840_VIN7_CH3 |
149 .amux = CX25840_AUDIO7,
152 .type = CX23885_VMUX_SVIDEO,
153 .vmux = CX25840_VIN7_CH3 |
157 .amux = CX25840_AUDIO7,
161 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
162 .name = "DViCO FusionHDTV5 Express",
163 .portb = CX23885_MPEG_DVB,
165 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
166 .name = "Hauppauge WinTV-HVR1500Q",
167 .portc = CX23885_MPEG_DVB,
169 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
170 .name = "Hauppauge WinTV-HVR1500",
171 .porta = CX23885_ANALOG_VIDEO,
172 .portc = CX23885_MPEG_DVB,
173 .tuner_type = TUNER_XC2028,
174 .tuner_addr = 0x61, /* 0xc2 >> 1 */
176 .type = CX23885_VMUX_TELEVISION,
177 .vmux = CX25840_VIN7_CH3 |
182 .type = CX23885_VMUX_COMPOSITE1,
183 .vmux = CX25840_VIN7_CH3 |
188 .type = CX23885_VMUX_SVIDEO,
189 .vmux = CX25840_VIN7_CH3 |
196 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
197 .name = "Hauppauge WinTV-HVR1200",
198 .portc = CX23885_MPEG_DVB,
200 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
201 .name = "Hauppauge WinTV-HVR1700",
202 .portc = CX23885_MPEG_DVB,
204 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
205 .name = "Hauppauge WinTV-HVR1400",
206 .portc = CX23885_MPEG_DVB,
208 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
209 .name = "DViCO FusionHDTV7 Dual Express",
210 .portb = CX23885_MPEG_DVB,
211 .portc = CX23885_MPEG_DVB,
213 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
214 .name = "DViCO FusionHDTV DVB-T Dual Express",
215 .portb = CX23885_MPEG_DVB,
216 .portc = CX23885_MPEG_DVB,
218 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
219 .name = "Leadtek Winfast PxDVR3200 H",
220 .portc = CX23885_MPEG_DVB,
222 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
223 .name = "Leadtek Winfast PxPVR2200",
224 .porta = CX23885_ANALOG_VIDEO,
225 .tuner_type = TUNER_XC2028,
229 .type = CX23885_VMUX_TELEVISION,
230 .vmux = CX25840_VIN2_CH1 |
232 .amux = CX25840_AUDIO8,
235 .type = CX23885_VMUX_COMPOSITE1,
236 .vmux = CX25840_COMPOSITE1,
237 .amux = CX25840_AUDIO7,
240 .type = CX23885_VMUX_SVIDEO,
241 .vmux = CX25840_SVIDEO_LUMA3 |
242 CX25840_SVIDEO_CHROMA4,
243 .amux = CX25840_AUDIO7,
246 .type = CX23885_VMUX_COMPONENT,
247 .vmux = CX25840_VIN7_CH1 |
250 CX25840_COMPONENT_ON,
251 .amux = CX25840_AUDIO7,
255 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
256 .name = "Leadtek Winfast PxDVR3200 H XC4000",
257 .porta = CX23885_ANALOG_VIDEO,
258 .portc = CX23885_MPEG_DVB,
259 .tuner_type = TUNER_XC4000,
262 .radio_addr = ADDR_UNSET,
264 .type = CX23885_VMUX_TELEVISION,
265 .vmux = CX25840_VIN2_CH1 |
269 .type = CX23885_VMUX_COMPOSITE1,
270 .vmux = CX25840_COMPOSITE1,
272 .type = CX23885_VMUX_SVIDEO,
273 .vmux = CX25840_SVIDEO_LUMA3 |
274 CX25840_SVIDEO_CHROMA4,
276 .type = CX23885_VMUX_COMPONENT,
277 .vmux = CX25840_VIN7_CH1 |
280 CX25840_COMPONENT_ON,
283 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
284 .name = "Compro VideoMate E650F",
285 .portc = CX23885_MPEG_DVB,
287 [CX23885_BOARD_TBS_6920] = {
288 .name = "TurboSight TBS 6920",
289 .portb = CX23885_MPEG_DVB,
291 [CX23885_BOARD_TBS_6980] = {
292 .name = "TurboSight TBS 6980",
293 .portb = CX23885_MPEG_DVB,
294 .portc = CX23885_MPEG_DVB,
296 [CX23885_BOARD_TBS_6981] = {
297 .name = "TurboSight TBS 6981",
298 .portb = CX23885_MPEG_DVB,
299 .portc = CX23885_MPEG_DVB,
301 [CX23885_BOARD_TEVII_S470] = {
302 .name = "TeVii S470",
303 .portb = CX23885_MPEG_DVB,
305 [CX23885_BOARD_DVBWORLD_2005] = {
306 .name = "DVBWorld DVB-S2 2005",
307 .portb = CX23885_MPEG_DVB,
309 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
311 .name = "NetUP Dual DVB-S2 CI",
312 .portb = CX23885_MPEG_DVB,
313 .portc = CX23885_MPEG_DVB,
315 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
316 .name = "Hauppauge WinTV-HVR1270",
317 .portc = CX23885_MPEG_DVB,
319 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
320 .name = "Hauppauge WinTV-HVR1275",
321 .portc = CX23885_MPEG_DVB,
323 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
324 .name = "Hauppauge WinTV-HVR1255",
325 .porta = CX23885_ANALOG_VIDEO,
326 .portc = CX23885_MPEG_DVB,
327 .tuner_type = TUNER_ABSENT,
328 .tuner_addr = 0x42, /* 0x84 >> 1 */
331 .type = CX23885_VMUX_TELEVISION,
332 .vmux = CX25840_VIN7_CH3 |
336 .amux = CX25840_AUDIO8,
338 .type = CX23885_VMUX_COMPOSITE1,
339 .vmux = CX25840_VIN7_CH3 |
342 .amux = CX25840_AUDIO7,
344 .type = CX23885_VMUX_SVIDEO,
345 .vmux = CX25840_VIN7_CH3 |
349 .amux = CX25840_AUDIO7,
352 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
353 .name = "Hauppauge WinTV-HVR1255",
354 .porta = CX23885_ANALOG_VIDEO,
355 .portc = CX23885_MPEG_DVB,
356 .tuner_type = TUNER_ABSENT,
357 .tuner_addr = 0x42, /* 0x84 >> 1 */
360 .type = CX23885_VMUX_TELEVISION,
361 .vmux = CX25840_VIN7_CH3 |
365 .amux = CX25840_AUDIO8,
367 .type = CX23885_VMUX_SVIDEO,
368 .vmux = CX25840_VIN7_CH3 |
372 .amux = CX25840_AUDIO7,
375 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
376 .name = "Hauppauge WinTV-HVR1210",
377 .portc = CX23885_MPEG_DVB,
379 [CX23885_BOARD_MYGICA_X8506] = {
380 .name = "Mygica X8506 DMB-TH",
381 .tuner_type = TUNER_XC5000,
384 .porta = CX23885_ANALOG_VIDEO,
385 .portb = CX23885_MPEG_DVB,
388 .type = CX23885_VMUX_TELEVISION,
389 .vmux = CX25840_COMPOSITE2,
392 .type = CX23885_VMUX_COMPOSITE1,
393 .vmux = CX25840_COMPOSITE8,
396 .type = CX23885_VMUX_SVIDEO,
397 .vmux = CX25840_SVIDEO_LUMA3 |
398 CX25840_SVIDEO_CHROMA4,
401 .type = CX23885_VMUX_COMPONENT,
402 .vmux = CX25840_COMPONENT_ON |
409 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
410 .name = "Magic-Pro ProHDTV Extreme 2",
411 .tuner_type = TUNER_XC5000,
414 .porta = CX23885_ANALOG_VIDEO,
415 .portb = CX23885_MPEG_DVB,
418 .type = CX23885_VMUX_TELEVISION,
419 .vmux = CX25840_COMPOSITE2,
422 .type = CX23885_VMUX_COMPOSITE1,
423 .vmux = CX25840_COMPOSITE8,
426 .type = CX23885_VMUX_SVIDEO,
427 .vmux = CX25840_SVIDEO_LUMA3 |
428 CX25840_SVIDEO_CHROMA4,
431 .type = CX23885_VMUX_COMPONENT,
432 .vmux = CX25840_COMPONENT_ON |
439 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
440 .name = "Hauppauge WinTV-HVR1850",
441 .porta = CX23885_ANALOG_VIDEO,
442 .portb = CX23885_MPEG_ENCODER,
443 .portc = CX23885_MPEG_DVB,
444 .tuner_type = TUNER_ABSENT,
445 .tuner_addr = 0x42, /* 0x84 >> 1 */
448 .type = CX23885_VMUX_TELEVISION,
449 .vmux = CX25840_VIN7_CH3 |
453 .amux = CX25840_AUDIO8,
455 .type = CX23885_VMUX_COMPOSITE1,
456 .vmux = CX25840_VIN7_CH3 |
459 .amux = CX25840_AUDIO7,
461 .type = CX23885_VMUX_SVIDEO,
462 .vmux = CX25840_VIN7_CH3 |
466 .amux = CX25840_AUDIO7,
469 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
470 .name = "Compro VideoMate E800",
471 .portc = CX23885_MPEG_DVB,
473 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
474 .name = "Hauppauge WinTV-HVR1290",
475 .portc = CX23885_MPEG_DVB,
477 [CX23885_BOARD_MYGICA_X8558PRO] = {
478 .name = "Mygica X8558 PRO DMB-TH",
479 .portb = CX23885_MPEG_DVB,
480 .portc = CX23885_MPEG_DVB,
482 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
483 .name = "LEADTEK WinFast PxTV1200",
484 .porta = CX23885_ANALOG_VIDEO,
485 .tuner_type = TUNER_XC2028,
489 .type = CX23885_VMUX_TELEVISION,
490 .vmux = CX25840_VIN2_CH1 |
494 .type = CX23885_VMUX_COMPOSITE1,
495 .vmux = CX25840_COMPOSITE1,
497 .type = CX23885_VMUX_SVIDEO,
498 .vmux = CX25840_SVIDEO_LUMA3 |
499 CX25840_SVIDEO_CHROMA4,
501 .type = CX23885_VMUX_COMPONENT,
502 .vmux = CX25840_VIN7_CH1 |
505 CX25840_COMPONENT_ON,
508 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
509 .name = "GoTView X5 3D Hybrid",
510 .tuner_type = TUNER_XC5000,
513 .porta = CX23885_ANALOG_VIDEO,
514 .portb = CX23885_MPEG_DVB,
516 .type = CX23885_VMUX_TELEVISION,
517 .vmux = CX25840_VIN2_CH1 |
521 .type = CX23885_VMUX_COMPOSITE1,
522 .vmux = CX23885_VMUX_COMPOSITE1,
524 .type = CX23885_VMUX_SVIDEO,
525 .vmux = CX25840_SVIDEO_LUMA3 |
526 CX25840_SVIDEO_CHROMA4,
529 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
531 .name = "NetUP Dual DVB-T/C-CI RF",
532 .porta = CX23885_ANALOG_VIDEO,
533 .portb = CX23885_MPEG_DVB,
534 .portc = CX23885_MPEG_DVB,
537 .tuner_type = TUNER_XC5000,
540 .type = CX23885_VMUX_TELEVISION,
541 .vmux = CX25840_COMPOSITE1,
544 [CX23885_BOARD_MPX885] = {
546 .porta = CX23885_ANALOG_VIDEO,
548 .type = CX23885_VMUX_COMPOSITE1,
549 .vmux = CX25840_COMPOSITE1,
550 .amux = CX25840_AUDIO6,
553 .type = CX23885_VMUX_COMPOSITE2,
554 .vmux = CX25840_COMPOSITE2,
555 .amux = CX25840_AUDIO6,
558 .type = CX23885_VMUX_COMPOSITE3,
559 .vmux = CX25840_COMPOSITE3,
560 .amux = CX25840_AUDIO7,
563 .type = CX23885_VMUX_COMPOSITE4,
564 .vmux = CX25840_COMPOSITE4,
565 .amux = CX25840_AUDIO7,
569 [CX23885_BOARD_MYGICA_X8507] = {
570 .name = "Mygica X8502/X8507 ISDB-T",
571 .tuner_type = TUNER_XC5000,
574 .porta = CX23885_ANALOG_VIDEO,
575 .portb = CX23885_MPEG_DVB,
578 .type = CX23885_VMUX_TELEVISION,
579 .vmux = CX25840_COMPOSITE2,
580 .amux = CX25840_AUDIO8,
583 .type = CX23885_VMUX_COMPOSITE1,
584 .vmux = CX25840_COMPOSITE8,
585 .amux = CX25840_AUDIO7,
588 .type = CX23885_VMUX_SVIDEO,
589 .vmux = CX25840_SVIDEO_LUMA3 |
590 CX25840_SVIDEO_CHROMA4,
591 .amux = CX25840_AUDIO7,
594 .type = CX23885_VMUX_COMPONENT,
595 .vmux = CX25840_COMPONENT_ON |
599 .amux = CX25840_AUDIO7,
603 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
604 .name = "TerraTec Cinergy T PCIe Dual",
605 .portb = CX23885_MPEG_DVB,
606 .portc = CX23885_MPEG_DVB,
608 [CX23885_BOARD_TEVII_S471] = {
609 .name = "TeVii S471",
610 .portb = CX23885_MPEG_DVB,
612 [CX23885_BOARD_PROF_8000] = {
613 .name = "Prof Revolution DVB-S2 8000",
614 .portb = CX23885_MPEG_DVB,
616 [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
617 .name = "Hauppauge WinTV-HVR4400",
618 .porta = CX23885_ANALOG_VIDEO,
619 .portb = CX23885_MPEG_DVB,
620 .portc = CX23885_MPEG_DVB,
621 .tuner_type = TUNER_NXP_TDA18271,
622 .tuner_addr = 0x60, /* 0xc0 >> 1 */
625 [CX23885_BOARD_AVERMEDIA_HC81R] = {
626 .name = "AVerTV Hybrid Express Slim HC81R",
627 .tuner_type = TUNER_XC2028,
628 .tuner_addr = 0x61, /* 0xc2 >> 1 */
630 .porta = CX23885_ANALOG_VIDEO,
632 .type = CX23885_VMUX_TELEVISION,
633 .vmux = CX25840_VIN2_CH1 |
637 .amux = CX25840_AUDIO8,
639 .type = CX23885_VMUX_SVIDEO,
640 .vmux = CX25840_VIN8_CH1 |
644 .amux = CX25840_AUDIO6,
646 .type = CX23885_VMUX_COMPONENT,
647 .vmux = CX25840_VIN1_CH1 |
651 .amux = CX25840_AUDIO6,
654 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
655 .name = "DViCO FusionHDTV DVB-T Dual Express2",
656 .portb = CX23885_MPEG_DVB,
657 .portc = CX23885_MPEG_DVB,
659 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
660 .name = "Hauppauge ImpactVCB-e",
661 .tuner_type = TUNER_ABSENT,
662 .porta = CX23885_ANALOG_VIDEO,
664 .type = CX23885_VMUX_COMPOSITE1,
665 .vmux = CX25840_VIN7_CH3 |
668 .amux = CX25840_AUDIO7,
670 .type = CX23885_VMUX_SVIDEO,
671 .vmux = CX25840_VIN7_CH3 |
675 .amux = CX25840_AUDIO7,
678 [CX23885_BOARD_DVBSKY_T9580] = {
679 .name = "DVBSky T9580",
680 .portb = CX23885_MPEG_DVB,
681 .portc = CX23885_MPEG_DVB,
684 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
686 /* ------------------------------------------------------------------ */
687 /* PCI subsystem IDs */
689 struct cx23885_subid cx23885_subids[] = {
693 .card = CX23885_BOARD_UNKNOWN,
697 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
701 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
705 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
709 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
713 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
717 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
721 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
725 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
729 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
733 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
737 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
741 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
745 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
749 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
753 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
757 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
761 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
765 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
769 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
773 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
777 .card = CX23885_BOARD_TBS_6920,
781 .card = CX23885_BOARD_TBS_6980,
785 .card = CX23885_BOARD_TBS_6981,
789 .card = CX23885_BOARD_TEVII_S470,
793 .card = CX23885_BOARD_DVBWORLD_2005,
797 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
801 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
805 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
809 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
813 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
817 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
821 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
825 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
829 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
833 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
837 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
841 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
845 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
849 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
853 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
857 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
861 .card = CX23885_BOARD_MYGICA_X8506,
865 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
869 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
873 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
877 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
881 .card = CX23885_BOARD_MYGICA_X8558PRO,
885 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
889 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
893 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
897 .card = CX23885_BOARD_MYGICA_X8507,
901 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
905 .card = CX23885_BOARD_TEVII_S471,
909 .card = CX23885_BOARD_PROF_8000,
913 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
917 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
921 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
925 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
929 .card = CX23885_BOARD_AVERMEDIA_HC81R,
933 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
937 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
941 .card = CX23885_BOARD_DVBSKY_T9580,
944 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
946 void cx23885_card_list(struct cx23885_dev *dev)
950 if (0 == dev->pci->subsystem_vendor &&
951 0 == dev->pci->subsystem_device) {
953 "%s: Board has no valid PCIe Subsystem ID and can't\n"
954 "%s: be autodetected. Pass card=<n> insmod option\n"
955 "%s: to workaround that. Redirect complaints to the\n"
956 "%s: vendor of the TV card. Best regards,\n"
958 dev->name, dev->name, dev->name, dev->name, dev->name);
961 "%s: Your board isn't known (yet) to the driver.\n"
962 "%s: Try to pick one of the existing card configs via\n"
963 "%s: card=<n> insmod option. Updating to the latest\n"
964 "%s: version might help as well.\n",
965 dev->name, dev->name, dev->name, dev->name);
967 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
969 for (i = 0; i < cx23885_bcount; i++)
970 printk(KERN_INFO "%s: card=%d -> %s\n",
971 dev->name, i, cx23885_boards[i].name);
974 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
978 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
981 /* Make sure we support the board model */
984 /* WinTV-HVR1270 (PCIe, Retail, half height)
985 * ATSC/QAM and basic analog, IR Blast */
987 /* WinTV-HVR1210 (PCIe, Retail, half height)
988 * DVB-T and basic analog, IR Blast */
990 /* WinTV-HVR1270 (PCIe, Retail, half height)
991 * ATSC/QAM and basic analog, IR Recv */
993 /* WinTV-HVR1210 (PCIe, Retail, half height)
994 * DVB-T and basic analog, IR Recv */
996 /* WinTV-HVR1275 (PCIe, Retail, half height)
997 * ATSC/QAM and basic analog, IR Recv */
999 /* WinTV-HVR1210 (PCIe, Retail, half height)
1000 * DVB-T and basic analog, IR Recv */
1002 /* WinTV-HVR1270 (PCIe, Retail, full height)
1003 * ATSC/QAM and basic analog, IR Blast */
1005 /* WinTV-HVR1210 (PCIe, Retail, full height)
1006 * DVB-T and basic analog, IR Blast */
1008 /* WinTV-HVR1270 (PCIe, Retail, full height)
1009 * ATSC/QAM and basic analog, IR Recv */
1011 /* WinTV-HVR1210 (PCIe, Retail, full height)
1012 * DVB-T and basic analog, IR Recv */
1014 /* WinTV-HVR1275 (PCIe, Retail, full height)
1015 * ATSC/QAM and basic analog, IR Recv */
1017 /* WinTV-HVR1210 (PCIe, Retail, full height)
1018 * DVB-T and basic analog, IR Recv */
1020 /* WinTV-HVR1200 (PCIe, Retail, full height)
1021 * DVB-T and basic analog */
1023 /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1026 /* WinTV-HVR1200 (PCIe, OEM, half height)
1027 * DVB-T and basic analog */
1029 /* WinTV-HVR1200 (PCIe, OEM, half height)
1030 * DVB-T and basic analog */
1032 /* WinTV-HVR1200 (PCIe, OEM, full height)
1033 * DVB-T and basic analog */
1035 /* WinTV-HVR1200 (PCIe, OEM, half height)
1036 * DVB-T and basic analog */
1038 /* WinTV-HVR1200 (PCIe, OEM, full height)
1039 * DVB-T and basic analog */
1041 /* WinTV-HVR1200 (PCIe, OEM, full height)
1042 * DVB-T and basic analog */
1044 /* WinTV-HVR1200 (PCIe, OEM, half height)
1045 * DVB-T and basic analog */
1047 /* WinTV-HVR1200 (PCIe, OEM, full height)
1048 * DVB-T and basic analog */
1050 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1051 channel ATSC and MPEG2 HW Encoder */
1053 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1056 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1059 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1062 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1065 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1066 Dual channel ATSC and MPEG2 HW Encoder */
1068 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1069 Dual channel ATSC and MPEG2 HW Encoder */
1071 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1072 Dual channel ATSC and MPEG2 HW Encoder */
1074 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1075 Dual channel ATSC and MPEG2 HW Encoder */
1077 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1078 Dual channel ATSC and MPEG2 HW Encoder */
1080 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1081 ATSC and Basic analog */
1083 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1084 ATSC and Basic analog */
1086 /* WinTV-HVR1250 (PCIe, No IR, half height,
1087 ATSC [at least] and Basic analog) */
1089 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1090 ATSC and Basic analog */
1092 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1093 ATSC and Basic analog */
1095 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1096 ATSC and Basic analog */
1098 /* WinTV-HVR1400 (Express Card, Retail, IR,
1099 * DVB-T and Basic analog */
1101 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1102 * DVB-T and MPEG2 HW Encoder */
1104 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1105 * DVB-T and MPEG2 HW Encoder */
1108 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1109 Dual channel ATSC and MPEG2 HW Encoder */
1112 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1113 Dual channel ATSC and Basic analog */
1116 printk(KERN_WARNING "%s: warning: "
1117 "unknown hauppauge model #%d\n",
1118 dev->name, tv.model);
1122 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
1123 dev->name, tv.model);
1126 /* Some TBS cards require initing a chip using a bitbanged SPI attached
1127 to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1128 doesn't respond to any command. */
1129 static void tbs_card_init(struct cx23885_dev *dev)
1133 0xe0, 0x06, 0x66, 0x33, 0x65,
1134 0x01, 0x17, 0x06, 0xde};
1136 switch (dev->board) {
1137 case CX23885_BOARD_TBS_6980:
1138 case CX23885_BOARD_TBS_6981:
1139 cx_set(GP0_IO, 0x00070007);
1140 usleep_range(1000, 10000);
1141 cx_clear(GP0_IO, 2);
1142 usleep_range(1000, 10000);
1143 for (i = 0; i < 9 * 8; i++) {
1144 cx_clear(GP0_IO, 7);
1145 usleep_range(1000, 10000);
1147 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1148 usleep_range(1000, 10000);
1155 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1157 struct cx23885_tsport *port = priv;
1158 struct cx23885_dev *dev = port->dev;
1161 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1165 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
1170 switch (dev->board) {
1171 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1172 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1173 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1174 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1175 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1176 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1177 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1178 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1179 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1180 /* Tuner Reset Command */
1183 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1184 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1185 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1186 /* Two identical tuners on two different i2c buses,
1187 * we need to reset the correct gpio. */
1190 else if (port->nr == 2)
1193 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1194 /* Tuner Reset Command */
1197 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1198 altera_ci_tuner_reset(dev, port->nr);
1200 case CX23885_BOARD_AVERMEDIA_HC81R:
1201 /* XC3028L Reset Command */
1207 /* Drive the tuner into reset and back out */
1208 cx_clear(GP0_IO, bitmask);
1210 cx_set(GP0_IO, bitmask);
1216 void cx23885_gpio_setup(struct cx23885_dev *dev)
1218 switch (dev->board) {
1219 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1220 /* GPIO-0 cx24227 demodulator reset */
1221 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1223 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1224 /* GPIO-0 cx24227 demodulator */
1225 /* GPIO-2 xc3028 tuner */
1227 /* Put the parts into reset */
1228 cx_set(GP0_IO, 0x00050000);
1229 cx_clear(GP0_IO, 0x00000005);
1232 /* Bring the parts out of reset */
1233 cx_set(GP0_IO, 0x00050005);
1235 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1236 /* GPIO-0 cx24227 demodulator reset */
1237 /* GPIO-2 xc5000 tuner reset */
1238 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1240 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1241 /* GPIO-0 656_CLK */
1243 /* GPIO-2 8295A Reset */
1244 /* GPIO-3-10 cx23417 data0-7 */
1245 /* GPIO-11-14 cx23417 addr0-3 */
1246 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1249 /* CX23417 GPIO's */
1250 /* EIO15 Zilog Reset */
1251 /* EIO14 S5H1409/CX24227 Reset */
1252 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1254 /* Put the demod into reset and protect the eeprom */
1255 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1258 /* Bring the demod and blaster out of reset */
1259 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1262 /* Force the TDA8295A into reset and back */
1263 cx23885_gpio_enable(dev, GPIO_2, 1);
1264 cx23885_gpio_set(dev, GPIO_2);
1266 cx23885_gpio_clear(dev, GPIO_2);
1268 cx23885_gpio_set(dev, GPIO_2);
1271 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1272 /* GPIO-0 tda10048 demodulator reset */
1273 /* GPIO-2 tda18271 tuner reset */
1275 /* Put the parts into reset and back */
1276 cx_set(GP0_IO, 0x00050000);
1278 cx_clear(GP0_IO, 0x00000005);
1280 cx_set(GP0_IO, 0x00050005);
1282 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1283 /* GPIO-0 TDA10048 demodulator reset */
1284 /* GPIO-2 TDA8295A Reset */
1285 /* GPIO-3-10 cx23417 data0-7 */
1286 /* GPIO-11-14 cx23417 addr0-3 */
1287 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1289 /* The following GPIO's are on the interna AVCore (cx25840) */
1291 /* GPIO-20 IR_TX 416/DVBT Select */
1292 /* GPIO-21 IIS DAT */
1293 /* GPIO-22 IIS WCLK */
1294 /* GPIO-23 IIS BCLK */
1296 /* Put the parts into reset and back */
1297 cx_set(GP0_IO, 0x00050000);
1299 cx_clear(GP0_IO, 0x00000005);
1301 cx_set(GP0_IO, 0x00050005);
1303 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1304 /* GPIO-0 Dibcom7000p demodulator reset */
1305 /* GPIO-2 xc3028L tuner reset */
1308 /* Put the parts into reset and back */
1309 cx_set(GP0_IO, 0x00050000);
1311 cx_clear(GP0_IO, 0x00000005);
1313 cx_set(GP0_IO, 0x00050005);
1315 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1316 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1317 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1318 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1319 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1321 /* Put the parts into reset and back */
1322 cx_set(GP0_IO, 0x000f0000);
1324 cx_clear(GP0_IO, 0x0000000f);
1326 cx_set(GP0_IO, 0x000f000f);
1328 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1329 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1330 /* GPIO-0 portb xc3028 reset */
1331 /* GPIO-1 portb zl10353 reset */
1332 /* GPIO-2 portc xc3028 reset */
1333 /* GPIO-3 portc zl10353 reset */
1335 /* Put the parts into reset and back */
1336 cx_set(GP0_IO, 0x000f0000);
1338 cx_clear(GP0_IO, 0x0000000f);
1340 cx_set(GP0_IO, 0x000f000f);
1342 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1343 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1344 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1345 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1346 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1347 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1348 /* GPIO-2 xc3028 tuner reset */
1350 /* The following GPIO's are on the internal AVCore (cx25840) */
1351 /* GPIO-? zl10353 demod reset */
1353 /* Put the parts into reset and back */
1354 cx_set(GP0_IO, 0x00040000);
1356 cx_clear(GP0_IO, 0x00000004);
1358 cx_set(GP0_IO, 0x00040004);
1360 case CX23885_BOARD_TBS_6920:
1361 case CX23885_BOARD_TBS_6980:
1362 case CX23885_BOARD_TBS_6981:
1363 case CX23885_BOARD_PROF_8000:
1364 cx_write(MC417_CTL, 0x00000036);
1365 cx_write(MC417_OEN, 0x00001000);
1366 cx_set(MC417_RWD, 0x00000002);
1368 cx_clear(MC417_RWD, 0x00000800);
1370 cx_set(MC417_RWD, 0x00000800);
1373 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1374 /* GPIO-0 INTA from CiMax1
1375 GPIO-1 INTB from CiMax2
1377 GPIO-3 to GPIO-10 data/addr for CA
1378 GPIO-11 ~CS0 to CiMax1
1379 GPIO-12 ~CS1 to CiMax2
1380 GPIO-13 ADL0 load LSB addr
1381 GPIO-14 ADL1 load MSB addr
1382 GPIO-15 ~RDY from CiMax
1383 GPIO-17 ~RD to CiMax
1384 GPIO-18 ~WR to CiMax
1386 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1387 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1388 cx_clear(GP0_IO, 0x00030004);
1389 mdelay(100);/* reset delay */
1390 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1391 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1392 /* GPIO-15 IN as ~ACK, rest as OUT */
1393 cx_write(MC417_OEN, 0x00001000);
1394 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1395 cx_write(MC417_RWD, 0x0000c300);
1397 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1399 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1400 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1401 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1402 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1403 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1404 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1405 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1406 /* GPIO-9 Demod reset */
1408 /* Put the parts into reset and back */
1409 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1410 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1411 cx23885_gpio_clear(dev, GPIO_9);
1413 cx23885_gpio_set(dev, GPIO_9);
1415 case CX23885_BOARD_MYGICA_X8506:
1416 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1417 case CX23885_BOARD_MYGICA_X8507:
1418 /* GPIO-0 (0)Analog / (1)Digital TV */
1419 /* GPIO-1 reset XC5000 */
1420 /* GPIO-2 demod reset */
1421 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1422 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1424 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1427 case CX23885_BOARD_MYGICA_X8558PRO:
1428 /* GPIO-0 reset first ATBM8830 */
1429 /* GPIO-1 reset second ATBM8830 */
1430 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1431 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1433 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1436 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1437 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1438 /* GPIO-0 656_CLK */
1441 /* GPIO-3-10 cx23417 data0-7 */
1442 /* GPIO-11-14 cx23417 addr0-3 */
1443 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1445 /* GPIO-20 C_IR_TX */
1446 /* GPIO-21 I2S DAT */
1447 /* GPIO-22 I2S WCLK */
1448 /* GPIO-23 I2S BCLK */
1449 /* ALT GPIO: EXP GPIO LATCH */
1451 /* CX23417 GPIO's */
1452 /* GPIO-14 S5H1411/CX24228 Reset */
1453 /* GPIO-13 EEPROM write protect */
1454 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1456 /* Put the demod into reset and protect the eeprom */
1457 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1460 /* Bring the demod out of reset */
1461 mc417_gpio_set(dev, GPIO_14);
1465 /* Connected to IF / Mux */
1467 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1468 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1470 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1473 GPIO-2 ~reset chips out
1474 GPIO-3 to GPIO-10 data/addr for CA in/out
1484 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1485 /* GPIO-0 as INT, reset & TMS low */
1486 cx_clear(GP0_IO, 0x00010006);
1487 mdelay(100);/* reset delay */
1488 cx_set(GP0_IO, 0x00000004); /* reset high */
1489 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1490 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1491 cx_write(MC417_OEN, 0x00005000);
1492 /* ~RD, ~WR high; ADDR low; ~CS high */
1493 cx_write(MC417_RWD, 0x00000d00);
1495 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1497 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1498 /* GPIO-8 tda10071 demod reset */
1499 /* GPIO-9 si2165 demod reset */
1501 /* Put the parts into reset and back */
1502 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1504 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1506 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1510 case CX23885_BOARD_AVERMEDIA_HC81R:
1511 cx_clear(MC417_CTL, 1);
1512 /* GPIO-0,1,2 setup direction as output */
1513 cx_set(GP0_IO, 0x00070000);
1515 /* AF9013 demod reset */
1516 cx_set(GP0_IO, 0x00010001);
1518 cx_clear(GP0_IO, 0x00010001);
1520 cx_set(GP0_IO, 0x00010001);
1523 cx_clear(GP0_IO, 0x00030003);
1525 cx_set(GP0_IO, 0x00020002);
1527 cx_set(GP0_IO, 0x00010001);
1529 cx_clear(GP0_IO, 0x00020002);
1530 /* XC3028L tuner reset */
1531 cx_set(GP0_IO, 0x00040004);
1532 cx_clear(GP0_IO, 0x00040004);
1533 cx_set(GP0_IO, 0x00040004);
1536 case CX23885_BOARD_DVBSKY_T9580:
1537 /* enable GPIO3-18 pins */
1538 cx_write(MC417_CTL, 0x00000037);
1539 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
1540 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
1542 cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
1547 int cx23885_ir_init(struct cx23885_dev *dev)
1549 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1551 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1552 .pin = CX23885_PIN_IR_RX_GPIO19,
1553 .function = CX23885_PAD_IR_RX,
1555 .strength = CX25840_PIN_DRIVE_MEDIUM,
1557 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
1558 .pin = CX23885_PIN_IR_TX_GPIO20,
1559 .function = CX23885_PAD_IR_TX,
1561 .strength = CX25840_PIN_DRIVE_MEDIUM,
1564 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1566 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1568 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1569 .pin = CX23885_PIN_IR_RX_GPIO19,
1570 .function = CX23885_PAD_IR_RX,
1572 .strength = CX25840_PIN_DRIVE_MEDIUM,
1575 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1577 struct v4l2_subdev_ir_parameters params;
1579 switch (dev->board) {
1580 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1581 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1582 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1583 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1584 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1585 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1586 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1587 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1588 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1589 /* FIXME: Implement me */
1591 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1592 ret = cx23888_ir_probe(dev);
1595 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1596 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1597 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1599 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1600 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1601 ret = cx23888_ir_probe(dev);
1604 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1605 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1606 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1608 * For these boards we need to invert the Tx output via the
1609 * IR controller to have the LED off while idle
1611 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms);
1612 params.enable = false;
1613 params.shutdown = false;
1614 params.invert_level = true;
1615 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1616 params.shutdown = true;
1617 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1619 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1620 case CX23885_BOARD_TEVII_S470:
1621 case CX23885_BOARD_MYGICA_X8507:
1622 case CX23885_BOARD_TBS_6980:
1623 case CX23885_BOARD_TBS_6981:
1626 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1627 if (dev->sd_ir == NULL) {
1631 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1632 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1634 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1637 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1638 if (dev->sd_ir == NULL) {
1642 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1643 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1645 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1646 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1647 request_module("ir-kbd-i2c");
1654 void cx23885_ir_fini(struct cx23885_dev *dev)
1656 switch (dev->board) {
1657 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1658 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1659 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1660 cx23885_irq_remove(dev, PCI_MSK_IR);
1661 cx23888_ir_remove(dev);
1664 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1665 case CX23885_BOARD_TEVII_S470:
1666 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1667 case CX23885_BOARD_MYGICA_X8507:
1668 case CX23885_BOARD_TBS_6980:
1669 case CX23885_BOARD_TBS_6981:
1670 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1671 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1677 static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1681 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1683 data = ((cx_read(GP0_IO)) & (~0x00000002));
1684 data |= (tms ? 0x00020002 : 0x00020000);
1685 cx_write(GP0_IO, data);
1688 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1689 data |= (tdi ? 0x00008000 : 0);
1690 cx_write(MC417_RWD, data);
1692 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1694 cx_write(MC417_RWD, data | 0x00002000);
1697 cx_write(MC417_RWD, data);
1702 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1704 switch (dev->board) {
1705 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1706 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1707 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1709 cx23885_irq_add_enable(dev, PCI_MSK_IR);
1711 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1712 case CX23885_BOARD_TEVII_S470:
1713 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1714 case CX23885_BOARD_MYGICA_X8507:
1715 case CX23885_BOARD_TBS_6980:
1716 case CX23885_BOARD_TBS_6981:
1718 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1723 void cx23885_card_setup(struct cx23885_dev *dev)
1725 struct cx23885_tsport *ts1 = &dev->ts1;
1726 struct cx23885_tsport *ts2 = &dev->ts2;
1728 static u8 eeprom[256];
1730 if (dev->i2c_bus[0].i2c_rc == 0) {
1731 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1732 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1733 eeprom, sizeof(eeprom));
1736 switch (dev->board) {
1737 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1738 if (dev->i2c_bus[0].i2c_rc == 0) {
1739 if (eeprom[0x80] != 0x84)
1740 hauppauge_eeprom(dev, eeprom+0xc0);
1742 hauppauge_eeprom(dev, eeprom+0x80);
1745 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1746 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1747 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1748 if (dev->i2c_bus[0].i2c_rc == 0)
1749 hauppauge_eeprom(dev, eeprom+0x80);
1751 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1752 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1753 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1754 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1755 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1756 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1757 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1758 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1759 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1760 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1761 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1762 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1763 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
1764 if (dev->i2c_bus[0].i2c_rc == 0)
1765 hauppauge_eeprom(dev, eeprom+0xc0);
1769 switch (dev->board) {
1770 case CX23885_BOARD_AVERMEDIA_HC81R:
1771 /* Defaults for VID B */
1772 ts1->gen_ctrl_val = 0x4; /* Parallel */
1773 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1774 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1775 /* Defaults for VID C */
1776 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1777 ts2->gen_ctrl_val = 0x10e;
1778 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1779 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1781 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1782 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1783 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1784 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1785 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1786 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1787 /* break omitted intentionally */
1788 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1789 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1790 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1791 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1793 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1794 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1795 /* Defaults for VID B - Analog encoder */
1796 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1797 ts1->gen_ctrl_val = 0x10e;
1798 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1799 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1801 /* APB_TSVALERR_POL (active low)*/
1802 ts1->vld_misc_val = 0x2000;
1803 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1804 cx_write(0x130184, 0xc);
1806 /* Defaults for VID C */
1807 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1808 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1809 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1811 case CX23885_BOARD_TBS_6920:
1812 ts1->gen_ctrl_val = 0x4; /* Parallel */
1813 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1814 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1816 case CX23885_BOARD_TEVII_S470:
1817 case CX23885_BOARD_TEVII_S471:
1818 case CX23885_BOARD_DVBWORLD_2005:
1819 case CX23885_BOARD_PROF_8000:
1820 ts1->gen_ctrl_val = 0x5; /* Parallel */
1821 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1822 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1824 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1825 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1826 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1827 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1828 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1829 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1830 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1831 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1832 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1834 case CX23885_BOARD_TBS_6980:
1835 case CX23885_BOARD_TBS_6981:
1836 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1837 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1838 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1839 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1840 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1841 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1844 case CX23885_BOARD_MYGICA_X8506:
1845 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1846 case CX23885_BOARD_MYGICA_X8507:
1847 ts1->gen_ctrl_val = 0x5; /* Parallel */
1848 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1849 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1851 case CX23885_BOARD_MYGICA_X8558PRO:
1852 ts1->gen_ctrl_val = 0x5; /* Parallel */
1853 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1854 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1855 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1856 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1857 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1859 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1860 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1861 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1862 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1863 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1864 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1865 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1867 case CX23885_BOARD_DVBSKY_T9580:
1868 ts1->gen_ctrl_val = 0x5; /* Parallel */
1869 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1870 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1871 ts2->gen_ctrl_val = 0x8; /* Serial bus */
1872 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1873 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1875 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1876 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1877 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1878 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1879 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1880 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1881 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1882 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
1883 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1884 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1885 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1886 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1887 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1888 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1889 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1890 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1891 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1892 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1893 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1894 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1896 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1897 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1898 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1901 /* Certain boards support analog, or require the avcore to be
1902 * loaded, ensure this happens.
1904 switch (dev->board) {
1905 case CX23885_BOARD_TEVII_S470:
1906 /* Currently only enabled for the integrated IR controller */
1909 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1910 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1911 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
1912 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1913 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1914 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1915 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1916 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1917 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1918 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1919 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1920 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1921 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1922 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1923 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1924 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1925 case CX23885_BOARD_MYGICA_X8506:
1926 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1927 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1928 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1929 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1930 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1931 case CX23885_BOARD_MPX885:
1932 case CX23885_BOARD_MYGICA_X8507:
1933 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1934 case CX23885_BOARD_AVERMEDIA_HC81R:
1935 case CX23885_BOARD_TBS_6980:
1936 case CX23885_BOARD_TBS_6981:
1937 case CX23885_BOARD_DVBSKY_T9580:
1938 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1939 &dev->i2c_bus[2].i2c_adap,
1940 "cx25840", 0x88 >> 1, NULL);
1941 if (dev->sd_cx25840) {
1942 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1943 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1948 /* AUX-PLL 27MHz CLK */
1949 switch (dev->board) {
1950 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1951 netup_initialize(dev);
1953 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1955 const struct firmware *fw;
1956 const char *filename = "dvb-netup-altera-01.fw";
1957 char *action = "configure";
1958 static struct netup_card_info cinfo;
1959 struct altera_config netup_config = {
1962 .jtag_io = netup_jtag_io,
1965 netup_initialize(dev);
1967 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1969 cinfo.rev = netup_card_rev;
1971 switch (cinfo.rev) {
1973 filename = "dvb-netup-altera-04.fw";
1976 filename = "dvb-netup-altera-01.fw";
1979 printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
1980 cinfo.rev, filename);
1982 ret = request_firmware(&fw, filename, &dev->pci->dev);
1984 printk(KERN_ERR "did not find the firmware file. (%s) "
1985 "Please see linux/Documentation/dvb/ for more details "
1986 "on firmware-problems.", filename);
1988 altera_init(&netup_config, fw);
1990 release_firmware(fw);