drivers/media/platform/coda.c

   1 /*
   2  * Coda multi-standard codec IP
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/firmware.h>
  17 #include <linux/genalloc.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/io.h>
  20 #include <linux/irq.h>
  21 #include <linux/kfifo.h>
  22 #include <linux/module.h>
  23 #include <linux/of_device.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/slab.h>
  26 #include <linux/videodev2.h>
  27 #include <linux/of.h>
  28 #include <linux/platform_data/coda.h>
  29
  30 #include <media/v4l2-ctrls.h>
  31 #include <media/v4l2-device.h>
  32 #include <media/v4l2-event.h>
  33 #include <media/v4l2-ioctl.h>
  34 #include <media/v4l2-mem2mem.h>
  35 #include <media/videobuf2-core.h>
  36 #include <media/videobuf2-dma-contig.h>
  37
  38 #include "coda.h"
  39
  40 #define CODA_NAME               "coda"
  41
  42 #define CODA_MAX_INSTANCES      4
  43
  44 #define CODA_FMO_BUF_SIZE       32
  45 #define CODADX6_WORK_BUF_SIZE   (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  46 #define CODA7_WORK_BUF_SIZE     (128 * 1024)
  47 #define CODA7_TEMP_BUF_SIZE     (304 * 1024)
  48 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  49 #define CODA_ISRAM_SIZE (2048 * 2)
  50 #define CODADX6_IRAM_SIZE       0xb000
  51 #define CODA7_IRAM_SIZE         0x14000
  52
  53 #define CODA7_PS_BUF_SIZE       0x28000
  54
  55 #define CODA_MAX_FRAMEBUFFERS   8
  56
  57 #define MAX_W           8192
  58 #define MAX_H           8192
  59 #define CODA_MAX_FRAME_SIZE     0x100000
  60 #define FMO_SLICE_SAVE_BUF_SIZE         (32)
  61 #define CODA_DEFAULT_GAMMA              4096
  62
  63 #define MIN_W 176
  64 #define MIN_H 144
  65
  66 #define S_ALIGN         1 /* multiple of 2 */
  67 #define W_ALIGN         1 /* multiple of 2 */
  68 #define H_ALIGN         1 /* multiple of 2 */
  69
  70 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  71
  72 static int coda_debug;
  73 module_param(coda_debug, int, 0644);
  74 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  75
  76 enum {
  77         V4L2_M2M_SRC = 0,
  78         V4L2_M2M_DST = 1,
  79 };
  80
  81 enum coda_inst_type {
  82         CODA_INST_ENCODER,
  83         CODA_INST_DECODER,
  84 };
  85
  86 enum coda_product {
  87         CODA_DX6 = 0xf001,
  88         CODA_7541 = 0xf012,
  89 };
  90
  91 struct coda_fmt {
  92         char *name;
  93         u32 fourcc;
  94 };
  95
  96 struct coda_codec {
  97         u32 mode;
  98         u32 src_fourcc;
  99         u32 dst_fourcc;
 100         u32 max_w;
 101         u32 max_h;
 102 };
 103
 104 struct coda_devtype {
 105         char                    *firmware;
 106         enum coda_product       product;
 107         struct coda_codec       *codecs;
 108         unsigned int            num_codecs;
 109         size_t                  workbuf_size;
 110 };
 111
 112 /* Per-queue, driver-specific private data */
 113 struct coda_q_data {
 114         unsigned int            width;
 115         unsigned int            height;
 116         unsigned int            sizeimage;
 117         unsigned int            fourcc;
 118 };
 119
 120 struct coda_aux_buf {
 121         void                    *vaddr;
 122         dma_addr_t              paddr;
 123         u32                     size;
 124 };
 125
 126 struct coda_dev {
 127         struct v4l2_device      v4l2_dev;
 128         struct video_device     vfd;
 129         struct platform_device  *plat_dev;
 130         const struct coda_devtype *devtype;
 131
 132         void __iomem            *regs_base;
 133         struct clk              *clk_per;
 134         struct clk              *clk_ahb;
 135
 136         struct coda_aux_buf     codebuf;
 137         struct coda_aux_buf     tempbuf;
 138         struct coda_aux_buf     workbuf;
 139         struct gen_pool         *iram_pool;
 140         long unsigned int       iram_vaddr;
 141         long unsigned int       iram_paddr;
 142         unsigned long           iram_size;
 143
 144         spinlock_t              irqlock;
 145         struct mutex            dev_mutex;
 146         struct mutex            coda_mutex;
 147         struct v4l2_m2m_dev     *m2m_dev;
 148         struct vb2_alloc_ctx    *alloc_ctx;
 149         struct list_head        instances;
 150         unsigned long           instance_mask;
 151         struct delayed_work     timeout;
 152 };
 153
 154 struct coda_params {
 155         u8                      rot_mode;
 156         u8                      h264_intra_qp;
 157         u8                      h264_inter_qp;
 158         u8                      mpeg4_intra_qp;
 159         u8                      mpeg4_inter_qp;
 160         u8                      gop_size;
 161         int                     codec_mode;
 162         int                     codec_mode_aux;
 163         enum v4l2_mpeg_video_multi_slice_mode slice_mode;
 164         u32                     framerate;
 165         u16                     bitrate;
 166         u32                     slice_max_bits;
 167         u32                     slice_max_mb;
 168 };
 169
 170 struct coda_iram_info {
 171         u32             axi_sram_use;
 172         phys_addr_t     buf_bit_use;
 173         phys_addr_t     buf_ip_ac_dc_use;
 174         phys_addr_t     buf_dbk_y_use;
 175         phys_addr_t     buf_dbk_c_use;
 176         phys_addr_t     buf_ovl_use;
 177         phys_addr_t     buf_btp_use;
 178         phys_addr_t     search_ram_paddr;
 179         int             search_ram_size;
 180 };
 181
 182 struct coda_ctx {
 183         struct coda_dev                 *dev;
 184         struct mutex                    buffer_mutex;
 185         struct list_head                list;
 186         struct work_struct              skip_run;
 187         int                             aborting;
 188         int                             initialized;
 189         int                             streamon_out;
 190         int                             streamon_cap;
 191         u32                             isequence;
 192         u32                             qsequence;
 193         u32                             osequence;
 194         struct coda_q_data              q_data[2];
 195         enum coda_inst_type             inst_type;
 196         struct coda_codec               *codec;
 197         enum v4l2_colorspace            colorspace;
 198         struct coda_params              params;
 199         struct v4l2_m2m_ctx             *m2m_ctx;
 200         struct v4l2_ctrl_handler        ctrls;
 201         struct v4l2_fh                  fh;
 202         int                             gopcounter;
 203         int                             runcounter;
 204         char                            vpu_header[3][64];
 205         int                             vpu_header_size[3];
 206         struct kfifo                    bitstream_fifo;
 207         struct mutex                    bitstream_mutex;
 208         struct coda_aux_buf             bitstream;
 209         bool                            prescan_failed;
 210         struct coda_aux_buf             parabuf;
 211         struct coda_aux_buf             psbuf;
 212         struct coda_aux_buf             slicebuf;
 213         struct coda_aux_buf             internal_frames[CODA_MAX_FRAMEBUFFERS];
 214         struct coda_aux_buf             workbuf;
 215         int                             num_internal_frames;
 216         int                             idx;
 217         int                             reg_idx;
 218         struct coda_iram_info           iram_info;
 219         u32                             bit_stream_param;
 220         u32                             frm_dis_flg;
 221         int                             display_idx;
 222 };
 223
 224 static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
 225                         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
 226 static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
 227
 228 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
 229 {
 230         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 231                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 232         writel(data, dev->regs_base + reg);
 233 }
 234
 235 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
 236 {
 237         u32 data;
 238         data = readl(dev->regs_base + reg);
 239         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 240                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 241         return data;
 242 }
 243
 244 static inline unsigned long coda_isbusy(struct coda_dev *dev)
 245 {
 246         return coda_read(dev, CODA_REG_BIT_BUSY);
 247 }
 248
 249 static inline int coda_is_initialized(struct coda_dev *dev)
 250 {
 251         return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
 252 }
 253
 254 static int coda_wait_timeout(struct coda_dev *dev)
 255 {
 256         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 257
 258         while (coda_isbusy(dev)) {
 259                 if (time_after(jiffies, timeout))
 260                         return -ETIMEDOUT;
 261         }
 262         return 0;
 263 }
 264
 265 static void coda_command_async(struct coda_ctx *ctx, int cmd)
 266 {
 267         struct coda_dev *dev = ctx->dev;
 268
 269         if (dev->devtype->product == CODA_7541) {
 270                 /* Restore context related registers to CODA */
 271                 coda_write(dev, ctx->bit_stream_param,
 272                                 CODA_REG_BIT_BIT_STREAM_PARAM);
 273                 coda_write(dev, ctx->frm_dis_flg,
 274                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
 275                 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
 276         }
 277
 278         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 279
 280         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
 281         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
 282         coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
 283
 284         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
 285 }
 286
 287 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
 288 {
 289         struct coda_dev *dev = ctx->dev;
 290
 291         coda_command_async(ctx, cmd);
 292         return coda_wait_timeout(dev);
 293 }
 294
 295 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
 296                                          enum v4l2_buf_type type)
 297 {
 298         switch (type) {
 299         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 300                 return &(ctx->q_data[V4L2_M2M_SRC]);
 301         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 302                 return &(ctx->q_data[V4L2_M2M_DST]);
 303         default:
 304                 BUG();
 305         }
 306         return NULL;
 307 }
 308
 309 /*
 310  * Array of all formats supported by any version of Coda:
 311  */
 312 static struct coda_fmt coda_formats[] = {
 313         {
 314                 .name = "YUV 4:2:0 Planar, YCbCr",
 315                 .fourcc = V4L2_PIX_FMT_YUV420,
 316         },
 317         {
 318                 .name = "YUV 4:2:0 Planar, YCrCb",
 319                 .fourcc = V4L2_PIX_FMT_YVU420,
 320         },
 321         {
 322                 .name = "H264 Encoded Stream",
 323                 .fourcc = V4L2_PIX_FMT_H264,
 324         },
 325         {
 326                 .name = "MPEG4 Encoded Stream",
 327                 .fourcc = V4L2_PIX_FMT_MPEG4,
 328         },
 329 };
 330
 331 #define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
 332         { mode, src_fourcc, dst_fourcc, max_w, max_h }
 333
 334 /*
 335  * Arrays of codecs supported by each given version of Coda:
 336  *  i.MX27 -> codadx6
 337  *  i.MX5x -> coda7
 338  *  i.MX6  -> coda960
 339  * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
 340  */
 341 static struct coda_codec codadx6_codecs[] = {
 342         CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,  720, 576),
 343         CODA_CODEC(CODADX6_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
 344 };
 345
 346 static struct coda_codec coda7_codecs[] = {
 347         CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,   1280, 720),
 348         CODA_CODEC(CODA7_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4,  1280, 720),
 349         CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264,   V4L2_PIX_FMT_YUV420, 1920, 1080),
 350         CODA_CODEC(CODA7_MODE_DECODE_MP4,  V4L2_PIX_FMT_MPEG4,  V4L2_PIX_FMT_YUV420, 1920, 1080),
 351 };
 352
 353 static bool coda_format_is_yuv(u32 fourcc)
 354 {
 355         switch (fourcc) {
 356         case V4L2_PIX_FMT_YUV420:
 357         case V4L2_PIX_FMT_YVU420:
 358                 return true;
 359         default:
 360                 return false;
 361         }
 362 }
 363
 364 /*
 365  * Normalize all supported YUV 4:2:0 formats to the value used in the codec
 366  * tables.
 367  */
 368 static u32 coda_format_normalize_yuv(u32 fourcc)
 369 {
 370         return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
 371 }
 372
 373 static struct coda_codec *coda_find_codec(struct coda_dev *dev, int src_fourcc,
 374                                           int dst_fourcc)
 375 {
 376         struct coda_codec *codecs = dev->devtype->codecs;
 377         int num_codecs = dev->devtype->num_codecs;
 378         int k;
 379
 380         src_fourcc = coda_format_normalize_yuv(src_fourcc);
 381         dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
 382         if (src_fourcc == dst_fourcc)
 383                 return NULL;
 384
 385         for (k = 0; k < num_codecs; k++) {
 386                 if (codecs[k].src_fourcc == src_fourcc &&
 387                     codecs[k].dst_fourcc == dst_fourcc)
 388                         break;
 389         }
 390
 391         if (k == num_codecs)
 392                 return NULL;
 393
 394         return &codecs[k];
 395 }
 396
 397 /*
 398  * V4L2 ioctl() operations.
 399  */
 400 static int vidioc_querycap(struct file *file, void *priv,
 401                            struct v4l2_capability *cap)
 402 {
 403         strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
 404         strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
 405         strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
 406         /*
 407          * This is only a mem-to-mem video device. The capture and output
 408          * device capability flags are left only for backward compatibility
 409          * and are scheduled for removal.
 410          */
 411         cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
 412                            V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
 413         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 414
 415         return 0;
 416 }
 417
 418 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
 419                         enum v4l2_buf_type type, int src_fourcc)
 420 {
 421         struct coda_ctx *ctx = fh_to_ctx(priv);
 422         struct coda_codec *codecs = ctx->dev->devtype->codecs;
 423         struct coda_fmt *formats = coda_formats;
 424         struct coda_fmt *fmt;
 425         int num_codecs = ctx->dev->devtype->num_codecs;
 426         int num_formats = ARRAY_SIZE(coda_formats);
 427         int i, k, num = 0;
 428
 429         for (i = 0; i < num_formats; i++) {
 430                 /* Both uncompressed formats are always supported */
 431                 if (coda_format_is_yuv(formats[i].fourcc) &&
 432                     !coda_format_is_yuv(src_fourcc)) {
 433                         if (num == f->index)
 434                                 break;
 435                         ++num;
 436                         continue;
 437                 }
 438                 /* Compressed formats may be supported, check the codec list */
 439                 for (k = 0; k < num_codecs; k++) {
 440                         /* if src_fourcc is set, only consider matching codecs */
 441                         if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
 442                             formats[i].fourcc == codecs[k].dst_fourcc &&
 443                             (!src_fourcc || src_fourcc == codecs[k].src_fourcc))
 444                                 break;
 445                         if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
 446                             formats[i].fourcc == codecs[k].src_fourcc)
 447                                 break;
 448                 }
 449                 if (k < num_codecs) {
 450                         if (num == f->index)
 451                                 break;
 452                         ++num;
 453                 }
 454         }
 455
 456         if (i < num_formats) {
 457                 fmt = &formats[i];
 458                 strlcpy(f->description, fmt->name, sizeof(f->description));
 459                 f->pixelformat = fmt->fourcc;
 460                 return 0;
 461         }
 462
 463         /* Format not found */
 464         return -EINVAL;
 465 }
 466
 467 static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
 468                                    struct v4l2_fmtdesc *f)
 469 {
 470         struct coda_ctx *ctx = fh_to_ctx(priv);
 471         struct vb2_queue *src_vq;
 472         struct coda_q_data *q_data_src;
 473
 474         /* If the source format is already fixed, only list matching formats */
 475         src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 476         if (vb2_is_streaming(src_vq)) {
 477                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 478
 479                 return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE,
 480                                 q_data_src->fourcc);
 481         }
 482
 483         return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0);
 484 }
 485
 486 static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
 487                                    struct v4l2_fmtdesc *f)
 488 {
 489         return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_OUTPUT, 0);
 490 }
 491
 492 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
 493 {
 494         struct vb2_queue *vq;
 495         struct coda_q_data *q_data;
 496         struct coda_ctx *ctx = fh_to_ctx(priv);
 497
 498         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 499         if (!vq)
 500                 return -EINVAL;
 501
 502         q_data = get_q_data(ctx, f->type);
 503
 504         f->fmt.pix.field        = V4L2_FIELD_NONE;
 505         f->fmt.pix.pixelformat  = q_data->fourcc;
 506         f->fmt.pix.width        = q_data->width;
 507         f->fmt.pix.height       = q_data->height;
 508         if (coda_format_is_yuv(f->fmt.pix.pixelformat))
 509                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 510         else /* encoded formats h.264/mpeg4 */
 511                 f->fmt.pix.bytesperline = 0;
 512
 513         f->fmt.pix.sizeimage    = q_data->sizeimage;
 514         f->fmt.pix.colorspace   = ctx->colorspace;
 515
 516         return 0;
 517 }
 518
 519 static int vidioc_try_fmt(struct coda_codec *codec, struct v4l2_format *f)
 520 {
 521         unsigned int max_w, max_h;
 522         enum v4l2_field field;
 523
 524         field = f->fmt.pix.field;
 525         if (field == V4L2_FIELD_ANY)
 526                 field = V4L2_FIELD_NONE;
 527         else if (V4L2_FIELD_NONE != field)
 528                 return -EINVAL;
 529
 530         /* V4L2 specification suggests the driver corrects the format struct
 531          * if any of the dimensions is unsupported */
 532         f->fmt.pix.field = field;
 533
 534         if (codec) {
 535                 max_w = codec->max_w;
 536                 max_h = codec->max_h;
 537         } else {
 538                 max_w = MAX_W;
 539                 max_h = MAX_H;
 540         }
 541         v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w,
 542                               W_ALIGN, &f->fmt.pix.height,
 543                               MIN_H, max_h, H_ALIGN, S_ALIGN);
 544
 545         if (coda_format_is_yuv(f->fmt.pix.pixelformat)) {
 546                 /* Frame stride must be multiple of 8 */
 547                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 8);
 548                 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
 549                                         f->fmt.pix.height * 3 / 2;
 550         } else { /*encoded formats h.264/mpeg4 */
 551                 f->fmt.pix.bytesperline = 0;
 552                 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
 553         }
 554
 555         return 0;
 556 }
 557
 558 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 559                                   struct v4l2_format *f)
 560 {
 561         struct coda_ctx *ctx = fh_to_ctx(priv);
 562         struct coda_codec *codec;
 563         struct vb2_queue *src_vq;
 564         int ret;
 565
 566         /*
 567          * If the source format is already fixed, try to find a codec that
 568          * converts to the given destination format
 569          */
 570         src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 571         if (vb2_is_streaming(src_vq)) {
 572                 struct coda_q_data *q_data_src;
 573
 574                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 575                 codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
 576                                         f->fmt.pix.pixelformat);
 577                 if (!codec)
 578                         return -EINVAL;
 579         } else {
 580                 /* Otherwise determine codec by encoded format, if possible */
 581                 codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
 582                                         f->fmt.pix.pixelformat);
 583         }
 584
 585         f->fmt.pix.colorspace = ctx->colorspace;
 586
 587         ret = vidioc_try_fmt(codec, f);
 588         if (ret < 0)
 589                 return ret;
 590
 591         /* The h.264 decoder only returns complete 16x16 macroblocks */
 592         if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) {
 593                 f->fmt.pix.width = round_up(f->fmt.pix.width, 16);
 594                 f->fmt.pix.height = round_up(f->fmt.pix.height, 16);
 595                 f->fmt.pix.bytesperline = f->fmt.pix.width;
 596                 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
 597                                        f->fmt.pix.height * 3 / 2;
 598         }
 599
 600         return 0;
 601 }
 602
 603 static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
 604                                   struct v4l2_format *f)
 605 {
 606         struct coda_ctx *ctx = fh_to_ctx(priv);
 607         struct coda_codec *codec;
 608
 609         /* Determine codec by encoded format, returns NULL if raw or invalid */
 610         codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
 611                                 V4L2_PIX_FMT_YUV420);
 612
 613         if (!f->fmt.pix.colorspace)
 614                 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
 615
 616         return vidioc_try_fmt(codec, f);
 617 }
 618
 619 static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
 620 {
 621         struct coda_q_data *q_data;
 622         struct vb2_queue *vq;
 623
 624         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 625         if (!vq)
 626                 return -EINVAL;
 627
 628         q_data = get_q_data(ctx, f->type);
 629         if (!q_data)
 630                 return -EINVAL;
 631
 632         if (vb2_is_busy(vq)) {
 633                 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
 634                 return -EBUSY;
 635         }
 636
 637         q_data->fourcc = f->fmt.pix.pixelformat;
 638         q_data->width = f->fmt.pix.width;
 639         q_data->height = f->fmt.pix.height;
 640         q_data->sizeimage = f->fmt.pix.sizeimage;
 641
 642         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 643                 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
 644                 f->type, q_data->width, q_data->height, q_data->fourcc);
 645
 646         return 0;
 647 }
 648
 649 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 650                                 struct v4l2_format *f)
 651 {
 652         struct coda_ctx *ctx = fh_to_ctx(priv);
 653         int ret;
 654
 655         ret = vidioc_try_fmt_vid_cap(file, priv, f);
 656         if (ret)
 657                 return ret;
 658
 659         return vidioc_s_fmt(ctx, f);
 660 }
 661
 662 static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
 663                                 struct v4l2_format *f)
 664 {
 665         struct coda_ctx *ctx = fh_to_ctx(priv);
 666         int ret;
 667
 668         ret = vidioc_try_fmt_vid_out(file, priv, f);
 669         if (ret)
 670                 return ret;
 671
 672         ret = vidioc_s_fmt(ctx, f);
 673         if (ret)
 674                 ctx->colorspace = f->fmt.pix.colorspace;
 675
 676         return ret;
 677 }
 678
 679 static int vidioc_reqbufs(struct file *file, void *priv,
 680                           struct v4l2_requestbuffers *reqbufs)
 681 {
 682         struct coda_ctx *ctx = fh_to_ctx(priv);
 683
 684         return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
 685 }
 686
 687 static int vidioc_querybuf(struct file *file, void *priv,
 688                            struct v4l2_buffer *buf)
 689 {
 690         struct coda_ctx *ctx = fh_to_ctx(priv);
 691
 692         return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
 693 }
 694
 695 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 696 {
 697         struct coda_ctx *ctx = fh_to_ctx(priv);
 698
 699         return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
 700 }
 701
 702 static int vidioc_expbuf(struct file *file, void *priv,
 703                          struct v4l2_exportbuffer *eb)
 704 {
 705         struct coda_ctx *ctx = fh_to_ctx(priv);
 706
 707         return v4l2_m2m_expbuf(file, ctx->m2m_ctx, eb);
 708 }
 709
 710 static bool coda_buf_is_end_of_stream(struct coda_ctx *ctx,
 711                                       struct v4l2_buffer *buf)
 712 {
 713         struct vb2_queue *src_vq;
 714
 715         src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 716
 717         return ((ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) &&
 718                 (buf->sequence == (ctx->qsequence - 1)));
 719 }
 720
 721 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 722 {
 723         struct coda_ctx *ctx = fh_to_ctx(priv);
 724         int ret;
 725
 726         ret = v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
 727
 728         /* If this is the last capture buffer, emit an end-of-stream event */
 729         if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
 730             coda_buf_is_end_of_stream(ctx, buf)) {
 731                 const struct v4l2_event eos_event = {
 732                         .type = V4L2_EVENT_EOS
 733                 };
 734
 735                 v4l2_event_queue_fh(&ctx->fh, &eos_event);
 736         }
 737
 738         return ret;
 739 }
 740
 741 static int vidioc_create_bufs(struct file *file, void *priv,
 742                               struct v4l2_create_buffers *create)
 743 {
 744         struct coda_ctx *ctx = fh_to_ctx(priv);
 745
 746         return v4l2_m2m_create_bufs(file, ctx->m2m_ctx, create);
 747 }
 748
 749 static int vidioc_streamon(struct file *file, void *priv,
 750                            enum v4l2_buf_type type)
 751 {
 752         struct coda_ctx *ctx = fh_to_ctx(priv);
 753
 754         return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
 755 }
 756
 757 static int vidioc_streamoff(struct file *file, void *priv,
 758                             enum v4l2_buf_type type)
 759 {
 760         struct coda_ctx *ctx = fh_to_ctx(priv);
 761         int ret;
 762
 763         /*
 764          * This indirectly calls __vb2_queue_cancel, which dequeues all buffers.
 765          * We therefore have to lock it against running hardware in this context,
 766          * which still needs the buffers.
 767          */
 768         mutex_lock(&ctx->buffer_mutex);
 769         ret = v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
 770         mutex_unlock(&ctx->buffer_mutex);
 771
 772         return ret;
 773 }
 774
 775 static int vidioc_decoder_cmd(struct file *file, void *fh,
 776                               struct v4l2_decoder_cmd *dc)
 777 {
 778         struct coda_ctx *ctx = fh_to_ctx(fh);
 779
 780         if (dc->cmd != V4L2_DEC_CMD_STOP)
 781                 return -EINVAL;
 782
 783         if ((dc->flags & V4L2_DEC_CMD_STOP_TO_BLACK) ||
 784             (dc->flags & V4L2_DEC_CMD_STOP_IMMEDIATELY))
 785                 return -EINVAL;
 786
 787         if (dc->stop.pts != 0)
 788                 return -EINVAL;
 789
 790         if (ctx->inst_type != CODA_INST_DECODER)
 791                 return -EINVAL;
 792
 793         /* Set the strem-end flag on this context */
 794         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
 795
 796         return 0;
 797 }
 798
 799 static int vidioc_subscribe_event(struct v4l2_fh *fh,
 800                                   const struct v4l2_event_subscription *sub)
 801 {
 802         switch (sub->type) {
 803         case V4L2_EVENT_EOS:
 804                 return v4l2_event_subscribe(fh, sub, 0, NULL);
 805         default:
 806                 return v4l2_ctrl_subscribe_event(fh, sub);
 807         }
 808 }
 809
 810 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
 811         .vidioc_querycap        = vidioc_querycap,
 812
 813         .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
 814         .vidioc_g_fmt_vid_cap   = vidioc_g_fmt,
 815         .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
 816         .vidioc_s_fmt_vid_cap   = vidioc_s_fmt_vid_cap,
 817
 818         .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
 819         .vidioc_g_fmt_vid_out   = vidioc_g_fmt,
 820         .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
 821         .vidioc_s_fmt_vid_out   = vidioc_s_fmt_vid_out,
 822
 823         .vidioc_reqbufs         = vidioc_reqbufs,
 824         .vidioc_querybuf        = vidioc_querybuf,
 825
 826         .vidioc_qbuf            = vidioc_qbuf,
 827         .vidioc_expbuf          = vidioc_expbuf,
 828         .vidioc_dqbuf           = vidioc_dqbuf,
 829         .vidioc_create_bufs     = vidioc_create_bufs,
 830
 831         .vidioc_streamon        = vidioc_streamon,
 832         .vidioc_streamoff       = vidioc_streamoff,
 833
 834         .vidioc_decoder_cmd     = vidioc_decoder_cmd,
 835
 836         .vidioc_subscribe_event = vidioc_subscribe_event,
 837         .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
 838 };
 839
 840 static int coda_start_decoding(struct coda_ctx *ctx);
 841
 842 static void coda_skip_run(struct work_struct *work)
 843 {
 844         struct coda_ctx *ctx = container_of(work, struct coda_ctx, skip_run);
 845
 846         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
 847 }
 848
 849 static inline int coda_get_bitstream_payload(struct coda_ctx *ctx)
 850 {
 851         return kfifo_len(&ctx->bitstream_fifo);
 852 }
 853
 854 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
 855 {
 856         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 857         struct coda_dev *dev = ctx->dev;
 858         u32 rd_ptr;
 859
 860         rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 861         kfifo->out = (kfifo->in & ~kfifo->mask) |
 862                       (rd_ptr - ctx->bitstream.paddr);
 863         if (kfifo->out > kfifo->in)
 864                 kfifo->out -= kfifo->mask + 1;
 865 }
 866
 867 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
 868 {
 869         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 870         struct coda_dev *dev = ctx->dev;
 871         u32 rd_ptr, wr_ptr;
 872
 873         rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
 874         coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 875         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 876         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 877 }
 878
 879 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
 880 {
 881         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 882         struct coda_dev *dev = ctx->dev;
 883         u32 wr_ptr;
 884
 885         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 886         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 887 }
 888
 889 static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf)
 890 {
 891         u32 src_size = vb2_get_plane_payload(src_buf, 0);
 892         u32 n;
 893
 894         n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size);
 895         if (n < src_size)
 896                 return -ENOSPC;
 897
 898         dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr,
 899                                    ctx->bitstream.size, DMA_TO_DEVICE);
 900
 901         ctx->qsequence++;
 902
 903         return 0;
 904 }
 905
 906 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
 907                                      struct vb2_buffer *src_buf)
 908 {
 909         int ret;
 910
 911         if (coda_get_bitstream_payload(ctx) +
 912             vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
 913                 return false;
 914
 915         if (vb2_plane_vaddr(src_buf, 0) == NULL) {
 916                 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
 917                 return true;
 918         }
 919
 920         ret = coda_bitstream_queue(ctx, src_buf);
 921         if (ret < 0) {
 922                 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
 923                 return false;
 924         }
 925         /* Sync read pointer to device */
 926         if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
 927                 coda_kfifo_sync_to_device_write(ctx);
 928
 929         ctx->prescan_failed = false;
 930
 931         return true;
 932 }
 933
 934 static void coda_fill_bitstream(struct coda_ctx *ctx)
 935 {
 936         struct vb2_buffer *src_buf;
 937
 938         while (v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) > 0) {
 939                 src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
 940
 941                 if (coda_bitstream_try_queue(ctx, src_buf)) {
 942                         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
 943                         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
 944                 } else {
 945                         break;
 946                 }
 947         }
 948 }
 949
 950 /*
 951  * Mem-to-mem operations.
 952  */
 953 static int coda_prepare_decode(struct coda_ctx *ctx)
 954 {
 955         struct vb2_buffer *dst_buf;
 956         struct coda_dev *dev = ctx->dev;
 957         struct coda_q_data *q_data_dst;
 958         u32 stridey, height;
 959         u32 picture_y, picture_cb, picture_cr;
 960
 961         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 962         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 963
 964         if (ctx->params.rot_mode & CODA_ROT_90) {
 965                 stridey = q_data_dst->height;
 966                 height = q_data_dst->width;
 967         } else {
 968                 stridey = q_data_dst->width;
 969                 height = q_data_dst->height;
 970         }
 971
 972         /* Try to copy source buffer contents into the bitstream ringbuffer */
 973         mutex_lock(&ctx->bitstream_mutex);
 974         coda_fill_bitstream(ctx);
 975         mutex_unlock(&ctx->bitstream_mutex);
 976
 977         if (coda_get_bitstream_payload(ctx) < 512 &&
 978             (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
 979                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 980                          "bitstream payload: %d, skipping\n",
 981                          coda_get_bitstream_payload(ctx));
 982                 schedule_work(&ctx->skip_run);
 983                 return -EAGAIN;
 984         }
 985
 986         /* Run coda_start_decoding (again) if not yet initialized */
 987         if (!ctx->initialized) {
 988                 int ret = coda_start_decoding(ctx);
 989                 if (ret < 0) {
 990                         v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
 991                         schedule_work(&ctx->skip_run);
 992                         return -EAGAIN;
 993                 } else {
 994                         ctx->initialized = 1;
 995                 }
 996         }
 997
 998         /* Set rotator output */
 999         picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1000         if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) {
1001                 /* Switch Cr and Cb for YVU420 format */
1002                 picture_cr = picture_y + stridey * height;
1003                 picture_cb = picture_cr + stridey / 2 * height / 2;
1004         } else {
1005                 picture_cb = picture_y + stridey * height;
1006                 picture_cr = picture_cb + stridey / 2 * height / 2;
1007         }
1008         coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y);
1009         coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB);
1010         coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR);
1011         coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE);
1012         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1013                         CODA_CMD_DEC_PIC_ROT_MODE);
1014
1015         switch (dev->devtype->product) {
1016         case CODA_DX6:
1017                 /* TBD */
1018         case CODA_7541:
1019                 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1020                 break;
1021         }
1022
1023         coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1024
1025         coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1026         coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1027
1028         return 0;
1029 }
1030
1031 static void coda_prepare_encode(struct coda_ctx *ctx)
1032 {
1033         struct coda_q_data *q_data_src, *q_data_dst;
1034         struct vb2_buffer *src_buf, *dst_buf;
1035         struct coda_dev *dev = ctx->dev;
1036         int force_ipicture;
1037         int quant_param = 0;
1038         u32 picture_y, picture_cb, picture_cr;
1039         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1040         u32 dst_fourcc;
1041
1042         src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
1043         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1044         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1045         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1046         dst_fourcc = q_data_dst->fourcc;
1047
1048         src_buf->v4l2_buf.sequence = ctx->osequence;
1049         dst_buf->v4l2_buf.sequence = ctx->osequence;
1050         ctx->osequence++;
1051
1052         /*
1053          * Workaround coda firmware BUG that only marks the first
1054          * frame as IDR. This is a problem for some decoders that can't
1055          * recover when a frame is lost.
1056          */
1057         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
1058                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1059                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1060         } else {
1061                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1062                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1063         }
1064
1065         /*
1066          * Copy headers at the beginning of the first frame for H.264 only.
1067          * In MPEG4 they are already copied by the coda.
1068          */
1069         if (src_buf->v4l2_buf.sequence == 0) {
1070                 pic_stream_buffer_addr =
1071                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
1072                         ctx->vpu_header_size[0] +
1073                         ctx->vpu_header_size[1] +
1074                         ctx->vpu_header_size[2];
1075                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
1076                         ctx->vpu_header_size[0] -
1077                         ctx->vpu_header_size[1] -
1078                         ctx->vpu_header_size[2];
1079                 memcpy(vb2_plane_vaddr(dst_buf, 0),
1080                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1081                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
1082                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
1083                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
1084                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
1085                         ctx->vpu_header_size[2]);
1086         } else {
1087                 pic_stream_buffer_addr =
1088                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1089                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
1090         }
1091
1092         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1093                 force_ipicture = 1;
1094                 switch (dst_fourcc) {
1095                 case V4L2_PIX_FMT_H264:
1096                         quant_param = ctx->params.h264_intra_qp;
1097                         break;
1098                 case V4L2_PIX_FMT_MPEG4:
1099                         quant_param = ctx->params.mpeg4_intra_qp;
1100                         break;
1101                 default:
1102                         v4l2_warn(&ctx->dev->v4l2_dev,
1103                                 "cannot set intra qp, fmt not supported\n");
1104                         break;
1105                 }
1106         } else {
1107                 force_ipicture = 0;
1108                 switch (dst_fourcc) {
1109                 case V4L2_PIX_FMT_H264:
1110                         quant_param = ctx->params.h264_inter_qp;
1111                         break;
1112                 case V4L2_PIX_FMT_MPEG4:
1113                         quant_param = ctx->params.mpeg4_inter_qp;
1114                         break;
1115                 default:
1116                         v4l2_warn(&ctx->dev->v4l2_dev,
1117                                 "cannot set inter qp, fmt not supported\n");
1118                         break;
1119                 }
1120         }
1121
1122         /* submit */
1123         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1124         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1125
1126
1127         picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
1128         switch (q_data_src->fourcc) {
1129         case V4L2_PIX_FMT_YVU420:
1130                 /* Switch Cb and Cr for YVU420 format */
1131                 picture_cr = picture_y + q_data_src->width * q_data_src->height;
1132                 picture_cb = picture_cr + q_data_src->width / 2 *
1133                                 q_data_src->height / 2;
1134                 break;
1135         case V4L2_PIX_FMT_YUV420:
1136         default:
1137                 picture_cb = picture_y + q_data_src->width * q_data_src->height;
1138                 picture_cr = picture_cb + q_data_src->width / 2 *
1139                                 q_data_src->height / 2;
1140                 break;
1141         }
1142
1143         coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
1144         coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
1145         coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
1146         coda_write(dev, force_ipicture << 1 & 0x2,
1147                    CODA_CMD_ENC_PIC_OPTION);
1148
1149         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1150         coda_write(dev, pic_stream_buffer_size / 1024,
1151                    CODA_CMD_ENC_PIC_BB_SIZE);
1152 }
1153
1154 static void coda_device_run(void *m2m_priv)
1155 {
1156         struct coda_ctx *ctx = m2m_priv;
1157         struct coda_dev *dev = ctx->dev;
1158         int ret;
1159
1160         mutex_lock(&ctx->buffer_mutex);
1161
1162         /*
1163          * If streamoff dequeued all buffers before we could get the lock,
1164          * just bail out immediately.
1165          */
1166         if ((!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
1167             ctx->inst_type != CODA_INST_DECODER) ||
1168                 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
1169                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1170                         "%d: device_run without buffers\n", ctx->idx);
1171                 mutex_unlock(&ctx->buffer_mutex);
1172                 schedule_work(&ctx->skip_run);
1173                 return;
1174         }
1175
1176         mutex_lock(&dev->coda_mutex);
1177
1178         if (ctx->inst_type == CODA_INST_DECODER) {
1179                 ret = coda_prepare_decode(ctx);
1180                 if (ret < 0) {
1181                         mutex_unlock(&dev->coda_mutex);
1182                         mutex_unlock(&ctx->buffer_mutex);
1183                         /* job_finish scheduled by prepare_decode */
1184                         return;
1185                 }
1186         } else {
1187                 coda_prepare_encode(ctx);
1188         }
1189
1190         if (dev->devtype->product != CODA_DX6)
1191                 coda_write(dev, ctx->iram_info.axi_sram_use,
1192                                 CODA7_REG_BIT_AXI_SRAM_USE);
1193
1194         /* 1 second timeout in case CODA locks up */
1195         schedule_delayed_work(&dev->timeout, HZ);
1196
1197         if (ctx->inst_type == CODA_INST_DECODER)
1198                 coda_kfifo_sync_to_device_full(ctx);
1199         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1200 }
1201
1202 static int coda_job_ready(void *m2m_priv)
1203 {
1204         struct coda_ctx *ctx = m2m_priv;
1205
1206         /*
1207          * For both 'P' and 'key' frame cases 1 picture
1208          * and 1 frame are needed. In the decoder case,
1209          * the compressed frame can be in the bitstream.
1210          */
1211         if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
1212             ctx->inst_type != CODA_INST_DECODER) {
1213                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1214                          "not ready: not enough video buffers.\n");
1215                 return 0;
1216         }
1217
1218         if (!v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
1219                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1220                          "not ready: not enough video capture buffers.\n");
1221                 return 0;
1222         }
1223
1224         if (ctx->prescan_failed ||
1225             ((ctx->inst_type == CODA_INST_DECODER) &&
1226              (coda_get_bitstream_payload(ctx) < 512) &&
1227              !(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1228                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1229                          "%d: not ready: not enough bitstream data.\n",
1230                          ctx->idx);
1231                 return 0;
1232         }
1233
1234         if (ctx->aborting) {
1235                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1236                          "not ready: aborting\n");
1237                 return 0;
1238         }
1239
1240         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1241                         "job ready\n");
1242         return 1;
1243 }
1244
1245 static void coda_job_abort(void *priv)
1246 {
1247         struct coda_ctx *ctx = priv;
1248
1249         ctx->aborting = 1;
1250
1251         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1252                  "Aborting task\n");
1253 }
1254
1255 static void coda_lock(void *m2m_priv)
1256 {
1257         struct coda_ctx *ctx = m2m_priv;
1258         struct coda_dev *pcdev = ctx->dev;
1259         mutex_lock(&pcdev->dev_mutex);
1260 }
1261
1262 static void coda_unlock(void *m2m_priv)
1263 {
1264         struct coda_ctx *ctx = m2m_priv;
1265         struct coda_dev *pcdev = ctx->dev;
1266         mutex_unlock(&pcdev->dev_mutex);
1267 }
1268
1269 static struct v4l2_m2m_ops coda_m2m_ops = {
1270         .device_run     = coda_device_run,
1271         .job_ready      = coda_job_ready,
1272         .job_abort      = coda_job_abort,
1273         .lock           = coda_lock,
1274         .unlock         = coda_unlock,
1275 };
1276
1277 static void set_default_params(struct coda_ctx *ctx)
1278 {
1279         int max_w;
1280         int max_h;
1281
1282         ctx->codec = &ctx->dev->devtype->codecs[0];
1283         max_w = ctx->codec->max_w;
1284         max_h = ctx->codec->max_h;
1285
1286         ctx->params.codec_mode = CODA_MODE_INVALID;
1287         ctx->colorspace = V4L2_COLORSPACE_REC709;
1288         ctx->params.framerate = 30;
1289         ctx->aborting = 0;
1290
1291         /* Default formats for output and input queues */
1292         ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
1293         ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
1294         ctx->q_data[V4L2_M2M_SRC].width = max_w;
1295         ctx->q_data[V4L2_M2M_SRC].height = max_h;
1296         ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
1297         ctx->q_data[V4L2_M2M_DST].width = max_w;
1298         ctx->q_data[V4L2_M2M_DST].height = max_h;
1299         ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
1300 }
1301
1302 /*
1303  * Queue operations
1304  */
1305 static int coda_queue_setup(struct vb2_queue *vq,
1306                                 const struct v4l2_format *fmt,
1307                                 unsigned int *nbuffers, unsigned int *nplanes,
1308                                 unsigned int sizes[], void *alloc_ctxs[])
1309 {
1310         struct coda_ctx *ctx = vb2_get_drv_priv(vq);
1311         struct coda_q_data *q_data;
1312         unsigned int size;
1313
1314         q_data = get_q_data(ctx, vq->type);
1315         size = q_data->sizeimage;
1316
1317         *nplanes = 1;
1318         sizes[0] = size;
1319
1320         alloc_ctxs[0] = ctx->dev->alloc_ctx;
1321
1322         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1323                  "get %d buffer(s) of size %d each.\n", *nbuffers, size);
1324
1325         return 0;
1326 }
1327
1328 static int coda_buf_prepare(struct vb2_buffer *vb)
1329 {
1330         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1331         struct coda_q_data *q_data;
1332
1333         q_data = get_q_data(ctx, vb->vb2_queue->type);
1334
1335         if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
1336                 v4l2_warn(&ctx->dev->v4l2_dev,
1337                           "%s data will not fit into plane (%lu < %lu)\n",
1338                           __func__, vb2_plane_size(vb, 0),
1339                           (long)q_data->sizeimage);
1340                 return -EINVAL;
1341         }
1342
1343         return 0;
1344 }
1345
1346 static void coda_buf_queue(struct vb2_buffer *vb)
1347 {
1348         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1349         struct coda_q_data *q_data;
1350
1351         q_data = get_q_data(ctx, vb->vb2_queue->type);
1352
1353         /*
1354          * In the decoder case, immediately try to copy the buffer into the
1355          * bitstream ringbuffer and mark it as ready to be dequeued.
1356          */
1357         if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
1358             vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1359                 /*
1360                  * For backwards compatiblity, queuing an empty buffer marks
1361                  * the stream end
1362                  */
1363                 if (vb2_get_plane_payload(vb, 0) == 0)
1364                         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1365                 mutex_lock(&ctx->bitstream_mutex);
1366                 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
1367                 coda_fill_bitstream(ctx);
1368                 mutex_unlock(&ctx->bitstream_mutex);
1369         } else {
1370                 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
1371         }
1372 }
1373
1374 static void coda_wait_prepare(struct vb2_queue *q)
1375 {
1376         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1377         coda_unlock(ctx);
1378 }
1379
1380 static void coda_wait_finish(struct vb2_queue *q)
1381 {
1382         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1383         coda_lock(ctx);
1384 }
1385
1386 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
1387 {
1388         struct coda_dev *dev = ctx->dev;
1389         u32 *p = ctx->parabuf.vaddr;
1390
1391         if (dev->devtype->product == CODA_DX6)
1392                 p[index] = value;
1393         else
1394                 p[index ^ 1] = value;
1395 }
1396
1397 static int coda_alloc_aux_buf(struct coda_dev *dev,
1398                               struct coda_aux_buf *buf, size_t size)
1399 {
1400         buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
1401                                         GFP_KERNEL);
1402         if (!buf->vaddr)
1403                 return -ENOMEM;
1404
1405         buf->size = size;
1406
1407         return 0;
1408 }
1409
1410 static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
1411                                          struct coda_aux_buf *buf, size_t size)
1412 {
1413         return coda_alloc_aux_buf(ctx->dev, buf, size);
1414 }
1415
1416 static void coda_free_aux_buf(struct coda_dev *dev,
1417                               struct coda_aux_buf *buf)
1418 {
1419         if (buf->vaddr) {
1420                 dma_free_coherent(&dev->plat_dev->dev, buf->size,
1421                                   buf->vaddr, buf->paddr);
1422                 buf->vaddr = NULL;
1423                 buf->size = 0;
1424         }
1425 }
1426
1427 static void coda_free_framebuffers(struct coda_ctx *ctx)
1428 {
1429         int i;
1430
1431         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
1432                 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
1433 }
1434
1435 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
1436 {
1437         struct coda_dev *dev = ctx->dev;
1438         int height = q_data->height;
1439         dma_addr_t paddr;
1440         int ysize;
1441         int ret;
1442         int i;
1443
1444         if (ctx->codec && ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
1445                 height = round_up(height, 16);
1446         ysize = round_up(q_data->width, 8) * height;
1447
1448         /* Allocate frame buffers */
1449         for (i = 0; i < ctx->num_internal_frames; i++) {
1450                 size_t size;
1451
1452                 size = q_data->sizeimage;
1453                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1454                     dev->devtype->product != CODA_DX6)
1455                         ctx->internal_frames[i].size += ysize/4;
1456                 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i], size);
1457                 if (ret < 0) {
1458                         coda_free_framebuffers(ctx);
1459                         return ret;
1460                 }
1461         }
1462
1463         /* Register frame buffers in the parameter buffer */
1464         for (i = 0; i < ctx->num_internal_frames; i++) {
1465                 paddr = ctx->internal_frames[i].paddr;
1466                 coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */
1467                 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
1468                 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
1469
1470                 /* mvcol buffer for h.264 */
1471                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1472                     dev->devtype->product != CODA_DX6)
1473                         coda_parabuf_write(ctx, 96 + i,
1474                                            ctx->internal_frames[i].paddr +
1475                                            ysize + ysize/4 + ysize/4);
1476         }
1477
1478         /* mvcol buffer for mpeg4 */
1479         if ((dev->devtype->product != CODA_DX6) &&
1480             (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
1481                 coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
1482                                             ysize + ysize/4 + ysize/4);
1483
1484         return 0;
1485 }
1486
1487 static int coda_h264_padding(int size, char *p)
1488 {
1489         int nal_size;
1490         int diff;
1491
1492         diff = size - (size & ~0x7);
1493         if (diff == 0)
1494                 return 0;
1495
1496         nal_size = coda_filler_size[diff];
1497         memcpy(p, coda_filler_nal, nal_size);
1498
1499         /* Add rbsp stop bit and trailing at the end */
1500         *(p + nal_size - 1) = 0x80;
1501
1502         return nal_size;
1503 }
1504
1505 static void coda_setup_iram(struct coda_ctx *ctx)
1506 {
1507         struct coda_iram_info *iram_info = &ctx->iram_info;
1508         struct coda_dev *dev = ctx->dev;
1509         int ipacdc_size;
1510         int bitram_size;
1511         int dbk_size;
1512         int ovl_size;
1513         int mb_width;
1514         int me_size;
1515         int size;
1516
1517         memset(iram_info, 0, sizeof(*iram_info));
1518         size = dev->iram_size;
1519
1520         if (dev->devtype->product == CODA_DX6)
1521                 return;
1522
1523         if (ctx->inst_type == CODA_INST_ENCODER) {
1524                 struct coda_q_data *q_data_src;
1525
1526                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1527                 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
1528
1529                 /* Prioritize in case IRAM is too small for everything */
1530                 me_size = round_up(round_up(q_data_src->width, 16) * 36 + 2048,
1531                                    1024);
1532                 iram_info->search_ram_size = me_size;
1533                 if (size >= iram_info->search_ram_size) {
1534                         if (dev->devtype->product == CODA_7541)
1535                                 iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE;
1536                         iram_info->search_ram_paddr = dev->iram_paddr;
1537                         size -= iram_info->search_ram_size;
1538                 } else {
1539                         pr_err("IRAM is smaller than the search ram size\n");
1540                         goto out;
1541                 }
1542
1543                 /* Only H.264BP and H.263P3 are considered */
1544                 dbk_size = round_up(128 * mb_width, 1024);
1545                 if (size >= dbk_size) {
1546                         iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
1547                         iram_info->buf_dbk_y_use = dev->iram_paddr +
1548                                                    iram_info->search_ram_size;
1549                         iram_info->buf_dbk_c_use = iram_info->buf_dbk_y_use +
1550                                                    dbk_size / 2;
1551                         size -= dbk_size;
1552                 } else {
1553                         goto out;
1554                 }
1555
1556                 bitram_size = round_up(128 * mb_width, 1024);
1557                 if (size >= bitram_size) {
1558                         iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
1559                         iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
1560                                                  dbk_size / 2;
1561                         size -= bitram_size;
1562                 } else {
1563                         goto out;
1564                 }
1565
1566                 ipacdc_size = round_up(128 * mb_width, 1024);
1567                 if (size >= ipacdc_size) {
1568                         iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
1569                         iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
1570                                                       bitram_size;
1571                         size -= ipacdc_size;
1572                 }
1573
1574                 /* OVL and BTP disabled for encoder */
1575         } else if (ctx->inst_type == CODA_INST_DECODER) {
1576                 struct coda_q_data *q_data_dst;
1577                 int mb_height;
1578
1579                 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1580                 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
1581                 mb_height = DIV_ROUND_UP(q_data_dst->height, 16);
1582
1583                 dbk_size = round_up(256 * mb_width, 1024);
1584                 if (size >= dbk_size) {
1585                         iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
1586                         iram_info->buf_dbk_y_use = dev->iram_paddr;
1587                         iram_info->buf_dbk_c_use = dev->iram_paddr +
1588                                                    dbk_size / 2;
1589                         size -= dbk_size;
1590                 } else {
1591                         goto out;
1592                 }
1593
1594                 bitram_size = round_up(128 * mb_width, 1024);
1595                 if (size >= bitram_size) {
1596                         iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
1597                         iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
1598                                                  dbk_size / 2;
1599                         size -= bitram_size;
1600                 } else {
1601                         goto out;
1602                 }
1603
1604                 ipacdc_size = round_up(128 * mb_width, 1024);
1605                 if (size >= ipacdc_size) {
1606                         iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
1607                         iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
1608                                                       bitram_size;
1609                         size -= ipacdc_size;
1610                 } else {
1611                         goto out;
1612                 }
1613
1614                 ovl_size = round_up(80 * mb_width, 1024);
1615         }
1616
1617 out:
1618         switch (dev->devtype->product) {
1619         case CODA_DX6:
1620                 break;
1621         case CODA_7541:
1622                 /* i.MX53 uses secondary AXI for IRAM access */
1623                 if (iram_info->axi_sram_use & CODA7_USE_HOST_BIT_ENABLE)
1624                         iram_info->axi_sram_use |= CODA7_USE_BIT_ENABLE;
1625                 if (iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE)
1626                         iram_info->axi_sram_use |= CODA7_USE_IP_ENABLE;
1627                 if (iram_info->axi_sram_use & CODA7_USE_HOST_DBK_ENABLE)
1628                         iram_info->axi_sram_use |= CODA7_USE_DBK_ENABLE;
1629                 if (iram_info->axi_sram_use & CODA7_USE_HOST_OVL_ENABLE)
1630                         iram_info->axi_sram_use |= CODA7_USE_OVL_ENABLE;
1631                 if (iram_info->axi_sram_use & CODA7_USE_HOST_ME_ENABLE)
1632                         iram_info->axi_sram_use |= CODA7_USE_ME_ENABLE;
1633         }
1634
1635         if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
1636                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1637                          "IRAM smaller than needed\n");
1638
1639         if (dev->devtype->product == CODA_7541) {
1640                 /* TODO - Enabling these causes picture errors on CODA7541 */
1641                 if (ctx->inst_type == CODA_INST_DECODER) {
1642                         /* fw 1.4.50 */
1643                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1644                                                      CODA7_USE_IP_ENABLE);
1645                 } else {
1646                         /* fw 13.4.29 */
1647                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1648                                                      CODA7_USE_HOST_DBK_ENABLE |
1649                                                      CODA7_USE_IP_ENABLE |
1650                                                      CODA7_USE_DBK_ENABLE);
1651                 }
1652         }
1653 }
1654
1655 static void coda_free_context_buffers(struct coda_ctx *ctx)
1656 {
1657         struct coda_dev *dev = ctx->dev;
1658
1659         coda_free_aux_buf(dev, &ctx->slicebuf);
1660         coda_free_aux_buf(dev, &ctx->psbuf);
1661         if (dev->devtype->product != CODA_DX6)
1662                 coda_free_aux_buf(dev, &ctx->workbuf);
1663 }
1664
1665 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
1666                                       struct coda_q_data *q_data)
1667 {
1668         struct coda_dev *dev = ctx->dev;
1669         size_t size;
1670         int ret;
1671
1672         switch (dev->devtype->product) {
1673         case CODA_7541:
1674                 size = CODA7_WORK_BUF_SIZE;
1675                 break;
1676         default:
1677                 return 0;
1678         }
1679
1680         if (ctx->psbuf.vaddr) {
1681                 v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n");
1682                 return -EBUSY;
1683         }
1684         if (ctx->slicebuf.vaddr) {
1685                 v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n");
1686                 return -EBUSY;
1687         }
1688         if (ctx->workbuf.vaddr) {
1689                 v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
1690                 ret = -EBUSY;
1691                 return -ENOMEM;
1692         }
1693
1694         if (q_data->fourcc == V4L2_PIX_FMT_H264) {
1695                 /* worst case slice size */
1696                 size = (DIV_ROUND_UP(q_data->width, 16) *
1697                         DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
1698                 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size);
1699                 if (ret < 0) {
1700                         v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer",
1701                                  ctx->slicebuf.size);
1702                         return ret;
1703                 }
1704         }
1705
1706         if (dev->devtype->product == CODA_7541) {
1707                 ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE);
1708                 if (ret < 0) {
1709                         v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer");
1710                         goto err;
1711                 }
1712         }
1713
1714         ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size);
1715         if (ret < 0) {
1716                 v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer",
1717                          ctx->workbuf.size);
1718                 goto err;
1719         }
1720
1721         return 0;
1722
1723 err:
1724         coda_free_context_buffers(ctx);
1725         return ret;
1726 }
1727
1728 static int coda_start_decoding(struct coda_ctx *ctx)
1729 {
1730         struct coda_q_data *q_data_src, *q_data_dst;
1731         u32 bitstream_buf, bitstream_size;
1732         struct coda_dev *dev = ctx->dev;
1733         int width, height;
1734         u32 src_fourcc;
1735         u32 val;
1736         int ret;
1737
1738         /* Start decoding */
1739         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1740         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1741         bitstream_buf = ctx->bitstream.paddr;
1742         bitstream_size = ctx->bitstream.size;
1743         src_fourcc = q_data_src->fourcc;
1744
1745         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1746
1747         /* Update coda bitstream read and write pointers from kfifo */
1748         coda_kfifo_sync_to_device_full(ctx);
1749
1750         ctx->display_idx = -1;
1751         ctx->frm_dis_flg = 0;
1752         coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1753
1754         coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
1755                         CODA_REG_BIT_BIT_STREAM_PARAM);
1756
1757         coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1758         coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1759         val = 0;
1760         if (dev->devtype->product == CODA_7541)
1761                 val |= CODA_REORDER_ENABLE;
1762         coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1763
1764         ctx->params.codec_mode = ctx->codec->mode;
1765         ctx->params.codec_mode_aux = 0;
1766         if (src_fourcc == V4L2_PIX_FMT_H264) {
1767                 if (dev->devtype->product == CODA_7541) {
1768                         coda_write(dev, ctx->psbuf.paddr,
1769                                         CODA_CMD_DEC_SEQ_PS_BB_START);
1770                         coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1771                                         CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1772                 }
1773         }
1774
1775         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1776                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1777                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1778                 return -ETIMEDOUT;
1779         }
1780
1781         /* Update kfifo out pointer from coda bitstream read pointer */
1782         coda_kfifo_sync_from_device(ctx);
1783
1784         coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1785
1786         if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1787                 v4l2_err(&dev->v4l2_dev,
1788                         "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1789                         coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1790                 return -EAGAIN;
1791         }
1792
1793         val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1794         if (dev->devtype->product == CODA_DX6) {
1795                 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1796                 height = val & CODADX6_PICHEIGHT_MASK;
1797         } else {
1798                 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1799                 height = val & CODA7_PICHEIGHT_MASK;
1800         }
1801
1802         if (width > q_data_dst->width || height > q_data_dst->height) {
1803                 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1804                          width, height, q_data_dst->width, q_data_dst->height);
1805                 return -EINVAL;
1806         }
1807
1808         width = round_up(width, 16);
1809         height = round_up(height, 16);
1810
1811         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1812                  __func__, ctx->idx, width, height);
1813
1814         ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED) + 1;
1815         if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1816                 v4l2_err(&dev->v4l2_dev,
1817                          "not enough framebuffers to decode (%d < %d)\n",
1818                          CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1819                 return -EINVAL;
1820         }
1821
1822         ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1823         if (ret < 0)
1824                 return ret;
1825
1826         /* Tell the decoder how many frame buffers we allocated. */
1827         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1828         coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1829
1830         if (dev->devtype->product != CODA_DX6) {
1831                 /* Set secondary AXI IRAM */
1832                 coda_setup_iram(ctx);
1833
1834                 coda_write(dev, ctx->iram_info.buf_bit_use,
1835                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1836                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1837                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1838                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1839                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1840                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1841                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1842                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1843                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1844         }
1845
1846         if (src_fourcc == V4L2_PIX_FMT_H264) {
1847                 coda_write(dev, ctx->slicebuf.paddr,
1848                                 CODA_CMD_SET_FRAME_SLICE_BB_START);
1849                 coda_write(dev, ctx->slicebuf.size / 1024,
1850                                 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
1851         }
1852
1853         if (dev->devtype->product == CODA_7541) {
1854                 int max_mb_x = 1920 / 16;
1855                 int max_mb_y = 1088 / 16;
1856                 int max_mb_num = max_mb_x * max_mb_y;
1857                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1858                                 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
1859         }
1860
1861         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1862                 v4l2_err(&ctx->dev->v4l2_dev,
1863                          "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1864                 return -ETIMEDOUT;
1865         }
1866
1867         return 0;
1868 }
1869
1870 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
1871                               int header_code, u8 *header, int *size)
1872 {
1873         struct coda_dev *dev = ctx->dev;
1874         int ret;
1875
1876         coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
1877                    CODA_CMD_ENC_HEADER_BB_START);
1878         coda_write(dev, vb2_plane_size(buf, 0), CODA_CMD_ENC_HEADER_BB_SIZE);
1879         coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
1880         ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
1881         if (ret < 0) {
1882                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1883                 return ret;
1884         }
1885         *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
1886                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1887         memcpy(header, vb2_plane_vaddr(buf, 0), *size);
1888
1889         return 0;
1890 }
1891
1892 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
1893 {
1894         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1895         struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
1896         u32 bitstream_buf, bitstream_size;
1897         struct coda_dev *dev = ctx->dev;
1898         struct coda_q_data *q_data_src, *q_data_dst;
1899         struct vb2_buffer *buf;
1900         u32 dst_fourcc;
1901         u32 value;
1902         int ret = 0;
1903
1904         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1905         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1906                 if (q_data_src->fourcc == V4L2_PIX_FMT_H264) {
1907                         if (coda_get_bitstream_payload(ctx) < 512)
1908                                 return -EINVAL;
1909                 } else {
1910                         if (count < 1)
1911                                 return -EINVAL;
1912                 }
1913
1914                 ctx->streamon_out = 1;
1915
1916                 if (coda_format_is_yuv(q_data_src->fourcc))
1917                         ctx->inst_type = CODA_INST_ENCODER;
1918                 else
1919                         ctx->inst_type = CODA_INST_DECODER;
1920         } else {
1921                 if (count < 1)
1922                         return -EINVAL;
1923
1924                 ctx->streamon_cap = 1;
1925         }
1926
1927         /* Don't start the coda unless both queues are on */
1928         if (!(ctx->streamon_out & ctx->streamon_cap))
1929                 return 0;
1930
1931         /* Allow device_run with no buffers queued and after streamoff */
1932         v4l2_m2m_set_src_buffered(ctx->m2m_ctx, true);
1933
1934         ctx->gopcounter = ctx->params.gop_size - 1;
1935         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1936         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
1937         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1938         bitstream_size = q_data_dst->sizeimage;
1939         dst_fourcc = q_data_dst->fourcc;
1940
1941         ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
1942                                      q_data_dst->fourcc);
1943         if (!ctx->codec) {
1944                 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
1945                 return -EINVAL;
1946         }
1947
1948         /* Allocate per-instance buffers */
1949         ret = coda_alloc_context_buffers(ctx, q_data_src);
1950         if (ret < 0)
1951                 return ret;
1952
1953         if (ctx->inst_type == CODA_INST_DECODER) {
1954                 mutex_lock(&dev->coda_mutex);
1955                 ret = coda_start_decoding(ctx);
1956                 mutex_unlock(&dev->coda_mutex);
1957                 if (ret == -EAGAIN) {
1958                         return 0;
1959                 } else if (ret < 0) {
1960                         return ret;
1961                 } else {
1962                         ctx->initialized = 1;
1963                         return 0;
1964                 }
1965         }
1966
1967         if (!coda_is_initialized(dev)) {
1968                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1969                 return -EFAULT;
1970         }
1971
1972         mutex_lock(&dev->coda_mutex);
1973
1974         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1975         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
1976         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1977         switch (dev->devtype->product) {
1978         case CODA_DX6:
1979                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1980                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1981                 break;
1982         default:
1983                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1984                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1985         }
1986
1987         if (dev->devtype->product == CODA_DX6) {
1988                 /* Configure the coda */
1989                 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1990         }
1991
1992         /* Could set rotation here if needed */
1993         switch (dev->devtype->product) {
1994         case CODA_DX6:
1995                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1996                 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1997                 break;
1998         default:
1999                 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
2000                 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2001         }
2002         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
2003         coda_write(dev, ctx->params.framerate,
2004                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
2005
2006         ctx->params.codec_mode = ctx->codec->mode;
2007         switch (dst_fourcc) {
2008         case V4L2_PIX_FMT_MPEG4:
2009                 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
2010                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
2011                 break;
2012         case V4L2_PIX_FMT_H264:
2013                 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
2014                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
2015                 break;
2016         default:
2017                 v4l2_err(v4l2_dev,
2018                          "dst format (0x%08x) invalid.\n", dst_fourcc);
2019                 ret = -EINVAL;
2020                 goto out;
2021         }
2022
2023         switch (ctx->params.slice_mode) {
2024         case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
2025                 value = 0;
2026                 break;
2027         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
2028                 value  = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2029                 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2030                 value |=  1 & CODA_SLICING_MODE_MASK;
2031                 break;
2032         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
2033                 value  = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2034                 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2035                 value |=  1 & CODA_SLICING_MODE_MASK;
2036                 break;
2037         }
2038         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
2039         value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
2040         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
2041
2042         if (ctx->params.bitrate) {
2043                 /* Rate control enabled */
2044                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
2045                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
2046         } else {
2047                 value = 0;
2048         }
2049         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
2050
2051         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
2052         coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
2053
2054         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
2055         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
2056
2057         /* set default gamma */
2058         value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
2059         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
2060
2061         if (CODA_DEFAULT_GAMMA > 0) {
2062                 if (dev->devtype->product == CODA_DX6)
2063                         value  = 1 << CODADX6_OPTION_GAMMA_OFFSET;
2064                 else
2065                         value  = 1 << CODA7_OPTION_GAMMA_OFFSET;
2066         } else {
2067                 value = 0;
2068         }
2069         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
2070
2071         coda_setup_iram(ctx);
2072
2073         if (dst_fourcc == V4L2_PIX_FMT_H264) {
2074                 value  = (FMO_SLICE_SAVE_BUF_SIZE << 7);
2075                 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
2076                 value |=  0 & CODA_FMOPARAM_SLICENUM_MASK;
2077                 if (dev->devtype->product == CODA_DX6) {
2078                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
2079                 } else {
2080                         coda_write(dev, ctx->iram_info.search_ram_paddr,
2081                                         CODA7_CMD_ENC_SEQ_SEARCH_BASE);
2082                         coda_write(dev, ctx->iram_info.search_ram_size,
2083                                         CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
2084                 }
2085         }
2086
2087         ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
2088         if (ret < 0) {
2089                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
2090                 goto out;
2091         }
2092
2093         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
2094                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
2095                 ret = -EFAULT;
2096                 goto out;
2097         }
2098
2099         ctx->num_internal_frames = 2;
2100         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
2101         if (ret < 0) {
2102                 v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
2103                 goto out;
2104         }
2105
2106         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
2107         coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
2108         if (dev->devtype->product == CODA_7541)
2109                 coda_write(dev, round_up(q_data_src->width, 8),
2110                                 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
2111         if (dev->devtype->product != CODA_DX6) {
2112                 coda_write(dev, ctx->iram_info.buf_bit_use,
2113                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
2114                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
2115                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
2116                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
2117                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
2118                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
2119                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
2120                 coda_write(dev, ctx->iram_info.buf_ovl_use,
2121                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
2122         }
2123         ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
2124         if (ret < 0) {
2125                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2126                 goto out;
2127         }
2128
2129         /* Save stream headers */
2130         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
2131         switch (dst_fourcc) {
2132         case V4L2_PIX_FMT_H264:
2133                 /*
2134                  * Get SPS in the first frame and copy it to an
2135                  * intermediate buffer.
2136                  */
2137                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
2138                                          &ctx->vpu_header[0][0],
2139                                          &ctx->vpu_header_size[0]);
2140                 if (ret < 0)
2141                         goto out;
2142
2143                 /*
2144                  * Get PPS in the first frame and copy it to an
2145                  * intermediate buffer.
2146                  */
2147                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
2148                                          &ctx->vpu_header[1][0],
2149                                          &ctx->vpu_header_size[1]);
2150                 if (ret < 0)
2151                         goto out;
2152
2153                 /*
2154                  * Length of H.264 headers is variable and thus it might not be
2155                  * aligned for the coda to append the encoded frame. In that is
2156                  * the case a filler NAL must be added to header 2.
2157                  */
2158                 ctx->vpu_header_size[2] = coda_h264_padding(
2159                                         (ctx->vpu_header_size[0] +
2160                                          ctx->vpu_header_size[1]),
2161                                          ctx->vpu_header[2]);
2162                 break;
2163         case V4L2_PIX_FMT_MPEG4:
2164                 /*
2165                  * Get VOS in the first frame and copy it to an
2166                  * intermediate buffer
2167                  */
2168                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
2169                                          &ctx->vpu_header[0][0],
2170                                          &ctx->vpu_header_size[0]);
2171                 if (ret < 0)
2172                         goto out;
2173
2174                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
2175                                          &ctx->vpu_header[1][0],
2176                                          &ctx->vpu_header_size[1]);
2177                 if (ret < 0)
2178                         goto out;
2179
2180                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
2181                                          &ctx->vpu_header[2][0],
2182                                          &ctx->vpu_header_size[2]);
2183                 if (ret < 0)
2184                         goto out;
2185                 break;
2186         default:
2187                 /* No more formats need to save headers at the moment */
2188                 break;
2189         }
2190
2191 out:
2192         mutex_unlock(&dev->coda_mutex);
2193         return ret;
2194 }
2195
2196 static int coda_stop_streaming(struct vb2_queue *q)
2197 {
2198         struct coda_ctx *ctx = vb2_get_drv_priv(q);
2199         struct coda_dev *dev = ctx->dev;
2200
2201         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
2202                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2203                          "%s: output\n", __func__);
2204                 ctx->streamon_out = 0;
2205
2206                 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
2207
2208                 ctx->isequence = 0;
2209         } else {
2210                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2211                          "%s: capture\n", __func__);
2212                 ctx->streamon_cap = 0;
2213
2214                 ctx->osequence = 0;
2215         }
2216
2217         if (!ctx->streamon_out && !ctx->streamon_cap) {
2218                 kfifo_init(&ctx->bitstream_fifo,
2219                         ctx->bitstream.vaddr, ctx->bitstream.size);
2220                 ctx->runcounter = 0;
2221         }
2222
2223         return 0;
2224 }
2225
2226 static struct vb2_ops coda_qops = {
2227         .queue_setup            = coda_queue_setup,
2228         .buf_prepare            = coda_buf_prepare,
2229         .buf_queue              = coda_buf_queue,
2230         .wait_prepare           = coda_wait_prepare,
2231         .wait_finish            = coda_wait_finish,
2232         .start_streaming        = coda_start_streaming,
2233         .stop_streaming         = coda_stop_streaming,
2234 };
2235
2236 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
2237 {
2238         struct coda_ctx *ctx =
2239                         container_of(ctrl->handler, struct coda_ctx, ctrls);
2240
2241         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2242                  "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
2243
2244         switch (ctrl->id) {
2245         case V4L2_CID_HFLIP:
2246                 if (ctrl->val)
2247                         ctx->params.rot_mode |= CODA_MIR_HOR;
2248                 else
2249                         ctx->params.rot_mode &= ~CODA_MIR_HOR;
2250                 break;
2251         case V4L2_CID_VFLIP:
2252                 if (ctrl->val)
2253                         ctx->params.rot_mode |= CODA_MIR_VER;
2254                 else
2255                         ctx->params.rot_mode &= ~CODA_MIR_VER;
2256                 break;
2257         case V4L2_CID_MPEG_VIDEO_BITRATE:
2258                 ctx->params.bitrate = ctrl->val / 1000;
2259                 break;
2260         case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
2261                 ctx->params.gop_size = ctrl->val;
2262                 break;
2263         case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
2264                 ctx->params.h264_intra_qp = ctrl->val;
2265                 break;
2266         case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
2267                 ctx->params.h264_inter_qp = ctrl->val;
2268                 break;
2269         case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
2270                 ctx->params.mpeg4_intra_qp = ctrl->val;
2271                 break;
2272         case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
2273                 ctx->params.mpeg4_inter_qp = ctrl->val;
2274                 break;
2275         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
2276                 ctx->params.slice_mode = ctrl->val;
2277                 break;
2278         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
2279                 ctx->params.slice_max_mb = ctrl->val;
2280                 break;
2281         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
2282                 ctx->params.slice_max_bits = ctrl->val * 8;
2283                 break;
2284         case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
2285                 break;
2286         default:
2287                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2288                         "Invalid control, id=%d, val=%d\n",
2289                         ctrl->id, ctrl->val);
2290                 return -EINVAL;
2291         }
2292
2293         return 0;
2294 }
2295
2296 static struct v4l2_ctrl_ops coda_ctrl_ops = {
2297         .s_ctrl = coda_s_ctrl,
2298 };
2299
2300 static int coda_ctrls_setup(struct coda_ctx *ctx)
2301 {
2302         v4l2_ctrl_handler_init(&ctx->ctrls, 9);
2303
2304         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2305                 V4L2_CID_HFLIP, 0, 1, 1, 0);
2306         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2307                 V4L2_CID_VFLIP, 0, 1, 1, 0);
2308         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2309                 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
2310         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2311                 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
2312         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2313                 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
2314         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2315                 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
2316         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2317                 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
2318         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2319                 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
2320         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2321                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
2322                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
2323                 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
2324         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2325                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
2326         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2327                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
2328         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2329                 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
2330                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
2331                 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
2332                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
2333
2334         if (ctx->ctrls.error) {
2335                 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
2336                         ctx->ctrls.error);
2337                 return -EINVAL;
2338         }
2339
2340         return v4l2_ctrl_handler_setup(&ctx->ctrls);
2341 }
2342
2343 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
2344                       struct vb2_queue *dst_vq)
2345 {
2346         struct coda_ctx *ctx = priv;
2347         int ret;
2348
2349         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2350         src_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
2351         src_vq->drv_priv = ctx;
2352         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2353         src_vq->ops = &coda_qops;
2354         src_vq->mem_ops = &vb2_dma_contig_memops;
2355         src_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2356
2357         ret = vb2_queue_init(src_vq);
2358         if (ret)
2359                 return ret;
2360
2361         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2362         dst_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
2363         dst_vq->drv_priv = ctx;
2364         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2365         dst_vq->ops = &coda_qops;
2366         dst_vq->mem_ops = &vb2_dma_contig_memops;
2367         dst_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2368
2369         return vb2_queue_init(dst_vq);
2370 }
2371
2372 static int coda_next_free_instance(struct coda_dev *dev)
2373 {
2374         return ffz(dev->instance_mask);
2375 }
2376
2377 static int coda_open(struct file *file)
2378 {
2379         struct coda_dev *dev = video_drvdata(file);
2380         struct coda_ctx *ctx = NULL;
2381         int ret;
2382         int idx;
2383
2384         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
2385         if (!ctx)
2386                 return -ENOMEM;
2387
2388         idx = coda_next_free_instance(dev);
2389         if (idx >= CODA_MAX_INSTANCES) {
2390                 ret = -EBUSY;
2391                 goto err_coda_max;
2392         }
2393         set_bit(idx, &dev->instance_mask);
2394
2395         INIT_WORK(&ctx->skip_run, coda_skip_run);
2396         v4l2_fh_init(&ctx->fh, video_devdata(file));
2397         file->private_data = &ctx->fh;
2398         v4l2_fh_add(&ctx->fh);
2399         ctx->dev = dev;
2400         ctx->idx = idx;
2401         switch (dev->devtype->product) {
2402         case CODA_7541:
2403                 ctx->reg_idx = 0;
2404                 break;
2405         default:
2406                 ctx->reg_idx = idx;
2407         }
2408
2409         ret = clk_prepare_enable(dev->clk_per);
2410         if (ret)
2411                 goto err_clk_per;
2412
2413         ret = clk_prepare_enable(dev->clk_ahb);
2414         if (ret)
2415                 goto err_clk_ahb;
2416
2417         set_default_params(ctx);
2418         ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
2419                                          &coda_queue_init);
2420         if (IS_ERR(ctx->m2m_ctx)) {
2421                 ret = PTR_ERR(ctx->m2m_ctx);
2422
2423                 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
2424                          __func__, ret);
2425                 goto err_ctx_init;
2426         }
2427         ret = coda_ctrls_setup(ctx);
2428         if (ret) {
2429                 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
2430                 goto err_ctrls_setup;
2431         }
2432
2433         ctx->fh.ctrl_handler = &ctx->ctrls;
2434
2435         ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE);
2436         if (ret < 0) {
2437                 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
2438                 goto err_dma_alloc;
2439         }
2440
2441         ctx->bitstream.size = CODA_MAX_FRAME_SIZE;
2442         ctx->bitstream.vaddr = dma_alloc_writecombine(&dev->plat_dev->dev,
2443                         ctx->bitstream.size, &ctx->bitstream.paddr, GFP_KERNEL);
2444         if (!ctx->bitstream.vaddr) {
2445                 v4l2_err(&dev->v4l2_dev, "failed to allocate bitstream ringbuffer");
2446                 ret = -ENOMEM;
2447                 goto err_dma_writecombine;
2448         }
2449         kfifo_init(&ctx->bitstream_fifo,
2450                 ctx->bitstream.vaddr, ctx->bitstream.size);
2451         mutex_init(&ctx->bitstream_mutex);
2452         mutex_init(&ctx->buffer_mutex);
2453
2454         coda_lock(ctx);
2455         list_add(&ctx->list, &dev->instances);
2456         coda_unlock(ctx);
2457
2458         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
2459                  ctx->idx, ctx);
2460
2461         return 0;
2462
2463 err_dma_writecombine:
2464         coda_free_context_buffers(ctx);
2465         if (ctx->dev->devtype->product == CODA_DX6)
2466                 coda_free_aux_buf(dev, &ctx->workbuf);
2467         coda_free_aux_buf(dev, &ctx->parabuf);
2468 err_dma_alloc:
2469         v4l2_ctrl_handler_free(&ctx->ctrls);
2470 err_ctrls_setup:
2471         v4l2_m2m_ctx_release(ctx->m2m_ctx);
2472 err_ctx_init:
2473         clk_disable_unprepare(dev->clk_ahb);
2474 err_clk_ahb:
2475         clk_disable_unprepare(dev->clk_per);
2476 err_clk_per:
2477         v4l2_fh_del(&ctx->fh);
2478         v4l2_fh_exit(&ctx->fh);
2479         clear_bit(ctx->idx, &dev->instance_mask);
2480 err_coda_max:
2481         kfree(ctx);
2482         return ret;
2483 }
2484
2485 static int coda_release(struct file *file)
2486 {
2487         struct coda_dev *dev = video_drvdata(file);
2488         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2489
2490         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
2491                  ctx);
2492
2493         /* If this instance is running, call .job_abort and wait for it to end */
2494         v4l2_m2m_ctx_release(ctx->m2m_ctx);
2495
2496         /* In case the instance was not running, we still need to call SEQ_END */
2497         mutex_lock(&dev->coda_mutex);
2498         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2499                  "%s: sent command 'SEQ_END' to coda\n", __func__);
2500         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
2501                 v4l2_err(&dev->v4l2_dev,
2502                          "CODA_COMMAND_SEQ_END failed\n");
2503                 mutex_unlock(&dev->coda_mutex);
2504                 return -ETIMEDOUT;
2505         }
2506         mutex_unlock(&dev->coda_mutex);
2507
2508         coda_free_framebuffers(ctx);
2509
2510         coda_lock(ctx);
2511         list_del(&ctx->list);
2512         coda_unlock(ctx);
2513
2514         dma_free_writecombine(&dev->plat_dev->dev, ctx->bitstream.size,
2515                 ctx->bitstream.vaddr, ctx->bitstream.paddr);
2516         coda_free_context_buffers(ctx);
2517         if (ctx->dev->devtype->product == CODA_DX6)
2518                 coda_free_aux_buf(dev, &ctx->workbuf);
2519
2520         coda_free_aux_buf(dev, &ctx->parabuf);
2521         v4l2_ctrl_handler_free(&ctx->ctrls);
2522         clk_disable_unprepare(dev->clk_ahb);
2523         clk_disable_unprepare(dev->clk_per);
2524         v4l2_fh_del(&ctx->fh);
2525         v4l2_fh_exit(&ctx->fh);
2526         clear_bit(ctx->idx, &dev->instance_mask);
2527         kfree(ctx);
2528
2529         return 0;
2530 }
2531
2532 static unsigned int coda_poll(struct file *file,
2533                                  struct poll_table_struct *wait)
2534 {
2535         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2536         int ret;
2537
2538         coda_lock(ctx);
2539         ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
2540         coda_unlock(ctx);
2541         return ret;
2542 }
2543
2544 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
2545 {
2546         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2547
2548         return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
2549 }
2550
2551 static const struct v4l2_file_operations coda_fops = {
2552         .owner          = THIS_MODULE,
2553         .open           = coda_open,
2554         .release        = coda_release,
2555         .poll           = coda_poll,
2556         .unlocked_ioctl = video_ioctl2,
2557         .mmap           = coda_mmap,
2558 };
2559
2560 static void coda_finish_decode(struct coda_ctx *ctx)
2561 {
2562         struct coda_dev *dev = ctx->dev;
2563         struct coda_q_data *q_data_src;
2564         struct coda_q_data *q_data_dst;
2565         struct vb2_buffer *dst_buf;
2566         int width, height;
2567         int decoded_idx;
2568         int display_idx;
2569         u32 src_fourcc;
2570         int success;
2571         u32 val;
2572
2573         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
2574
2575         /* Update kfifo out pointer from coda bitstream read pointer */
2576         coda_kfifo_sync_from_device(ctx);
2577
2578         /*
2579          * in stream-end mode, the read pointer can overshoot the write pointer
2580          * by up to 512 bytes
2581          */
2582         if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
2583                 if (coda_get_bitstream_payload(ctx) >= 0x100000 - 512)
2584                         kfifo_init(&ctx->bitstream_fifo,
2585                                 ctx->bitstream.vaddr, ctx->bitstream.size);
2586         }
2587
2588         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2589         src_fourcc = q_data_src->fourcc;
2590
2591         val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
2592         if (val != 1)
2593                 pr_err("DEC_PIC_SUCCESS = %d\n", val);
2594
2595         success = val & 0x1;
2596         if (!success)
2597                 v4l2_err(&dev->v4l2_dev, "decode failed\n");
2598
2599         if (src_fourcc == V4L2_PIX_FMT_H264) {
2600                 if (val & (1 << 3))
2601                         v4l2_err(&dev->v4l2_dev,
2602                                  "insufficient PS buffer space (%d bytes)\n",
2603                                  ctx->psbuf.size);
2604                 if (val & (1 << 2))
2605                         v4l2_err(&dev->v4l2_dev,
2606                                  "insufficient slice buffer space (%d bytes)\n",
2607                                  ctx->slicebuf.size);
2608         }
2609
2610         val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
2611         width = (val >> 16) & 0xffff;
2612         height = val & 0xffff;
2613
2614         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2615
2616         val = coda_read(dev, CODA_RET_DEC_PIC_TYPE);
2617         if ((val & 0x7) == 0) {
2618                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
2619                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
2620         } else {
2621                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
2622                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
2623         }
2624
2625         val = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
2626         if (val > 0)
2627                 v4l2_err(&dev->v4l2_dev,
2628                          "errors in %d macroblocks\n", val);
2629
2630         if (dev->devtype->product == CODA_7541) {
2631                 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
2632                 if (val == 0) {
2633                         /* not enough bitstream data */
2634                         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2635                                  "prescan failed: %d\n", val);
2636                         ctx->prescan_failed = true;
2637                         return;
2638                 }
2639         }
2640
2641         ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2642
2643         /*
2644          * The previous display frame was copied out by the rotator,
2645          * now it can be overwritten again
2646          */
2647         if (ctx->display_idx >= 0 &&
2648             ctx->display_idx < ctx->num_internal_frames) {
2649                 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
2650                 coda_write(dev, ctx->frm_dis_flg,
2651                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2652         }
2653
2654         /*
2655          * The index of the last decoded frame, not necessarily in
2656          * display order, and the index of the next display frame.
2657          * The latter could have been decoded in a previous run.
2658          */
2659         decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
2660         display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
2661
2662         if (decoded_idx == -1) {
2663                 /* no frame was decoded, but we might have a display frame */
2664                 if (display_idx < 0 && ctx->display_idx < 0)
2665                         ctx->prescan_failed = true;
2666         } else if (decoded_idx == -2) {
2667                 /* no frame was decoded, we still return the remaining buffers */
2668         } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
2669                 v4l2_err(&dev->v4l2_dev,
2670                          "decoded frame index out of range: %d\n", decoded_idx);
2671         }
2672
2673         if (display_idx == -1) {
2674                 /*
2675                  * no more frames to be decoded, but there could still
2676                  * be rotator output to dequeue
2677                  */
2678                 ctx->prescan_failed = true;
2679         } else if (display_idx == -3) {
2680                 /* possibly prescan failure */
2681         } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
2682                 v4l2_err(&dev->v4l2_dev,
2683                          "presentation frame index out of range: %d\n",
2684                          display_idx);
2685         }
2686
2687         /* If a frame was copied out, return it */
2688         if (ctx->display_idx >= 0 &&
2689             ctx->display_idx < ctx->num_internal_frames) {
2690                 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
2691                 dst_buf->v4l2_buf.sequence = ctx->osequence++;
2692
2693                 vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2);
2694
2695                 v4l2_m2m_buf_done(dst_buf, success ? VB2_BUF_STATE_DONE :
2696                                                      VB2_BUF_STATE_ERROR);
2697
2698                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2699                         "job finished: decoding frame (%d) (%s)\n",
2700                         dst_buf->v4l2_buf.sequence,
2701                         (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
2702                         "KEYFRAME" : "PFRAME");
2703         } else {
2704                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2705                         "job finished: no frame decoded\n");
2706         }
2707
2708         /* The rotator will copy the current display frame next time */
2709         ctx->display_idx = display_idx;
2710 }
2711
2712 static void coda_finish_encode(struct coda_ctx *ctx)
2713 {
2714         struct vb2_buffer *src_buf, *dst_buf;
2715         struct coda_dev *dev = ctx->dev;
2716         u32 wr_ptr, start_ptr;
2717
2718         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
2719         dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
2720
2721         /* Get results from the coda */
2722         coda_read(dev, CODA_RET_ENC_PIC_TYPE);
2723         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
2724         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
2725
2726         /* Calculate bytesused field */
2727         if (dst_buf->v4l2_buf.sequence == 0) {
2728                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
2729                                         ctx->vpu_header_size[0] +
2730                                         ctx->vpu_header_size[1] +
2731                                         ctx->vpu_header_size[2]);
2732         } else {
2733                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
2734         }
2735
2736         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
2737                  wr_ptr - start_ptr);
2738
2739         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
2740         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
2741
2742         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
2743                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
2744                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
2745         } else {
2746                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
2747                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
2748         }
2749
2750         dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
2751         dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
2752
2753         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
2754         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
2755
2756         ctx->gopcounter--;
2757         if (ctx->gopcounter < 0)
2758                 ctx->gopcounter = ctx->params.gop_size - 1;
2759
2760         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2761                 "job finished: encoding frame (%d) (%s)\n",
2762                 dst_buf->v4l2_buf.sequence,
2763                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
2764                 "KEYFRAME" : "PFRAME");
2765 }
2766
2767 static irqreturn_t coda_irq_handler(int irq, void *data)
2768 {
2769         struct coda_dev *dev = data;
2770         struct coda_ctx *ctx;
2771
2772         cancel_delayed_work(&dev->timeout);
2773
2774         /* read status register to attend the IRQ */
2775         coda_read(dev, CODA_REG_BIT_INT_STATUS);
2776         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
2777                       CODA_REG_BIT_INT_CLEAR);
2778
2779         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2780         if (ctx == NULL) {
2781                 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
2782                 mutex_unlock(&dev->coda_mutex);
2783                 return IRQ_HANDLED;
2784         }
2785
2786         if (ctx->aborting) {
2787                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2788                          "task has been aborted\n");
2789                 goto out;
2790         }
2791
2792         if (coda_isbusy(ctx->dev)) {
2793                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2794                          "coda is still busy!!!!\n");
2795                 return IRQ_NONE;
2796         }
2797
2798         if (ctx->inst_type == CODA_INST_DECODER)
2799                 coda_finish_decode(ctx);
2800         else
2801                 coda_finish_encode(ctx);
2802
2803 out:
2804         if (ctx->aborting || (!ctx->streamon_cap && !ctx->streamon_out)) {
2805                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2806                          "%s: sent command 'SEQ_END' to coda\n", __func__);
2807                 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
2808                         v4l2_err(&dev->v4l2_dev,
2809                                  "CODA_COMMAND_SEQ_END failed\n");
2810                 }
2811
2812                 kfifo_init(&ctx->bitstream_fifo,
2813                         ctx->bitstream.vaddr, ctx->bitstream.size);
2814
2815                 coda_free_framebuffers(ctx);
2816                 coda_free_context_buffers(ctx);
2817         }
2818
2819         mutex_unlock(&dev->coda_mutex);
2820         mutex_unlock(&ctx->buffer_mutex);
2821
2822         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
2823
2824         return IRQ_HANDLED;
2825 }
2826
2827 static void coda_timeout(struct work_struct *work)
2828 {
2829         struct coda_ctx *ctx;
2830         struct coda_dev *dev = container_of(to_delayed_work(work),
2831                                             struct coda_dev, timeout);
2832
2833         dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout, stopping all streams\n");
2834
2835         mutex_lock(&dev->dev_mutex);
2836         list_for_each_entry(ctx, &dev->instances, list) {
2837                 if (mutex_is_locked(&ctx->buffer_mutex))
2838                         mutex_unlock(&ctx->buffer_mutex);
2839                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2840                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2841         }
2842         mutex_unlock(&dev->dev_mutex);
2843
2844         mutex_unlock(&dev->coda_mutex);
2845         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2846         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
2847 }
2848
2849 static u32 coda_supported_firmwares[] = {
2850         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
2851         CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
2852 };
2853
2854 static bool coda_firmware_supported(u32 vernum)
2855 {
2856         int i;
2857
2858         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
2859                 if (vernum == coda_supported_firmwares[i])
2860                         return true;
2861         return false;
2862 }
2863
2864 static char *coda_product_name(int product)
2865 {
2866         static char buf[9];
2867
2868         switch (product) {
2869         case CODA_DX6:
2870                 return "CodaDx6";
2871         case CODA_7541:
2872                 return "CODA7541";
2873         default:
2874                 snprintf(buf, sizeof(buf), "(0x%04x)", product);
2875                 return buf;
2876         }
2877 }
2878
2879 static int coda_hw_init(struct coda_dev *dev)
2880 {
2881         u16 product, major, minor, release;
2882         u32 data;
2883         u16 *p;
2884         int i, ret;
2885
2886         ret = clk_prepare_enable(dev->clk_per);
2887         if (ret)
2888                 return ret;
2889
2890         ret = clk_prepare_enable(dev->clk_ahb);
2891         if (ret)
2892                 goto err_clk_ahb;
2893
2894         /*
2895          * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
2896          * The 16-bit chars in the code buffer are in memory access
2897          * order, re-sort them to CODA order for register download.
2898          * Data in this SRAM survives a reboot.
2899          */
2900         p = (u16 *)dev->codebuf.vaddr;
2901         if (dev->devtype->product == CODA_DX6) {
2902                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++)  {
2903                         data = CODA_DOWN_ADDRESS_SET(i) |
2904                                 CODA_DOWN_DATA_SET(p[i ^ 1]);
2905                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
2906                 }
2907         } else {
2908                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
2909                         data = CODA_DOWN_ADDRESS_SET(i) |
2910                                 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
2911                                                         3 - (i % 4)]);
2912                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
2913                 }
2914         }
2915
2916         /* Clear registers */
2917         for (i = 0; i < 64; i++)
2918                 coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
2919
2920         /* Tell the BIT where to find everything it needs */
2921         if (dev->devtype->product == CODA_7541) {
2922                 coda_write(dev, dev->tempbuf.paddr,
2923                                 CODA_REG_BIT_TEMP_BUF_ADDR);
2924                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
2925         } else {
2926                 coda_write(dev, dev->workbuf.paddr,
2927                               CODA_REG_BIT_WORK_BUF_ADDR);
2928         }
2929         coda_write(dev, dev->codebuf.paddr,
2930                       CODA_REG_BIT_CODE_BUF_ADDR);
2931         coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
2932
2933         /* Set default values */
2934         switch (dev->devtype->product) {
2935         case CODA_DX6:
2936                 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
2937                 break;
2938         default:
2939                 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
2940         }
2941         coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
2942
2943         if (dev->devtype->product != CODA_DX6)
2944                 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
2945
2946         coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
2947                       CODA_REG_BIT_INT_ENABLE);
2948
2949         /* Reset VPU and start processor */
2950         data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
2951         data |= CODA_REG_RESET_ENABLE;
2952         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
2953         udelay(10);
2954         data &= ~CODA_REG_RESET_ENABLE;
2955         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
2956         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
2957
2958         /* Load firmware */
2959         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
2960         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
2961         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
2962         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
2963         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
2964         if (coda_wait_timeout(dev)) {
2965                 clk_disable_unprepare(dev->clk_per);
2966                 clk_disable_unprepare(dev->clk_ahb);
2967                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
2968                 return -EIO;
2969         }
2970
2971         /* Check we are compatible with the loaded firmware */
2972         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
2973         product = CODA_FIRMWARE_PRODUCT(data);
2974         major = CODA_FIRMWARE_MAJOR(data);
2975         minor = CODA_FIRMWARE_MINOR(data);
2976         release = CODA_FIRMWARE_RELEASE(data);
2977
2978         clk_disable_unprepare(dev->clk_per);
2979         clk_disable_unprepare(dev->clk_ahb);
2980
2981         if (product != dev->devtype->product) {
2982                 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
2983                          " Version: %u.%u.%u\n",
2984                          coda_product_name(dev->devtype->product),
2985                          coda_product_name(product), major, minor, release);
2986                 return -EINVAL;
2987         }
2988
2989         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
2990                   coda_product_name(product));
2991
2992         if (coda_firmware_supported(data)) {
2993                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
2994                           major, minor, release);
2995         } else {
2996                 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
2997                           "%u.%u.%u\n", major, minor, release);
2998         }
2999
3000         return 0;
3001
3002 err_clk_ahb:
3003         clk_disable_unprepare(dev->clk_per);
3004         return ret;
3005 }
3006
3007 static void coda_fw_callback(const struct firmware *fw, void *context)
3008 {
3009         struct coda_dev *dev = context;
3010         struct platform_device *pdev = dev->plat_dev;
3011         int ret;
3012
3013         if (!fw) {
3014                 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
3015                 return;
3016         }
3017
3018         /* allocate auxiliary per-device code buffer for the BIT processor */
3019         ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size);
3020         if (ret < 0) {
3021                 dev_err(&pdev->dev, "failed to allocate code buffer\n");
3022                 return;
3023         }
3024
3025         /* Copy the whole firmware image to the code buffer */
3026         memcpy(dev->codebuf.vaddr, fw->data, fw->size);
3027         release_firmware(fw);
3028
3029         ret = coda_hw_init(dev);
3030         if (ret) {
3031                 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
3032                 return;
3033         }
3034
3035         dev->vfd.fops   = &coda_fops,
3036         dev->vfd.ioctl_ops      = &coda_ioctl_ops;
3037         dev->vfd.release        = video_device_release_empty,
3038         dev->vfd.lock   = &dev->dev_mutex;
3039         dev->vfd.v4l2_dev       = &dev->v4l2_dev;
3040         dev->vfd.vfl_dir        = VFL_DIR_M2M;
3041         snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
3042         video_set_drvdata(&dev->vfd, dev);
3043
3044         dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
3045         if (IS_ERR(dev->alloc_ctx)) {
3046                 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
3047                 return;
3048         }
3049
3050         dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
3051         if (IS_ERR(dev->m2m_dev)) {
3052                 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
3053                 goto rel_ctx;
3054         }
3055
3056         ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
3057         if (ret) {
3058                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
3059                 goto rel_m2m;
3060         }
3061         v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
3062                   dev->vfd.num);
3063
3064         return;
3065
3066 rel_m2m:
3067         v4l2_m2m_release(dev->m2m_dev);
3068 rel_ctx:
3069         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3070 }
3071
3072 static int coda_firmware_request(struct coda_dev *dev)
3073 {
3074         char *fw = dev->devtype->firmware;
3075
3076         dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
3077                 coda_product_name(dev->devtype->product));
3078
3079         return request_firmware_nowait(THIS_MODULE, true,
3080                 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
3081 }
3082
3083 enum coda_platform {
3084         CODA_IMX27,
3085         CODA_IMX53,
3086 };
3087
3088 static const struct coda_devtype coda_devdata[] = {
3089         [CODA_IMX27] = {
3090                 .firmware   = "v4l-codadx6-imx27.bin",
3091                 .product    = CODA_DX6,
3092                 .codecs     = codadx6_codecs,
3093                 .num_codecs = ARRAY_SIZE(codadx6_codecs),
3094         },
3095         [CODA_IMX53] = {
3096                 .firmware   = "v4l-coda7541-imx53.bin",
3097                 .product    = CODA_7541,
3098                 .codecs     = coda7_codecs,
3099                 .num_codecs = ARRAY_SIZE(coda7_codecs),
3100         },
3101 };
3102
3103 static struct platform_device_id coda_platform_ids[] = {
3104         { .name = "coda-imx27", .driver_data = CODA_IMX27 },
3105         { .name = "coda-imx53", .driver_data = CODA_IMX53 },
3106         { /* sentinel */ }
3107 };
3108 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
3109
3110 #ifdef CONFIG_OF
3111 static const struct of_device_id coda_dt_ids[] = {
3112         { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
3113         { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
3114         { /* sentinel */ }
3115 };
3116 MODULE_DEVICE_TABLE(of, coda_dt_ids);
3117 #endif
3118
3119 static int coda_probe(struct platform_device *pdev)
3120 {
3121         const struct of_device_id *of_id =
3122                         of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
3123         const struct platform_device_id *pdev_id;
3124         struct coda_platform_data *pdata = pdev->dev.platform_data;
3125         struct device_node *np = pdev->dev.of_node;
3126         struct gen_pool *pool;
3127         struct coda_dev *dev;
3128         struct resource *res;
3129         int ret, irq;
3130
3131         dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
3132         if (!dev) {
3133                 dev_err(&pdev->dev, "Not enough memory for %s\n",
3134                         CODA_NAME);
3135                 return -ENOMEM;
3136         }
3137
3138         spin_lock_init(&dev->irqlock);
3139         INIT_LIST_HEAD(&dev->instances);
3140         INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
3141
3142         dev->plat_dev = pdev;
3143         dev->clk_per = devm_clk_get(&pdev->dev, "per");
3144         if (IS_ERR(dev->clk_per)) {
3145                 dev_err(&pdev->dev, "Could not get per clock\n");
3146                 return PTR_ERR(dev->clk_per);
3147         }
3148
3149         dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
3150         if (IS_ERR(dev->clk_ahb)) {
3151                 dev_err(&pdev->dev, "Could not get ahb clock\n");
3152                 return PTR_ERR(dev->clk_ahb);
3153         }
3154
3155         /* Get  memory for physical registers */
3156         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3157         dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
3158         if (IS_ERR(dev->regs_base))
3159                 return PTR_ERR(dev->regs_base);
3160
3161         /* IRQ */
3162         irq = platform_get_irq(pdev, 0);
3163         if (irq < 0) {
3164                 dev_err(&pdev->dev, "failed to get irq resource\n");
3165                 return -ENOENT;
3166         }
3167
3168         if (devm_request_threaded_irq(&pdev->dev, irq, NULL, coda_irq_handler,
3169                 IRQF_ONESHOT, CODA_NAME, dev) < 0) {
3170                 dev_err(&pdev->dev, "failed to request irq\n");
3171                 return -ENOENT;
3172         }
3173
3174         /* Get IRAM pool from device tree or platform data */
3175         pool = of_get_named_gen_pool(np, "iram", 0);
3176         if (!pool && pdata)
3177                 pool = dev_get_gen_pool(pdata->iram_dev);
3178         if (!pool) {
3179                 dev_err(&pdev->dev, "iram pool not available\n");
3180                 return -ENOMEM;
3181         }
3182         dev->iram_pool = pool;
3183
3184         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
3185         if (ret)
3186                 return ret;
3187
3188         mutex_init(&dev->dev_mutex);
3189         mutex_init(&dev->coda_mutex);
3190
3191         pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
3192
3193         if (of_id) {
3194                 dev->devtype = of_id->data;
3195         } else if (pdev_id) {
3196                 dev->devtype = &coda_devdata[pdev_id->driver_data];
3197         } else {
3198                 v4l2_device_unregister(&dev->v4l2_dev);
3199                 return -EINVAL;
3200         }
3201
3202         /* allocate auxiliary per-device buffers for the BIT processor */
3203         switch (dev->devtype->product) {
3204         case CODA_DX6:
3205                 ret = coda_alloc_aux_buf(dev, &dev->workbuf,
3206                                          CODADX6_WORK_BUF_SIZE);
3207                 if (ret < 0) {
3208                         dev_err(&pdev->dev, "failed to allocate work buffer\n");
3209                         v4l2_device_unregister(&dev->v4l2_dev);
3210                         return ret;
3211                 }
3212                 break;
3213         case CODA_7541:
3214                 dev->tempbuf.size = CODA7_TEMP_BUF_SIZE;
3215                 break;
3216         }
3217         if (dev->tempbuf.size) {
3218                 ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
3219                                          dev->tempbuf.size);
3220                 if (ret < 0) {
3221                         dev_err(&pdev->dev, "failed to allocate temp buffer\n");
3222                         v4l2_device_unregister(&dev->v4l2_dev);
3223                         return ret;
3224                 }
3225         }
3226
3227         switch (dev->devtype->product) {
3228         case CODA_DX6:
3229                 dev->iram_size = CODADX6_IRAM_SIZE;
3230                 break;
3231         case CODA_7541:
3232                 dev->iram_size = CODA7_IRAM_SIZE;
3233                 break;
3234         }
3235         dev->iram_vaddr = gen_pool_alloc(dev->iram_pool, dev->iram_size);
3236         if (!dev->iram_vaddr) {
3237                 dev_err(&pdev->dev, "unable to alloc iram\n");
3238                 return -ENOMEM;
3239         }
3240         dev->iram_paddr = gen_pool_virt_to_phys(dev->iram_pool,
3241                                                 dev->iram_vaddr);
3242
3243         platform_set_drvdata(pdev, dev);
3244
3245         return coda_firmware_request(dev);
3246 }
3247
3248 static int coda_remove(struct platform_device *pdev)
3249 {
3250         struct coda_dev *dev = platform_get_drvdata(pdev);
3251
3252         video_unregister_device(&dev->vfd);
3253         if (dev->m2m_dev)
3254                 v4l2_m2m_release(dev->m2m_dev);
3255         if (dev->alloc_ctx)
3256                 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3257         v4l2_device_unregister(&dev->v4l2_dev);
3258         if (dev->iram_vaddr)
3259                 gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
3260         coda_free_aux_buf(dev, &dev->codebuf);
3261         coda_free_aux_buf(dev, &dev->tempbuf);
3262         coda_free_aux_buf(dev, &dev->workbuf);
3263         return 0;
3264 }
3265
3266 static struct platform_driver coda_driver = {
3267         .probe  = coda_probe,
3268         .remove = coda_remove,
3269         .driver = {
3270                 .name   = CODA_NAME,
3271                 .owner  = THIS_MODULE,
3272                 .of_match_table = of_match_ptr(coda_dt_ids),
3273         },
3274         .id_table = coda_platform_ids,
3275 };
3276
3277 module_platform_driver(coda_driver);
3278
3279 MODULE_LICENSE("GPL");
3280 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
3281 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");