2 * The Marvell camera core. This device appears in a number of settings,
3 * so it needs platform-specific support outside of the core.
5 * Copyright 2011 Jonathan Corbet corbet@lwn.net
7 #include <linux/kernel.h>
8 #include <linux/module.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/spinlock.h>
14 #include <linux/slab.h>
15 #include <linux/device.h>
16 #include <linux/wait.h>
17 #include <linux/list.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/delay.h>
20 #include <linux/vmalloc.h>
22 #include <linux/videodev2.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-ioctl.h>
25 #include <media/v4l2-chip-ident.h>
26 #include <media/ov7670.h>
27 #include <media/videobuf2-vmalloc.h>
28 #include <media/videobuf2-dma-contig.h>
29 #include <media/videobuf2-dma-sg.h>
31 #include "mcam-core.h"
34 * Basic frame stats - to be deleted shortly
41 * Internal DMA buffer management. Since the controller cannot do S/G I/O,
42 * we must have physically contiguous buffers to bring frames into.
43 * These parameters control how many buffers we use, whether we
44 * allocate them at load time (better chance of success, but nails down
45 * memory) or when somebody tries to use the camera (riskier), and,
46 * for load-time allocation, how big they should be.
48 * The controller can cycle through three buffers. We could use
49 * more by flipping pointers around, but it probably makes little
53 static int alloc_bufs_at_read;
54 module_param(alloc_bufs_at_read, bool, 0444);
55 MODULE_PARM_DESC(alloc_bufs_at_read,
56 "Non-zero value causes DMA buffers to be allocated when the "
57 "video capture device is read, rather than at module load "
58 "time. This saves memory, but decreases the chances of "
59 "successfully getting those buffers. This parameter is "
60 "only used in the vmalloc buffer mode");
62 static int n_dma_bufs = 3;
63 module_param(n_dma_bufs, uint, 0644);
64 MODULE_PARM_DESC(n_dma_bufs,
65 "The number of DMA buffers to allocate. Can be either two "
66 "(saves memory, makes timing tighter) or three.");
68 static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */
69 module_param(dma_buf_size, uint, 0444);
70 MODULE_PARM_DESC(dma_buf_size,
71 "The size of the allocated DMA buffers. If actual operating "
72 "parameters require larger buffers, an attempt to reallocate "
75 static int min_buffers = 1;
76 module_param(min_buffers, uint, 0644);
77 MODULE_PARM_DESC(min_buffers,
78 "The minimum number of streaming I/O buffers we are willing "
81 static int max_buffers = 10;
82 module_param(max_buffers, uint, 0644);
83 MODULE_PARM_DESC(max_buffers,
84 "The maximum number of streaming I/O buffers an application "
85 "will be allowed to allocate. These buffers are big and live "
89 module_param(flip, bool, 0444);
90 MODULE_PARM_DESC(flip,
91 "If set, the sensor will be instructed to flip the image "
94 static int buffer_mode = -1;
95 module_param(buffer_mode, int, 0444);
96 MODULE_PARM_DESC(buffer_mode,
97 "Set the buffer mode to be used; default is to go with what "
98 "the platform driver asks for. Set to 0 for vmalloc, 1 for "
102 * Status flags. Always manipulated with bit operations.
104 #define CF_BUF0_VALID 0 /* Buffers valid - first three */
105 #define CF_BUF1_VALID 1
106 #define CF_BUF2_VALID 2
107 #define CF_DMA_ACTIVE 3 /* A frame is incoming */
108 #define CF_CONFIG_NEEDED 4 /* Must configure hardware */
109 #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */
110 #define CF_SG_RESTART 6 /* SG restart needed */
112 #define sensor_call(cam, o, f, args...) \
113 v4l2_subdev_call(cam->sensor, o, f, ##args)
115 static struct mcam_format_struct {
118 int bpp; /* Bytes per pixel */
119 enum v4l2_mbus_pixelcode mbus_code;
122 .desc = "YUYV 4:2:2",
123 .pixelformat = V4L2_PIX_FMT_YUYV,
124 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
129 .pixelformat = V4L2_PIX_FMT_RGB444,
130 .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE,
135 .pixelformat = V4L2_PIX_FMT_RGB565,
136 .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE,
140 .desc = "Raw RGB Bayer",
141 .pixelformat = V4L2_PIX_FMT_SBGGR8,
142 .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8,
146 #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
148 static struct mcam_format_struct *mcam_find_format(u32 pixelformat)
152 for (i = 0; i < N_MCAM_FMTS; i++)
153 if (mcam_formats[i].pixelformat == pixelformat)
154 return mcam_formats + i;
155 /* Not found? Then return the first format. */
160 * The default format we use until somebody says otherwise.
162 static const struct v4l2_pix_format mcam_def_pix_format = {
164 .height = VGA_HEIGHT,
165 .pixelformat = V4L2_PIX_FMT_YUYV,
166 .field = V4L2_FIELD_NONE,
167 .bytesperline = VGA_WIDTH*2,
168 .sizeimage = VGA_WIDTH*VGA_HEIGHT*2,
171 static const enum v4l2_mbus_pixelcode mcam_def_mbus_code =
172 V4L2_MBUS_FMT_YUYV8_2X8;
176 * The two-word DMA descriptor format used by the Armada 610 and like. There
177 * Is a three-word format as well (set C1_DESC_3WORD) where the third
178 * word is a pointer to the next descriptor, but we don't use it. Two-word
179 * descriptors have to be contiguous in memory.
181 struct mcam_dma_desc {
187 * Our buffer type for working with videobuf2. Note that the vb2
188 * developers have decreed that struct vb2_buffer must be at the
189 * beginning of this structure.
191 struct mcam_vb_buffer {
192 struct vb2_buffer vb_buf;
193 struct list_head queue;
194 struct mcam_dma_desc *dma_desc; /* Descriptor virtual address */
195 dma_addr_t dma_desc_pa; /* Descriptor physical address */
196 int dma_desc_nent; /* Number of mapped descriptors */
199 static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb)
201 return container_of(vb, struct mcam_vb_buffer, vb_buf);
205 * Hand a completed buffer back to user space.
207 static void mcam_buffer_done(struct mcam_camera *cam, int frame,
208 struct vb2_buffer *vbuf)
210 vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage;
211 vbuf->v4l2_buf.sequence = cam->buf_seq[frame];
212 vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage);
213 vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE);
219 * Debugging and related.
221 #define cam_err(cam, fmt, arg...) \
222 dev_err((cam)->dev, fmt, ##arg);
223 #define cam_warn(cam, fmt, arg...) \
224 dev_warn((cam)->dev, fmt, ##arg);
225 #define cam_dbg(cam, fmt, arg...) \
226 dev_dbg((cam)->dev, fmt, ##arg);
230 * Flag manipulation helpers
232 static void mcam_reset_buffers(struct mcam_camera *cam)
237 for (i = 0; i < cam->nbufs; i++)
238 clear_bit(i, &cam->flags);
241 static inline int mcam_needs_config(struct mcam_camera *cam)
243 return test_bit(CF_CONFIG_NEEDED, &cam->flags);
246 static void mcam_set_config_needed(struct mcam_camera *cam, int needed)
249 set_bit(CF_CONFIG_NEEDED, &cam->flags);
251 clear_bit(CF_CONFIG_NEEDED, &cam->flags);
254 /* ------------------------------------------------------------------- */
256 * Make the controller start grabbing images. Everything must
257 * be set up before doing this.
259 static void mcam_ctlr_start(struct mcam_camera *cam)
261 /* set_bit performs a read, so no other barrier should be
263 mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE);
266 static void mcam_ctlr_stop(struct mcam_camera *cam)
268 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
271 /* ------------------------------------------------------------------- */
273 * Code specific to the vmalloc buffer mode.
277 * Allocate in-kernel DMA buffers for vmalloc mode.
279 static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
283 mcam_set_config_needed(cam, 1);
285 cam->dma_buf_size = dma_buf_size;
287 cam->dma_buf_size = cam->pix_format.sizeimage;
292 for (i = 0; i < n_dma_bufs; i++) {
293 cam->dma_bufs[i] = dma_alloc_coherent(cam->dev,
294 cam->dma_buf_size, cam->dma_handles + i,
296 if (cam->dma_bufs[i] == NULL) {
297 cam_warn(cam, "Failed to allocate DMA buffer\n");
303 switch (cam->nbufs) {
305 dma_free_coherent(cam->dev, cam->dma_buf_size,
306 cam->dma_bufs[0], cam->dma_handles[0]);
309 cam_err(cam, "Insufficient DMA buffers, cannot operate\n");
314 cam_warn(cam, "Will limp along with only 2 buffers\n");
320 static void mcam_free_dma_bufs(struct mcam_camera *cam)
324 for (i = 0; i < cam->nbufs; i++) {
325 dma_free_coherent(cam->dev, cam->dma_buf_size,
326 cam->dma_bufs[i], cam->dma_handles[i]);
327 cam->dma_bufs[i] = NULL;
334 * Set up DMA buffers when operating in vmalloc mode
336 static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam)
339 * Store the first two Y buffers (we aren't supporting
340 * planar formats for now, so no UV bufs). Then either
341 * set the third if it exists, or tell the controller
344 mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]);
345 mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]);
346 if (cam->nbufs > 2) {
347 mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]);
348 mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS);
350 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
351 if (cam->chip_id == V4L2_IDENT_CAFE)
352 mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */
356 * Copy data out to user space in the vmalloc case
358 static void mcam_frame_tasklet(unsigned long data)
360 struct mcam_camera *cam = (struct mcam_camera *) data;
363 struct mcam_vb_buffer *buf;
365 spin_lock_irqsave(&cam->dev_lock, flags);
366 for (i = 0; i < cam->nbufs; i++) {
367 int bufno = cam->next_buf;
369 if (cam->state != S_STREAMING || bufno < 0)
370 break; /* I/O got stopped */
371 if (++(cam->next_buf) >= cam->nbufs)
373 if (!test_bit(bufno, &cam->flags))
375 if (list_empty(&cam->buffers)) {
377 break; /* Leave it valid, hope for better later */
380 clear_bit(bufno, &cam->flags);
381 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer,
383 list_del_init(&buf->queue);
385 * Drop the lock during the big copy. This *should* be safe...
387 spin_unlock_irqrestore(&cam->dev_lock, flags);
388 memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno],
389 cam->pix_format.sizeimage);
390 mcam_buffer_done(cam, bufno, &buf->vb_buf);
391 spin_lock_irqsave(&cam->dev_lock, flags);
393 spin_unlock_irqrestore(&cam->dev_lock, flags);
397 /* ---------------------------------------------------------------------- */
399 * DMA-contiguous code.
402 * Set up a contiguous buffer for the given frame. Here also is where
403 * the underrun strategy is set: if there is no buffer available, reuse
404 * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to
405 * keep the interrupt handler from giving that buffer back to user
406 * space. In this way, we always have a buffer to DMA to and don't
407 * have to try to play games stopping and restarting the controller.
409 static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame)
411 struct mcam_vb_buffer *buf;
413 * If there are no available buffers, go into single mode
415 if (list_empty(&cam->buffers)) {
416 buf = cam->vb_bufs[frame ^ 0x1];
417 cam->vb_bufs[frame] = buf;
418 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
419 vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
420 set_bit(CF_SINGLE_BUFFER, &cam->flags);
425 * OK, we have a buffer we can use.
427 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
428 list_del_init(&buf->queue);
429 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
430 vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
431 cam->vb_bufs[frame] = buf;
432 clear_bit(CF_SINGLE_BUFFER, &cam->flags);
436 * Initial B_DMA_contig setup.
438 static void mcam_ctlr_dma_contig(struct mcam_camera *cam)
440 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
442 mcam_set_contig_buffer(cam, 0);
443 mcam_set_contig_buffer(cam, 1);
447 * Frame completion handling.
449 static void mcam_dma_contig_done(struct mcam_camera *cam, int frame)
451 struct mcam_vb_buffer *buf = cam->vb_bufs[frame];
453 if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) {
455 mcam_buffer_done(cam, frame, &buf->vb_buf);
457 mcam_set_contig_buffer(cam, frame);
462 /* ---------------------------------------------------------------------- */
464 * Scatter/gather-specific code.
468 * Set up the next buffer for S/G I/O; caller should be sure that
469 * the controller is stopped and a buffer is available.
471 static void mcam_sg_next_buffer(struct mcam_camera *cam)
473 struct mcam_vb_buffer *buf;
475 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
476 list_del_init(&buf->queue);
477 mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa);
478 mcam_reg_write(cam, REG_DESC_LEN_Y,
479 buf->dma_desc_nent*sizeof(struct mcam_dma_desc));
480 mcam_reg_write(cam, REG_DESC_LEN_U, 0);
481 mcam_reg_write(cam, REG_DESC_LEN_V, 0);
482 cam->vb_bufs[0] = buf;
486 * Initial B_DMA_sg setup
488 static void mcam_ctlr_dma_sg(struct mcam_camera *cam)
490 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD);
491 mcam_sg_next_buffer(cam);
492 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
498 * Frame completion with S/G is trickier. We can't muck with
499 * a descriptor chain on the fly, since the controller buffers it
500 * internally. So we have to actually stop and restart; Marvell
501 * says this is the way to do it.
503 * Of course, stopping is easier said than done; experience shows
504 * that the controller can start a frame *after* C0_ENABLE has been
505 * cleared. So when running in S/G mode, the controller is "stopped"
506 * on receipt of the start-of-frame interrupt. That means we can
507 * safely change the DMA descriptor array here and restart things
508 * (assuming there's another buffer waiting to go).
510 static void mcam_dma_sg_done(struct mcam_camera *cam, int frame)
512 struct mcam_vb_buffer *buf = cam->vb_bufs[0];
515 * Very Bad Not Good Things happen if you don't clear
516 * C1_DESC_ENA before making any descriptor changes.
518 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA);
520 * If we have another buffer available, put it in and
521 * restart the engine.
523 if (!list_empty(&cam->buffers)) {
524 mcam_sg_next_buffer(cam);
525 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
526 mcam_ctlr_start(cam);
528 * Otherwise set CF_SG_RESTART and the controller will
529 * be restarted once another buffer shows up.
532 set_bit(CF_SG_RESTART, &cam->flags);
536 * Now we can give the completed frame back to user space.
539 mcam_buffer_done(cam, frame, &buf->vb_buf);
544 * Scatter/gather mode requires stopping the controller between
545 * frames so we can put in a new DMA descriptor array. If no new
546 * buffer exists at frame completion, the controller is left stopped;
547 * this function is charged with gettig things going again.
549 static void mcam_sg_restart(struct mcam_camera *cam)
551 mcam_ctlr_dma_sg(cam);
552 mcam_ctlr_start(cam);
553 clear_bit(CF_SG_RESTART, &cam->flags);
557 /* ---------------------------------------------------------------------- */
559 * Buffer-mode-independent controller code.
565 static void mcam_ctlr_image(struct mcam_camera *cam)
568 struct v4l2_pix_format *fmt = &cam->pix_format;
570 imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) |
571 (fmt->bytesperline & IMGSZ_H_MASK);
572 mcam_reg_write(cam, REG_IMGSIZE, imgsz);
573 mcam_reg_write(cam, REG_IMGOFFSET, 0);
574 /* YPITCH just drops the last two bits */
575 mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline,
578 * Tell the controller about the image format we are using.
580 switch (cam->pix_format.pixelformat) {
581 case V4L2_PIX_FMT_YUYV:
582 mcam_reg_write_mask(cam, REG_CTRL0,
583 C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV,
587 case V4L2_PIX_FMT_RGB444:
588 mcam_reg_write_mask(cam, REG_CTRL0,
589 C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB,
594 case V4L2_PIX_FMT_RGB565:
595 mcam_reg_write_mask(cam, REG_CTRL0,
596 C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR,
601 cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat);
605 * Make sure it knows we want to use hsync/vsync.
607 mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC,
613 * Configure the controller for operation; caller holds the
616 static int mcam_ctlr_configure(struct mcam_camera *cam)
620 spin_lock_irqsave(&cam->dev_lock, flags);
621 switch (cam->buffer_mode) {
623 mcam_ctlr_dma_vmalloc(cam);
626 mcam_ctlr_dma_contig(cam);
629 mcam_ctlr_dma_sg(cam);
632 mcam_ctlr_image(cam);
633 mcam_set_config_needed(cam, 0);
634 clear_bit(CF_SG_RESTART, &cam->flags);
635 spin_unlock_irqrestore(&cam->dev_lock, flags);
639 static void mcam_ctlr_irq_enable(struct mcam_camera *cam)
642 * Clear any pending interrupts, since we do not
643 * expect to have I/O active prior to enabling.
645 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS);
646 mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS);
649 static void mcam_ctlr_irq_disable(struct mcam_camera *cam)
651 mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS);
656 static void mcam_ctlr_init(struct mcam_camera *cam)
660 spin_lock_irqsave(&cam->dev_lock, flags);
662 * Make sure it's not powered down.
664 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
666 * Turn off the enable bit. It sure should be off anyway,
667 * but it's good to be sure.
669 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
671 * Clock the sensor appropriately. Controller clock should
672 * be 48MHz, sensor "typical" value is half that.
674 mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
675 spin_unlock_irqrestore(&cam->dev_lock, flags);
680 * Stop the controller, and don't return until we're really sure that no
681 * further DMA is going on.
683 static void mcam_ctlr_stop_dma(struct mcam_camera *cam)
688 * Theory: stop the camera controller (whether it is operating
689 * or not). Delay briefly just in case we race with the SOF
690 * interrupt, then wait until no DMA is active.
692 spin_lock_irqsave(&cam->dev_lock, flags);
693 clear_bit(CF_SG_RESTART, &cam->flags);
696 spin_unlock_irqrestore(&cam->dev_lock, flags);
698 if (test_bit(CF_DMA_ACTIVE, &cam->flags))
699 cam_err(cam, "Timeout waiting for DMA to end\n");
700 /* This would be bad news - what now? */
701 spin_lock_irqsave(&cam->dev_lock, flags);
702 mcam_ctlr_irq_disable(cam);
703 spin_unlock_irqrestore(&cam->dev_lock, flags);
709 static void mcam_ctlr_power_up(struct mcam_camera *cam)
713 spin_lock_irqsave(&cam->dev_lock, flags);
714 cam->plat_power_up(cam);
715 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
716 spin_unlock_irqrestore(&cam->dev_lock, flags);
717 msleep(5); /* Just to be sure */
720 static void mcam_ctlr_power_down(struct mcam_camera *cam)
724 spin_lock_irqsave(&cam->dev_lock, flags);
726 * School of hard knocks department: be sure we do any register
727 * twiddling on the controller *before* calling the platform
728 * power down routine.
730 mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN);
731 cam->plat_power_down(cam);
732 spin_unlock_irqrestore(&cam->dev_lock, flags);
735 /* -------------------------------------------------------------------- */
737 * Communications with the sensor.
740 static int __mcam_cam_reset(struct mcam_camera *cam)
742 return sensor_call(cam, core, reset, 0);
746 * We have found the sensor on the i2c. Let's try to have a
749 static int mcam_cam_init(struct mcam_camera *cam)
751 struct v4l2_dbg_chip_ident chip;
754 mutex_lock(&cam->s_mutex);
755 if (cam->state != S_NOTREADY)
756 cam_warn(cam, "Cam init with device in funky state %d",
758 ret = __mcam_cam_reset(cam);
761 chip.ident = V4L2_IDENT_NONE;
762 chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR;
763 chip.match.addr = cam->sensor_addr;
764 ret = sensor_call(cam, core, g_chip_ident, &chip);
767 cam->sensor_type = chip.ident;
768 if (cam->sensor_type != V4L2_IDENT_OV7670) {
769 cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type);
773 /* Get/set parameters? */
777 mcam_ctlr_power_down(cam);
778 mutex_unlock(&cam->s_mutex);
783 * Configure the sensor to match the parameters we have. Caller should
786 static int mcam_cam_set_flip(struct mcam_camera *cam)
788 struct v4l2_control ctrl;
790 memset(&ctrl, 0, sizeof(ctrl));
791 ctrl.id = V4L2_CID_VFLIP;
793 return sensor_call(cam, core, s_ctrl, &ctrl);
797 static int mcam_cam_configure(struct mcam_camera *cam)
799 struct v4l2_mbus_framefmt mbus_fmt;
802 v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code);
803 ret = sensor_call(cam, core, init, 0);
805 ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt);
807 * OV7670 does weird things if flip is set *before* format...
809 ret += mcam_cam_set_flip(cam);
814 * Get everything ready, and start grabbing frames.
816 static int mcam_read_setup(struct mcam_camera *cam)
822 * Configuration. If we still don't have DMA buffers,
823 * make one last, desperate attempt.
825 if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 &&
826 mcam_alloc_dma_bufs(cam, 0))
829 if (mcam_needs_config(cam)) {
830 mcam_cam_configure(cam);
831 ret = mcam_ctlr_configure(cam);
839 spin_lock_irqsave(&cam->dev_lock, flags);
840 mcam_reset_buffers(cam);
841 mcam_ctlr_irq_enable(cam);
842 cam->state = S_STREAMING;
843 mcam_ctlr_start(cam);
844 spin_unlock_irqrestore(&cam->dev_lock, flags);
848 /* ----------------------------------------------------------------------- */
850 * Videobuf2 interface code.
853 static int mcam_vb_queue_setup(struct vb2_queue *vq, unsigned int *nbufs,
854 unsigned int *num_planes, unsigned long sizes[],
857 struct mcam_camera *cam = vb2_get_drv_priv(vq);
858 int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2;
860 sizes[0] = cam->pix_format.sizeimage;
861 *num_planes = 1; /* Someday we have to support planar formats... */
862 if (*nbufs < minbufs)
864 if (cam->buffer_mode == B_DMA_contig)
865 alloc_ctxs[0] = cam->vb_alloc_ctx;
870 static void mcam_vb_buf_queue(struct vb2_buffer *vb)
872 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
873 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
877 spin_lock_irqsave(&cam->dev_lock, flags);
878 start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers);
879 list_add(&mvb->queue, &cam->buffers);
880 if (test_bit(CF_SG_RESTART, &cam->flags))
881 mcam_sg_restart(cam);
882 spin_unlock_irqrestore(&cam->dev_lock, flags);
884 mcam_read_setup(cam);
889 * vb2 uses these to release the mutex when waiting in dqbuf. I'm
890 * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs
891 * to be called with the mutex held), but better safe than sorry.
893 static void mcam_vb_wait_prepare(struct vb2_queue *vq)
895 struct mcam_camera *cam = vb2_get_drv_priv(vq);
897 mutex_unlock(&cam->s_mutex);
900 static void mcam_vb_wait_finish(struct vb2_queue *vq)
902 struct mcam_camera *cam = vb2_get_drv_priv(vq);
904 mutex_lock(&cam->s_mutex);
908 * These need to be called with the mutex held from vb2
910 static int mcam_vb_start_streaming(struct vb2_queue *vq)
912 struct mcam_camera *cam = vb2_get_drv_priv(vq);
914 if (cam->state != S_IDLE)
918 * Videobuf2 sneakily hoards all the buffers and won't
919 * give them to us until *after* streaming starts. But
920 * we can't actually start streaming until we have a
921 * destination. So go into a wait state and hope they
922 * give us buffers soon.
924 if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) {
925 cam->state = S_BUFWAIT;
928 return mcam_read_setup(cam);
931 static int mcam_vb_stop_streaming(struct vb2_queue *vq)
933 struct mcam_camera *cam = vb2_get_drv_priv(vq);
936 if (cam->state == S_BUFWAIT) {
937 /* They never gave us buffers */
941 if (cam->state != S_STREAMING)
943 mcam_ctlr_stop_dma(cam);
945 * VB2 reclaims the buffers, so we need to forget
948 spin_lock_irqsave(&cam->dev_lock, flags);
949 INIT_LIST_HEAD(&cam->buffers);
950 spin_unlock_irqrestore(&cam->dev_lock, flags);
955 static const struct vb2_ops mcam_vb2_ops = {
956 .queue_setup = mcam_vb_queue_setup,
957 .buf_queue = mcam_vb_buf_queue,
958 .start_streaming = mcam_vb_start_streaming,
959 .stop_streaming = mcam_vb_stop_streaming,
960 .wait_prepare = mcam_vb_wait_prepare,
961 .wait_finish = mcam_vb_wait_finish,
965 * Scatter/gather mode uses all of the above functions plus a
966 * few extras to deal with DMA mapping.
968 static int mcam_vb_sg_buf_init(struct vb2_buffer *vb)
970 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
971 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
972 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
974 mvb->dma_desc = dma_alloc_coherent(cam->dev,
975 ndesc * sizeof(struct mcam_dma_desc),
976 &mvb->dma_desc_pa, GFP_KERNEL);
977 if (mvb->dma_desc == NULL) {
978 cam_err(cam, "Unable to get DMA descriptor array\n");
984 static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb)
986 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
987 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
988 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
989 struct mcam_dma_desc *desc = mvb->dma_desc;
990 struct scatterlist *sg;
993 mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages,
995 if (mvb->dma_desc_nent <= 0)
996 return -EIO; /* Not sure what's right here */
997 for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) {
998 desc->dma_addr = sg_dma_address(sg);
999 desc->segment_len = sg_dma_len(sg);
1005 static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb)
1007 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1008 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
1010 dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE);
1014 static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb)
1016 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1017 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1018 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
1020 dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc),
1021 mvb->dma_desc, mvb->dma_desc_pa);
1025 static const struct vb2_ops mcam_vb2_sg_ops = {
1026 .queue_setup = mcam_vb_queue_setup,
1027 .buf_init = mcam_vb_sg_buf_init,
1028 .buf_prepare = mcam_vb_sg_buf_prepare,
1029 .buf_queue = mcam_vb_buf_queue,
1030 .buf_finish = mcam_vb_sg_buf_finish,
1031 .buf_cleanup = mcam_vb_sg_buf_cleanup,
1032 .start_streaming = mcam_vb_start_streaming,
1033 .stop_streaming = mcam_vb_stop_streaming,
1034 .wait_prepare = mcam_vb_wait_prepare,
1035 .wait_finish = mcam_vb_wait_finish,
1038 static int mcam_setup_vb2(struct mcam_camera *cam)
1040 struct vb2_queue *vq = &cam->vb_queue;
1042 memset(vq, 0, sizeof(*vq));
1043 vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1045 INIT_LIST_HEAD(&cam->buffers);
1046 switch (cam->buffer_mode) {
1048 vq->ops = &mcam_vb2_ops;
1049 vq->mem_ops = &vb2_dma_contig_memops;
1050 cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev);
1051 vq->io_modes = VB2_MMAP | VB2_USERPTR;
1054 vq->ops = &mcam_vb2_sg_ops;
1055 vq->mem_ops = &vb2_dma_sg_memops;
1056 vq->io_modes = VB2_MMAP | VB2_USERPTR;
1059 vq->ops = &mcam_vb2_ops;
1060 vq->mem_ops = &vb2_vmalloc_memops;
1061 vq->buf_struct_size = sizeof(struct mcam_vb_buffer);
1062 vq->io_modes = VB2_MMAP;
1065 return vb2_queue_init(vq);
1068 static void mcam_cleanup_vb2(struct mcam_camera *cam)
1070 vb2_queue_release(&cam->vb_queue);
1071 if (cam->buffer_mode == B_DMA_contig)
1072 vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx);
1076 /* ---------------------------------------------------------------------- */
1078 * The long list of V4L2 ioctl() operations.
1081 static int mcam_vidioc_streamon(struct file *filp, void *priv,
1082 enum v4l2_buf_type type)
1084 struct mcam_camera *cam = filp->private_data;
1087 mutex_lock(&cam->s_mutex);
1088 ret = vb2_streamon(&cam->vb_queue, type);
1089 mutex_unlock(&cam->s_mutex);
1094 static int mcam_vidioc_streamoff(struct file *filp, void *priv,
1095 enum v4l2_buf_type type)
1097 struct mcam_camera *cam = filp->private_data;
1100 mutex_lock(&cam->s_mutex);
1101 ret = vb2_streamoff(&cam->vb_queue, type);
1102 mutex_unlock(&cam->s_mutex);
1107 static int mcam_vidioc_reqbufs(struct file *filp, void *priv,
1108 struct v4l2_requestbuffers *req)
1110 struct mcam_camera *cam = filp->private_data;
1113 mutex_lock(&cam->s_mutex);
1114 ret = vb2_reqbufs(&cam->vb_queue, req);
1115 mutex_unlock(&cam->s_mutex);
1120 static int mcam_vidioc_querybuf(struct file *filp, void *priv,
1121 struct v4l2_buffer *buf)
1123 struct mcam_camera *cam = filp->private_data;
1126 mutex_lock(&cam->s_mutex);
1127 ret = vb2_querybuf(&cam->vb_queue, buf);
1128 mutex_unlock(&cam->s_mutex);
1132 static int mcam_vidioc_qbuf(struct file *filp, void *priv,
1133 struct v4l2_buffer *buf)
1135 struct mcam_camera *cam = filp->private_data;
1138 mutex_lock(&cam->s_mutex);
1139 ret = vb2_qbuf(&cam->vb_queue, buf);
1140 mutex_unlock(&cam->s_mutex);
1144 static int mcam_vidioc_dqbuf(struct file *filp, void *priv,
1145 struct v4l2_buffer *buf)
1147 struct mcam_camera *cam = filp->private_data;
1150 mutex_lock(&cam->s_mutex);
1151 ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK);
1152 mutex_unlock(&cam->s_mutex);
1158 static int mcam_vidioc_queryctrl(struct file *filp, void *priv,
1159 struct v4l2_queryctrl *qc)
1161 struct mcam_camera *cam = priv;
1164 mutex_lock(&cam->s_mutex);
1165 ret = sensor_call(cam, core, queryctrl, qc);
1166 mutex_unlock(&cam->s_mutex);
1171 static int mcam_vidioc_g_ctrl(struct file *filp, void *priv,
1172 struct v4l2_control *ctrl)
1174 struct mcam_camera *cam = priv;
1177 mutex_lock(&cam->s_mutex);
1178 ret = sensor_call(cam, core, g_ctrl, ctrl);
1179 mutex_unlock(&cam->s_mutex);
1184 static int mcam_vidioc_s_ctrl(struct file *filp, void *priv,
1185 struct v4l2_control *ctrl)
1187 struct mcam_camera *cam = priv;
1190 mutex_lock(&cam->s_mutex);
1191 ret = sensor_call(cam, core, s_ctrl, ctrl);
1192 mutex_unlock(&cam->s_mutex);
1197 static int mcam_vidioc_querycap(struct file *file, void *priv,
1198 struct v4l2_capability *cap)
1200 strcpy(cap->driver, "marvell_ccic");
1201 strcpy(cap->card, "marvell_ccic");
1203 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
1204 V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
1209 static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp,
1210 void *priv, struct v4l2_fmtdesc *fmt)
1212 if (fmt->index >= N_MCAM_FMTS)
1214 strlcpy(fmt->description, mcam_formats[fmt->index].desc,
1215 sizeof(fmt->description));
1216 fmt->pixelformat = mcam_formats[fmt->index].pixelformat;
1220 static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv,
1221 struct v4l2_format *fmt)
1223 struct mcam_camera *cam = priv;
1224 struct mcam_format_struct *f;
1225 struct v4l2_pix_format *pix = &fmt->fmt.pix;
1226 struct v4l2_mbus_framefmt mbus_fmt;
1229 f = mcam_find_format(pix->pixelformat);
1230 pix->pixelformat = f->pixelformat;
1231 v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code);
1232 mutex_lock(&cam->s_mutex);
1233 ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt);
1234 mutex_unlock(&cam->s_mutex);
1235 v4l2_fill_pix_format(pix, &mbus_fmt);
1236 pix->bytesperline = pix->width * f->bpp;
1237 pix->sizeimage = pix->height * pix->bytesperline;
1241 static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv,
1242 struct v4l2_format *fmt)
1244 struct mcam_camera *cam = priv;
1245 struct mcam_format_struct *f;
1249 * Can't do anything if the device is not idle
1250 * Also can't if there are streaming buffers in place.
1252 if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0)
1255 f = mcam_find_format(fmt->fmt.pix.pixelformat);
1258 * See if the formatting works in principle.
1260 ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt);
1264 * Now we start to change things for real, so let's do it
1267 mutex_lock(&cam->s_mutex);
1268 cam->pix_format = fmt->fmt.pix;
1269 cam->mbus_code = f->mbus_code;
1272 * Make sure we have appropriate DMA buffers.
1275 if (cam->buffer_mode == B_vmalloc) {
1276 if (cam->nbufs > 0 &&
1277 cam->dma_buf_size < cam->pix_format.sizeimage)
1278 mcam_free_dma_bufs(cam);
1279 if (cam->nbufs == 0) {
1280 if (mcam_alloc_dma_bufs(cam, 0))
1284 mcam_set_config_needed(cam, 1);
1287 mutex_unlock(&cam->s_mutex);
1292 * Return our stored notion of how the camera is/should be configured.
1293 * The V4l2 spec wants us to be smarter, and actually get this from
1294 * the camera (and not mess with it at open time). Someday.
1296 static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv,
1297 struct v4l2_format *f)
1299 struct mcam_camera *cam = priv;
1301 f->fmt.pix = cam->pix_format;
1306 * We only have one input - the sensor - so minimize the nonsense here.
1308 static int mcam_vidioc_enum_input(struct file *filp, void *priv,
1309 struct v4l2_input *input)
1311 if (input->index != 0)
1314 input->type = V4L2_INPUT_TYPE_CAMERA;
1315 input->std = V4L2_STD_ALL; /* Not sure what should go here */
1316 strcpy(input->name, "Camera");
1320 static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i)
1326 static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i)
1334 static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a)
1340 * G/S_PARM. Most of this is done by the sensor, but we are
1341 * the level which controls the number of read buffers.
1343 static int mcam_vidioc_g_parm(struct file *filp, void *priv,
1344 struct v4l2_streamparm *parms)
1346 struct mcam_camera *cam = priv;
1349 mutex_lock(&cam->s_mutex);
1350 ret = sensor_call(cam, video, g_parm, parms);
1351 mutex_unlock(&cam->s_mutex);
1352 parms->parm.capture.readbuffers = n_dma_bufs;
1356 static int mcam_vidioc_s_parm(struct file *filp, void *priv,
1357 struct v4l2_streamparm *parms)
1359 struct mcam_camera *cam = priv;
1362 mutex_lock(&cam->s_mutex);
1363 ret = sensor_call(cam, video, s_parm, parms);
1364 mutex_unlock(&cam->s_mutex);
1365 parms->parm.capture.readbuffers = n_dma_bufs;
1369 static int mcam_vidioc_g_chip_ident(struct file *file, void *priv,
1370 struct v4l2_dbg_chip_ident *chip)
1372 struct mcam_camera *cam = priv;
1374 chip->ident = V4L2_IDENT_NONE;
1376 if (v4l2_chip_match_host(&chip->match)) {
1377 chip->ident = cam->chip_id;
1380 return sensor_call(cam, core, g_chip_ident, chip);
1383 static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv,
1384 struct v4l2_frmsizeenum *sizes)
1386 struct mcam_camera *cam = priv;
1389 mutex_lock(&cam->s_mutex);
1390 ret = sensor_call(cam, video, enum_framesizes, sizes);
1391 mutex_unlock(&cam->s_mutex);
1395 static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv,
1396 struct v4l2_frmivalenum *interval)
1398 struct mcam_camera *cam = priv;
1401 mutex_lock(&cam->s_mutex);
1402 ret = sensor_call(cam, video, enum_frameintervals, interval);
1403 mutex_unlock(&cam->s_mutex);
1407 #ifdef CONFIG_VIDEO_ADV_DEBUG
1408 static int mcam_vidioc_g_register(struct file *file, void *priv,
1409 struct v4l2_dbg_register *reg)
1411 struct mcam_camera *cam = priv;
1413 if (v4l2_chip_match_host(®->match)) {
1414 reg->val = mcam_reg_read(cam, reg->reg);
1418 return sensor_call(cam, core, g_register, reg);
1421 static int mcam_vidioc_s_register(struct file *file, void *priv,
1422 struct v4l2_dbg_register *reg)
1424 struct mcam_camera *cam = priv;
1426 if (v4l2_chip_match_host(®->match)) {
1427 mcam_reg_write(cam, reg->reg, reg->val);
1430 return sensor_call(cam, core, s_register, reg);
1434 static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = {
1435 .vidioc_querycap = mcam_vidioc_querycap,
1436 .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap,
1437 .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap,
1438 .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap,
1439 .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap,
1440 .vidioc_enum_input = mcam_vidioc_enum_input,
1441 .vidioc_g_input = mcam_vidioc_g_input,
1442 .vidioc_s_input = mcam_vidioc_s_input,
1443 .vidioc_s_std = mcam_vidioc_s_std,
1444 .vidioc_reqbufs = mcam_vidioc_reqbufs,
1445 .vidioc_querybuf = mcam_vidioc_querybuf,
1446 .vidioc_qbuf = mcam_vidioc_qbuf,
1447 .vidioc_dqbuf = mcam_vidioc_dqbuf,
1448 .vidioc_streamon = mcam_vidioc_streamon,
1449 .vidioc_streamoff = mcam_vidioc_streamoff,
1450 .vidioc_queryctrl = mcam_vidioc_queryctrl,
1451 .vidioc_g_ctrl = mcam_vidioc_g_ctrl,
1452 .vidioc_s_ctrl = mcam_vidioc_s_ctrl,
1453 .vidioc_g_parm = mcam_vidioc_g_parm,
1454 .vidioc_s_parm = mcam_vidioc_s_parm,
1455 .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes,
1456 .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals,
1457 .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident,
1458 #ifdef CONFIG_VIDEO_ADV_DEBUG
1459 .vidioc_g_register = mcam_vidioc_g_register,
1460 .vidioc_s_register = mcam_vidioc_s_register,
1464 /* ---------------------------------------------------------------------- */
1466 * Our various file operations.
1468 static int mcam_v4l_open(struct file *filp)
1470 struct mcam_camera *cam = video_drvdata(filp);
1473 filp->private_data = cam;
1475 frames = singles = delivered = 0;
1476 mutex_lock(&cam->s_mutex);
1477 if (cam->users == 0) {
1478 ret = mcam_setup_vb2(cam);
1481 mcam_ctlr_power_up(cam);
1482 __mcam_cam_reset(cam);
1483 mcam_set_config_needed(cam, 1);
1487 mutex_unlock(&cam->s_mutex);
1492 static int mcam_v4l_release(struct file *filp)
1494 struct mcam_camera *cam = filp->private_data;
1496 cam_err(cam, "Release, %d frames, %d singles, %d delivered\n", frames,
1497 singles, delivered);
1498 mutex_lock(&cam->s_mutex);
1500 if (filp == cam->owner) {
1501 mcam_ctlr_stop_dma(cam);
1504 if (cam->users == 0) {
1505 mcam_cleanup_vb2(cam);
1506 mcam_ctlr_power_down(cam);
1507 if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read)
1508 mcam_free_dma_bufs(cam);
1510 mutex_unlock(&cam->s_mutex);
1514 static ssize_t mcam_v4l_read(struct file *filp,
1515 char __user *buffer, size_t len, loff_t *pos)
1517 struct mcam_camera *cam = filp->private_data;
1520 mutex_lock(&cam->s_mutex);
1521 ret = vb2_read(&cam->vb_queue, buffer, len, pos,
1522 filp->f_flags & O_NONBLOCK);
1523 mutex_unlock(&cam->s_mutex);
1529 static unsigned int mcam_v4l_poll(struct file *filp,
1530 struct poll_table_struct *pt)
1532 struct mcam_camera *cam = filp->private_data;
1535 mutex_lock(&cam->s_mutex);
1536 ret = vb2_poll(&cam->vb_queue, filp, pt);
1537 mutex_unlock(&cam->s_mutex);
1542 static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma)
1544 struct mcam_camera *cam = filp->private_data;
1547 mutex_lock(&cam->s_mutex);
1548 ret = vb2_mmap(&cam->vb_queue, vma);
1549 mutex_unlock(&cam->s_mutex);
1555 static const struct v4l2_file_operations mcam_v4l_fops = {
1556 .owner = THIS_MODULE,
1557 .open = mcam_v4l_open,
1558 .release = mcam_v4l_release,
1559 .read = mcam_v4l_read,
1560 .poll = mcam_v4l_poll,
1561 .mmap = mcam_v4l_mmap,
1562 .unlocked_ioctl = video_ioctl2,
1567 * This template device holds all of those v4l2 methods; we
1568 * clone it for specific real devices.
1570 static struct video_device mcam_v4l_template = {
1572 .tvnorms = V4L2_STD_NTSC_M,
1573 .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */
1575 .fops = &mcam_v4l_fops,
1576 .ioctl_ops = &mcam_v4l_ioctl_ops,
1577 .release = video_device_release_empty,
1580 /* ---------------------------------------------------------------------- */
1582 * Interrupt handler stuff
1584 static void mcam_frame_complete(struct mcam_camera *cam, int frame)
1587 * Basic frame housekeeping.
1589 set_bit(frame, &cam->flags);
1590 clear_bit(CF_DMA_ACTIVE, &cam->flags);
1591 cam->next_buf = frame;
1592 cam->buf_seq[frame] = ++(cam->sequence);
1593 cam->last_delivered = frame;
1596 * "This should never happen"
1598 if (cam->state != S_STREAMING)
1601 * Process the frame and set up the next one.
1603 switch (cam->buffer_mode) {
1605 tasklet_schedule(&cam->s_tasklet);
1608 mcam_dma_contig_done(cam, frame);
1611 mcam_dma_sg_done(cam, frame);
1618 * The interrupt handler; this needs to be called from the
1619 * platform irq handler with the lock held.
1621 int mccic_irq(struct mcam_camera *cam, unsigned int irqs)
1623 unsigned int frame, handled = 0;
1625 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */
1627 * Handle any frame completions. There really should
1628 * not be more than one of these, or we have fallen
1631 * When running in S/G mode, the frame number lacks any
1632 * real meaning - there's only one descriptor array - but
1633 * the controller still picks a different one to signal
1636 for (frame = 0; frame < cam->nbufs; frame++)
1637 if (irqs & (IRQ_EOF0 << frame)) {
1638 mcam_frame_complete(cam, frame);
1642 * If a frame starts, note that we have DMA active. This
1643 * code assumes that we won't get multiple frame interrupts
1644 * at once; may want to rethink that.
1646 if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) {
1647 set_bit(CF_DMA_ACTIVE, &cam->flags);
1649 if (cam->buffer_mode == B_DMA_sg)
1650 mcam_ctlr_stop(cam);
1655 /* ---------------------------------------------------------------------- */
1657 * Registration and such.
1659 static struct ov7670_config sensor_cfg = {
1661 * Exclude QCIF mode, because it only captures a tiny portion
1669 int mccic_register(struct mcam_camera *cam)
1671 struct i2c_board_info ov7670_info = {
1674 .platform_data = &sensor_cfg,
1681 ret = v4l2_device_register(cam->dev, &cam->v4l2_dev);
1685 mutex_init(&cam->s_mutex);
1686 cam->state = S_NOTREADY;
1687 mcam_set_config_needed(cam, 1);
1688 cam->pix_format = mcam_def_pix_format;
1689 cam->mbus_code = mcam_def_mbus_code;
1690 INIT_LIST_HEAD(&cam->dev_list);
1691 INIT_LIST_HEAD(&cam->buffers);
1692 tasklet_init(&cam->s_tasklet, mcam_frame_tasklet, (unsigned long) cam);
1694 * User space may want to override the asked-for buffer mode;
1695 * here's hoping they know what they're doing.
1697 if (buffer_mode == 0)
1698 cam->buffer_mode = B_vmalloc;
1699 else if (buffer_mode == 1)
1700 cam->buffer_mode = B_DMA_contig;
1701 else if (buffer_mode == 2) {
1702 if (cam->chip_id == V4L2_IDENT_ARMADA610)
1703 cam->buffer_mode = B_DMA_sg;
1705 printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O\n");
1706 cam->buffer_mode = B_vmalloc;
1708 } else if (buffer_mode != -1)
1709 printk(KERN_ERR "marvell-cam: "
1710 "Strange module buffer mode %d - ignoring\n",
1712 mcam_ctlr_init(cam);
1715 * Try to find the sensor.
1717 sensor_cfg.clock_speed = cam->clock_speed;
1718 sensor_cfg.use_smbus = cam->use_smbus;
1719 cam->sensor_addr = ov7670_info.addr;
1720 cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev,
1721 cam->i2c_adapter, &ov7670_info, NULL);
1722 if (cam->sensor == NULL) {
1724 goto out_unregister;
1727 ret = mcam_cam_init(cam);
1729 goto out_unregister;
1731 * Get the v4l2 setup done.
1733 mutex_lock(&cam->s_mutex);
1734 cam->vdev = mcam_v4l_template;
1735 cam->vdev.debug = 0;
1736 cam->vdev.v4l2_dev = &cam->v4l2_dev;
1737 ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1);
1740 video_set_drvdata(&cam->vdev, cam);
1743 * If so requested, try to get our DMA buffers now.
1745 if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) {
1746 if (mcam_alloc_dma_bufs(cam, 1))
1747 cam_warn(cam, "Unable to alloc DMA buffers at load"
1748 " will try again later.");
1752 mutex_unlock(&cam->s_mutex);
1755 v4l2_device_unregister(&cam->v4l2_dev);
1760 void mccic_shutdown(struct mcam_camera *cam)
1763 * If we have no users (and we really, really should have no
1764 * users) the device will already be powered down. Trying to
1765 * take it down again will wedge the machine, which is frowned
1768 if (cam->users > 0) {
1769 cam_warn(cam, "Removing a device with users!\n");
1770 mcam_ctlr_power_down(cam);
1772 vb2_queue_release(&cam->vb_queue);
1773 if (cam->buffer_mode == B_vmalloc)
1774 mcam_free_dma_bufs(cam);
1775 video_unregister_device(&cam->vdev);
1776 v4l2_device_unregister(&cam->v4l2_dev);
1784 void mccic_suspend(struct mcam_camera *cam)
1786 enum mcam_state cstate = cam->state;
1788 mcam_ctlr_stop_dma(cam);
1789 mcam_ctlr_power_down(cam);
1790 cam->state = cstate;
1793 int mccic_resume(struct mcam_camera *cam)
1797 mutex_lock(&cam->s_mutex);
1798 if (cam->users > 0) {
1799 mcam_ctlr_power_up(cam);
1800 __mcam_cam_reset(cam);
1802 mcam_ctlr_power_down(cam);
1804 mutex_unlock(&cam->s_mutex);
1806 set_bit(CF_CONFIG_NEEDED, &cam->flags);
1807 if (cam->state == S_STREAMING)
1808 ret = mcam_read_setup(cam);
1811 #endif /* CONFIG_PM */