drivers/mfd/altera-a10sr.c

   1 /*
   2  * Copyright Intel Corporation (C) 2014-2016. All Rights Reserved
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * SPI access for Altera Arria10 MAX5 System Resource Chip
  17  *
  18  * Adapted from DA9052
  19  */
  20
  21 #include <linux/mfd/altera-a10sr.h>
  22 #include <linux/mfd/core.h>
  23 #include <linux/module.h>
  24 #include <linux/of.h>
  25 #include <linux/spi/spi.h>
  26
  27 static const struct mfd_cell altr_a10sr_subdev_info[] = {
  28         {
  29                 .name = "altr_a10sr_gpio",
  30                 .of_compatible = "altr,a10sr-gpio",
  31         },
  32 };
  33
  34 static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
  35 {
  36         switch (reg) {
  37         case ALTR_A10SR_VERSION_READ:
  38         case ALTR_A10SR_LED_REG:
  39         case ALTR_A10SR_PBDSW_REG:
  40         case ALTR_A10SR_PBDSW_IRQ_REG:
  41         case ALTR_A10SR_PWR_GOOD1_REG:
  42         case ALTR_A10SR_PWR_GOOD2_REG:
  43         case ALTR_A10SR_PWR_GOOD3_REG:
  44         case ALTR_A10SR_FMCAB_REG:
  45         case ALTR_A10SR_HPS_RST_REG:
  46         case ALTR_A10SR_USB_QSPI_REG:
  47         case ALTR_A10SR_SFPA_REG:
  48         case ALTR_A10SR_SFPB_REG:
  49         case ALTR_A10SR_I2C_M_REG:
  50         case ALTR_A10SR_WARM_RST_REG:
  51         case ALTR_A10SR_WR_KEY_REG:
  52         case ALTR_A10SR_PMBUS_REG:
  53                 return true;
  54         default:
  55                 return false;
  56         }
  57 }
  58
  59 static bool altr_a10sr_reg_writeable(struct device *dev, unsigned int reg)
  60 {
  61         switch (reg) {
  62         case ALTR_A10SR_LED_REG:
  63         case ALTR_A10SR_PBDSW_IRQ_REG:
  64         case ALTR_A10SR_FMCAB_REG:
  65         case ALTR_A10SR_HPS_RST_REG:
  66         case ALTR_A10SR_USB_QSPI_REG:
  67         case ALTR_A10SR_SFPA_REG:
  68         case ALTR_A10SR_SFPB_REG:
  69         case ALTR_A10SR_WARM_RST_REG:
  70         case ALTR_A10SR_WR_KEY_REG:
  71         case ALTR_A10SR_PMBUS_REG:
  72                 return true;
  73         default:
  74                 return false;
  75         }
  76 }
  77
  78 static bool altr_a10sr_reg_volatile(struct device *dev, unsigned int reg)
  79 {
  80         switch (reg) {
  81         case ALTR_A10SR_PBDSW_REG:
  82         case ALTR_A10SR_PBDSW_IRQ_REG:
  83         case ALTR_A10SR_PWR_GOOD1_REG:
  84         case ALTR_A10SR_PWR_GOOD2_REG:
  85         case ALTR_A10SR_PWR_GOOD3_REG:
  86         case ALTR_A10SR_HPS_RST_REG:
  87         case ALTR_A10SR_I2C_M_REG:
  88         case ALTR_A10SR_WARM_RST_REG:
  89         case ALTR_A10SR_WR_KEY_REG:
  90         case ALTR_A10SR_PMBUS_REG:
  91                 return true;
  92         default:
  93                 return false;
  94         }
  95 }
  96
  97 const struct regmap_config altr_a10sr_regmap_config = {
  98         .reg_bits = 8,
  99         .val_bits = 8,
 100
 101         .cache_type = REGCACHE_NONE,
 102
 103         .use_single_rw = true,
 104         .read_flag_mask = 1,
 105         .write_flag_mask = 0,
 106
 107         .max_register = ALTR_A10SR_WR_KEY_REG,
 108         .readable_reg = altr_a10sr_reg_readable,
 109         .writeable_reg = altr_a10sr_reg_writeable,
 110         .volatile_reg = altr_a10sr_reg_volatile,
 111
 112 };
 113
 114 static int altr_a10sr_spi_probe(struct spi_device *spi)
 115 {
 116         int ret;
 117         struct altr_a10sr *a10sr;
 118
 119         a10sr = devm_kzalloc(&spi->dev, sizeof(*a10sr),
 120                              GFP_KERNEL);
 121         if (!a10sr)
 122                 return -ENOMEM;
 123
 124         spi->mode = SPI_MODE_3;
 125         spi->bits_per_word = 8;
 126         spi_setup(spi);
 127
 128         a10sr->dev = &spi->dev;
 129
 130         spi_set_drvdata(spi, a10sr);
 131
 132         a10sr->regmap = devm_regmap_init_spi(spi, &altr_a10sr_regmap_config);
 133         if (IS_ERR(a10sr->regmap)) {
 134                 ret = PTR_ERR(a10sr->regmap);
 135                 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
 136                         ret);
 137                 return ret;
 138         }
 139
 140         ret = devm_mfd_add_devices(a10sr->dev, PLATFORM_DEVID_AUTO,
 141                                    altr_a10sr_subdev_info,
 142                                    ARRAY_SIZE(altr_a10sr_subdev_info),
 143                                    NULL, 0, NULL);
 144         if (ret)
 145                 dev_err(a10sr->dev, "Failed to register sub-devices: %d\n",
 146                         ret);
 147
 148         return ret;
 149 }
 150
 151 static const struct of_device_id altr_a10sr_spi_of_match[] = {
 152         { .compatible = "altr,a10sr" },
 153         { },
 154 };
 155 MODULE_DEVICE_TABLE(of, altr_a10sr_spi_of_match);
 156
 157 static struct spi_driver altr_a10sr_spi_driver = {
 158         .probe = altr_a10sr_spi_probe,
 159         .driver = {
 160                 .name = "altr_a10sr",
 161                 .of_match_table = of_match_ptr(altr_a10sr_spi_of_match),
 162         },
 163 };
 164
 165 module_spi_driver(altr_a10sr_spi_driver);
 166
 167 MODULE_LICENSE("GPL v2");
 168 MODULE_AUTHOR("Thor Thayer <tthayer@opensource.altera.com>");
 169 MODULE_DESCRIPTION("Altera Arria10 DevKit System Resource MFD Driver");