2 * ChromeOS EC multi-function device (SPI)
4 * Copyright (C) 2012 Google, Inc
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/delay.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/mfd/cros_ec.h>
20 #include <linux/mfd/cros_ec_commands.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/spi/spi.h>
27 /* The header byte, which follows the preamble */
28 #define EC_MSG_HEADER 0xec
31 * Number of EC preamble bytes we read at a time. Since it takes
32 * about 400-500us for the EC to respond there is not a lot of
33 * point in tuning this. If the EC could respond faster then
34 * we could increase this so that might expect the preamble and
35 * message to occur in a single transaction. However, the maximum
36 * SPI transfer size is 256 bytes, so at 5MHz we need a response
37 * time of perhaps <320us (200 bytes / 1600 bits).
39 #define EC_MSG_PREAMBLE_COUNT 32
42 * We must get a response from the EC in 5ms. This is a very long
43 * time, but the flash write command can take 2-3ms. The EC command
44 * processing is currently not very fast (about 500us). We could
45 * look at speeding this up and making the flash write command a
46 * 'slow' command, requiring a GET_STATUS wait loop, like flash
49 #define EC_MSG_DEADLINE_MS 5
52 * Time between raising the SPI chip select (for the end of a
53 * transaction) and dropping it again (for the next transaction).
54 * If we go too fast, the EC will miss the transaction. We know that we
55 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
58 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
61 * struct cros_ec_spi - information about a SPI-connected EC
63 * @spi: SPI device we are connected to
64 * @last_transfer_ns: time that we last finished a transfer, or 0 if there
66 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
67 * is sent when we want to turn off CS at the end of a transaction.
68 * @lock: mutex to ensure only one user of cros_ec_command_spi_xfer at a time
71 struct spi_device *spi;
73 unsigned int end_of_msg_delay;
77 static void debug_packet(struct device *dev, const char *name, u8 *ptr,
83 dev_dbg(dev, "%s: ", name);
84 for (i = 0; i < len; i++)
85 pr_cont(" %02x", ptr[i]);
92 * cros_ec_spi_receive_response - Receive a response from the EC.
94 * This function has two phases: reading the preamble bytes (since if we read
95 * data from the EC before it is ready to send, we just get preamble) and
96 * reading the actual message.
98 * The received data is placed into ec_dev->din.
100 * @ec_dev: ChromeOS EC device
101 * @need_len: Number of message bytes we need to read
103 static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
106 struct cros_ec_spi *ec_spi = ec_dev->priv;
107 struct spi_transfer trans;
108 struct spi_message msg;
111 unsigned long deadline;
114 /* Receive data until we see the header byte */
115 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
117 memset(&trans, 0, sizeof(trans));
119 trans.rx_buf = ptr = ec_dev->din;
120 trans.len = EC_MSG_PREAMBLE_COUNT;
122 spi_message_init(&msg);
123 spi_message_add_tail(&trans, &msg);
124 ret = spi_sync(ec_spi->spi, &msg);
126 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
130 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
131 if (*ptr == EC_MSG_HEADER) {
132 dev_dbg(ec_dev->dev, "msg found at %zd\n",
138 if (time_after(jiffies, deadline)) {
139 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
142 } while (ptr == end);
145 * ptr now points to the header byte. Copy any valid data to the
146 * start of our buffer
149 BUG_ON(todo < 0 || todo > ec_dev->din_size);
150 todo = min(todo, need_len);
151 memmove(ec_dev->din, ptr, todo);
152 ptr = ec_dev->din + todo;
153 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
157 /* Receive data until we have it all */
158 while (need_len > 0) {
160 * We can't support transfers larger than the SPI FIFO size
161 * unless we have DMA. We don't have DMA on the ISP SPI ports
162 * for Exynos. We need a way of asking SPI driver for
163 * maximum-supported transfer size.
165 todo = min(need_len, 256);
166 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
167 todo, need_len, ptr - ec_dev->din);
169 memset(&trans, 0, sizeof(trans));
173 spi_message_init(&msg);
174 spi_message_add_tail(&trans, &msg);
176 /* send command to EC and read answer */
177 BUG_ON((u8 *)trans.rx_buf - ec_dev->din + todo >
179 ret = spi_sync(ec_spi->spi, &msg);
181 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
185 debug_packet(ec_dev->dev, "interim", ptr, todo);
190 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
196 * cros_ec_command_spi_xfer - Transfer a message over SPI and receive the reply
198 * @ec_dev: ChromeOS EC device
199 * @ec_msg: Message to transfer
201 static int cros_ec_command_spi_xfer(struct cros_ec_device *ec_dev,
202 struct cros_ec_msg *ec_msg)
204 struct cros_ec_spi *ec_spi = ec_dev->priv;
205 struct spi_transfer trans;
206 struct spi_message msg;
210 int ret = 0, final_ret;
214 * We have the shared ec_dev buffer plus we do lots of separate spi_sync
215 * calls, so we need to make sure only one person is using this at a
218 mutex_lock(&ec_spi->lock);
220 len = cros_ec_prepare_tx(ec_dev, ec_msg);
221 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
223 /* If it's too soon to do another transaction, wait */
224 if (ec_spi->last_transfer_ns) {
226 unsigned long delay; /* The delay completed so far */
229 delay = timespec_to_ns(&ts) - ec_spi->last_transfer_ns;
230 if (delay < EC_SPI_RECOVERY_TIME_NS)
231 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
234 /* Transmit phase - send our message */
235 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
236 memset(&trans, 0, sizeof(trans));
237 trans.tx_buf = ec_dev->dout;
240 spi_message_init(&msg);
241 spi_message_add_tail(&trans, &msg);
242 ret = spi_sync(ec_spi->spi, &msg);
244 /* Get the response */
246 ret = cros_ec_spi_receive_response(ec_dev,
247 ec_msg->in_len + EC_MSG_TX_PROTO_BYTES);
249 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
253 spi_message_init(&msg);
255 if (ec_spi->end_of_msg_delay) {
257 * Add delay for last transaction, to ensure the rising edge
258 * doesn't come too soon after the end of the data.
260 memset(&trans, 0, sizeof(trans));
261 trans.delay_usecs = ec_spi->end_of_msg_delay;
262 spi_message_add_tail(&trans, &msg);
265 final_ret = spi_sync(ec_spi->spi, &msg);
267 ec_spi->last_transfer_ns = timespec_to_ns(&ts);
271 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
275 /* check response error code */
278 dev_warn(ec_dev->dev, "command 0x%02x returned an error %d\n",
279 ec_msg->cmd, ptr[0]);
280 debug_packet(ec_dev->dev, "in_err", ptr, len);
285 sum = ptr[0] + ptr[1];
286 if (len > ec_msg->in_len) {
287 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
288 len, ec_msg->in_len);
293 /* copy response packet payload and compute checksum */
294 for (i = 0; i < len; i++) {
297 ec_msg->in_buf[i] = ptr[i + 2];
301 debug_packet(ec_dev->dev, "in", ptr, len + 3);
303 if (sum != ptr[len + 2]) {
305 "bad packet checksum, expected %02x, got %02x\n",
313 mutex_unlock(&ec_spi->lock);
317 static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
319 struct device_node *np = dev->of_node;
323 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
325 ec_spi->end_of_msg_delay = val;
328 static int cros_ec_spi_probe(struct spi_device *spi)
330 struct device *dev = &spi->dev;
331 struct cros_ec_device *ec_dev;
332 struct cros_ec_spi *ec_spi;
335 spi->bits_per_word = 8;
336 spi->mode = SPI_MODE_0;
337 err = spi_setup(spi);
341 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
345 mutex_init(&ec_spi->lock);
346 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
350 /* Check for any DT properties */
351 cros_ec_spi_dt_probe(ec_spi, dev);
353 spi_set_drvdata(spi, ec_dev);
354 ec_dev->name = "SPI";
356 ec_dev->priv = ec_spi;
357 ec_dev->irq = spi->irq;
358 ec_dev->command_xfer = cros_ec_command_spi_xfer;
359 ec_dev->ec_name = ec_spi->spi->modalias;
360 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
361 ec_dev->parent = &ec_spi->spi->dev;
362 ec_dev->din_size = EC_MSG_BYTES + EC_MSG_PREAMBLE_COUNT;
363 ec_dev->dout_size = EC_MSG_BYTES;
365 err = cros_ec_register(ec_dev);
367 dev_err(dev, "cannot register EC\n");
374 static int cros_ec_spi_remove(struct spi_device *spi)
376 struct cros_ec_device *ec_dev;
378 ec_dev = spi_get_drvdata(spi);
379 cros_ec_remove(ec_dev);
384 #ifdef CONFIG_PM_SLEEP
385 static int cros_ec_spi_suspend(struct device *dev)
387 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
389 return cros_ec_suspend(ec_dev);
392 static int cros_ec_spi_resume(struct device *dev)
394 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
396 return cros_ec_resume(ec_dev);
400 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
403 static const struct spi_device_id cros_ec_spi_id[] = {
404 { "cros-ec-spi", 0 },
407 MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
409 static struct spi_driver cros_ec_driver_spi = {
411 .name = "cros-ec-spi",
412 .owner = THIS_MODULE,
413 .pm = &cros_ec_spi_pm_ops,
415 .probe = cros_ec_spi_probe,
416 .remove = cros_ec_spi_remove,
417 .id_table = cros_ec_spi_id,
420 module_spi_driver(cros_ec_driver_spi);
422 MODULE_LICENSE("GPL v2");
423 MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");