mfd: sm501: Constify gpio_chip structures
[cascardo/linux.git] / drivers / mfd / intel-lpss-pci.c
1 /*
2  * Intel LPSS PCI support.
3  *
4  * Copyright (C) 2015, Intel Corporation
5  *
6  * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7  *          Mika Westerberg <mika.westerberg@linux.intel.com>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13
14 #include <linux/ioport.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/pci.h>
18 #include <linux/pm.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/property.h>
21
22 #include "intel-lpss.h"
23
24 static int intel_lpss_pci_probe(struct pci_dev *pdev,
25                                 const struct pci_device_id *id)
26 {
27         struct intel_lpss_platform_info *info;
28         int ret;
29
30         ret = pcim_enable_device(pdev);
31         if (ret)
32                 return ret;
33
34         info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info),
35                             GFP_KERNEL);
36         if (!info)
37                 return -ENOMEM;
38
39         info->mem = &pdev->resource[0];
40         info->irq = pdev->irq;
41
42         /* Probably it is enough to set this for iDMA capable devices only */
43         pci_set_master(pdev);
44
45         ret = intel_lpss_probe(&pdev->dev, info);
46         if (ret)
47                 return ret;
48
49         pm_runtime_put(&pdev->dev);
50         pm_runtime_allow(&pdev->dev);
51
52         return 0;
53 }
54
55 static void intel_lpss_pci_remove(struct pci_dev *pdev)
56 {
57         pm_runtime_forbid(&pdev->dev);
58         pm_runtime_get_sync(&pdev->dev);
59
60         intel_lpss_remove(&pdev->dev);
61 }
62
63 static INTEL_LPSS_PM_OPS(intel_lpss_pci_pm_ops);
64
65 static const struct intel_lpss_platform_info spt_info = {
66         .clk_rate = 120000000,
67 };
68
69 static struct property_entry spt_i2c_properties[] = {
70         PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
71         { },
72 };
73
74 static const struct intel_lpss_platform_info spt_i2c_info = {
75         .clk_rate = 120000000,
76         .properties = spt_i2c_properties,
77 };
78
79 static struct property_entry uart_properties[] = {
80         PROPERTY_ENTRY_U32("reg-io-width", 4),
81         PROPERTY_ENTRY_U32("reg-shift", 2),
82         PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
83         { },
84 };
85
86 static const struct intel_lpss_platform_info spt_uart_info = {
87         .clk_rate = 120000000,
88         .clk_con_id = "baudclk",
89         .properties = uart_properties,
90 };
91
92 static const struct intel_lpss_platform_info bxt_info = {
93         .clk_rate = 100000000,
94 };
95
96 static const struct intel_lpss_platform_info bxt_uart_info = {
97         .clk_rate = 100000000,
98         .clk_con_id = "baudclk",
99         .properties = uart_properties,
100 };
101
102 static struct property_entry bxt_i2c_properties[] = {
103         PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
104         PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
105         PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
106         { },
107 };
108
109 static const struct intel_lpss_platform_info bxt_i2c_info = {
110         .clk_rate = 133000000,
111         .properties = bxt_i2c_properties,
112 };
113
114 static const struct intel_lpss_platform_info kbl_info = {
115         .clk_rate = 120000000,
116 };
117
118 static const struct intel_lpss_platform_info kbl_uart_info = {
119         .clk_rate = 120000000,
120         .clk_con_id = "baudclk",
121 };
122
123 static const struct intel_lpss_platform_info kbl_i2c_info = {
124         .clk_rate = 133000000,
125 };
126
127 static const struct pci_device_id intel_lpss_pci_ids[] = {
128         /* BXT A-Step */
129         { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
130         { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info },
131         { PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info },
132         { PCI_VDEVICE(INTEL, 0x0ab2), (kernel_ulong_t)&bxt_i2c_info },
133         { PCI_VDEVICE(INTEL, 0x0ab4), (kernel_ulong_t)&bxt_i2c_info },
134         { PCI_VDEVICE(INTEL, 0x0ab6), (kernel_ulong_t)&bxt_i2c_info },
135         { PCI_VDEVICE(INTEL, 0x0ab8), (kernel_ulong_t)&bxt_i2c_info },
136         { PCI_VDEVICE(INTEL, 0x0aba), (kernel_ulong_t)&bxt_i2c_info },
137         { PCI_VDEVICE(INTEL, 0x0abc), (kernel_ulong_t)&bxt_uart_info },
138         { PCI_VDEVICE(INTEL, 0x0abe), (kernel_ulong_t)&bxt_uart_info },
139         { PCI_VDEVICE(INTEL, 0x0ac0), (kernel_ulong_t)&bxt_uart_info },
140         { PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_info },
141         { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info },
142         { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info },
143         { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info },
144         /* BXT B-Step */
145         { PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info },
146         { PCI_VDEVICE(INTEL, 0x1aae), (kernel_ulong_t)&bxt_i2c_info },
147         { PCI_VDEVICE(INTEL, 0x1ab0), (kernel_ulong_t)&bxt_i2c_info },
148         { PCI_VDEVICE(INTEL, 0x1ab2), (kernel_ulong_t)&bxt_i2c_info },
149         { PCI_VDEVICE(INTEL, 0x1ab4), (kernel_ulong_t)&bxt_i2c_info },
150         { PCI_VDEVICE(INTEL, 0x1ab6), (kernel_ulong_t)&bxt_i2c_info },
151         { PCI_VDEVICE(INTEL, 0x1ab8), (kernel_ulong_t)&bxt_i2c_info },
152         { PCI_VDEVICE(INTEL, 0x1aba), (kernel_ulong_t)&bxt_i2c_info },
153         { PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info },
154         { PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info },
155         { PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info },
156         { PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info },
157         { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info },
158         { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info },
159         { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info },
160
161         /* APL */
162         { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&bxt_i2c_info },
163         { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&bxt_i2c_info },
164         { PCI_VDEVICE(INTEL, 0x5ab0), (kernel_ulong_t)&bxt_i2c_info },
165         { PCI_VDEVICE(INTEL, 0x5ab2), (kernel_ulong_t)&bxt_i2c_info },
166         { PCI_VDEVICE(INTEL, 0x5ab4), (kernel_ulong_t)&bxt_i2c_info },
167         { PCI_VDEVICE(INTEL, 0x5ab6), (kernel_ulong_t)&bxt_i2c_info },
168         { PCI_VDEVICE(INTEL, 0x5ab8), (kernel_ulong_t)&bxt_i2c_info },
169         { PCI_VDEVICE(INTEL, 0x5aba), (kernel_ulong_t)&bxt_i2c_info },
170         { PCI_VDEVICE(INTEL, 0x5abc), (kernel_ulong_t)&bxt_uart_info },
171         { PCI_VDEVICE(INTEL, 0x5abe), (kernel_ulong_t)&bxt_uart_info },
172         { PCI_VDEVICE(INTEL, 0x5ac0), (kernel_ulong_t)&bxt_uart_info },
173         { PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_info },
174         { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info },
175         { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info },
176         { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info },
177         /* SPT-LP */
178         { PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info },
179         { PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info },
180         { PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info },
181         { PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info },
182         { PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_i2c_info },
183         { PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_i2c_info },
184         { PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_i2c_info },
185         { PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_i2c_info },
186         { PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_i2c_info },
187         { PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_i2c_info },
188         { PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info },
189         /* SPT-H */
190         { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },
191         { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },
192         { PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info },
193         { PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info },
194         { PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info },
195         { PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info },
196         { PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info },
197         /* KBL-H */
198         { PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&kbl_uart_info },
199         { PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&kbl_uart_info },
200         { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&kbl_info },
201         { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&kbl_info },
202         { PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&kbl_i2c_info },
203         { PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&kbl_i2c_info },
204         { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&kbl_i2c_info },
205         { PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&kbl_i2c_info },
206         { PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&kbl_uart_info },
207         { }
208 };
209 MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids);
210
211 static struct pci_driver intel_lpss_pci_driver = {
212         .name = "intel-lpss",
213         .id_table = intel_lpss_pci_ids,
214         .probe = intel_lpss_pci_probe,
215         .remove = intel_lpss_pci_remove,
216         .driver = {
217                 .pm = &intel_lpss_pci_pm_ops,
218         },
219 };
220
221 module_pci_driver(intel_lpss_pci_driver);
222
223 MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
224 MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
225 MODULE_DESCRIPTION("Intel LPSS PCI driver");
226 MODULE_LICENSE("GPL v2");