drivers/mfd/stmpe.c

   1 /*
   2  * ST Microelectronics MFD: stmpe's driver
   3  *
   4  * Copyright (C) ST-Ericsson SA 2010
   5  *
   6  * License Terms: GNU General Public License, version 2
   7  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
   8  */
   9
  10 #include <linux/err.h>
  11 #include <linux/gpio.h>
  12 #include <linux/export.h>
  13 #include <linux/kernel.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/irq.h>
  16 #include <linux/irqdomain.h>
  17 #include <linux/of.h>
  18 #include <linux/of_gpio.h>
  19 #include <linux/pm.h>
  20 #include <linux/slab.h>
  21 #include <linux/mfd/core.h>
  22 #include <linux/delay.h>
  23 #include <linux/regulator/consumer.h>
  24 #include "stmpe.h"
  25
  26 /**
  27  * struct stmpe_platform_data - STMPE platform data
  28  * @id: device id to distinguish between multiple STMPEs on the same board
  29  * @blocks: bitmask of blocks to enable (use STMPE_BLOCK_*)
  30  * @irq_trigger: IRQ trigger to use for the interrupt to the host
  31  * @autosleep: bool to enable/disable stmpe autosleep
  32  * @autosleep_timeout: inactivity timeout in milliseconds for autosleep
  33  * @irq_over_gpio: true if gpio is used to get irq
  34  * @irq_gpio: gpio number over which irq will be requested (significant only if
  35  *            irq_over_gpio is true)
  36  */
  37 struct stmpe_platform_data {
  38         int id;
  39         unsigned int blocks;
  40         unsigned int irq_trigger;
  41         bool autosleep;
  42         bool irq_over_gpio;
  43         int irq_gpio;
  44         int autosleep_timeout;
  45 };
  46
  47 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
  48 {
  49         return stmpe->variant->enable(stmpe, blocks, true);
  50 }
  51
  52 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
  53 {
  54         return stmpe->variant->enable(stmpe, blocks, false);
  55 }
  56
  57 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
  58 {
  59         int ret;
  60
  61         ret = stmpe->ci->read_byte(stmpe, reg);
  62         if (ret < 0)
  63                 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret);
  64
  65         dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
  66
  67         return ret;
  68 }
  69
  70 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
  71 {
  72         int ret;
  73
  74         dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
  75
  76         ret = stmpe->ci->write_byte(stmpe, reg, val);
  77         if (ret < 0)
  78                 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret);
  79
  80         return ret;
  81 }
  82
  83 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
  84 {
  85         int ret;
  86
  87         ret = __stmpe_reg_read(stmpe, reg);
  88         if (ret < 0)
  89                 return ret;
  90
  91         ret &= ~mask;
  92         ret |= val;
  93
  94         return __stmpe_reg_write(stmpe, reg, ret);
  95 }
  96
  97 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
  98                               u8 *values)
  99 {
 100         int ret;
 101
 102         ret = stmpe->ci->read_block(stmpe, reg, length, values);
 103         if (ret < 0)
 104                 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret);
 105
 106         dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
 107         stmpe_dump_bytes("stmpe rd: ", values, length);
 108
 109         return ret;
 110 }
 111
 112 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
 113                         const u8 *values)
 114 {
 115         int ret;
 116
 117         dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
 118         stmpe_dump_bytes("stmpe wr: ", values, length);
 119
 120         ret = stmpe->ci->write_block(stmpe, reg, length, values);
 121         if (ret < 0)
 122                 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret);
 123
 124         return ret;
 125 }
 126
 127 /**
 128  * stmpe_enable - enable blocks on an STMPE device
 129  * @stmpe:      Device to work on
 130  * @blocks:     Mask of blocks (enum stmpe_block values) to enable
 131  */
 132 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
 133 {
 134         int ret;
 135
 136         mutex_lock(&stmpe->lock);
 137         ret = __stmpe_enable(stmpe, blocks);
 138         mutex_unlock(&stmpe->lock);
 139
 140         return ret;
 141 }
 142 EXPORT_SYMBOL_GPL(stmpe_enable);
 143
 144 /**
 145  * stmpe_disable - disable blocks on an STMPE device
 146  * @stmpe:      Device to work on
 147  * @blocks:     Mask of blocks (enum stmpe_block values) to enable
 148  */
 149 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
 150 {
 151         int ret;
 152
 153         mutex_lock(&stmpe->lock);
 154         ret = __stmpe_disable(stmpe, blocks);
 155         mutex_unlock(&stmpe->lock);
 156
 157         return ret;
 158 }
 159 EXPORT_SYMBOL_GPL(stmpe_disable);
 160
 161 /**
 162  * stmpe_reg_read() - read a single STMPE register
 163  * @stmpe:      Device to read from
 164  * @reg:        Register to read
 165  */
 166 int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
 167 {
 168         int ret;
 169
 170         mutex_lock(&stmpe->lock);
 171         ret = __stmpe_reg_read(stmpe, reg);
 172         mutex_unlock(&stmpe->lock);
 173
 174         return ret;
 175 }
 176 EXPORT_SYMBOL_GPL(stmpe_reg_read);
 177
 178 /**
 179  * stmpe_reg_write() - write a single STMPE register
 180  * @stmpe:      Device to write to
 181  * @reg:        Register to write
 182  * @val:        Value to write
 183  */
 184 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
 185 {
 186         int ret;
 187
 188         mutex_lock(&stmpe->lock);
 189         ret = __stmpe_reg_write(stmpe, reg, val);
 190         mutex_unlock(&stmpe->lock);
 191
 192         return ret;
 193 }
 194 EXPORT_SYMBOL_GPL(stmpe_reg_write);
 195
 196 /**
 197  * stmpe_set_bits() - set the value of a bitfield in a STMPE register
 198  * @stmpe:      Device to write to
 199  * @reg:        Register to write
 200  * @mask:       Mask of bits to set
 201  * @val:        Value to set
 202  */
 203 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
 204 {
 205         int ret;
 206
 207         mutex_lock(&stmpe->lock);
 208         ret = __stmpe_set_bits(stmpe, reg, mask, val);
 209         mutex_unlock(&stmpe->lock);
 210
 211         return ret;
 212 }
 213 EXPORT_SYMBOL_GPL(stmpe_set_bits);
 214
 215 /**
 216  * stmpe_block_read() - read multiple STMPE registers
 217  * @stmpe:      Device to read from
 218  * @reg:        First register
 219  * @length:     Number of registers
 220  * @values:     Buffer to write to
 221  */
 222 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
 223 {
 224         int ret;
 225
 226         mutex_lock(&stmpe->lock);
 227         ret = __stmpe_block_read(stmpe, reg, length, values);
 228         mutex_unlock(&stmpe->lock);
 229
 230         return ret;
 231 }
 232 EXPORT_SYMBOL_GPL(stmpe_block_read);
 233
 234 /**
 235  * stmpe_block_write() - write multiple STMPE registers
 236  * @stmpe:      Device to write to
 237  * @reg:        First register
 238  * @length:     Number of registers
 239  * @values:     Values to write
 240  */
 241 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
 242                       const u8 *values)
 243 {
 244         int ret;
 245
 246         mutex_lock(&stmpe->lock);
 247         ret = __stmpe_block_write(stmpe, reg, length, values);
 248         mutex_unlock(&stmpe->lock);
 249
 250         return ret;
 251 }
 252 EXPORT_SYMBOL_GPL(stmpe_block_write);
 253
 254 /**
 255  * stmpe_set_altfunc()- set the alternate function for STMPE pins
 256  * @stmpe:      Device to configure
 257  * @pins:       Bitmask of pins to affect
 258  * @block:      block to enable alternate functions for
 259  *
 260  * @pins is assumed to have a bit set for each of the bits whose alternate
 261  * function is to be changed, numbered according to the GPIOXY numbers.
 262  *
 263  * If the GPIO module is not enabled, this function automatically enables it in
 264  * order to perform the change.
 265  */
 266 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
 267 {
 268         struct stmpe_variant_info *variant = stmpe->variant;
 269         u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
 270         int af_bits = variant->af_bits;
 271         int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
 272         int mask = (1 << af_bits) - 1;
 273         u8 regs[8];
 274         int af, afperreg, ret;
 275
 276         if (!variant->get_altfunc)
 277                 return 0;
 278
 279         afperreg = 8 / af_bits;
 280         mutex_lock(&stmpe->lock);
 281
 282         ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
 283         if (ret < 0)
 284                 goto out;
 285
 286         ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
 287         if (ret < 0)
 288                 goto out;
 289
 290         af = variant->get_altfunc(stmpe, block);
 291
 292         while (pins) {
 293                 int pin = __ffs(pins);
 294                 int regoffset = numregs - (pin / afperreg) - 1;
 295                 int pos = (pin % afperreg) * (8 / afperreg);
 296
 297                 regs[regoffset] &= ~(mask << pos);
 298                 regs[regoffset] |= af << pos;
 299
 300                 pins &= ~(1 << pin);
 301         }
 302
 303         ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
 304
 305 out:
 306         mutex_unlock(&stmpe->lock);
 307         return ret;
 308 }
 309 EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
 310
 311 /*
 312  * GPIO (all variants)
 313  */
 314
 315 static struct resource stmpe_gpio_resources[] = {
 316         /* Start and end filled dynamically */
 317         {
 318                 .flags  = IORESOURCE_IRQ,
 319         },
 320 };
 321
 322 static const struct mfd_cell stmpe_gpio_cell = {
 323         .name           = "stmpe-gpio",
 324         .of_compatible  = "st,stmpe-gpio",
 325         .resources      = stmpe_gpio_resources,
 326         .num_resources  = ARRAY_SIZE(stmpe_gpio_resources),
 327 };
 328
 329 static const struct mfd_cell stmpe_gpio_cell_noirq = {
 330         .name           = "stmpe-gpio",
 331         .of_compatible  = "st,stmpe-gpio",
 332         /* gpio cell resources consist of an irq only so no resources here */
 333 };
 334
 335 /*
 336  * Keypad (1601, 2401, 2403)
 337  */
 338
 339 static struct resource stmpe_keypad_resources[] = {
 340         {
 341                 .name   = "KEYPAD",
 342                 .flags  = IORESOURCE_IRQ,
 343         },
 344         {
 345                 .name   = "KEYPAD_OVER",
 346                 .flags  = IORESOURCE_IRQ,
 347         },
 348 };
 349
 350 static const struct mfd_cell stmpe_keypad_cell = {
 351         .name           = "stmpe-keypad",
 352         .of_compatible  = "st,stmpe-keypad",
 353         .resources      = stmpe_keypad_resources,
 354         .num_resources  = ARRAY_SIZE(stmpe_keypad_resources),
 355 };
 356
 357 /*
 358  * PWM (1601, 2401, 2403)
 359  */
 360 static struct resource stmpe_pwm_resources[] = {
 361         {
 362                 .name   = "PWM0",
 363                 .flags  = IORESOURCE_IRQ,
 364         },
 365         {
 366                 .name   = "PWM1",
 367                 .flags  = IORESOURCE_IRQ,
 368         },
 369         {
 370                 .name   = "PWM2",
 371                 .flags  = IORESOURCE_IRQ,
 372         },
 373 };
 374
 375 static const struct mfd_cell stmpe_pwm_cell = {
 376         .name           = "stmpe-pwm",
 377         .of_compatible  = "st,stmpe-pwm",
 378         .resources      = stmpe_pwm_resources,
 379         .num_resources  = ARRAY_SIZE(stmpe_pwm_resources),
 380 };
 381
 382 /*
 383  * STMPE801
 384  */
 385 static const u8 stmpe801_regs[] = {
 386         [STMPE_IDX_CHIP_ID]     = STMPE801_REG_CHIP_ID,
 387         [STMPE_IDX_ICR_LSB]     = STMPE801_REG_SYS_CTRL,
 388         [STMPE_IDX_GPMR_LSB]    = STMPE801_REG_GPIO_MP_STA,
 389         [STMPE_IDX_GPSR_LSB]    = STMPE801_REG_GPIO_SET_PIN,
 390         [STMPE_IDX_GPCR_LSB]    = STMPE801_REG_GPIO_SET_PIN,
 391         [STMPE_IDX_GPDR_LSB]    = STMPE801_REG_GPIO_DIR,
 392         [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN,
 393         [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA,
 394
 395 };
 396
 397 static struct stmpe_variant_block stmpe801_blocks[] = {
 398         {
 399                 .cell   = &stmpe_gpio_cell,
 400                 .irq    = 0,
 401                 .block  = STMPE_BLOCK_GPIO,
 402         },
 403 };
 404
 405 static struct stmpe_variant_block stmpe801_blocks_noirq[] = {
 406         {
 407                 .cell   = &stmpe_gpio_cell_noirq,
 408                 .block  = STMPE_BLOCK_GPIO,
 409         },
 410 };
 411
 412 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks,
 413                            bool enable)
 414 {
 415         if (blocks & STMPE_BLOCK_GPIO)
 416                 return 0;
 417         else
 418                 return -EINVAL;
 419 }
 420
 421 static struct stmpe_variant_info stmpe801 = {
 422         .name           = "stmpe801",
 423         .id_val         = STMPE801_ID,
 424         .id_mask        = 0xffff,
 425         .num_gpios      = 8,
 426         .regs           = stmpe801_regs,
 427         .blocks         = stmpe801_blocks,
 428         .num_blocks     = ARRAY_SIZE(stmpe801_blocks),
 429         .num_irqs       = STMPE801_NR_INTERNAL_IRQS,
 430         .enable         = stmpe801_enable,
 431 };
 432
 433 static struct stmpe_variant_info stmpe801_noirq = {
 434         .name           = "stmpe801",
 435         .id_val         = STMPE801_ID,
 436         .id_mask        = 0xffff,
 437         .num_gpios      = 8,
 438         .regs           = stmpe801_regs,
 439         .blocks         = stmpe801_blocks_noirq,
 440         .num_blocks     = ARRAY_SIZE(stmpe801_blocks_noirq),
 441         .enable         = stmpe801_enable,
 442 };
 443
 444 /*
 445  * Touchscreen (STMPE811 or STMPE610)
 446  */
 447
 448 static struct resource stmpe_ts_resources[] = {
 449         {
 450                 .name   = "TOUCH_DET",
 451                 .flags  = IORESOURCE_IRQ,
 452         },
 453         {
 454                 .name   = "FIFO_TH",
 455                 .flags  = IORESOURCE_IRQ,
 456         },
 457 };
 458
 459 static const struct mfd_cell stmpe_ts_cell = {
 460         .name           = "stmpe-ts",
 461         .of_compatible  = "st,stmpe-ts",
 462         .resources      = stmpe_ts_resources,
 463         .num_resources  = ARRAY_SIZE(stmpe_ts_resources),
 464 };
 465
 466 /*
 467  * STMPE811 or STMPE610
 468  */
 469
 470 static const u8 stmpe811_regs[] = {
 471         [STMPE_IDX_CHIP_ID]     = STMPE811_REG_CHIP_ID,
 472         [STMPE_IDX_ICR_LSB]     = STMPE811_REG_INT_CTRL,
 473         [STMPE_IDX_IER_LSB]     = STMPE811_REG_INT_EN,
 474         [STMPE_IDX_ISR_MSB]     = STMPE811_REG_INT_STA,
 475         [STMPE_IDX_GPMR_LSB]    = STMPE811_REG_GPIO_MP_STA,
 476         [STMPE_IDX_GPSR_LSB]    = STMPE811_REG_GPIO_SET_PIN,
 477         [STMPE_IDX_GPCR_LSB]    = STMPE811_REG_GPIO_CLR_PIN,
 478         [STMPE_IDX_GPDR_LSB]    = STMPE811_REG_GPIO_DIR,
 479         [STMPE_IDX_GPRER_LSB]   = STMPE811_REG_GPIO_RE,
 480         [STMPE_IDX_GPFER_LSB]   = STMPE811_REG_GPIO_FE,
 481         [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF,
 482         [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN,
 483         [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA,
 484         [STMPE_IDX_GPEDR_MSB]   = STMPE811_REG_GPIO_ED,
 485 };
 486
 487 static struct stmpe_variant_block stmpe811_blocks[] = {
 488         {
 489                 .cell   = &stmpe_gpio_cell,
 490                 .irq    = STMPE811_IRQ_GPIOC,
 491                 .block  = STMPE_BLOCK_GPIO,
 492         },
 493         {
 494                 .cell   = &stmpe_ts_cell,
 495                 .irq    = STMPE811_IRQ_TOUCH_DET,
 496                 .block  = STMPE_BLOCK_TOUCHSCREEN,
 497         },
 498 };
 499
 500 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
 501                            bool enable)
 502 {
 503         unsigned int mask = 0;
 504
 505         if (blocks & STMPE_BLOCK_GPIO)
 506                 mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
 507
 508         if (blocks & STMPE_BLOCK_ADC)
 509                 mask |= STMPE811_SYS_CTRL2_ADC_OFF;
 510
 511         if (blocks & STMPE_BLOCK_TOUCHSCREEN)
 512                 mask |= STMPE811_SYS_CTRL2_TSC_OFF;
 513
 514         return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
 515                                 enable ? 0 : mask);
 516 }
 517
 518 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 519 {
 520         /* 0 for touchscreen, 1 for GPIO */
 521         return block != STMPE_BLOCK_TOUCHSCREEN;
 522 }
 523
 524 static struct stmpe_variant_info stmpe811 = {
 525         .name           = "stmpe811",
 526         .id_val         = 0x0811,
 527         .id_mask        = 0xffff,
 528         .num_gpios      = 8,
 529         .af_bits        = 1,
 530         .regs           = stmpe811_regs,
 531         .blocks         = stmpe811_blocks,
 532         .num_blocks     = ARRAY_SIZE(stmpe811_blocks),
 533         .num_irqs       = STMPE811_NR_INTERNAL_IRQS,
 534         .enable         = stmpe811_enable,
 535         .get_altfunc    = stmpe811_get_altfunc,
 536 };
 537
 538 /* Similar to 811, except number of gpios */
 539 static struct stmpe_variant_info stmpe610 = {
 540         .name           = "stmpe610",
 541         .id_val         = 0x0811,
 542         .id_mask        = 0xffff,
 543         .num_gpios      = 6,
 544         .af_bits        = 1,
 545         .regs           = stmpe811_regs,
 546         .blocks         = stmpe811_blocks,
 547         .num_blocks     = ARRAY_SIZE(stmpe811_blocks),
 548         .num_irqs       = STMPE811_NR_INTERNAL_IRQS,
 549         .enable         = stmpe811_enable,
 550         .get_altfunc    = stmpe811_get_altfunc,
 551 };
 552
 553 /*
 554  * STMPE1601
 555  */
 556
 557 static const u8 stmpe1601_regs[] = {
 558         [STMPE_IDX_CHIP_ID]     = STMPE1601_REG_CHIP_ID,
 559         [STMPE_IDX_ICR_LSB]     = STMPE1601_REG_ICR_LSB,
 560         [STMPE_IDX_IER_LSB]     = STMPE1601_REG_IER_LSB,
 561         [STMPE_IDX_ISR_MSB]     = STMPE1601_REG_ISR_MSB,
 562         [STMPE_IDX_GPMR_LSB]    = STMPE1601_REG_GPIO_MP_LSB,
 563         [STMPE_IDX_GPSR_LSB]    = STMPE1601_REG_GPIO_SET_LSB,
 564         [STMPE_IDX_GPCR_LSB]    = STMPE1601_REG_GPIO_CLR_LSB,
 565         [STMPE_IDX_GPDR_LSB]    = STMPE1601_REG_GPIO_SET_DIR_LSB,
 566         [STMPE_IDX_GPRER_LSB]   = STMPE1601_REG_GPIO_RE_LSB,
 567         [STMPE_IDX_GPFER_LSB]   = STMPE1601_REG_GPIO_FE_LSB,
 568         [STMPE_IDX_GPPUR_LSB]   = STMPE1601_REG_GPIO_PU_LSB,
 569         [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
 570         [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
 571         [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
 572         [STMPE_IDX_GPEDR_MSB]   = STMPE1601_REG_GPIO_ED_MSB,
 573 };
 574
 575 static struct stmpe_variant_block stmpe1601_blocks[] = {
 576         {
 577                 .cell   = &stmpe_gpio_cell,
 578                 .irq    = STMPE1601_IRQ_GPIOC,
 579                 .block  = STMPE_BLOCK_GPIO,
 580         },
 581         {
 582                 .cell   = &stmpe_keypad_cell,
 583                 .irq    = STMPE1601_IRQ_KEYPAD,
 584                 .block  = STMPE_BLOCK_KEYPAD,
 585         },
 586         {
 587                 .cell   = &stmpe_pwm_cell,
 588                 .irq    = STMPE1601_IRQ_PWM0,
 589                 .block  = STMPE_BLOCK_PWM,
 590         },
 591 };
 592
 593 /* supported autosleep timeout delay (in msecs) */
 594 static const int stmpe_autosleep_delay[] = {
 595         4, 16, 32, 64, 128, 256, 512, 1024,
 596 };
 597
 598 static int stmpe_round_timeout(int timeout)
 599 {
 600         int i;
 601
 602         for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
 603                 if (stmpe_autosleep_delay[i] >= timeout)
 604                         return i;
 605         }
 606
 607         /*
 608          * requests for delays longer than supported should not return the
 609          * longest supported delay
 610          */
 611         return -EINVAL;
 612 }
 613
 614 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
 615 {
 616         int ret;
 617
 618         if (!stmpe->variant->enable_autosleep)
 619                 return -ENOSYS;
 620
 621         mutex_lock(&stmpe->lock);
 622         ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
 623         mutex_unlock(&stmpe->lock);
 624
 625         return ret;
 626 }
 627
 628 /*
 629  * Both stmpe 1601/2403 support same layout for autosleep
 630  */
 631 static int stmpe1601_autosleep(struct stmpe *stmpe,
 632                 int autosleep_timeout)
 633 {
 634         int ret, timeout;
 635
 636         /* choose the best available timeout */
 637         timeout = stmpe_round_timeout(autosleep_timeout);
 638         if (timeout < 0) {
 639                 dev_err(stmpe->dev, "invalid timeout\n");
 640                 return timeout;
 641         }
 642
 643         ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
 644                         STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
 645                         timeout);
 646         if (ret < 0)
 647                 return ret;
 648
 649         return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
 650                         STPME1601_AUTOSLEEP_ENABLE,
 651                         STPME1601_AUTOSLEEP_ENABLE);
 652 }
 653
 654 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
 655                             bool enable)
 656 {
 657         unsigned int mask = 0;
 658
 659         if (blocks & STMPE_BLOCK_GPIO)
 660                 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
 661         else
 662                 mask &= ~STMPE1601_SYS_CTRL_ENABLE_GPIO;
 663
 664         if (blocks & STMPE_BLOCK_KEYPAD)
 665                 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
 666         else
 667                 mask &= ~STMPE1601_SYS_CTRL_ENABLE_KPC;
 668
 669         if (blocks & STMPE_BLOCK_PWM)
 670                 mask |= STMPE1601_SYS_CTRL_ENABLE_SPWM;
 671         else
 672                 mask &= ~STMPE1601_SYS_CTRL_ENABLE_SPWM;
 673
 674         return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
 675                                 enable ? mask : 0);
 676 }
 677
 678 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 679 {
 680         switch (block) {
 681         case STMPE_BLOCK_PWM:
 682                 return 2;
 683
 684         case STMPE_BLOCK_KEYPAD:
 685                 return 1;
 686
 687         case STMPE_BLOCK_GPIO:
 688         default:
 689                 return 0;
 690         }
 691 }
 692
 693 static struct stmpe_variant_info stmpe1601 = {
 694         .name           = "stmpe1601",
 695         .id_val         = 0x0210,
 696         .id_mask        = 0xfff0,       /* at least 0x0210 and 0x0212 */
 697         .num_gpios      = 16,
 698         .af_bits        = 2,
 699         .regs           = stmpe1601_regs,
 700         .blocks         = stmpe1601_blocks,
 701         .num_blocks     = ARRAY_SIZE(stmpe1601_blocks),
 702         .num_irqs       = STMPE1601_NR_INTERNAL_IRQS,
 703         .enable         = stmpe1601_enable,
 704         .get_altfunc    = stmpe1601_get_altfunc,
 705         .enable_autosleep       = stmpe1601_autosleep,
 706 };
 707
 708 /*
 709  * STMPE1801
 710  */
 711 static const u8 stmpe1801_regs[] = {
 712         [STMPE_IDX_CHIP_ID]     = STMPE1801_REG_CHIP_ID,
 713         [STMPE_IDX_ICR_LSB]     = STMPE1801_REG_INT_CTRL_LOW,
 714         [STMPE_IDX_IER_LSB]     = STMPE1801_REG_INT_EN_MASK_LOW,
 715         [STMPE_IDX_ISR_LSB]     = STMPE1801_REG_INT_STA_LOW,
 716         [STMPE_IDX_GPMR_LSB]    = STMPE1801_REG_GPIO_MP_LOW,
 717         [STMPE_IDX_GPSR_LSB]    = STMPE1801_REG_GPIO_SET_LOW,
 718         [STMPE_IDX_GPCR_LSB]    = STMPE1801_REG_GPIO_CLR_LOW,
 719         [STMPE_IDX_GPDR_LSB]    = STMPE1801_REG_GPIO_SET_DIR_LOW,
 720         [STMPE_IDX_GPRER_LSB]   = STMPE1801_REG_GPIO_RE_LOW,
 721         [STMPE_IDX_GPFER_LSB]   = STMPE1801_REG_GPIO_FE_LOW,
 722         [STMPE_IDX_GPPUR_LSB]   = STMPE1801_REG_GPIO_PULL_UP_LOW,
 723         [STMPE_IDX_IEGPIOR_LSB] = STMPE1801_REG_INT_EN_GPIO_MASK_LOW,
 724         [STMPE_IDX_ISGPIOR_LSB] = STMPE1801_REG_INT_STA_GPIO_LOW,
 725 };
 726
 727 static struct stmpe_variant_block stmpe1801_blocks[] = {
 728         {
 729                 .cell   = &stmpe_gpio_cell,
 730                 .irq    = STMPE1801_IRQ_GPIOC,
 731                 .block  = STMPE_BLOCK_GPIO,
 732         },
 733         {
 734                 .cell   = &stmpe_keypad_cell,
 735                 .irq    = STMPE1801_IRQ_KEYPAD,
 736                 .block  = STMPE_BLOCK_KEYPAD,
 737         },
 738 };
 739
 740 static int stmpe1801_enable(struct stmpe *stmpe, unsigned int blocks,
 741                             bool enable)
 742 {
 743         unsigned int mask = 0;
 744         if (blocks & STMPE_BLOCK_GPIO)
 745                 mask |= STMPE1801_MSK_INT_EN_GPIO;
 746
 747         if (blocks & STMPE_BLOCK_KEYPAD)
 748                 mask |= STMPE1801_MSK_INT_EN_KPC;
 749
 750         return __stmpe_set_bits(stmpe, STMPE1801_REG_INT_EN_MASK_LOW, mask,
 751                                 enable ? mask : 0);
 752 }
 753
 754 static int stmpe1801_reset(struct stmpe *stmpe)
 755 {
 756         unsigned long timeout;
 757         int ret = 0;
 758
 759         ret = __stmpe_set_bits(stmpe, STMPE1801_REG_SYS_CTRL,
 760                 STMPE1801_MSK_SYS_CTRL_RESET, STMPE1801_MSK_SYS_CTRL_RESET);
 761         if (ret < 0)
 762                 return ret;
 763
 764         timeout = jiffies + msecs_to_jiffies(100);
 765         while (time_before(jiffies, timeout)) {
 766                 ret = __stmpe_reg_read(stmpe, STMPE1801_REG_SYS_CTRL);
 767                 if (ret < 0)
 768                         return ret;
 769                 if (!(ret & STMPE1801_MSK_SYS_CTRL_RESET))
 770                         return 0;
 771                 usleep_range(100, 200);
 772         }
 773         return -EIO;
 774 }
 775
 776 static struct stmpe_variant_info stmpe1801 = {
 777         .name           = "stmpe1801",
 778         .id_val         = STMPE1801_ID,
 779         .id_mask        = 0xfff0,
 780         .num_gpios      = 18,
 781         .af_bits        = 0,
 782         .regs           = stmpe1801_regs,
 783         .blocks         = stmpe1801_blocks,
 784         .num_blocks     = ARRAY_SIZE(stmpe1801_blocks),
 785         .num_irqs       = STMPE1801_NR_INTERNAL_IRQS,
 786         .enable         = stmpe1801_enable,
 787         /* stmpe1801 do not have any gpio alternate function */
 788         .get_altfunc    = NULL,
 789 };
 790
 791 /*
 792  * STMPE24XX
 793  */
 794
 795 static const u8 stmpe24xx_regs[] = {
 796         [STMPE_IDX_CHIP_ID]     = STMPE24XX_REG_CHIP_ID,
 797         [STMPE_IDX_ICR_LSB]     = STMPE24XX_REG_ICR_LSB,
 798         [STMPE_IDX_IER_LSB]     = STMPE24XX_REG_IER_LSB,
 799         [STMPE_IDX_ISR_MSB]     = STMPE24XX_REG_ISR_MSB,
 800         [STMPE_IDX_GPMR_LSB]    = STMPE24XX_REG_GPMR_LSB,
 801         [STMPE_IDX_GPSR_LSB]    = STMPE24XX_REG_GPSR_LSB,
 802         [STMPE_IDX_GPCR_LSB]    = STMPE24XX_REG_GPCR_LSB,
 803         [STMPE_IDX_GPDR_LSB]    = STMPE24XX_REG_GPDR_LSB,
 804         [STMPE_IDX_GPRER_LSB]   = STMPE24XX_REG_GPRER_LSB,
 805         [STMPE_IDX_GPFER_LSB]   = STMPE24XX_REG_GPFER_LSB,
 806         [STMPE_IDX_GPPUR_LSB]   = STMPE24XX_REG_GPPUR_LSB,
 807         [STMPE_IDX_GPPDR_LSB]   = STMPE24XX_REG_GPPDR_LSB,
 808         [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
 809         [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
 810         [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
 811         [STMPE_IDX_GPEDR_MSB]   = STMPE24XX_REG_GPEDR_MSB,
 812 };
 813
 814 static struct stmpe_variant_block stmpe24xx_blocks[] = {
 815         {
 816                 .cell   = &stmpe_gpio_cell,
 817                 .irq    = STMPE24XX_IRQ_GPIOC,
 818                 .block  = STMPE_BLOCK_GPIO,
 819         },
 820         {
 821                 .cell   = &stmpe_keypad_cell,
 822                 .irq    = STMPE24XX_IRQ_KEYPAD,
 823                 .block  = STMPE_BLOCK_KEYPAD,
 824         },
 825         {
 826                 .cell   = &stmpe_pwm_cell,
 827                 .irq    = STMPE24XX_IRQ_PWM0,
 828                 .block  = STMPE_BLOCK_PWM,
 829         },
 830 };
 831
 832 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
 833                             bool enable)
 834 {
 835         unsigned int mask = 0;
 836
 837         if (blocks & STMPE_BLOCK_GPIO)
 838                 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
 839
 840         if (blocks & STMPE_BLOCK_KEYPAD)
 841                 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
 842
 843         return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
 844                                 enable ? mask : 0);
 845 }
 846
 847 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 848 {
 849         switch (block) {
 850         case STMPE_BLOCK_ROTATOR:
 851                 return 2;
 852
 853         case STMPE_BLOCK_KEYPAD:
 854         case STMPE_BLOCK_PWM:
 855                 return 1;
 856
 857         case STMPE_BLOCK_GPIO:
 858         default:
 859                 return 0;
 860         }
 861 }
 862
 863 static struct stmpe_variant_info stmpe2401 = {
 864         .name           = "stmpe2401",
 865         .id_val         = 0x0101,
 866         .id_mask        = 0xffff,
 867         .num_gpios      = 24,
 868         .af_bits        = 2,
 869         .regs           = stmpe24xx_regs,
 870         .blocks         = stmpe24xx_blocks,
 871         .num_blocks     = ARRAY_SIZE(stmpe24xx_blocks),
 872         .num_irqs       = STMPE24XX_NR_INTERNAL_IRQS,
 873         .enable         = stmpe24xx_enable,
 874         .get_altfunc    = stmpe24xx_get_altfunc,
 875 };
 876
 877 static struct stmpe_variant_info stmpe2403 = {
 878         .name           = "stmpe2403",
 879         .id_val         = 0x0120,
 880         .id_mask        = 0xffff,
 881         .num_gpios      = 24,
 882         .af_bits        = 2,
 883         .regs           = stmpe24xx_regs,
 884         .blocks         = stmpe24xx_blocks,
 885         .num_blocks     = ARRAY_SIZE(stmpe24xx_blocks),
 886         .num_irqs       = STMPE24XX_NR_INTERNAL_IRQS,
 887         .enable         = stmpe24xx_enable,
 888         .get_altfunc    = stmpe24xx_get_altfunc,
 889         .enable_autosleep       = stmpe1601_autosleep, /* same as stmpe1601 */
 890 };
 891
 892 static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = {
 893         [STMPE610]      = &stmpe610,
 894         [STMPE801]      = &stmpe801,
 895         [STMPE811]      = &stmpe811,
 896         [STMPE1601]     = &stmpe1601,
 897         [STMPE1801]     = &stmpe1801,
 898         [STMPE2401]     = &stmpe2401,
 899         [STMPE2403]     = &stmpe2403,
 900 };
 901
 902 /*
 903  * These devices can be connected in a 'no-irq' configuration - the irq pin
 904  * is not used and the device cannot interrupt the CPU. Here we only list
 905  * devices which support this configuration - the driver will fail probing
 906  * for any devices not listed here which are configured in this way.
 907  */
 908 static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = {
 909         [STMPE801]      = &stmpe801_noirq,
 910 };
 911
 912 static irqreturn_t stmpe_irq(int irq, void *data)
 913 {
 914         struct stmpe *stmpe = data;
 915         struct stmpe_variant_info *variant = stmpe->variant;
 916         int num = DIV_ROUND_UP(variant->num_irqs, 8);
 917         u8 israddr;
 918         u8 isr[3];
 919         int ret;
 920         int i;
 921
 922         if (variant->id_val == STMPE801_ID) {
 923                 int base = irq_create_mapping(stmpe->domain, 0);
 924
 925                 handle_nested_irq(base);
 926                 return IRQ_HANDLED;
 927         }
 928
 929         if (variant->id_val == STMPE1801_ID)
 930                 israddr = stmpe->regs[STMPE_IDX_ISR_LSB];
 931         else
 932                 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
 933
 934         ret = stmpe_block_read(stmpe, israddr, num, isr);
 935         if (ret < 0)
 936                 return IRQ_NONE;
 937
 938         for (i = 0; i < num; i++) {
 939                 int bank = num - i - 1;
 940                 u8 status = isr[i];
 941                 u8 clear;
 942
 943                 status &= stmpe->ier[bank];
 944                 if (!status)
 945                         continue;
 946
 947                 clear = status;
 948                 while (status) {
 949                         int bit = __ffs(status);
 950                         int line = bank * 8 + bit;
 951                         int nestedirq = irq_create_mapping(stmpe->domain, line);
 952
 953                         handle_nested_irq(nestedirq);
 954                         status &= ~(1 << bit);
 955                 }
 956
 957                 stmpe_reg_write(stmpe, israddr + i, clear);
 958         }
 959
 960         return IRQ_HANDLED;
 961 }
 962
 963 static void stmpe_irq_lock(struct irq_data *data)
 964 {
 965         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 966
 967         mutex_lock(&stmpe->irq_lock);
 968 }
 969
 970 static void stmpe_irq_sync_unlock(struct irq_data *data)
 971 {
 972         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 973         struct stmpe_variant_info *variant = stmpe->variant;
 974         int num = DIV_ROUND_UP(variant->num_irqs, 8);
 975         int i;
 976
 977         for (i = 0; i < num; i++) {
 978                 u8 new = stmpe->ier[i];
 979                 u8 old = stmpe->oldier[i];
 980
 981                 if (new == old)
 982                         continue;
 983
 984                 stmpe->oldier[i] = new;
 985                 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
 986         }
 987
 988         mutex_unlock(&stmpe->irq_lock);
 989 }
 990
 991 static void stmpe_irq_mask(struct irq_data *data)
 992 {
 993         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 994         int offset = data->hwirq;
 995         int regoffset = offset / 8;
 996         int mask = 1 << (offset % 8);
 997
 998         stmpe->ier[regoffset] &= ~mask;
 999 }
1000
1001 static void stmpe_irq_unmask(struct irq_data *data)
1002 {
1003         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
1004         int offset = data->hwirq;
1005         int regoffset = offset / 8;
1006         int mask = 1 << (offset % 8);
1007
1008         stmpe->ier[regoffset] |= mask;
1009 }
1010
1011 static struct irq_chip stmpe_irq_chip = {
1012         .name                   = "stmpe",
1013         .irq_bus_lock           = stmpe_irq_lock,
1014         .irq_bus_sync_unlock    = stmpe_irq_sync_unlock,
1015         .irq_mask               = stmpe_irq_mask,
1016         .irq_unmask             = stmpe_irq_unmask,
1017 };
1018
1019 static int stmpe_irq_map(struct irq_domain *d, unsigned int virq,
1020                                 irq_hw_number_t hwirq)
1021 {
1022         struct stmpe *stmpe = d->host_data;
1023         struct irq_chip *chip = NULL;
1024
1025         if (stmpe->variant->id_val != STMPE801_ID)
1026                 chip = &stmpe_irq_chip;
1027
1028         irq_set_chip_data(virq, stmpe);
1029         irq_set_chip_and_handler(virq, chip, handle_edge_irq);
1030         irq_set_nested_thread(virq, 1);
1031         irq_set_noprobe(virq);
1032
1033         return 0;
1034 }
1035
1036 static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq)
1037 {
1038                 irq_set_chip_and_handler(virq, NULL, NULL);
1039                 irq_set_chip_data(virq, NULL);
1040 }
1041
1042 static const struct irq_domain_ops stmpe_irq_ops = {
1043         .map    = stmpe_irq_map,
1044         .unmap  = stmpe_irq_unmap,
1045         .xlate  = irq_domain_xlate_twocell,
1046 };
1047
1048 static int stmpe_irq_init(struct stmpe *stmpe, struct device_node *np)
1049 {
1050         int base = 0;
1051         int num_irqs = stmpe->variant->num_irqs;
1052
1053         stmpe->domain = irq_domain_add_simple(np, num_irqs, base,
1054                                               &stmpe_irq_ops, stmpe);
1055         if (!stmpe->domain) {
1056                 dev_err(stmpe->dev, "Failed to create irqdomain\n");
1057                 return -ENOSYS;
1058         }
1059
1060         return 0;
1061 }
1062
1063 static int stmpe_chip_init(struct stmpe *stmpe)
1064 {
1065         unsigned int irq_trigger = stmpe->pdata->irq_trigger;
1066         int autosleep_timeout = stmpe->pdata->autosleep_timeout;
1067         struct stmpe_variant_info *variant = stmpe->variant;
1068         u8 icr = 0;
1069         unsigned int id;
1070         u8 data[2];
1071         int ret;
1072
1073         ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
1074                                ARRAY_SIZE(data), data);
1075         if (ret < 0)
1076                 return ret;
1077
1078         id = (data[0] << 8) | data[1];
1079         if ((id & variant->id_mask) != variant->id_val) {
1080                 dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
1081                 return -EINVAL;
1082         }
1083
1084         dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
1085
1086         /* Disable all modules -- subdrivers should enable what they need. */
1087         ret = stmpe_disable(stmpe, ~0);
1088         if (ret)
1089                 return ret;
1090
1091         if (id == STMPE1801_ID) {
1092                 ret =  stmpe1801_reset(stmpe);
1093                 if (ret < 0)
1094                         return ret;
1095         }
1096
1097         if (stmpe->irq >= 0) {
1098                 if (id == STMPE801_ID)
1099                         icr = STMPE801_REG_SYS_CTRL_INT_EN;
1100                 else
1101                         icr = STMPE_ICR_LSB_GIM;
1102
1103                 /* STMPE801 doesn't support Edge interrupts */
1104                 if (id != STMPE801_ID) {
1105                         if (irq_trigger == IRQF_TRIGGER_FALLING ||
1106                                         irq_trigger == IRQF_TRIGGER_RISING)
1107                                 icr |= STMPE_ICR_LSB_EDGE;
1108                 }
1109
1110                 if (irq_trigger == IRQF_TRIGGER_RISING ||
1111                                 irq_trigger == IRQF_TRIGGER_HIGH) {
1112                         if (id == STMPE801_ID)
1113                                 icr |= STMPE801_REG_SYS_CTRL_INT_HI;
1114                         else
1115                                 icr |= STMPE_ICR_LSB_HIGH;
1116                 }
1117         }
1118
1119         if (stmpe->pdata->autosleep) {
1120                 ret = stmpe_autosleep(stmpe, autosleep_timeout);
1121                 if (ret)
1122                         return ret;
1123         }
1124
1125         return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
1126 }
1127
1128 static int stmpe_add_device(struct stmpe *stmpe, const struct mfd_cell *cell)
1129 {
1130         return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
1131                                NULL, 0, stmpe->domain);
1132 }
1133
1134 static int stmpe_devices_init(struct stmpe *stmpe)
1135 {
1136         struct stmpe_variant_info *variant = stmpe->variant;
1137         unsigned int platform_blocks = stmpe->pdata->blocks;
1138         int ret = -EINVAL;
1139         int i, j;
1140
1141         for (i = 0; i < variant->num_blocks; i++) {
1142                 struct stmpe_variant_block *block = &variant->blocks[i];
1143
1144                 if (!(platform_blocks & block->block))
1145                         continue;
1146
1147                 for (j = 0; j < block->cell->num_resources; j++) {
1148                         struct resource *res =
1149                                 (struct resource *) &block->cell->resources[j];
1150
1151                         /* Dynamically fill in a variant's IRQ. */
1152                         if (res->flags & IORESOURCE_IRQ)
1153                                 res->start = res->end = block->irq + j;
1154                 }
1155
1156                 platform_blocks &= ~block->block;
1157                 ret = stmpe_add_device(stmpe, block->cell);
1158                 if (ret)
1159                         return ret;
1160         }
1161
1162         if (platform_blocks)
1163                 dev_warn(stmpe->dev,
1164                          "platform wants blocks (%#x) not present on variant",
1165                          platform_blocks);
1166
1167         return ret;
1168 }
1169
1170 static void stmpe_of_probe(struct stmpe_platform_data *pdata,
1171                            struct device_node *np)
1172 {
1173         struct device_node *child;
1174
1175         pdata->id = of_alias_get_id(np, "stmpe-i2c");
1176         if (pdata->id < 0)
1177                 pdata->id = -1;
1178
1179         pdata->irq_gpio = of_get_named_gpio_flags(np, "irq-gpio", 0,
1180                                 &pdata->irq_trigger);
1181         if (gpio_is_valid(pdata->irq_gpio))
1182                 pdata->irq_over_gpio = 1;
1183         else
1184                 pdata->irq_trigger = IRQF_TRIGGER_NONE;
1185
1186         of_property_read_u32(np, "st,autosleep-timeout",
1187                         &pdata->autosleep_timeout);
1188
1189         pdata->autosleep = (pdata->autosleep_timeout) ? true : false;
1190
1191         for_each_child_of_node(np, child) {
1192                 if (!strcmp(child->name, "stmpe_gpio")) {
1193                         pdata->blocks |= STMPE_BLOCK_GPIO;
1194                 } else if (!strcmp(child->name, "stmpe_keypad")) {
1195                         pdata->blocks |= STMPE_BLOCK_KEYPAD;
1196                 } else if (!strcmp(child->name, "stmpe_touchscreen")) {
1197                         pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN;
1198                 } else if (!strcmp(child->name, "stmpe_adc")) {
1199                         pdata->blocks |= STMPE_BLOCK_ADC;
1200                 } else if (!strcmp(child->name, "stmpe_pwm")) {
1201                         pdata->blocks |= STMPE_BLOCK_PWM;
1202                 } else if (!strcmp(child->name, "stmpe_rotator")) {
1203                         pdata->blocks |= STMPE_BLOCK_ROTATOR;
1204                 }
1205         }
1206 }
1207
1208 /* Called from client specific probe routines */
1209 int stmpe_probe(struct stmpe_client_info *ci, enum stmpe_partnum partnum)
1210 {
1211         struct stmpe_platform_data *pdata;
1212         struct device_node *np = ci->dev->of_node;
1213         struct stmpe *stmpe;
1214         int ret;
1215
1216         pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL);
1217         if (!pdata)
1218                 return -ENOMEM;
1219
1220         stmpe_of_probe(pdata, np);
1221
1222         if (of_find_property(np, "interrupts", NULL) == NULL)
1223                 ci->irq = -1;
1224
1225         stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL);
1226         if (!stmpe)
1227                 return -ENOMEM;
1228
1229         mutex_init(&stmpe->irq_lock);
1230         mutex_init(&stmpe->lock);
1231
1232         stmpe->dev = ci->dev;
1233         stmpe->client = ci->client;
1234         stmpe->pdata = pdata;
1235         stmpe->ci = ci;
1236         stmpe->partnum = partnum;
1237         stmpe->variant = stmpe_variant_info[partnum];
1238         stmpe->regs = stmpe->variant->regs;
1239         stmpe->num_gpios = stmpe->variant->num_gpios;
1240         stmpe->vcc = devm_regulator_get_optional(ci->dev, "vcc");
1241         if (!IS_ERR(stmpe->vcc)) {
1242                 ret = regulator_enable(stmpe->vcc);
1243                 if (ret)
1244                         dev_warn(ci->dev, "failed to enable VCC supply\n");
1245         }
1246         stmpe->vio = devm_regulator_get_optional(ci->dev, "vio");
1247         if (!IS_ERR(stmpe->vio)) {
1248                 ret = regulator_enable(stmpe->vio);
1249                 if (ret)
1250                         dev_warn(ci->dev, "failed to enable VIO supply\n");
1251         }
1252         dev_set_drvdata(stmpe->dev, stmpe);
1253
1254         if (ci->init)
1255                 ci->init(stmpe);
1256
1257         if (pdata->irq_over_gpio) {
1258                 ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio,
1259                                 GPIOF_DIR_IN, "stmpe");
1260                 if (ret) {
1261                         dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
1262                                         ret);
1263                         return ret;
1264                 }
1265
1266                 stmpe->irq = gpio_to_irq(pdata->irq_gpio);
1267         } else {
1268                 stmpe->irq = ci->irq;
1269         }
1270
1271         if (stmpe->irq < 0) {
1272                 /* use alternate variant info for no-irq mode, if supported */
1273                 dev_info(stmpe->dev,
1274                         "%s configured in no-irq mode by platform data\n",
1275                         stmpe->variant->name);
1276                 if (!stmpe_noirq_variant_info[stmpe->partnum]) {
1277                         dev_err(stmpe->dev,
1278                                 "%s does not support no-irq mode!\n",
1279                                 stmpe->variant->name);
1280                         return -ENODEV;
1281                 }
1282                 stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum];
1283         } else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) {
1284                 pdata->irq_trigger = irq_get_trigger_type(stmpe->irq);
1285         }
1286
1287         ret = stmpe_chip_init(stmpe);
1288         if (ret)
1289                 return ret;
1290
1291         if (stmpe->irq >= 0) {
1292                 ret = stmpe_irq_init(stmpe, np);
1293                 if (ret)
1294                         return ret;
1295
1296                 ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL,
1297                                 stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT,
1298                                 "stmpe", stmpe);
1299                 if (ret) {
1300                         dev_err(stmpe->dev, "failed to request IRQ: %d\n",
1301                                         ret);
1302                         return ret;
1303                 }
1304         }
1305
1306         ret = stmpe_devices_init(stmpe);
1307         if (!ret)
1308                 return 0;
1309
1310         dev_err(stmpe->dev, "failed to add children\n");
1311         mfd_remove_devices(stmpe->dev);
1312
1313         return ret;
1314 }
1315
1316 int stmpe_remove(struct stmpe *stmpe)
1317 {
1318         if (!IS_ERR(stmpe->vio))
1319                 regulator_disable(stmpe->vio);
1320         if (!IS_ERR(stmpe->vcc))
1321                 regulator_disable(stmpe->vcc);
1322
1323         mfd_remove_devices(stmpe->dev);
1324
1325         return 0;
1326 }
1327
1328 #ifdef CONFIG_PM
1329 static int stmpe_suspend(struct device *dev)
1330 {
1331         struct stmpe *stmpe = dev_get_drvdata(dev);
1332
1333         if (stmpe->irq >= 0 && device_may_wakeup(dev))
1334                 enable_irq_wake(stmpe->irq);
1335
1336         return 0;
1337 }
1338
1339 static int stmpe_resume(struct device *dev)
1340 {
1341         struct stmpe *stmpe = dev_get_drvdata(dev);
1342
1343         if (stmpe->irq >= 0 && device_may_wakeup(dev))
1344                 disable_irq_wake(stmpe->irq);
1345
1346         return 0;
1347 }
1348
1349 const struct dev_pm_ops stmpe_dev_pm_ops = {
1350         .suspend        = stmpe_suspend,
1351         .resume         = stmpe_resume,
1352 };
1353 #endif